ARM GAS  /tmp/cculkdOS.s 			page 1


   1              		.cpu cortex-m0
   2              		.arch armv6s-m
   3              		.fpu softvfp
   4              		.eabi_attribute 23, 1
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 2
   9              		.eabi_attribute 34, 0
  10              		.eabi_attribute 18, 4
  11              		.file	"lcm32f06x_dma.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.file 1 "Library/src/lcm32f06x_dma.c"
  16              		.section	.text.DMA_DeInit,"ax",%progbits
  17              		.align	1
  18              		.p2align 2,,3
  19              		.global	DMA_DeInit
  20              		.syntax unified
  21              		.code	16
  22              		.thumb_func
  24              	DMA_DeInit:
  25              	.LVL0:
  26              	.LFB45:
   1:Library/src/lcm32f06x_dma.c **** /**
   2:Library/src/lcm32f06x_dma.c ****   ******************************************************************************
   3:Library/src/lcm32f06x_dma.c ****   * @file    lcm32f06x_dma.c
   4:Library/src/lcm32f06x_dma.c ****   * @author  System R&D Team
   5:Library/src/lcm32f06x_dma.c ****   * @version V2.0.2
   6:Library/src/lcm32f06x_dma.c ****   * @date    10-April-2025
   7:Library/src/lcm32f06x_dma.c ****   * @brief   This file provides all the DMA firmware functions.
   8:Library/src/lcm32f06x_dma.c ****   ******************************************************************************
   9:Library/src/lcm32f06x_dma.c ****   * @attention
  10:Library/src/lcm32f06x_dma.c ****   *
  11:Library/src/lcm32f06x_dma.c ****   * Copyright (c) Hangzhou Lingxin Microelectronics Co.
  12:Library/src/lcm32f06x_dma.c ****   * All rights reserved.
  13:Library/src/lcm32f06x_dma.c ****   *
  14:Library/src/lcm32f06x_dma.c ****   * This software is licensed under terms that can be found in the LICENSE file
  15:Library/src/lcm32f06x_dma.c ****   * in the root directory of this software component.
  16:Library/src/lcm32f06x_dma.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  17:Library/src/lcm32f06x_dma.c ****   *
  18:Library/src/lcm32f06x_dma.c ****   ******************************************************************************
  19:Library/src/lcm32f06x_dma.c ****   */
  20:Library/src/lcm32f06x_dma.c **** /* Includes ------------------------------------------------------------------*/
  21:Library/src/lcm32f06x_dma.c **** #include "lcm32f06x_dma.h"
  22:Library/src/lcm32f06x_dma.c **** 
  23:Library/src/lcm32f06x_dma.c **** /**
  24:Library/src/lcm32f06x_dma.c ****   * @name   DMA_DeInit
  25:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Deinitializes the DMAy_Channelx channel to their default reset values.
  26:Library/src/lcm32f06x_dma.c ****   *         CN: 将 DMAy_Channelx 通道初始化为其默认重置值。
  27:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_Channelx: 
  28:Library/src/lcm32f06x_dma.c ****   *         EN: where y is 1 to select DMA, where x can be 0 or 1 to select DMAy channel.
  29:Library/src/lcm32f06x_dma.c ****   *         CN: 其中 y 是 1 以选择 DMA，其中 x 可以是 0 或 1 以选择 DMAy 通道。
  30:Library/src/lcm32f06x_dma.c ****   * @retval None
  31:Library/src/lcm32f06x_dma.c ****   */
  32:Library/src/lcm32f06x_dma.c **** void DMA_DeInit(DMA_Channel_TypeDef *DMAy_Channelx)
ARM GAS  /tmp/cculkdOS.s 			page 2


  33:Library/src/lcm32f06x_dma.c **** {
  27              		.loc 1 33 1 view -0
  28              		.cfi_startproc
  29              		@ args = 0, pretend = 0, frame = 0
  30              		@ frame_needed = 0, uses_anonymous_args = 0
  34:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
  35:Library/src/lcm32f06x_dma.c ****   uint32_t tmpreg;
  31              		.loc 1 35 3 view .LVU1
  36:Library/src/lcm32f06x_dma.c ****   uint32_t ch;
  32              		.loc 1 36 3 view .LVU2
  37:Library/src/lcm32f06x_dma.c **** 
  38:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
  33              		.loc 1 38 3 view .LVU3
  39:Library/src/lcm32f06x_dma.c **** 
  40:Library/src/lcm32f06x_dma.c ****   if (DMAy_Channelx == DMA1_Channel0)
  34              		.loc 1 40 3 view .LVU4
  35              		.loc 1 40 6 is_stmt 0 view .LVU5
  36 0000 304B     		ldr	r3, .L7
  33:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
  37              		.loc 1 33 1 view .LVU6
  38 0002 F0B5     		push	{r4, r5, r6, r7, lr}
  39              	.LCFI0:
  40              		.cfi_def_cfa_offset 20
  41              		.cfi_offset 4, -20
  42              		.cfi_offset 5, -16
  43              		.cfi_offset 6, -12
  44              		.cfi_offset 7, -8
  45              		.cfi_offset 14, -4
  46              		.loc 1 40 6 view .LVU7
  47 0004 9842     		cmp	r0, r3
  48 0006 57D0     		beq	.L3
  41:Library/src/lcm32f06x_dma.c ****     ch = 0;
  42:Library/src/lcm32f06x_dma.c ****   else if (DMAy_Channelx == DMA1_Channel1)
  49              		.loc 1 42 8 is_stmt 1 view .LVU8
  50              		.loc 1 42 11 is_stmt 0 view .LVU9
  51 0008 2F4B     		ldr	r3, .L7+4
  52 000a 9842     		cmp	r0, r3
  53 000c 4ED0     		beq	.L6
  54 000e 0522     		movs	r2, #5
  55 0010 8026     		movs	r6, #128
  56 0012 0421     		movs	r1, #4
  57 0014 5242     		rsbs	r2, r2, #0
  58 0016 F600     		lsls	r6, r6, #3
  59              	.L2:
  43:Library/src/lcm32f06x_dma.c ****     ch = 1;
  44:Library/src/lcm32f06x_dma.c ****   //  else if(DMAy_Channelx==DMA1_Channel5)ch=5;
  45:Library/src/lcm32f06x_dma.c ****   //  else if(DMAy_Channelx==DMA1_Channel6)ch=6;//invaild
  46:Library/src/lcm32f06x_dma.c ****   else
  47:Library/src/lcm32f06x_dma.c ****     ch = 2;                // invaild
  48:Library/src/lcm32f06x_dma.c ****   DMA1->DmaCfgReg |= 0x01; //开启DMA模块
  60              		.loc 1 48 3 is_stmt 1 view .LVU10
  61              		.loc 1 48 7 is_stmt 0 view .LVU11
  62 0018 E625     		movs	r5, #230
  49:Library/src/lcm32f06x_dma.c ****   tmpreg = DMA1->ChEnReg;
  50:Library/src/lcm32f06x_dma.c ****   tmpreg |= 1 << (ch + 8);
  51:Library/src/lcm32f06x_dma.c ****   tmpreg &= ~(1 << ch);
  52:Library/src/lcm32f06x_dma.c ****   DMA1->ChEnReg = tmpreg; //关闭对应通道
ARM GAS  /tmp/cculkdOS.s 			page 3


  53:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->SAR = 0x00;
  54:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->DAR = 0x00;
  55:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L = 0x00; //将1个burst对应1个signal（默认是1个burst对应4个signal），方便对应到
  56:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_H = 0x00; /*已核对*/
  57:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CFG_L = 0x00; /*使用硬件握手信号*/
  58:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CFG_H = 0x04; /*PROTCTL=1*/
  59:Library/src/lcm32f06x_dma.c **** 
  60:Library/src/lcm32f06x_dma.c ****   DMA1->RawTfr &= ~(1 << ch);
  61:Library/src/lcm32f06x_dma.c ****   DMA1->RawBlock &= ~(1 << ch);
  62:Library/src/lcm32f06x_dma.c ****   DMA1->RawSrcTran &= ~(1 << ch);
  63:Library/src/lcm32f06x_dma.c ****   DMA1->RawDstTran &= ~(1 << ch);
  64:Library/src/lcm32f06x_dma.c ****   DMA1->RawErr &= ~(1 << ch);
  65:Library/src/lcm32f06x_dma.c **** 
  66:Library/src/lcm32f06x_dma.c ****   DMA1->StatusTfr &= ~(1 << ch);
  67:Library/src/lcm32f06x_dma.c ****   DMA1->StatusBlock &= ~(1 << ch);
  68:Library/src/lcm32f06x_dma.c ****   DMA1->StatusSrcTran &= ~(1 << ch);
  69:Library/src/lcm32f06x_dma.c ****   DMA1->StatusDstTran &= ~(1 << ch);
  70:Library/src/lcm32f06x_dma.c ****   DMA1->StatusErr &= ~(1 << ch);
  71:Library/src/lcm32f06x_dma.c **** 
  72:Library/src/lcm32f06x_dma.c ****   DMA1->ClearTfr = 1 << ch;
  73:Library/src/lcm32f06x_dma.c ****   DMA1->ClearBlock = 1 << ch;
  74:Library/src/lcm32f06x_dma.c ****   DMA1->ClearSrcTran = 1 << ch;
  75:Library/src/lcm32f06x_dma.c ****   DMA1->ClearDstTran = 1 << ch;
  76:Library/src/lcm32f06x_dma.c ****   DMA1->ClearErr = 1 << ch;
  77:Library/src/lcm32f06x_dma.c **** }
  63              		.loc 1 77 1 view .LVU12
  64              		@ sp needed
  48:Library/src/lcm32f06x_dma.c ****   tmpreg = DMA1->ChEnReg;
  65              		.loc 1 48 19 view .LVU13
  66 001a 0127     		movs	r7, #1
  48:Library/src/lcm32f06x_dma.c ****   tmpreg = DMA1->ChEnReg;
  67              		.loc 1 48 7 view .LVU14
  68 001c 294B     		ldr	r3, .L7
  69 001e AD00     		lsls	r5, r5, #2
  70 0020 5C59     		ldr	r4, [r3, r5]
  48:Library/src/lcm32f06x_dma.c ****   tmpreg = DMA1->ChEnReg;
  71              		.loc 1 48 19 view .LVU15
  72 0022 3C43     		orrs	r4, r7
  73 0024 5C51     		str	r4, [r3, r5]
  49:Library/src/lcm32f06x_dma.c ****   tmpreg = DMA1->ChEnReg;
  74              		.loc 1 49 3 is_stmt 1 view .LVU16
  49:Library/src/lcm32f06x_dma.c ****   tmpreg = DMA1->ChEnReg;
  75              		.loc 1 49 10 is_stmt 0 view .LVU17
  76 0026 0835     		adds	r5, r5, #8
  77 0028 5C59     		ldr	r4, [r3, r5]
  78              	.LVL1:
  50:Library/src/lcm32f06x_dma.c ****   tmpreg &= ~(1 << ch);
  79              		.loc 1 50 3 is_stmt 1 view .LVU18
  50:Library/src/lcm32f06x_dma.c ****   tmpreg &= ~(1 << ch);
  80              		.loc 1 50 10 is_stmt 0 view .LVU19
  81 002a 3443     		orrs	r4, r6
  82              	.LVL2:
  51:Library/src/lcm32f06x_dma.c ****   DMA1->ChEnReg = tmpreg; //关闭对应通道
  83              		.loc 1 51 3 is_stmt 1 view .LVU20
  51:Library/src/lcm32f06x_dma.c ****   DMA1->ChEnReg = tmpreg; //关闭对应通道
  84              		.loc 1 51 10 is_stmt 0 view .LVU21
  85 002c 1440     		ands	r4, r2
ARM GAS  /tmp/cculkdOS.s 			page 4


  86              	.LVL3:
  52:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->SAR = 0x00;
  87              		.loc 1 52 3 is_stmt 1 view .LVU22
  52:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->SAR = 0x00;
  88              		.loc 1 52 17 is_stmt 0 view .LVU23
  89 002e 5C51     		str	r4, [r3, r5]
  53:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->DAR = 0x00;
  90              		.loc 1 53 3 is_stmt 1 view .LVU24
  53:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->DAR = 0x00;
  91              		.loc 1 53 22 is_stmt 0 view .LVU25
  92 0030 0024     		movs	r4, #0
  93              	.LVL4:
  53:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->DAR = 0x00;
  94              		.loc 1 53 22 view .LVU26
  95 0032 0460     		str	r4, [r0]
  96              	.LVL5:
  54:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L = 0x00; //将1个burst对应1个signal（默认是1个burst对应4个signal），方便对应到
  97              		.loc 1 54 3 is_stmt 1 view .LVU27
  54:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L = 0x00; //将1个burst对应1个signal（默认是1个burst对应4个signal），方便对应到
  98              		.loc 1 54 22 is_stmt 0 view .LVU28
  99 0034 8460     		str	r4, [r0, #8]
  55:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_H = 0x00; /*已核对*/
 100              		.loc 1 55 3 is_stmt 1 view .LVU29
  55:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_H = 0x00; /*已核对*/
 101              		.loc 1 55 24 is_stmt 0 view .LVU30
 102 0036 8461     		str	r4, [r0, #24]
  56:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CFG_L = 0x00; /*使用硬件握手信号*/
 103              		.loc 1 56 3 is_stmt 1 view .LVU31
  56:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CFG_L = 0x00; /*使用硬件握手信号*/
 104              		.loc 1 56 24 is_stmt 0 view .LVU32
 105 0038 C461     		str	r4, [r0, #28]
  57:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CFG_H = 0x04; /*PROTCTL=1*/
 106              		.loc 1 57 3 is_stmt 1 view .LVU33
  57:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CFG_H = 0x04; /*PROTCTL=1*/
 107              		.loc 1 57 24 is_stmt 0 view .LVU34
 108 003a 0464     		str	r4, [r0, #64]
  58:Library/src/lcm32f06x_dma.c **** 
 109              		.loc 1 58 3 is_stmt 1 view .LVU35
  58:Library/src/lcm32f06x_dma.c **** 
 110              		.loc 1 58 24 is_stmt 0 view .LVU36
 111 003c 0434     		adds	r4, r4, #4
 112 003e 4464     		str	r4, [r0, #68]
  60:Library/src/lcm32f06x_dma.c ****   DMA1->RawBlock &= ~(1 << ch);
 113              		.loc 1 60 3 is_stmt 1 view .LVU37
  60:Library/src/lcm32f06x_dma.c ****   DMA1->RawBlock &= ~(1 << ch);
 114              		.loc 1 60 7 is_stmt 0 view .LVU38
 115 0040 B024     		movs	r4, #176
 116 0042 A400     		lsls	r4, r4, #2
 117 0044 1859     		ldr	r0, [r3, r4]
 118              	.LVL6:
  60:Library/src/lcm32f06x_dma.c ****   DMA1->RawBlock &= ~(1 << ch);
 119              		.loc 1 60 16 view .LVU39
 120 0046 1040     		ands	r0, r2
 121 0048 1851     		str	r0, [r3, r4]
  61:Library/src/lcm32f06x_dma.c ****   DMA1->RawSrcTran &= ~(1 << ch);
 122              		.loc 1 61 3 is_stmt 1 view .LVU40
  61:Library/src/lcm32f06x_dma.c ****   DMA1->RawSrcTran &= ~(1 << ch);
ARM GAS  /tmp/cculkdOS.s 			page 5


 123              		.loc 1 61 7 is_stmt 0 view .LVU41
 124 004a 0834     		adds	r4, r4, #8
 125 004c 1859     		ldr	r0, [r3, r4]
  61:Library/src/lcm32f06x_dma.c ****   DMA1->RawSrcTran &= ~(1 << ch);
 126              		.loc 1 61 18 view .LVU42
 127 004e 1040     		ands	r0, r2
 128 0050 1851     		str	r0, [r3, r4]
  62:Library/src/lcm32f06x_dma.c ****   DMA1->RawDstTran &= ~(1 << ch);
 129              		.loc 1 62 3 is_stmt 1 view .LVU43
  62:Library/src/lcm32f06x_dma.c ****   DMA1->RawDstTran &= ~(1 << ch);
 130              		.loc 1 62 7 is_stmt 0 view .LVU44
 131 0052 0834     		adds	r4, r4, #8
 132 0054 1859     		ldr	r0, [r3, r4]
  62:Library/src/lcm32f06x_dma.c ****   DMA1->RawDstTran &= ~(1 << ch);
 133              		.loc 1 62 20 view .LVU45
 134 0056 1040     		ands	r0, r2
 135 0058 1851     		str	r0, [r3, r4]
  63:Library/src/lcm32f06x_dma.c ****   DMA1->RawErr &= ~(1 << ch);
 136              		.loc 1 63 3 is_stmt 1 view .LVU46
  63:Library/src/lcm32f06x_dma.c ****   DMA1->RawErr &= ~(1 << ch);
 137              		.loc 1 63 7 is_stmt 0 view .LVU47
 138 005a 0834     		adds	r4, r4, #8
 139 005c 1859     		ldr	r0, [r3, r4]
  63:Library/src/lcm32f06x_dma.c ****   DMA1->RawErr &= ~(1 << ch);
 140              		.loc 1 63 20 view .LVU48
 141 005e 1040     		ands	r0, r2
 142 0060 1851     		str	r0, [r3, r4]
  64:Library/src/lcm32f06x_dma.c **** 
 143              		.loc 1 64 3 is_stmt 1 view .LVU49
  64:Library/src/lcm32f06x_dma.c **** 
 144              		.loc 1 64 7 is_stmt 0 view .LVU50
 145 0062 0834     		adds	r4, r4, #8
 146 0064 1859     		ldr	r0, [r3, r4]
  64:Library/src/lcm32f06x_dma.c **** 
 147              		.loc 1 64 16 view .LVU51
 148 0066 1040     		ands	r0, r2
 149 0068 1851     		str	r0, [r3, r4]
  66:Library/src/lcm32f06x_dma.c ****   DMA1->StatusBlock &= ~(1 << ch);
 150              		.loc 1 66 3 is_stmt 1 view .LVU52
  66:Library/src/lcm32f06x_dma.c ****   DMA1->StatusBlock &= ~(1 << ch);
 151              		.loc 1 66 7 is_stmt 0 view .LVU53
 152 006a 0834     		adds	r4, r4, #8
 153 006c 1859     		ldr	r0, [r3, r4]
  66:Library/src/lcm32f06x_dma.c ****   DMA1->StatusBlock &= ~(1 << ch);
 154              		.loc 1 66 19 view .LVU54
 155 006e 1040     		ands	r0, r2
 156 0070 1851     		str	r0, [r3, r4]
  67:Library/src/lcm32f06x_dma.c ****   DMA1->StatusSrcTran &= ~(1 << ch);
 157              		.loc 1 67 3 is_stmt 1 view .LVU55
  67:Library/src/lcm32f06x_dma.c ****   DMA1->StatusSrcTran &= ~(1 << ch);
 158              		.loc 1 67 7 is_stmt 0 view .LVU56
 159 0072 0834     		adds	r4, r4, #8
 160 0074 1859     		ldr	r0, [r3, r4]
  67:Library/src/lcm32f06x_dma.c ****   DMA1->StatusSrcTran &= ~(1 << ch);
 161              		.loc 1 67 21 view .LVU57
 162 0076 1040     		ands	r0, r2
 163 0078 1851     		str	r0, [r3, r4]
ARM GAS  /tmp/cculkdOS.s 			page 6


  68:Library/src/lcm32f06x_dma.c ****   DMA1->StatusDstTran &= ~(1 << ch);
 164              		.loc 1 68 3 is_stmt 1 view .LVU58
  68:Library/src/lcm32f06x_dma.c ****   DMA1->StatusDstTran &= ~(1 << ch);
 165              		.loc 1 68 7 is_stmt 0 view .LVU59
 166 007a 0834     		adds	r4, r4, #8
 167 007c 1859     		ldr	r0, [r3, r4]
  68:Library/src/lcm32f06x_dma.c ****   DMA1->StatusDstTran &= ~(1 << ch);
 168              		.loc 1 68 23 view .LVU60
 169 007e 1040     		ands	r0, r2
 170 0080 1851     		str	r0, [r3, r4]
  69:Library/src/lcm32f06x_dma.c ****   DMA1->StatusErr &= ~(1 << ch);
 171              		.loc 1 69 3 is_stmt 1 view .LVU61
  69:Library/src/lcm32f06x_dma.c ****   DMA1->StatusErr &= ~(1 << ch);
 172              		.loc 1 69 7 is_stmt 0 view .LVU62
 173 0082 0834     		adds	r4, r4, #8
 174 0084 1859     		ldr	r0, [r3, r4]
  69:Library/src/lcm32f06x_dma.c ****   DMA1->StatusErr &= ~(1 << ch);
 175              		.loc 1 69 23 view .LVU63
 176 0086 1040     		ands	r0, r2
 177 0088 1851     		str	r0, [r3, r4]
  70:Library/src/lcm32f06x_dma.c **** 
 178              		.loc 1 70 3 is_stmt 1 view .LVU64
  70:Library/src/lcm32f06x_dma.c **** 
 179              		.loc 1 70 7 is_stmt 0 view .LVU65
 180 008a C220     		movs	r0, #194
 181 008c 8000     		lsls	r0, r0, #2
 182 008e 1C58     		ldr	r4, [r3, r0]
  70:Library/src/lcm32f06x_dma.c **** 
 183              		.loc 1 70 19 view .LVU66
 184 0090 2240     		ands	r2, r4
 185 0092 1A50     		str	r2, [r3, r0]
  72:Library/src/lcm32f06x_dma.c ****   DMA1->ClearBlock = 1 << ch;
 186              		.loc 1 72 3 is_stmt 1 view .LVU67
  72:Library/src/lcm32f06x_dma.c ****   DMA1->ClearBlock = 1 << ch;
 187              		.loc 1 72 18 is_stmt 0 view .LVU68
 188 0094 CE22     		movs	r2, #206
 189 0096 9200     		lsls	r2, r2, #2
 190 0098 9950     		str	r1, [r3, r2]
  73:Library/src/lcm32f06x_dma.c ****   DMA1->ClearSrcTran = 1 << ch;
 191              		.loc 1 73 3 is_stmt 1 view .LVU69
  73:Library/src/lcm32f06x_dma.c ****   DMA1->ClearSrcTran = 1 << ch;
 192              		.loc 1 73 20 is_stmt 0 view .LVU70
 193 009a 0832     		adds	r2, r2, #8
 194 009c 9950     		str	r1, [r3, r2]
  74:Library/src/lcm32f06x_dma.c ****   DMA1->ClearDstTran = 1 << ch;
 195              		.loc 1 74 3 is_stmt 1 view .LVU71
  74:Library/src/lcm32f06x_dma.c ****   DMA1->ClearDstTran = 1 << ch;
 196              		.loc 1 74 22 is_stmt 0 view .LVU72
 197 009e 0832     		adds	r2, r2, #8
 198 00a0 9950     		str	r1, [r3, r2]
  75:Library/src/lcm32f06x_dma.c ****   DMA1->ClearErr = 1 << ch;
 199              		.loc 1 75 3 is_stmt 1 view .LVU73
  75:Library/src/lcm32f06x_dma.c ****   DMA1->ClearErr = 1 << ch;
 200              		.loc 1 75 22 is_stmt 0 view .LVU74
 201 00a2 0832     		adds	r2, r2, #8
 202 00a4 9950     		str	r1, [r3, r2]
  76:Library/src/lcm32f06x_dma.c **** }
ARM GAS  /tmp/cculkdOS.s 			page 7


 203              		.loc 1 76 3 is_stmt 1 view .LVU75
  76:Library/src/lcm32f06x_dma.c **** }
 204              		.loc 1 76 18 is_stmt 0 view .LVU76
 205 00a6 0832     		adds	r2, r2, #8
 206 00a8 9950     		str	r1, [r3, r2]
 207              		.loc 1 77 1 view .LVU77
 208 00aa F0BD     		pop	{r4, r5, r6, r7, pc}
 209              	.LVL7:
 210              	.L6:
  42:Library/src/lcm32f06x_dma.c ****     ch = 1;
 211              		.loc 1 42 11 view .LVU78
 212 00ac 0322     		movs	r2, #3
 213 00ae 8026     		movs	r6, #128
 214 00b0 0221     		movs	r1, #2
 215 00b2 5242     		rsbs	r2, r2, #0
 216 00b4 B600     		lsls	r6, r6, #2
 217 00b6 AFE7     		b	.L2
 218              	.L3:
 219 00b8 0222     		movs	r2, #2
 220 00ba 8026     		movs	r6, #128
 221 00bc 0121     		movs	r1, #1
 222 00be 5242     		rsbs	r2, r2, #0
 223 00c0 7600     		lsls	r6, r6, #1
 224 00c2 A9E7     		b	.L2
 225              	.L8:
 226              		.align	2
 227              	.L7:
 228 00c4 00400048 		.word	1207975936
 229 00c8 58400048 		.word	1207976024
 230              		.cfi_endproc
 231              	.LFE45:
 233              		.section	.text.DMA_Init,"ax",%progbits
 234              		.align	1
 235              		.p2align 2,,3
 236              		.global	DMA_Init
 237              		.syntax unified
 238              		.code	16
 239              		.thumb_func
 241              	DMA_Init:
 242              	.LVL8:
 243              	.LFB46:
  78:Library/src/lcm32f06x_dma.c **** 
  79:Library/src/lcm32f06x_dma.c **** /**
  80:Library/src/lcm32f06x_dma.c ****   * @name   DMA_Init
  81:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Initializes the DMA channel according to the specified.
  82:Library/src/lcm32f06x_dma.c ****   *             parameters in the DMA_InitStruct.
  83:Library/src/lcm32f06x_dma.c ****   *         CN: 根据 DMA_InitStruct 中指定的参数初始化 DMA 通道。
  84:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_Channelx: 
  85:Library/src/lcm32f06x_dma.c ****   *         EN: where y is 1 to select DMA, where x can be 0 or 1 to select DMAy channel
  86:Library/src/lcm32f06x_dma.c ****   *         CN: 其中 y 是 1 以选择 DMA，其中 x 可以是 0 或 1 以选择 DMAy 通道。
  87:Library/src/lcm32f06x_dma.c ****   * @param  DMA_InitStruct:
  88:Library/src/lcm32f06x_dma.c ****   *         EN: pointer to a DMA_InitStruct structure that contains the 
  89:Library/src/lcm32f06x_dma.c ****   *             configuration information for the specified DMA peripheral.
  90:Library/src/lcm32f06x_dma.c ****   *         CN: 指向 DMA_InitStruct 结构的指针，该结构包含指定 DMA 外设的配置信息。
  91:Library/src/lcm32f06x_dma.c ****   * @retval None
  92:Library/src/lcm32f06x_dma.c ****   */
  93:Library/src/lcm32f06x_dma.c **** void DMA_Init(DMA_Channel_TypeDef *DMAy_Channelx, DMA_InitTypeDef *DMA_InitStruct)
ARM GAS  /tmp/cculkdOS.s 			page 8


  94:Library/src/lcm32f06x_dma.c **** {
 244              		.loc 1 94 1 is_stmt 1 view -0
 245              		.cfi_startproc
 246              		@ args = 0, pretend = 0, frame = 0
 247              		@ frame_needed = 0, uses_anonymous_args = 0
  95:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
  96:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
 248              		.loc 1 96 3 view .LVU80
  97:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_DIR(DMA_InitStruct->DMA_DIR));
 249              		.loc 1 97 3 view .LVU81
  98:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_PERIPHERAL_INC_STATE(DMA_InitStruct->DMA_PeripheralInc));
 250              		.loc 1 98 3 view .LVU82
  99:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_MEMORY_INC_STATE(DMA_InitStruct->DMA_MemoryInc));
 251              		.loc 1 99 3 view .LVU83
 100:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(DMA_InitStruct->DMA_PeripheralDataSize));
 252              		.loc 1 100 3 view .LVU84
 101:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_MEMORY_DATA_SIZE(DMA_InitStruct->DMA_MemoryDataSize));
 253              		.loc 1 101 3 view .LVU85
 102:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_MODE(DMA_InitStruct->DMA_Mode));
 254              		.loc 1 102 3 view .LVU86
 103:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_PRIORITY(DMA_InitStruct->DMA_Priority));
 255              		.loc 1 103 3 view .LVU87
 104:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_M2M_STATE(DMA_InitStruct->DMA_M2M));
 256              		.loc 1 104 3 view .LVU88
 105:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_MSIZE(DMA_InitStruct->DMA_MSIZE));
 257              		.loc 1 105 3 view .LVU89
 106:Library/src/lcm32f06x_dma.c **** 
 107:Library/src/lcm32f06x_dma.c ****   if (DMA_InitStruct->DMA_DIR == DMA_DIR_PeripheralSRC)
 258              		.loc 1 107 3 view .LVU90
 108:Library/src/lcm32f06x_dma.c ****   {
 109:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->SAR = DMA_InitStruct->DMA_PeripheralBaseAddr;
 110:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->DAR = DMA_InitStruct->DMA_MemoryBaseAddr;
 111:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SRC_TR_WIDTH = DMA_InitStruct->DMA_PeripheralDataSize;
 259              		.loc 1 111 57 is_stmt 0 view .LVU91
 260 0000 0722     		movs	r2, #7
  94:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 261              		.loc 1 94 1 view .LVU92
 262 0002 F0B5     		push	{r4, r5, r6, r7, lr}
 263              	.LCFI1:
 264              		.cfi_def_cfa_offset 20
 265              		.cfi_offset 4, -20
 266              		.cfi_offset 5, -16
 267              		.cfi_offset 6, -12
 268              		.cfi_offset 7, -8
 269              		.cfi_offset 14, -4
 112:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 270              		.loc 1 112 57 view .LVU93
 271 0004 CB69     		ldr	r3, [r1, #28]
 111:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 272              		.loc 1 111 57 view .LVU94
 273 0006 8C69     		ldr	r4, [r1, #24]
  94:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 274              		.loc 1 94 1 view .LVU95
 275 0008 C646     		mov	lr, r8
 111:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 276              		.loc 1 111 57 view .LVU96
 277 000a 1440     		ands	r4, r2
ARM GAS  /tmp/cculkdOS.s 			page 9


 278              		.loc 1 112 57 view .LVU97
 279 000c 1A40     		ands	r2, r3
 113:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_PeripheralInc;
 114:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DINC = DMA_InitStruct->DMA_MemoryInc;
 280              		.loc 1 114 49 view .LVU98
 281 000e 0323     		movs	r3, #3
 112:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_PeripheralInc;
 282              		.loc 1 112 57 view .LVU99
 283 0010 9046     		mov	r8, r2
 284              		.loc 1 114 49 view .LVU100
 285 0012 4F69     		ldr	r7, [r1, #20]
 113:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_PeripheralInc;
 286              		.loc 1 113 49 view .LVU101
 287 0014 0A69     		ldr	r2, [r1, #16]
 288              		.loc 1 114 49 view .LVU102
 289 0016 1F40     		ands	r7, r3
 113:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_PeripheralInc;
 290              		.loc 1 113 49 view .LVU103
 291 0018 1340     		ands	r3, r2
 107:Library/src/lcm32f06x_dma.c ****   {
 292              		.loc 1 107 6 view .LVU104
 293 001a 8A68     		ldr	r2, [r1, #8]
  94:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 294              		.loc 1 94 1 view .LVU105
 295 001c 00B5     		push	{lr}
 296              	.LCFI2:
 297              		.cfi_def_cfa_offset 24
 298              		.cfi_offset 8, -24
 109:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->DAR = DMA_InitStruct->DMA_MemoryBaseAddr;
 299              		.loc 1 109 40 view .LVU106
 300 001e 0E68     		ldr	r6, [r1]
 110:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SRC_TR_WIDTH = DMA_InitStruct->DMA_PeripheralDataSize;
 301              		.loc 1 110 40 view .LVU107
 302 0020 4D68     		ldr	r5, [r1, #4]
 107:Library/src/lcm32f06x_dma.c ****   {
 303              		.loc 1 107 6 view .LVU108
 304 0022 002A     		cmp	r2, #0
 305 0024 3ED1     		bne	.L10
 109:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->DAR = DMA_InitStruct->DMA_MemoryBaseAddr;
 306              		.loc 1 109 5 is_stmt 1 view .LVU109
 109:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->DAR = DMA_InitStruct->DMA_MemoryBaseAddr;
 307              		.loc 1 109 24 is_stmt 0 view .LVU110
 308 0026 0660     		str	r6, [r0]
 110:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SRC_TR_WIDTH = DMA_InitStruct->DMA_PeripheralDataSize;
 309              		.loc 1 110 5 is_stmt 1 view .LVU111
 111:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 310              		.loc 1 111 41 is_stmt 0 view .LVU112
 311 0028 2601     		lsls	r6, r4, #4
 312 002a 7024     		movs	r4, #112
 112:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_PeripheralInc;
 313              		.loc 1 112 41 view .LVU113
 314 002c 4246     		mov	r2, r8
 110:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SRC_TR_WIDTH = DMA_InitStruct->DMA_PeripheralDataSize;
 315              		.loc 1 110 24 view .LVU114
 316 002e 8560     		str	r5, [r0, #8]
 111:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 317              		.loc 1 111 5 is_stmt 1 view .LVU115
ARM GAS  /tmp/cculkdOS.s 			page 10


 111:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 318              		.loc 1 111 41 is_stmt 0 view .LVU116
 319 0030 8569     		ldr	r5, [r0, #24]
 320              		.loc 1 114 33 view .LVU117
 321 0032 FF01     		lsls	r7, r7, #7
 111:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 322              		.loc 1 111 41 view .LVU118
 323 0034 A543     		bics	r5, r4
 324 0036 2C00     		movs	r4, r5
 112:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_PeripheralInc;
 325              		.loc 1 112 41 view .LVU119
 326 0038 5500     		lsls	r5, r2, #1
 327 003a 0E22     		movs	r2, #14
 111:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 328              		.loc 1 111 41 view .LVU120
 329 003c 3443     		orrs	r4, r6
 330 003e 8461     		str	r4, [r0, #24]
 112:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_PeripheralInc;
 331              		.loc 1 112 5 is_stmt 1 view .LVU121
 112:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_PeripheralInc;
 332              		.loc 1 112 41 is_stmt 0 view .LVU122
 333 0040 8469     		ldr	r4, [r0, #24]
 334 0042 9443     		bics	r4, r2
 335 0044 2200     		movs	r2, r4
 336 0046 2A43     		orrs	r2, r5
 337 0048 8261     		str	r2, [r0, #24]
 113:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DINC = DMA_InitStruct->DMA_MemoryInc;
 338              		.loc 1 113 5 is_stmt 1 view .LVU123
 113:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DINC = DMA_InitStruct->DMA_MemoryInc;
 339              		.loc 1 113 33 is_stmt 0 view .LVU124
 340 004a 8269     		ldr	r2, [r0, #24]
 341 004c 5C02     		lsls	r4, r3, #9
 342 004e 244B     		ldr	r3, .L12
 343 0050 1340     		ands	r3, r2
 344 0052 2343     		orrs	r3, r4
 345 0054 8361     		str	r3, [r0, #24]
 346              		.loc 1 114 5 is_stmt 1 view .LVU125
 347              		.loc 1 114 33 is_stmt 0 view .LVU126
 348 0056 8469     		ldr	r4, [r0, #24]
 349 0058 224B     		ldr	r3, .L12+4
 350 005a 1C40     		ands	r4, r3
 351 005c 3C43     		orrs	r4, r7
 352 005e 8461     		str	r4, [r0, #24]
 353              	.L11:
 115:Library/src/lcm32f06x_dma.c ****   }
 116:Library/src/lcm32f06x_dma.c ****   else
 117:Library/src/lcm32f06x_dma.c ****   {
 118:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->DAR = DMA_InitStruct->DMA_PeripheralBaseAddr;
 119:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->SAR = DMA_InitStruct->DMA_MemoryBaseAddr;
 120:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_PeripheralDataSize;
 121:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SRC_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 122:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_MemoryInc;
 123:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DINC = DMA_InitStruct->DMA_PeripheralInc;
 124:Library/src/lcm32f06x_dma.c ****   }
 125:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_H_b.BLOCK_TS = DMA_InitStruct->DMA_BufferSize; /*the max vaild value is 4095 @
 354              		.loc 1 125 3 is_stmt 1 view .LVU127
 355              		.loc 1 125 35 is_stmt 0 view .LVU128
ARM GAS  /tmp/cculkdOS.s 			page 11


 356 0060 838B     		ldrh	r3, [r0, #28]
 357              		.loc 1 125 51 view .LVU129
 358 0062 CA68     		ldr	r2, [r1, #12]
 359              		.loc 1 125 35 view .LVU130
 360 0064 1B0B     		lsrs	r3, r3, #12
 361 0066 1205     		lsls	r2, r2, #20
 362 0068 120D     		lsrs	r2, r2, #20
 363 006a 1B03     		lsls	r3, r3, #12
 364 006c 1343     		orrs	r3, r2
 365 006e 8383     		strh	r3, [r0, #28]
 126:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L_b.TT_FC = DMA_InitStruct->DMA_M2M;
 366              		.loc 1 126 3 is_stmt 1 view .LVU131
 367              		.loc 1 126 48 is_stmt 0 view .LVU132
 368 0070 0723     		movs	r3, #7
 127:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L_b.SRC_MSIZE = DMA_InitStruct->DMA_MSIZE;
 128:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L_b.DEST_MSIZE = DMA_InitStruct->DMA_MSIZE;
 129:Library/src/lcm32f06x_dma.c **** }
 369              		.loc 1 129 1 view .LVU133
 370              		@ sp needed
 126:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L_b.TT_FC = DMA_InitStruct->DMA_M2M;
 371              		.loc 1 126 48 view .LVU134
 372 0072 0C6A     		ldr	r4, [r1, #32]
 126:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L_b.TT_FC = DMA_InitStruct->DMA_M2M;
 373              		.loc 1 126 32 view .LVU135
 374 0074 8269     		ldr	r2, [r0, #24]
 375 0076 1C4D     		ldr	r5, .L12+8
 376 0078 1C40     		ands	r4, r3
 377 007a 2A40     		ands	r2, r5
 378 007c 2405     		lsls	r4, r4, #20
 379 007e 2243     		orrs	r2, r4
 380 0080 8261     		str	r2, [r0, #24]
 127:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L_b.SRC_MSIZE = DMA_InitStruct->DMA_MSIZE;
 381              		.loc 1 127 3 is_stmt 1 view .LVU136
 127:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L_b.SRC_MSIZE = DMA_InitStruct->DMA_MSIZE;
 382              		.loc 1 127 52 is_stmt 0 view .LVU137
 383 0082 496A     		ldr	r1, [r1, #36]
 384              	.LVL9:
 127:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_L_b.SRC_MSIZE = DMA_InitStruct->DMA_MSIZE;
 385              		.loc 1 127 36 view .LVU138
 386 0084 8269     		ldr	r2, [r0, #24]
 387 0086 194C     		ldr	r4, .L12+12
 388 0088 0B40     		ands	r3, r1
 389 008a 9903     		lsls	r1, r3, #14
 390 008c 2240     		ands	r2, r4
 391 008e 0A43     		orrs	r2, r1
 392 0090 8261     		str	r2, [r0, #24]
 128:Library/src/lcm32f06x_dma.c **** }
 393              		.loc 1 128 3 is_stmt 1 view .LVU139
 128:Library/src/lcm32f06x_dma.c **** }
 394              		.loc 1 128 37 is_stmt 0 view .LVU140
 395 0092 8269     		ldr	r2, [r0, #24]
 396 0094 1649     		ldr	r1, .L12+16
 397 0096 DB02     		lsls	r3, r3, #11
 398 0098 0A40     		ands	r2, r1
 399 009a 1343     		orrs	r3, r2
 400 009c 8361     		str	r3, [r0, #24]
 401              		.loc 1 129 1 view .LVU141
ARM GAS  /tmp/cculkdOS.s 			page 12


 402 009e 80BC     		pop	{r7}
 403 00a0 B846     		mov	r8, r7
 404 00a2 F0BD     		pop	{r4, r5, r6, r7, pc}
 405              	.LVL10:
 406              	.L10:
 118:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->SAR = DMA_InitStruct->DMA_MemoryBaseAddr;
 407              		.loc 1 118 5 is_stmt 1 view .LVU142
 118:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->SAR = DMA_InitStruct->DMA_MemoryBaseAddr;
 408              		.loc 1 118 24 is_stmt 0 view .LVU143
 409 00a4 8660     		str	r6, [r0, #8]
 119:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_PeripheralDataSize;
 410              		.loc 1 119 5 is_stmt 1 view .LVU144
 120:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SRC_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 411              		.loc 1 120 41 is_stmt 0 view .LVU145
 412 00a6 6600     		lsls	r6, r4, #1
 413 00a8 0E24     		movs	r4, #14
 119:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DST_TR_WIDTH = DMA_InitStruct->DMA_PeripheralDataSize;
 414              		.loc 1 119 24 view .LVU146
 415 00aa 0560     		str	r5, [r0]
 120:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SRC_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 416              		.loc 1 120 5 is_stmt 1 view .LVU147
 120:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SRC_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 417              		.loc 1 120 41 is_stmt 0 view .LVU148
 418 00ac 8569     		ldr	r5, [r0, #24]
 121:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_MemoryInc;
 419              		.loc 1 121 41 view .LVU149
 420 00ae 4246     		mov	r2, r8
 120:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SRC_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 421              		.loc 1 120 41 view .LVU150
 422 00b0 A543     		bics	r5, r4
 423 00b2 2C00     		movs	r4, r5
 424 00b4 3443     		orrs	r4, r6
 121:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_MemoryInc;
 425              		.loc 1 121 41 view .LVU151
 426 00b6 1601     		lsls	r6, r2, #4
 427 00b8 7022     		movs	r2, #112
 120:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SRC_TR_WIDTH = DMA_InitStruct->DMA_MemoryDataSize;
 428              		.loc 1 120 41 view .LVU152
 429 00ba 8461     		str	r4, [r0, #24]
 121:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_MemoryInc;
 430              		.loc 1 121 5 is_stmt 1 view .LVU153
 121:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_MemoryInc;
 431              		.loc 1 121 41 is_stmt 0 view .LVU154
 432 00bc 8569     		ldr	r5, [r0, #24]
 122:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DINC = DMA_InitStruct->DMA_PeripheralInc;
 433              		.loc 1 122 33 view .LVU155
 434 00be 7F02     		lsls	r7, r7, #9
 121:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.SINC = DMA_InitStruct->DMA_MemoryInc;
 435              		.loc 1 121 41 view .LVU156
 436 00c0 9543     		bics	r5, r2
 437 00c2 2A00     		movs	r2, r5
 438 00c4 3243     		orrs	r2, r6
 439 00c6 8261     		str	r2, [r0, #24]
 122:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DINC = DMA_InitStruct->DMA_PeripheralInc;
 440              		.loc 1 122 5 is_stmt 1 view .LVU157
 122:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DINC = DMA_InitStruct->DMA_PeripheralInc;
 441              		.loc 1 122 33 is_stmt 0 view .LVU158
ARM GAS  /tmp/cculkdOS.s 			page 13


 442 00c8 8269     		ldr	r2, [r0, #24]
 443 00ca 054D     		ldr	r5, .L12
 123:Library/src/lcm32f06x_dma.c ****   }
 444              		.loc 1 123 33 view .LVU159
 445 00cc DC01     		lsls	r4, r3, #7
 122:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.DINC = DMA_InitStruct->DMA_PeripheralInc;
 446              		.loc 1 122 33 view .LVU160
 447 00ce 2A40     		ands	r2, r5
 448 00d0 3A43     		orrs	r2, r7
 449 00d2 8261     		str	r2, [r0, #24]
 123:Library/src/lcm32f06x_dma.c ****   }
 450              		.loc 1 123 5 is_stmt 1 view .LVU161
 123:Library/src/lcm32f06x_dma.c ****   }
 451              		.loc 1 123 33 is_stmt 0 view .LVU162
 452 00d4 8269     		ldr	r2, [r0, #24]
 453 00d6 034B     		ldr	r3, .L12+4
 454 00d8 1340     		ands	r3, r2
 455 00da 2343     		orrs	r3, r4
 456 00dc 8361     		str	r3, [r0, #24]
 457 00de BFE7     		b	.L11
 458              	.L13:
 459              		.align	2
 460              	.L12:
 461 00e0 FFF9FFFF 		.word	-1537
 462 00e4 7FFEFFFF 		.word	-385
 463 00e8 FFFF8FFF 		.word	-7340033
 464 00ec FF3FFEFF 		.word	-114689
 465 00f0 FFC7FFFF 		.word	-14337
 466              		.cfi_endproc
 467              	.LFE46:
 469              		.section	.text.DMA_StructInit,"ax",%progbits
 470              		.align	1
 471              		.p2align 2,,3
 472              		.global	DMA_StructInit
 473              		.syntax unified
 474              		.code	16
 475              		.thumb_func
 477              	DMA_StructInit:
 478              	.LVL11:
 479              	.LFB47:
 130:Library/src/lcm32f06x_dma.c **** 
 131:Library/src/lcm32f06x_dma.c **** /**
 132:Library/src/lcm32f06x_dma.c ****   * @name   DMA_StructInit
 133:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Fills each DMA_InitStruct member with its default value.
 134:Library/src/lcm32f06x_dma.c ****   *         CN: 用默认值填充每个 DMA_InitStruct 成员。
 135:Library/src/lcm32f06x_dma.c ****   * @param  DMA_InitStruct:
 136:Library/src/lcm32f06x_dma.c ****   *         EN: pointer to a DMA_InitStruct structure that contains the 
 137:Library/src/lcm32f06x_dma.c ****   *             configuration information for the specified DMA peripheral.
 138:Library/src/lcm32f06x_dma.c ****   *         CN: 指向 DMA_InitStruct 结构的指针，该结构包含指定 DMA 外设的配置信息。
 139:Library/src/lcm32f06x_dma.c ****   * @retval None
 140:Library/src/lcm32f06x_dma.c ****   */
 141:Library/src/lcm32f06x_dma.c **** void DMA_StructInit(DMA_InitTypeDef *DMA_InitStruct)
 142:Library/src/lcm32f06x_dma.c **** {
 480              		.loc 1 142 1 is_stmt 1 view -0
 481              		.cfi_startproc
 482              		@ args = 0, pretend = 0, frame = 0
 483              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  /tmp/cculkdOS.s 			page 14


 484              		@ link register save eliminated.
 143:Library/src/lcm32f06x_dma.c ****   /*-------------- Reset DMA init structure parameters values ------------------*/
 144:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_PeripheralBaseAddr member */
 145:Library/src/lcm32f06x_dma.c ****   DMA_InitStruct->DMA_PeripheralBaseAddr = 0;
 485              		.loc 1 145 3 view .LVU164
 486              		.loc 1 145 42 is_stmt 0 view .LVU165
 487 0000 0023     		movs	r3, #0
 146:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_MemoryBaseAddr member */
 147:Library/src/lcm32f06x_dma.c ****   DMA_InitStruct->DMA_MemoryBaseAddr = 0;
 148:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_DIR member */
 149:Library/src/lcm32f06x_dma.c ****   DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC;
 150:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_BufferSize member */
 151:Library/src/lcm32f06x_dma.c ****   DMA_InitStruct->DMA_BufferSize = 0; /*这里指的是传输多少个signal transfer*/
 152:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_PeripheralInc member */
 153:Library/src/lcm32f06x_dma.c ****   DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable;
 154:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_MemoryInc member */
 155:Library/src/lcm32f06x_dma.c ****   DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Enable;
 156:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_PeripheralDataSize member */
 157:Library/src/lcm32f06x_dma.c ****   DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
 158:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_MemoryDataSize member */
 159:Library/src/lcm32f06x_dma.c ****   DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
 160:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_M2M member */
 161:Library/src/lcm32f06x_dma.c ****   DMA_InitStruct->DMA_M2M = DMA_M2M_Enable;
 162:Library/src/lcm32f06x_dma.c ****      /* Initialize the DMA_MSIZE member */
 163:Library/src/lcm32f06x_dma.c ****   DMA_InitStruct->DMA_MSIZE = DMA_MSIZE_1;
 164:Library/src/lcm32f06x_dma.c **** }
 488              		.loc 1 164 1 view .LVU166
 489              		@ sp needed
 153:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_MemoryInc member */
 490              		.loc 1 153 37 view .LVU167
 491 0002 0322     		movs	r2, #3
 145:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_MemoryBaseAddr member */
 492              		.loc 1 145 42 view .LVU168
 493 0004 0360     		str	r3, [r0]
 147:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_DIR member */
 494              		.loc 1 147 3 is_stmt 1 view .LVU169
 147:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_DIR member */
 495              		.loc 1 147 38 is_stmt 0 view .LVU170
 496 0006 4360     		str	r3, [r0, #4]
 149:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_BufferSize member */
 497              		.loc 1 149 3 is_stmt 1 view .LVU171
 149:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_BufferSize member */
 498              		.loc 1 149 27 is_stmt 0 view .LVU172
 499 0008 8360     		str	r3, [r0, #8]
 151:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_PeripheralInc member */
 500              		.loc 1 151 3 is_stmt 1 view .LVU173
 151:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_PeripheralInc member */
 501              		.loc 1 151 34 is_stmt 0 view .LVU174
 502 000a C360     		str	r3, [r0, #12]
 153:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_MemoryInc member */
 503              		.loc 1 153 3 is_stmt 1 view .LVU175
 153:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_MemoryInc member */
 504              		.loc 1 153 37 is_stmt 0 view .LVU176
 505 000c 0261     		str	r2, [r0, #16]
 155:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_PeripheralDataSize member */
 506              		.loc 1 155 3 is_stmt 1 view .LVU177
 155:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_PeripheralDataSize member */
ARM GAS  /tmp/cculkdOS.s 			page 15


 507              		.loc 1 155 33 is_stmt 0 view .LVU178
 508 000e 4361     		str	r3, [r0, #20]
 157:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_MemoryDataSize member */
 509              		.loc 1 157 3 is_stmt 1 view .LVU179
 157:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_MemoryDataSize member */
 510              		.loc 1 157 42 is_stmt 0 view .LVU180
 511 0010 8361     		str	r3, [r0, #24]
 159:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_M2M member */
 512              		.loc 1 159 3 is_stmt 1 view .LVU181
 159:Library/src/lcm32f06x_dma.c ****   /* Initialize the DMA_M2M member */
 513              		.loc 1 159 38 is_stmt 0 view .LVU182
 514 0012 C361     		str	r3, [r0, #28]
 161:Library/src/lcm32f06x_dma.c ****      /* Initialize the DMA_MSIZE member */
 515              		.loc 1 161 3 is_stmt 1 view .LVU183
 161:Library/src/lcm32f06x_dma.c ****      /* Initialize the DMA_MSIZE member */
 516              		.loc 1 161 27 is_stmt 0 view .LVU184
 517 0014 0362     		str	r3, [r0, #32]
 163:Library/src/lcm32f06x_dma.c **** }
 518              		.loc 1 163 3 is_stmt 1 view .LVU185
 163:Library/src/lcm32f06x_dma.c **** }
 519              		.loc 1 163 29 is_stmt 0 view .LVU186
 520 0016 4362     		str	r3, [r0, #36]
 521              		.loc 1 164 1 view .LVU187
 522 0018 7047     		bx	lr
 523              		.cfi_endproc
 524              	.LFE47:
 526 001a C046     		.section	.text.DMA_Cmd,"ax",%progbits
 527              		.align	1
 528              		.p2align 2,,3
 529              		.global	DMA_Cmd
 530              		.syntax unified
 531              		.code	16
 532              		.thumb_func
 534              	DMA_Cmd:
 535              	.LVL12:
 536              	.LFB48:
 165:Library/src/lcm32f06x_dma.c **** 
 166:Library/src/lcm32f06x_dma.c **** /**
 167:Library/src/lcm32f06x_dma.c ****   * @name   DMA_Cmd
 168:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Enables or disables the specified DMAy_Channelx.
 169:Library/src/lcm32f06x_dma.c ****   *         CN: 启用或禁止指定的 DMAy_Channelx。
 170:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_Channelx: 
 171:Library/src/lcm32f06x_dma.c ****   *         EN: where y is 1 to select DMA, where x can be 0 or 1 to select DMAy channel.
 172:Library/src/lcm32f06x_dma.c ****   *         CN: 其中 y 是 1 以选择 DMA，其中 x 可以是 0 或 1 以选择 DMAy 通道。
 173:Library/src/lcm32f06x_dma.c ****   * @param  NewState: 
 174:Library/src/lcm32f06x_dma.c ****   *         EN: New state of the DMAy_Channelx.
 175:Library/src/lcm32f06x_dma.c ****   *         CN: DMAy_Channelx 的新状态。
 176:Library/src/lcm32f06x_dma.c ****   *             @arg ENABLE
 177:Library/src/lcm32f06x_dma.c ****   *             @arg DISABLE
 178:Library/src/lcm32f06x_dma.c ****   * @retval None
 179:Library/src/lcm32f06x_dma.c ****   */
 180:Library/src/lcm32f06x_dma.c **** void DMA_Cmd(DMA_Channel_TypeDef *DMAy_Channelx, FunctionalState NewState)
 181:Library/src/lcm32f06x_dma.c **** {
 537              		.loc 1 181 1 is_stmt 1 view -0
 538              		.cfi_startproc
 539              		@ args = 0, pretend = 0, frame = 0
 540              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  /tmp/cculkdOS.s 			page 16


 182:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 183:Library/src/lcm32f06x_dma.c ****   uint32_t ch;
 541              		.loc 1 183 3 view .LVU189
 184:Library/src/lcm32f06x_dma.c ****   uint32_t tmpreg;
 542              		.loc 1 184 3 view .LVU190
 185:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
 543              		.loc 1 185 3 view .LVU191
 186:Library/src/lcm32f06x_dma.c ****   assert_param(IS_FUNCTIONAL_STATE(NewState));
 544              		.loc 1 186 3 view .LVU192
 187:Library/src/lcm32f06x_dma.c **** 
 188:Library/src/lcm32f06x_dma.c ****   if (DMAy_Channelx == DMA1_Channel0)
 545              		.loc 1 188 3 view .LVU193
 546              		.loc 1 188 6 is_stmt 0 view .LVU194
 547 0000 164B     		ldr	r3, .L23
 181:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 548              		.loc 1 181 1 view .LVU195
 549 0002 30B5     		push	{r4, r5, lr}
 550              	.LCFI3:
 551              		.cfi_def_cfa_offset 12
 552              		.cfi_offset 4, -12
 553              		.cfi_offset 5, -8
 554              		.cfi_offset 14, -4
 555              		.loc 1 188 6 view .LVU196
 556 0004 9842     		cmp	r0, r3
 557 0006 22D0     		beq	.L19
 189:Library/src/lcm32f06x_dma.c ****     ch = 0;
 190:Library/src/lcm32f06x_dma.c ****   else if (DMAy_Channelx == DMA1_Channel1)
 558              		.loc 1 190 8 is_stmt 1 view .LVU197
 559              		.loc 1 190 11 is_stmt 0 view .LVU198
 560 0008 154B     		ldr	r3, .L23+4
 561 000a 9842     		cmp	r0, r3
 562 000c 11D0     		beq	.L21
 563 000e 0523     		movs	r3, #5
 564 0010 8024     		movs	r4, #128
 565 0012 144D     		ldr	r5, .L23+8
 566 0014 5B42     		rsbs	r3, r3, #0
 567 0016 E400     		lsls	r4, r4, #3
 568              	.L16:
 191:Library/src/lcm32f06x_dma.c ****     ch = 1;
 192:Library/src/lcm32f06x_dma.c ****   else
 193:Library/src/lcm32f06x_dma.c ****     ch = 2; // invaild
 194:Library/src/lcm32f06x_dma.c ****   tmpreg = DMA1->ChEnReg;
 569              		.loc 1 194 3 is_stmt 1 view .LVU199
 570              		.loc 1 194 10 is_stmt 0 view .LVU200
 571 0018 E822     		movs	r2, #232
 572 001a 1048     		ldr	r0, .L23
 573              	.LVL13:
 574              		.loc 1 194 10 view .LVU201
 575 001c 9200     		lsls	r2, r2, #2
 576 001e 8258     		ldr	r2, [r0, r2]
 577              	.LVL14:
 195:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 578              		.loc 1 195 3 is_stmt 1 view .LVU202
 579              		.loc 1 195 6 is_stmt 0 view .LVU203
 580 0020 0029     		cmp	r1, #0
 581 0022 11D0     		beq	.L17
 582              	.L22:
ARM GAS  /tmp/cculkdOS.s 			page 17


 196:Library/src/lcm32f06x_dma.c ****   {
 197:Library/src/lcm32f06x_dma.c ****     /* Enable the selected DMAy Channelx */
 198:Library/src/lcm32f06x_dma.c ****     tmpreg |= 0x101 << ch;
 583              		.loc 1 198 5 is_stmt 1 view .LVU204
 584              		.loc 1 198 12 is_stmt 0 view .LVU205
 585 0024 1300     		movs	r3, r2
 586 0026 2B43     		orrs	r3, r5
 587              	.LVL15:
 588              	.L18:
 199:Library/src/lcm32f06x_dma.c **** //    DMA1->ChEnReg |= 0x100 << ch;
 200:Library/src/lcm32f06x_dma.c **** //    DMA1->ChEnReg |= 0x001 << ch;
 201:Library/src/lcm32f06x_dma.c ****   }
 202:Library/src/lcm32f06x_dma.c ****   else
 203:Library/src/lcm32f06x_dma.c ****   {
 204:Library/src/lcm32f06x_dma.c ****     /* Disable the selected DMAy Channelx */
 205:Library/src/lcm32f06x_dma.c ****     tmpreg |= 0x100 << ch;
 206:Library/src/lcm32f06x_dma.c ****     tmpreg &= ~(1 << ch);
 207:Library/src/lcm32f06x_dma.c ****   }
 208:Library/src/lcm32f06x_dma.c ****   DMA1->ChEnReg = tmpreg;
 589              		.loc 1 208 3 is_stmt 1 view .LVU206
 590              		.loc 1 208 17 is_stmt 0 view .LVU207
 591 0028 E822     		movs	r2, #232
 209:Library/src/lcm32f06x_dma.c ****   
 210:Library/src/lcm32f06x_dma.c **** }
 592              		.loc 1 210 1 view .LVU208
 593              		@ sp needed
 208:Library/src/lcm32f06x_dma.c ****   
 594              		.loc 1 208 17 view .LVU209
 595 002a 0C49     		ldr	r1, .L23
 596              	.LVL16:
 208:Library/src/lcm32f06x_dma.c ****   
 597              		.loc 1 208 17 view .LVU210
 598 002c 9200     		lsls	r2, r2, #2
 599 002e 8B50     		str	r3, [r1, r2]
 600              		.loc 1 210 1 view .LVU211
 601 0030 30BD     		pop	{r4, r5, pc}
 602              	.LVL17:
 603              	.L21:
 194:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 604              		.loc 1 194 10 view .LVU212
 605 0032 E822     		movs	r2, #232
 190:Library/src/lcm32f06x_dma.c ****     ch = 1;
 606              		.loc 1 190 11 view .LVU213
 607 0034 0323     		movs	r3, #3
 608 0036 8024     		movs	r4, #128
 194:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 609              		.loc 1 194 10 view .LVU214
 610 0038 0848     		ldr	r0, .L23
 611              	.LVL18:
 194:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 612              		.loc 1 194 10 view .LVU215
 613 003a 9200     		lsls	r2, r2, #2
 190:Library/src/lcm32f06x_dma.c ****     ch = 1;
 614              		.loc 1 190 11 view .LVU216
 615 003c 0A4D     		ldr	r5, .L23+12
 194:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 616              		.loc 1 194 3 is_stmt 1 view .LVU217
ARM GAS  /tmp/cculkdOS.s 			page 18


 194:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 617              		.loc 1 194 10 is_stmt 0 view .LVU218
 618 003e 8258     		ldr	r2, [r0, r2]
 619              	.LVL19:
 195:Library/src/lcm32f06x_dma.c ****   {
 620              		.loc 1 195 3 is_stmt 1 view .LVU219
 190:Library/src/lcm32f06x_dma.c ****     ch = 1;
 621              		.loc 1 190 11 is_stmt 0 view .LVU220
 622 0040 5B42     		rsbs	r3, r3, #0
 623 0042 A400     		lsls	r4, r4, #2
 195:Library/src/lcm32f06x_dma.c ****   {
 624              		.loc 1 195 6 view .LVU221
 625 0044 0029     		cmp	r1, #0
 626 0046 EDD1     		bne	.L22
 627              	.L17:
 205:Library/src/lcm32f06x_dma.c ****     tmpreg &= ~(1 << ch);
 628              		.loc 1 205 5 is_stmt 1 view .LVU222
 205:Library/src/lcm32f06x_dma.c ****     tmpreg &= ~(1 << ch);
 629              		.loc 1 205 12 is_stmt 0 view .LVU223
 630 0048 2243     		orrs	r2, r4
 631              	.LVL20:
 206:Library/src/lcm32f06x_dma.c ****   }
 632              		.loc 1 206 5 is_stmt 1 view .LVU224
 206:Library/src/lcm32f06x_dma.c ****   }
 633              		.loc 1 206 12 is_stmt 0 view .LVU225
 634 004a 1340     		ands	r3, r2
 635 004c ECE7     		b	.L18
 636              	.LVL21:
 637              	.L19:
 206:Library/src/lcm32f06x_dma.c ****   }
 638              		.loc 1 206 12 view .LVU226
 639 004e 0223     		movs	r3, #2
 640 0050 8024     		movs	r4, #128
 641 0052 0225     		movs	r5, #2
 642 0054 5B42     		rsbs	r3, r3, #0
 643 0056 6400     		lsls	r4, r4, #1
 644 0058 FF35     		adds	r5, r5, #255
 645 005a DDE7     		b	.L16
 646              	.L24:
 647              		.align	2
 648              	.L23:
 649 005c 00400048 		.word	1207975936
 650 0060 58400048 		.word	1207976024
 651 0064 04040000 		.word	1028
 652 0068 02020000 		.word	514
 653              		.cfi_endproc
 654              	.LFE48:
 656              		.section	.text.DMA_SetCurrDataCounter,"ax",%progbits
 657              		.align	1
 658              		.p2align 2,,3
 659              		.global	DMA_SetCurrDataCounter
 660              		.syntax unified
 661              		.code	16
 662              		.thumb_func
 664              	DMA_SetCurrDataCounter:
 665              	.LVL22:
 666              	.LFB49:
ARM GAS  /tmp/cculkdOS.s 			page 19


 211:Library/src/lcm32f06x_dma.c **** 
 212:Library/src/lcm32f06x_dma.c **** /**
 213:Library/src/lcm32f06x_dma.c ****   * @name   DMA_SetCurrDataCounter
 214:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Set the current block transfer size.
 215:Library/src/lcm32f06x_dma.c ****   *         CN: 设置当前的块传输大小。
 216:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_Channelx: 
 217:Library/src/lcm32f06x_dma.c ****   *         EN: where y is 1 to select DMA, where x can be 0 or 1 to select DMAy channel.
 218:Library/src/lcm32f06x_dma.c ****   *         CN: 其中 y 是 1 以选择 DMA，其中 x 可以是 0 或 1 以选择 DMAy 通道。
 219:Library/src/lcm32f06x_dma.c ****   * @param  DataNumber: 
 220:Library/src/lcm32f06x_dma.c ****   *         EN: Block transfer size.
 221:Library/src/lcm32f06x_dma.c ****   *         CN: 块传输大小。
 222:Library/src/lcm32f06x_dma.c ****   * @retval None
 223:Library/src/lcm32f06x_dma.c ****   * @note   EN: This function can only be used when the DMAy_Channelx is disabled.
 224:Library/src/lcm32f06x_dma.c ****   *         CN: 这个函数只能在 DMAy_Channelx 禁用时使用。
 225:Library/src/lcm32f06x_dma.c ****   */
 226:Library/src/lcm32f06x_dma.c **** void DMA_SetCurrDataCounter(DMA_Channel_TypeDef *DMAy_Channelx, uint16_t DataNumber)
 227:Library/src/lcm32f06x_dma.c **** {
 667              		.loc 1 227 1 is_stmt 1 view -0
 668              		.cfi_startproc
 669              		@ args = 0, pretend = 0, frame = 0
 670              		@ frame_needed = 0, uses_anonymous_args = 0
 671              		@ link register save eliminated.
 228:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 229:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
 672              		.loc 1 229 3 view .LVU228
 230:Library/src/lcm32f06x_dma.c **** 
 231:Library/src/lcm32f06x_dma.c ****   /*Block Transfer Size */
 232:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CTL_H = (0xFFF & DataNumber);
 673              		.loc 1 232 3 view .LVU229
 674              		.loc 1 232 33 is_stmt 0 view .LVU230
 675 0000 0905     		lsls	r1, r1, #20
 676              	.LVL23:
 677              		.loc 1 232 33 view .LVU231
 678 0002 090D     		lsrs	r1, r1, #20
 679              		.loc 1 232 24 view .LVU232
 680 0004 C161     		str	r1, [r0, #28]
 233:Library/src/lcm32f06x_dma.c **** }
 681              		.loc 1 233 1 view .LVU233
 682              		@ sp needed
 683 0006 7047     		bx	lr
 684              		.cfi_endproc
 685              	.LFE49:
 687              		.section	.text.DMA_GetCurrDataCounter,"ax",%progbits
 688              		.align	1
 689              		.p2align 2,,3
 690              		.global	DMA_GetCurrDataCounter
 691              		.syntax unified
 692              		.code	16
 693              		.thumb_func
 695              	DMA_GetCurrDataCounter:
 696              	.LVL24:
 697              	.LFB50:
 234:Library/src/lcm32f06x_dma.c **** 
 235:Library/src/lcm32f06x_dma.c **** /**
 236:Library/src/lcm32f06x_dma.c ****   * @name   DMA_GetCurrDataCounter
 237:Library/src/lcm32f06x_dma.c ****   * @brief  EN: get the current block transfer size.
 238:Library/src/lcm32f06x_dma.c ****   *         CN: 获取当前的块传输大小。
ARM GAS  /tmp/cculkdOS.s 			page 20


 239:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_Channelx: 
 240:Library/src/lcm32f06x_dma.c ****   *         EN: where y is 1 to select DMA, where x can be 0 or 1 to select DMAy channel.
 241:Library/src/lcm32f06x_dma.c ****   *         CN: 其中 y 是 1 以选择 DMA，其中 x 可以是 0 或 1 以选择 DMAy 通道。
 242:Library/src/lcm32f06x_dma.c ****   * @retval EN: The number of data read by the source peripheral
 243:Library/src/lcm32f06x_dma.c ****   *         CN: 源外设读取的数据数。
 244:Library/src/lcm32f06x_dma.c ****   * @note   EN: The return value after the start of transmission is the total 
 245:Library/src/lcm32f06x_dma.c ****   *             number of data read from the source peripheral.
 246:Library/src/lcm32f06x_dma.c ****   *         CN: 传输开始后的返回值为从源外设读取的数据总数。
 247:Library/src/lcm32f06x_dma.c ****   */
 248:Library/src/lcm32f06x_dma.c **** uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef *DMAy_Channelx)
 249:Library/src/lcm32f06x_dma.c **** {
 698              		.loc 1 249 1 is_stmt 1 view -0
 699              		.cfi_startproc
 700              		@ args = 0, pretend = 0, frame = 0
 701              		@ frame_needed = 0, uses_anonymous_args = 0
 702              		@ link register save eliminated.
 250:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 251:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
 703              		.loc 1 251 3 view .LVU235
 252:Library/src/lcm32f06x_dma.c ****   /* Return the number of remaining data units for DMAy Channelx */
 253:Library/src/lcm32f06x_dma.c **** 
 254:Library/src/lcm32f06x_dma.c ****   return (uint16_t)((DMAy_Channelx->CTL_H) & 0xFFF);
 704              		.loc 1 254 3 view .LVU236
 705              		.loc 1 254 35 is_stmt 0 view .LVU237
 706 0000 C069     		ldr	r0, [r0, #28]
 707              	.LVL25:
 255:Library/src/lcm32f06x_dma.c **** }
 708              		.loc 1 255 1 view .LVU238
 709              		@ sp needed
 254:Library/src/lcm32f06x_dma.c **** }
 710              		.loc 1 254 10 view .LVU239
 711 0002 0005     		lsls	r0, r0, #20
 254:Library/src/lcm32f06x_dma.c **** }
 712              		.loc 1 254 10 discriminator 1 view .LVU240
 713 0004 000D     		lsrs	r0, r0, #20
 714              		.loc 1 255 1 view .LVU241
 715 0006 7047     		bx	lr
 716              		.cfi_endproc
 717              	.LFE50:
 719              		.section	.text.DMA_ITConfig,"ax",%progbits
 720              		.align	1
 721              		.p2align 2,,3
 722              		.global	DMA_ITConfig
 723              		.syntax unified
 724              		.code	16
 725              		.thumb_func
 727              	DMA_ITConfig:
 728              	.LVL26:
 729              	.LFB51:
 256:Library/src/lcm32f06x_dma.c **** 
 257:Library/src/lcm32f06x_dma.c **** /**
 258:Library/src/lcm32f06x_dma.c ****   * @name   DMA_ITConfig
 259:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Enables or disables the specified DMAy Channelx interrupts.
 260:Library/src/lcm32f06x_dma.c ****   *         CN: 启用或禁止指定的 DMAy 通道 x 中断。
 261:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_Channelx: 
 262:Library/src/lcm32f06x_dma.c ****   *         EN: where y is 1 to select DMA, where x can be 0 or 1 to select DMAy channel.
 263:Library/src/lcm32f06x_dma.c ****   *         CN: 其中 y 是 1 以选择 DMA，其中 x 可以是 0 或 1 以选择 DMAy 通道。
ARM GAS  /tmp/cculkdOS.s 			page 21


 264:Library/src/lcm32f06x_dma.c ****   * @param  DMA_IT: 
 265:Library/src/lcm32f06x_dma.c ****   *         EN: Clear or set the corresponding DMAy channel x interrupt.
 266:Library/src/lcm32f06x_dma.c ****   *         CN: 清除或设置对应 DMAy 通道 x 中断。
 267:Library/src/lcm32f06x_dma.c ****   *             @arg DMA1_IT_TC0
 268:Library/src/lcm32f06x_dma.c ****   *             @arg DMA1_IT_TE0
 269:Library/src/lcm32f06x_dma.c ****   *             @arg DMA1_IT_TC1
 270:Library/src/lcm32f06x_dma.c ****   *             @arg DMA1_IT_TE1
 271:Library/src/lcm32f06x_dma.c ****   * @param  NewState: 
 272:Library/src/lcm32f06x_dma.c ****   *         EN: The new state of DMA_IT (SET or RESET).
 273:Library/src/lcm32f06x_dma.c ****   *         CN: DMA_IT的新状态（SET或RESET）。
 274:Library/src/lcm32f06x_dma.c ****   * @retval None
 275:Library/src/lcm32f06x_dma.c ****   */
 276:Library/src/lcm32f06x_dma.c **** void DMA_ITConfig(DMA_Channel_TypeDef *DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState)
 277:Library/src/lcm32f06x_dma.c **** {
 730              		.loc 1 277 1 is_stmt 1 view -0
 731              		.cfi_startproc
 732              		@ args = 0, pretend = 0, frame = 0
 733              		@ frame_needed = 0, uses_anonymous_args = 0
 278:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 279:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
 734              		.loc 1 279 3 view .LVU243
 280:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_CONFIG_IT(DMA_IT));
 735              		.loc 1 280 3 view .LVU244
 281:Library/src/lcm32f06x_dma.c ****   assert_param(IS_FUNCTIONAL_STATE(NewState));
 736              		.loc 1 281 3 view .LVU245
 282:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 737              		.loc 1 282 3 view .LVU246
 283:Library/src/lcm32f06x_dma.c ****   {
 284:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.INT_EN = 1;
 285:Library/src/lcm32f06x_dma.c ****     /* Enable the selected DMA interrupts */
 286:Library/src/lcm32f06x_dma.c ****     if ((DMA_IT & 0xF0) == 0x00)
 738              		.loc 1 286 17 is_stmt 0 view .LVU247
 739 0000 F023     		movs	r3, #240
 277:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 740              		.loc 1 277 1 view .LVU248
 741 0002 10B5     		push	{r4, lr}
 742              	.LCFI4:
 743              		.cfi_def_cfa_offset 8
 744              		.cfi_offset 4, -8
 745              		.cfi_offset 14, -4
 746              		.loc 1 286 17 view .LVU249
 747 0004 0B40     		ands	r3, r1
 282:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 748              		.loc 1 282 6 view .LVU250
 749 0006 002A     		cmp	r2, #0
 750 0008 09D0     		beq	.L28
 284:Library/src/lcm32f06x_dma.c ****     /* Enable the selected DMA interrupts */
 751              		.loc 1 284 5 is_stmt 1 view .LVU251
 284:Library/src/lcm32f06x_dma.c ****     /* Enable the selected DMA interrupts */
 752              		.loc 1 284 35 is_stmt 0 view .LVU252
 753 000a 0124     		movs	r4, #1
 754 000c 8269     		ldr	r2, [r0, #24]
 755              	.LVL27:
 284:Library/src/lcm32f06x_dma.c ****     /* Enable the selected DMA interrupts */
 756              		.loc 1 284 35 view .LVU253
 757 000e 2243     		orrs	r2, r4
 758 0010 8261     		str	r2, [r0, #24]
ARM GAS  /tmp/cculkdOS.s 			page 22


 759              		.loc 1 286 5 is_stmt 1 view .LVU254
 760              		.loc 1 286 8 is_stmt 0 view .LVU255
 761 0012 002B     		cmp	r3, #0
 762 0014 19D1     		bne	.L29
 287:Library/src/lcm32f06x_dma.c ****     {
 288:Library/src/lcm32f06x_dma.c ****       DMA1->MaskBlock = (0x101 << (DMA_IT & 0x0F));
 763              		.loc 1 288 7 is_stmt 1 view .LVU256
 764              		.loc 1 288 43 is_stmt 0 view .LVU257
 765 0016 0F22     		movs	r2, #15
 766              		.loc 1 288 32 view .LVU258
 767 0018 0223     		movs	r3, #2
 768              		.loc 1 288 43 view .LVU259
 769 001a 0A40     		ands	r2, r1
 770 001c 08E0     		b	.L34
 771              	.LVL28:
 772              	.L28:
 289:Library/src/lcm32f06x_dma.c ****     }
 290:Library/src/lcm32f06x_dma.c ****     if ((DMA_IT & 0xF0) == 0x10)
 291:Library/src/lcm32f06x_dma.c ****     {
 292:Library/src/lcm32f06x_dma.c ****       DMA1->MaskErr = 0x101 << (DMA_IT & 0x0F);
 293:Library/src/lcm32f06x_dma.c ****     }
 294:Library/src/lcm32f06x_dma.c ****   }
 295:Library/src/lcm32f06x_dma.c ****   else
 296:Library/src/lcm32f06x_dma.c ****   {
 297:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_L_b.INT_EN = 0;
 773              		.loc 1 297 5 is_stmt 1 view .LVU260
 774              		.loc 1 297 35 is_stmt 0 view .LVU261
 775 001e 0124     		movs	r4, #1
 776 0020 8269     		ldr	r2, [r0, #24]
 777              	.LVL29:
 778              		.loc 1 297 35 view .LVU262
 779 0022 A243     		bics	r2, r4
 780 0024 8261     		str	r2, [r0, #24]
 298:Library/src/lcm32f06x_dma.c ****     /* Disable the selected DMA interrupts */
 299:Library/src/lcm32f06x_dma.c ****     if ((DMA_IT & 0xF0) == 0x00)
 781              		.loc 1 299 5 is_stmt 1 view .LVU263
 782              		.loc 1 299 8 is_stmt 0 view .LVU264
 783 0026 002B     		cmp	r3, #0
 784 0028 09D1     		bne	.L32
 300:Library/src/lcm32f06x_dma.c ****     {
 301:Library/src/lcm32f06x_dma.c ****       DMA1->MaskBlock = (0x100 << (DMA_IT & 0x0F));
 785              		.loc 1 301 7 is_stmt 1 view .LVU265
 786              		.loc 1 301 43 is_stmt 0 view .LVU266
 787 002a 0F22     		movs	r2, #15
 788              		.loc 1 301 32 view .LVU267
 789 002c 0133     		adds	r3, r3, #1
 790              		.loc 1 301 43 view .LVU268
 791 002e 0A40     		ands	r2, r1
 792              	.L34:
 793              		.loc 1 301 32 view .LVU269
 794 0030 FF33     		adds	r3, r3, #255
 795 0032 9340     		lsls	r3, r3, r2
 796              		.loc 1 301 23 view .LVU270
 797 0034 C622     		movs	r2, #198
 798 0036 0B49     		ldr	r1, .L36
 799              	.LVL30:
 800              		.loc 1 301 23 view .LVU271
ARM GAS  /tmp/cculkdOS.s 			page 23


 801 0038 9200     		lsls	r2, r2, #2
 802 003a 8B50     		str	r3, [r1, r2]
 302:Library/src/lcm32f06x_dma.c ****     }
 303:Library/src/lcm32f06x_dma.c ****     if ((DMA_IT & 0xF0) == 0x10)
 803              		.loc 1 303 5 is_stmt 1 view .LVU272
 804              	.L27:
 304:Library/src/lcm32f06x_dma.c ****     {
 305:Library/src/lcm32f06x_dma.c ****       DMA1->MaskErr = 0x100 << (DMA_IT & 0x0F);
 306:Library/src/lcm32f06x_dma.c ****     }
 307:Library/src/lcm32f06x_dma.c ****   }
 308:Library/src/lcm32f06x_dma.c **** }
 805              		.loc 1 308 1 is_stmt 0 view .LVU273
 806              		@ sp needed
 807 003c 10BD     		pop	{r4, pc}
 808              	.LVL31:
 809              	.L32:
 303:Library/src/lcm32f06x_dma.c ****     {
 810              		.loc 1 303 5 is_stmt 1 view .LVU274
 303:Library/src/lcm32f06x_dma.c ****     {
 811              		.loc 1 303 8 is_stmt 0 view .LVU275
 812 003e 102B     		cmp	r3, #16
 813 0040 FCD1     		bne	.L27
 305:Library/src/lcm32f06x_dma.c ****     }
 814              		.loc 1 305 7 is_stmt 1 view .LVU276
 305:Library/src/lcm32f06x_dma.c ****     }
 815              		.loc 1 305 40 is_stmt 0 view .LVU277
 816 0042 0F22     		movs	r2, #15
 305:Library/src/lcm32f06x_dma.c ****     }
 817              		.loc 1 305 29 view .LVU278
 818 0044 F033     		adds	r3, r3, #240
 305:Library/src/lcm32f06x_dma.c ****     }
 819              		.loc 1 305 40 view .LVU279
 820 0046 0A40     		ands	r2, r1
 821 0048 05E0     		b	.L35
 822              	.L29:
 290:Library/src/lcm32f06x_dma.c ****     {
 823              		.loc 1 290 5 is_stmt 1 view .LVU280
 290:Library/src/lcm32f06x_dma.c ****     {
 824              		.loc 1 290 8 is_stmt 0 view .LVU281
 825 004a 102B     		cmp	r3, #16
 826 004c F6D1     		bne	.L27
 292:Library/src/lcm32f06x_dma.c ****     }
 827              		.loc 1 292 7 is_stmt 1 view .LVU282
 292:Library/src/lcm32f06x_dma.c ****     }
 828              		.loc 1 292 40 is_stmt 0 view .LVU283
 829 004e 0F22     		movs	r2, #15
 292:Library/src/lcm32f06x_dma.c ****     }
 830              		.loc 1 292 29 view .LVU284
 831 0050 0223     		movs	r3, #2
 292:Library/src/lcm32f06x_dma.c ****     }
 832              		.loc 1 292 40 view .LVU285
 833 0052 0A40     		ands	r2, r1
 292:Library/src/lcm32f06x_dma.c ****     }
 834              		.loc 1 292 29 view .LVU286
 835 0054 FF33     		adds	r3, r3, #255
 836              	.L35:
 305:Library/src/lcm32f06x_dma.c ****     }
ARM GAS  /tmp/cculkdOS.s 			page 24


 837              		.loc 1 305 29 view .LVU287
 838 0056 9340     		lsls	r3, r3, r2
 305:Library/src/lcm32f06x_dma.c ****     }
 839              		.loc 1 305 21 view .LVU288
 840 0058 CC22     		movs	r2, #204
 841 005a 0249     		ldr	r1, .L36
 842              	.LVL32:
 305:Library/src/lcm32f06x_dma.c ****     }
 843              		.loc 1 305 21 view .LVU289
 844 005c 9200     		lsls	r2, r2, #2
 845 005e 8B50     		str	r3, [r1, r2]
 846              		.loc 1 308 1 view .LVU290
 847 0060 ECE7     		b	.L27
 848              	.L37:
 849 0062 C046     		.align	2
 850              	.L36:
 851 0064 00400048 		.word	1207975936
 852              		.cfi_endproc
 853              	.LFE51:
 855              		.section	.text.DMA_GetFlagStatus,"ax",%progbits
 856              		.align	1
 857              		.p2align 2,,3
 858              		.global	DMA_GetFlagStatus
 859              		.syntax unified
 860              		.code	16
 861              		.thumb_func
 863              	DMA_GetFlagStatus:
 864              	.LVL33:
 865              	.LFB52:
 309:Library/src/lcm32f06x_dma.c **** 
 310:Library/src/lcm32f06x_dma.c **** /**
 311:Library/src/lcm32f06x_dma.c ****   * @name   DMA_GetFlagStatus
 312:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Get the specified DMAy channel x interrupt status.
 313:Library/src/lcm32f06x_dma.c ****   *         CN: 获取指定的 DMAy 通道 x 中断状态。
 314:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_FLAG: 
 315:Library/src/lcm32f06x_dma.c ****   *         EN: specifies the flag to get.
 316:Library/src/lcm32f06x_dma.c ****   *         CN: 指定要获取的标志。
 317:Library/src/lcm32f06x_dma.c ****   *             @arg DMA1_FLAG_TC0
 318:Library/src/lcm32f06x_dma.c ****   *             @arg DMA1_FLAG_TE0
 319:Library/src/lcm32f06x_dma.c ****   *             @arg DMA1_FLAG_TC1
 320:Library/src/lcm32f06x_dma.c ****   *             @arg DMA1_FLAG_TE1
 321:Library/src/lcm32f06x_dma.c ****   * @retval FlagStatus
 322:Library/src/lcm32f06x_dma.c ****   *         EN: The new state of DMA_FLAG (SET or RESET).
 323:Library/src/lcm32f06x_dma.c ****   *         CN: DMA_FLAG的新状态（SET或RESET）。
 324:Library/src/lcm32f06x_dma.c ****   */
 325:Library/src/lcm32f06x_dma.c **** FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG)
 326:Library/src/lcm32f06x_dma.c **** {
 866              		.loc 1 326 1 is_stmt 1 view -0
 867              		.cfi_startproc
 868              		@ args = 0, pretend = 0, frame = 0
 869              		@ frame_needed = 0, uses_anonymous_args = 0
 870              		@ link register save eliminated.
 327:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 328:Library/src/lcm32f06x_dma.c ****   uint32_t tmp;
 871              		.loc 1 328 3 view .LVU292
 329:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_GET_FLAG(DMAy_FLAG));
 872              		.loc 1 329 3 view .LVU293
ARM GAS  /tmp/cculkdOS.s 			page 25


 330:Library/src/lcm32f06x_dma.c ****   if ((DMAy_FLAG & 0xF0) == 0x00)
 873              		.loc 1 330 3 view .LVU294
 874              		.loc 1 330 18 is_stmt 0 view .LVU295
 875 0000 F022     		movs	r2, #240
 876 0002 1100     		movs	r1, r2
 877 0004 0140     		ands	r1, r0
 878              		.loc 1 330 6 view .LVU296
 879 0006 0242     		tst	r2, r0
 880 0008 0AD1     		bne	.L39
 331:Library/src/lcm32f06x_dma.c ****   {
 332:Library/src/lcm32f06x_dma.c ****     tmp = (DMA1->RawBlock >> (((uint8_t)DMAy_FLAG) & 0x0F)) & 0x01;
 881              		.loc 1 332 5 is_stmt 1 view .LVU297
 882              		.loc 1 332 16 is_stmt 0 view .LVU298
 883 000a B223     		movs	r3, #178
 884 000c 074A     		ldr	r2, .L42
 885              	.L41:
 333:Library/src/lcm32f06x_dma.c ****   }
 334:Library/src/lcm32f06x_dma.c ****   if ((DMAy_FLAG & 0xF0) == 0x10)
 335:Library/src/lcm32f06x_dma.c ****   {
 336:Library/src/lcm32f06x_dma.c ****     tmp = (DMA1->RawErr >> (DMAy_FLAG & 0x0F)) & 0x01;
 886              		.loc 1 336 16 view .LVU299
 887 000e 9B00     		lsls	r3, r3, #2
 888 0010 D358     		ldr	r3, [r2, r3]
 889              		.loc 1 336 39 view .LVU300
 890 0012 0F22     		movs	r2, #15
 891 0014 0240     		ands	r2, r0
 892              		.loc 1 336 25 view .LVU301
 893 0016 D340     		lsrs	r3, r3, r2
 894              		.loc 1 336 9 view .LVU302
 895 0018 0120     		movs	r0, #1
 896              	.LVL34:
 897              		.loc 1 336 9 view .LVU303
 898 001a 0340     		ands	r3, r0
 899              	.L40:
 900              	.LVL35:
 337:Library/src/lcm32f06x_dma.c ****   }
 338:Library/src/lcm32f06x_dma.c ****   if (tmp)
 901              		.loc 1 338 3 is_stmt 1 view .LVU304
 339:Library/src/lcm32f06x_dma.c ****     return SET;
 340:Library/src/lcm32f06x_dma.c ****   return RESET;
 341:Library/src/lcm32f06x_dma.c **** }
 902              		.loc 1 341 1 is_stmt 0 view .LVU305
 903 001c D8B2     		uxtb	r0, r3
 904              		@ sp needed
 905 001e 7047     		bx	lr
 906              	.LVL36:
 907              	.L39:
 334:Library/src/lcm32f06x_dma.c ****   {
 908              		.loc 1 334 3 is_stmt 1 view .LVU306
 334:Library/src/lcm32f06x_dma.c ****   {
 909              		.loc 1 334 6 is_stmt 0 view .LVU307
 910 0020 1029     		cmp	r1, #16
 911 0022 FBD1     		bne	.L40
 336:Library/src/lcm32f06x_dma.c ****   }
 912              		.loc 1 336 5 is_stmt 1 view .LVU308
 336:Library/src/lcm32f06x_dma.c ****   }
 913              		.loc 1 336 16 is_stmt 0 view .LVU309
ARM GAS  /tmp/cculkdOS.s 			page 26


 914 0024 B823     		movs	r3, #184
 915 0026 014A     		ldr	r2, .L42
 916 0028 F1E7     		b	.L41
 917              	.L43:
 918 002a C046     		.align	2
 919              	.L42:
 920 002c 00400048 		.word	1207975936
 921              		.cfi_endproc
 922              	.LFE52:
 924              		.section	.text.DMA_ClearFlag,"ax",%progbits
 925              		.align	1
 926              		.p2align 2,,3
 927              		.global	DMA_ClearFlag
 928              		.syntax unified
 929              		.code	16
 930              		.thumb_func
 932              	DMA_ClearFlag:
 933              	.LVL37:
 934              	.LFB53:
 342:Library/src/lcm32f06x_dma.c **** 
 343:Library/src/lcm32f06x_dma.c **** /**
 344:Library/src/lcm32f06x_dma.c ****   * @name   DMA_ClearFlag
 345:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Clears the DMAy Channelx's pending flags.
 346:Library/src/lcm32f06x_dma.c ****   *         CN: 清除DMAy Channelx的挂起标志。
 347:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_IT: 
 348:Library/src/lcm32f06x_dma.c ****   *         EN: specifies the flag to clear.
 349:Library/src/lcm32f06x_dma.c ****   *         CN: 指定要清除的标志。
 350:Library/src/lcm32f06x_dma.c ****   * @retval None
 351:Library/src/lcm32f06x_dma.c ****   */
 352:Library/src/lcm32f06x_dma.c **** void DMA_ClearFlag(uint32_t DMAy_FLAG)
 353:Library/src/lcm32f06x_dma.c **** {
 935              		.loc 1 353 1 is_stmt 1 view -0
 936              		.cfi_startproc
 937              		@ args = 0, pretend = 0, frame = 0
 938              		@ frame_needed = 0, uses_anonymous_args = 0
 354:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 355:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_CLEAR_FLAG(DMAy_FLAG));
 939              		.loc 1 355 3 view .LVU311
 356:Library/src/lcm32f06x_dma.c ****   if ((DMAy_FLAG & 0xF0) == 0x00)
 940              		.loc 1 356 3 view .LVU312
 941              		.loc 1 356 18 is_stmt 0 view .LVU313
 942 0000 F023     		movs	r3, #240
 943 0002 1A00     		movs	r2, r3
 353:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 944              		.loc 1 353 1 view .LVU314
 945 0004 30B5     		push	{r4, r5, lr}
 946              	.LCFI5:
 947              		.cfi_def_cfa_offset 12
 948              		.cfi_offset 4, -12
 949              		.cfi_offset 5, -8
 950              		.cfi_offset 14, -4
 951              		.loc 1 356 18 view .LVU315
 952 0006 0240     		ands	r2, r0
 953              		.loc 1 356 6 view .LVU316
 954 0008 0342     		tst	r3, r0
 955 000a 0AD1     		bne	.L45
 357:Library/src/lcm32f06x_dma.c ****   {
ARM GAS  /tmp/cculkdOS.s 			page 27


 358:Library/src/lcm32f06x_dma.c ****     DMA1->ClearBlock |= 1 << (DMAy_FLAG & 0x0F);
 956              		.loc 1 358 5 is_stmt 1 view .LVU317
 957              		.loc 1 358 9 is_stmt 0 view .LVU318
 958 000c D021     		movs	r1, #208
 959              		.loc 1 358 41 view .LVU319
 960 000e 0F22     		movs	r2, #15
 961              		.loc 1 358 9 view .LVU320
 962 0010 084C     		ldr	r4, .L48
 963 0012 8900     		lsls	r1, r1, #2
 964 0014 6558     		ldr	r5, [r4, r1]
 965              	.L47:
 359:Library/src/lcm32f06x_dma.c ****   }
 360:Library/src/lcm32f06x_dma.c ****   if ((DMAy_FLAG & 0xF0) == 0x10)
 361:Library/src/lcm32f06x_dma.c ****   {
 362:Library/src/lcm32f06x_dma.c ****     DMA1->ClearErr |= 1 << (DMAy_FLAG & 0x0F);
 966              		.loc 1 362 25 view .LVU321
 967 0016 0123     		movs	r3, #1
 968              		.loc 1 362 39 view .LVU322
 969 0018 0240     		ands	r2, r0
 970              		.loc 1 362 25 view .LVU323
 971 001a 9340     		lsls	r3, r3, r2
 972              		.loc 1 362 20 view .LVU324
 973 001c 2B43     		orrs	r3, r5
 974 001e 6350     		str	r3, [r4, r1]
 975              	.L44:
 363:Library/src/lcm32f06x_dma.c ****   }
 364:Library/src/lcm32f06x_dma.c **** }
 976              		.loc 1 364 1 view .LVU325
 977              		@ sp needed
 978 0020 30BD     		pop	{r4, r5, pc}
 979              	.L45:
 360:Library/src/lcm32f06x_dma.c ****   {
 980              		.loc 1 360 3 is_stmt 1 view .LVU326
 360:Library/src/lcm32f06x_dma.c ****   {
 981              		.loc 1 360 6 is_stmt 0 view .LVU327
 982 0022 102A     		cmp	r2, #16
 983 0024 FCD1     		bne	.L44
 362:Library/src/lcm32f06x_dma.c ****   }
 984              		.loc 1 362 5 is_stmt 1 view .LVU328
 362:Library/src/lcm32f06x_dma.c ****   }
 985              		.loc 1 362 9 is_stmt 0 view .LVU329
 986 0026 D621     		movs	r1, #214
 987 0028 024C     		ldr	r4, .L48
 988 002a 8900     		lsls	r1, r1, #2
 989 002c 6558     		ldr	r5, [r4, r1]
 362:Library/src/lcm32f06x_dma.c ****   }
 990              		.loc 1 362 39 view .LVU330
 991 002e 013A     		subs	r2, r2, #1
 992 0030 F1E7     		b	.L47
 993              	.L49:
 994 0032 C046     		.align	2
 995              	.L48:
 996 0034 00400048 		.word	1207975936
 997              		.cfi_endproc
 998              	.LFE53:
 1000              		.section	.text.DMA_GetITStatus,"ax",%progbits
 1001              		.align	1
ARM GAS  /tmp/cculkdOS.s 			page 28


 1002              		.p2align 2,,3
 1003              		.global	DMA_GetITStatus
 1004              		.syntax unified
 1005              		.code	16
 1006              		.thumb_func
 1008              	DMA_GetITStatus:
 1009              	.LVL38:
 1010              	.LFB54:
 365:Library/src/lcm32f06x_dma.c **** 
 366:Library/src/lcm32f06x_dma.c **** /**
 367:Library/src/lcm32f06x_dma.c ****   * @name   DMA_GetITStatus
 368:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Checks whether the specified DMAy Channelx interrupt has occurred or not.
 369:Library/src/lcm32f06x_dma.c ****   *         CN: 检查指定的DMAy Channelx中断是否已发生。
 370:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_IT: 
 371:Library/src/lcm32f06x_dma.c ****   *         EN: specifies the DMA interrupt pending bit to clear.
 372:Library/src/lcm32f06x_dma.c ****   *         CN: 指定要清除的DMA中断挂起位。
 373:Library/src/lcm32f06x_dma.c ****   * @retval ITStatus
 374:Library/src/lcm32f06x_dma.c ****   *         EN: The new state of DMA_IT (SET or RESET).
 375:Library/src/lcm32f06x_dma.c ****   *         CN: DMA_IT的新状态（SET或RESET）。
 376:Library/src/lcm32f06x_dma.c ****   */
 377:Library/src/lcm32f06x_dma.c **** ITStatus DMA_GetITStatus(uint32_t DMAy_IT)
 378:Library/src/lcm32f06x_dma.c **** {
 1011              		.loc 1 378 1 is_stmt 1 view -0
 1012              		.cfi_startproc
 1013              		@ args = 0, pretend = 0, frame = 0
 1014              		@ frame_needed = 0, uses_anonymous_args = 0
 1015              		@ link register save eliminated.
 379:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 380:Library/src/lcm32f06x_dma.c ****   uint32_t tmp;
 1016              		.loc 1 380 3 view .LVU332
 381:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_GET_FLAG(DMAy_IT));
 1017              		.loc 1 381 3 view .LVU333
 382:Library/src/lcm32f06x_dma.c ****   if ((DMAy_IT & 0xF0) == 0x00)
 1018              		.loc 1 382 3 view .LVU334
 1019              		.loc 1 382 16 is_stmt 0 view .LVU335
 1020 0000 F022     		movs	r2, #240
 1021 0002 1100     		movs	r1, r2
 1022 0004 0140     		ands	r1, r0
 1023              		.loc 1 382 6 view .LVU336
 1024 0006 0242     		tst	r2, r0
 1025 0008 0AD1     		bne	.L51
 383:Library/src/lcm32f06x_dma.c ****   {
 384:Library/src/lcm32f06x_dma.c ****     tmp = (DMA1->StatusBlock >> (DMAy_IT & 0x0F)) & 0x01;
 1026              		.loc 1 384 5 is_stmt 1 view .LVU337
 1027              		.loc 1 384 16 is_stmt 0 view .LVU338
 1028 000a BC23     		movs	r3, #188
 1029 000c 074A     		ldr	r2, .L54
 1030              	.L53:
 385:Library/src/lcm32f06x_dma.c ****   }
 386:Library/src/lcm32f06x_dma.c ****   if ((DMAy_IT & 0xF0) == 0x10)
 387:Library/src/lcm32f06x_dma.c ****   {
 388:Library/src/lcm32f06x_dma.c ****     tmp = (DMA1->StatusErr >> (DMAy_IT & 0x0F)) & 0x01;
 1031              		.loc 1 388 16 view .LVU339
 1032 000e 9B00     		lsls	r3, r3, #2
 1033 0010 D358     		ldr	r3, [r2, r3]
 1034              		.loc 1 388 40 view .LVU340
 1035 0012 0F22     		movs	r2, #15
ARM GAS  /tmp/cculkdOS.s 			page 29


 1036 0014 0240     		ands	r2, r0
 1037              		.loc 1 388 28 view .LVU341
 1038 0016 D340     		lsrs	r3, r3, r2
 1039              		.loc 1 388 9 view .LVU342
 1040 0018 0120     		movs	r0, #1
 1041              	.LVL39:
 1042              		.loc 1 388 9 view .LVU343
 1043 001a 0340     		ands	r3, r0
 1044              	.L52:
 1045              	.LVL40:
 389:Library/src/lcm32f06x_dma.c ****   }
 390:Library/src/lcm32f06x_dma.c ****   if (tmp)
 1046              		.loc 1 390 3 is_stmt 1 view .LVU344
 391:Library/src/lcm32f06x_dma.c ****     return SET;
 392:Library/src/lcm32f06x_dma.c ****   return RESET;
 393:Library/src/lcm32f06x_dma.c **** }
 1047              		.loc 1 393 1 is_stmt 0 view .LVU345
 1048 001c D8B2     		uxtb	r0, r3
 1049              		@ sp needed
 1050 001e 7047     		bx	lr
 1051              	.LVL41:
 1052              	.L51:
 386:Library/src/lcm32f06x_dma.c ****   {
 1053              		.loc 1 386 3 is_stmt 1 view .LVU346
 386:Library/src/lcm32f06x_dma.c ****   {
 1054              		.loc 1 386 6 is_stmt 0 view .LVU347
 1055 0020 1029     		cmp	r1, #16
 1056 0022 FBD1     		bne	.L52
 388:Library/src/lcm32f06x_dma.c ****   }
 1057              		.loc 1 388 5 is_stmt 1 view .LVU348
 388:Library/src/lcm32f06x_dma.c ****   }
 1058              		.loc 1 388 16 is_stmt 0 view .LVU349
 1059 0024 C223     		movs	r3, #194
 1060 0026 014A     		ldr	r2, .L54
 1061 0028 F1E7     		b	.L53
 1062              	.L55:
 1063 002a C046     		.align	2
 1064              	.L54:
 1065 002c 00400048 		.word	1207975936
 1066              		.cfi_endproc
 1067              	.LFE54:
 1069              		.section	.text.DMA_ClearITPendingBit,"ax",%progbits
 1070              		.align	1
 1071              		.p2align 2,,3
 1072              		.global	DMA_ClearITPendingBit
 1073              		.syntax unified
 1074              		.code	16
 1075              		.thumb_func
 1077              	DMA_ClearITPendingBit:
 1078              	.LVL42:
 1079              	.LFB55:
 394:Library/src/lcm32f06x_dma.c **** 
 395:Library/src/lcm32f06x_dma.c **** /**
 396:Library/src/lcm32f06x_dma.c ****   * @name   DMA_ClearITPendingBit
 397:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Clears the DMAy Channelx's interrupt pending bits.
 398:Library/src/lcm32f06x_dma.c ****   *         CN: 清除DMAy Channelx的中断挂起位。
 399:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_IT: 
ARM GAS  /tmp/cculkdOS.s 			page 30


 400:Library/src/lcm32f06x_dma.c ****   *         EN: specifies the DMA interrupt pending bit to clear.
 401:Library/src/lcm32f06x_dma.c ****   *         CN: 指定要清除的DMA中断挂起位。
 402:Library/src/lcm32f06x_dma.c ****   * @note   Clearing the Global interrupt (DMAy_IT_GLx) results in clearing all other
 403:Library/src/lcm32f06x_dma.c ****   *         interrupts relative to the same channel (Transfer Complete, Half-transfer
 404:Library/src/lcm32f06x_dma.c ****   *         Complete and Transfer Error interrupts: DMAy_IT_TCx, DMAy_IT_HTx and
 405:Library/src/lcm32f06x_dma.c ****   *         DMAy_IT_TEx).
 406:Library/src/lcm32f06x_dma.c ****   * @retval None
 407:Library/src/lcm32f06x_dma.c ****   */
 408:Library/src/lcm32f06x_dma.c **** void DMA_ClearITPendingBit(uint32_t DMAy_IT)
 409:Library/src/lcm32f06x_dma.c **** {
 1080              		.loc 1 409 1 is_stmt 1 view -0
 1081              		.cfi_startproc
 1082              		@ args = 0, pretend = 0, frame = 0
 1083              		@ frame_needed = 0, uses_anonymous_args = 0
 1084              		@ link register save eliminated.
 410:Library/src/lcm32f06x_dma.c ****   /* Check the parameters */
 411:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_CLEAR_FLAG(DMAy_IT));
 1085              		.loc 1 411 3 view .LVU351
 412:Library/src/lcm32f06x_dma.c ****   if ((DMAy_IT & 0xF0) == 0x00)
 1086              		.loc 1 412 3 view .LVU352
 1087              		.loc 1 412 16 is_stmt 0 view .LVU353
 1088 0000 F023     		movs	r3, #240
 1089 0002 1A00     		movs	r2, r3
 1090 0004 0240     		ands	r2, r0
 1091              		.loc 1 412 6 view .LVU354
 1092 0006 0342     		tst	r3, r0
 1093 0008 08D1     		bne	.L57
 413:Library/src/lcm32f06x_dma.c ****   {
 414:Library/src/lcm32f06x_dma.c ****     DMA1->ClearBlock = 1 << (DMAy_IT & 0x0F);
 1094              		.loc 1 414 5 is_stmt 1 view .LVU355
 1095              		.loc 1 414 38 is_stmt 0 view .LVU356
 1096 000a 0F22     		movs	r2, #15
 1097              		.loc 1 414 26 view .LVU357
 1098 000c EF3B     		subs	r3, r3, #239
 1099              		.loc 1 414 38 view .LVU358
 1100 000e 0240     		ands	r2, r0
 1101              		.loc 1 414 26 view .LVU359
 1102 0010 9340     		lsls	r3, r3, r2
 1103              		.loc 1 414 22 view .LVU360
 1104 0012 D022     		movs	r2, #208
 1105 0014 0749     		ldr	r1, .L59
 1106 0016 9200     		lsls	r2, r2, #2
 1107 0018 8B50     		str	r3, [r1, r2]
 415:Library/src/lcm32f06x_dma.c ****   }
 416:Library/src/lcm32f06x_dma.c ****   if ((DMAy_IT & 0xF0) == 0x10)
 1108              		.loc 1 416 3 is_stmt 1 view .LVU361
 1109              	.L56:
 417:Library/src/lcm32f06x_dma.c ****   {
 418:Library/src/lcm32f06x_dma.c ****     DMA1->ClearErr = 1 << (DMAy_IT & 0x0F);
 419:Library/src/lcm32f06x_dma.c ****   }
 420:Library/src/lcm32f06x_dma.c **** }
 1110              		.loc 1 420 1 is_stmt 0 view .LVU362
 1111              		@ sp needed
 1112 001a 7047     		bx	lr
 1113              	.L57:
 416:Library/src/lcm32f06x_dma.c ****   {
 1114              		.loc 1 416 3 is_stmt 1 view .LVU363
ARM GAS  /tmp/cculkdOS.s 			page 31


 416:Library/src/lcm32f06x_dma.c ****   {
 1115              		.loc 1 416 6 is_stmt 0 view .LVU364
 1116 001c 102A     		cmp	r2, #16
 1117 001e FCD1     		bne	.L56
 418:Library/src/lcm32f06x_dma.c ****   }
 1118              		.loc 1 418 5 is_stmt 1 view .LVU365
 418:Library/src/lcm32f06x_dma.c ****   }
 1119              		.loc 1 418 24 is_stmt 0 view .LVU366
 1120 0020 0123     		movs	r3, #1
 418:Library/src/lcm32f06x_dma.c ****   }
 1121              		.loc 1 418 36 view .LVU367
 1122 0022 013A     		subs	r2, r2, #1
 1123 0024 0240     		ands	r2, r0
 418:Library/src/lcm32f06x_dma.c ****   }
 1124              		.loc 1 418 24 view .LVU368
 1125 0026 9340     		lsls	r3, r3, r2
 418:Library/src/lcm32f06x_dma.c ****   }
 1126              		.loc 1 418 20 view .LVU369
 1127 0028 D622     		movs	r2, #214
 1128 002a 0249     		ldr	r1, .L59
 1129 002c 9200     		lsls	r2, r2, #2
 1130 002e 8B50     		str	r3, [r1, r2]
 1131              		.loc 1 420 1 view .LVU370
 1132 0030 F3E7     		b	.L56
 1133              	.L60:
 1134 0032 C046     		.align	2
 1135              	.L59:
 1136 0034 00400048 		.word	1207975936
 1137              		.cfi_endproc
 1138              	.LFE55:
 1140              		.section	.text.DMA_RemapConfig,"ax",%progbits
 1141              		.align	1
 1142              		.p2align 2,,3
 1143              		.global	DMA_RemapConfig
 1144              		.syntax unified
 1145              		.code	16
 1146              		.thumb_func
 1148              	DMA_RemapConfig:
 1149              	.LVL43:
 1150              	.LFB56:
 421:Library/src/lcm32f06x_dma.c **** 
 422:Library/src/lcm32f06x_dma.c **** /**
 423:Library/src/lcm32f06x_dma.c ****   * @name   DMA_RemapConfig
 424:Library/src/lcm32f06x_dma.c ****   * @brief  EN: Map DMA request number to peripheral device.
 425:Library/src/lcm32f06x_dma.c ****   *         CN: DMA请求号映射到外设。
 426:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_Channelx: 
 427:Library/src/lcm32f06x_dma.c ****   *         EN: where y is 1 to select DMA, where x can be 0 or 1 to select DMAy channel.
 428:Library/src/lcm32f06x_dma.c ****   *         CN: 其中 y 是 1 以选择 DMA，其中 x 可以是 0 或 1 以选择 DMAy 通道。
 429:Library/src/lcm32f06x_dma.c ****   * @param  DMA_ReqNum: 
 430:Library/src/lcm32f06x_dma.c ****   *         EN: Specify the request number to which DMA should be mapped.
 431:Library/src/lcm32f06x_dma.c ****   *         CN: 指定DMA要映射到的请求号。
 432:Library/src/lcm32f06x_dma.c ****   *             @arg DMA_ReqNum0
 433:Library/src/lcm32f06x_dma.c ****   *             @arg DMA_ReqNum1
 434:Library/src/lcm32f06x_dma.c ****   *             @arg DMA_ReqNum2
 435:Library/src/lcm32f06x_dma.c ****   *             @arg DMA_ReqNum3
 436:Library/src/lcm32f06x_dma.c ****   *             @arg DMA_ReqNum4
 437:Library/src/lcm32f06x_dma.c ****   *             @arg DMA_ReqNum5
ARM GAS  /tmp/cculkdOS.s 			page 32


 438:Library/src/lcm32f06x_dma.c ****   *             @arg DMA_ReqNum6
 439:Library/src/lcm32f06x_dma.c ****   *             @arg DMA_ReqNum7
 440:Library/src/lcm32f06x_dma.c ****   * @param  DMA_Request: 
 441:Library/src/lcm32f06x_dma.c ****   *         EN: Specify which peripheral to connect the mapping to.
 442:Library/src/lcm32f06x_dma.c ****   *         CN: 指定改映射连接到哪个外设。
 443:Library/src/lcm32f06x_dma.c ****   *             @arg DMA_REQ_TIM1_0
 444:Library/src/lcm32f06x_dma.c ****   *             @arg ...
 445:Library/src/lcm32f06x_dma.c ****   *             @arg DMA_REQ_SSP0_RX
 446:Library/src/lcm32f06x_dma.c ****   * @retval None
 447:Library/src/lcm32f06x_dma.c ****   */
 448:Library/src/lcm32f06x_dma.c **** void DMA_RemapConfig(DMA_Channel_TypeDef *DMAy_Channelx, uint32_t DMA_ReqNum, uint32_t DMA_Request)
 449:Library/src/lcm32f06x_dma.c **** {
 1151              		.loc 1 449 1 is_stmt 1 view -0
 1152              		.cfi_startproc
 1153              		@ args = 0, pretend = 0, frame = 0
 1154              		@ frame_needed = 0, uses_anonymous_args = 0
 450:Library/src/lcm32f06x_dma.c ****   uint32_t tmpreg;
 1155              		.loc 1 450 3 view .LVU372
 451:Library/src/lcm32f06x_dma.c ****   assert_param(IS_REQ_NUM(DMA_ReqNum));
 1156              		.loc 1 451 3 view .LVU373
 452:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_REQ(DMA_Request));
 1157              		.loc 1 452 3 view .LVU374
 453:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CFG_H_b.DEST_PER = DMA_ReqNum;
 1158              		.loc 1 453 3 view .LVU375
 449:Library/src/lcm32f06x_dma.c ****   uint32_t tmpreg;
 1159              		.loc 1 449 1 is_stmt 0 view .LVU376
 1160 0000 F0B5     		push	{r4, r5, r6, r7, lr}
 1161              	.LCFI6:
 1162              		.cfi_def_cfa_offset 20
 1163              		.cfi_offset 4, -20
 1164              		.cfi_offset 5, -16
 1165              		.cfi_offset 6, -12
 1166              		.cfi_offset 7, -8
 1167              		.cfi_offset 14, -4
 1168              		.loc 1 453 35 view .LVU377
 1169 0002 4425     		movs	r5, #68
 1170 0004 0723     		movs	r3, #7
 1171 0006 445B     		ldrh	r4, [r0, r5]
 1172 0008 0F4F     		ldr	r7, .L62
 1173 000a 0B40     		ands	r3, r1
 1174 000c DE02     		lsls	r6, r3, #11
 1175 000e 3C40     		ands	r4, r7
 1176 0010 3443     		orrs	r4, r6
 1177 0012 4453     		strh	r4, [r0, r5]
 454:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->CFG_H_b.SRC_PER = DMA_ReqNum;
 1178              		.loc 1 454 3 is_stmt 1 view .LVU378
 1179              		.loc 1 454 34 is_stmt 0 view .LVU379
 1180 0014 445B     		ldrh	r4, [r0, r5]
 1181 0016 0D4E     		ldr	r6, .L62+4
 1182 0018 DB01     		lsls	r3, r3, #7
 1183 001a 3440     		ands	r4, r6
 1184 001c 2343     		orrs	r3, r4
 1185 001e 4353     		strh	r3, [r0, r5]
 455:Library/src/lcm32f06x_dma.c ****   tmpreg = SYSCTRL->EDU_CFG0 & ~(0xF << (DMA_ReqNum * 4));
 1186              		.loc 1 455 3 is_stmt 1 view .LVU380
 1187              		.loc 1 455 38 is_stmt 0 view .LVU381
 1188 0020 0F20     		movs	r0, #15
ARM GAS  /tmp/cculkdOS.s 			page 33


 1189              	.LVL44:
 1190              		.loc 1 455 53 view .LVU382
 1191 0022 8900     		lsls	r1, r1, #2
 1192              	.LVL45:
 1193              		.loc 1 455 38 view .LVU383
 1194 0024 8840     		lsls	r0, r0, r1
 456:Library/src/lcm32f06x_dma.c ****   tmpreg |= DMA_Request << (DMA_ReqNum * 4);
 1195              		.loc 1 456 25 view .LVU384
 1196 0026 8A40     		lsls	r2, r2, r1
 1197              	.LVL46:
 455:Library/src/lcm32f06x_dma.c ****   tmpreg = SYSCTRL->EDU_CFG0 & ~(0xF << (DMA_ReqNum * 4));
 1198              		.loc 1 455 19 view .LVU385
 1199 0028 094C     		ldr	r4, .L62+8
 1200 002a 236A     		ldr	r3, [r4, #32]
 455:Library/src/lcm32f06x_dma.c ****   tmpreg = SYSCTRL->EDU_CFG0 & ~(0xF << (DMA_ReqNum * 4));
 1201              		.loc 1 455 10 view .LVU386
 1202 002c 8343     		bics	r3, r0
 1203              	.LVL47:
 1204              		.loc 1 456 3 is_stmt 1 view .LVU387
 1205              		.loc 1 456 10 is_stmt 0 view .LVU388
 1206 002e 1A43     		orrs	r2, r3
 1207              	.LVL48:
 457:Library/src/lcm32f06x_dma.c ****   sysctrl_access();
 1208              		.loc 1 457 3 is_stmt 1 view .LVU389
 1209              	.LBB10:
 1210              	.LBI10:
 1211              		.file 2 "Core/cmsis_gcc.h"
   1:Core/cmsis_gcc.h **** /**************************************************************************//**
   2:Core/cmsis_gcc.h ****  * @file     cmsis_gcc.h
   3:Core/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
   4:Core/cmsis_gcc.h ****  * @version  V5.4.1
   5:Core/cmsis_gcc.h ****  * @date     27. May 2021
   6:Core/cmsis_gcc.h ****  ******************************************************************************/
   7:Core/cmsis_gcc.h **** /*
   8:Core/cmsis_gcc.h ****  * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
   9:Core/cmsis_gcc.h ****  *
  10:Core/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
  11:Core/cmsis_gcc.h ****  *
  12:Core/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  13:Core/cmsis_gcc.h ****  * not use this file except in compliance with the License.
  14:Core/cmsis_gcc.h ****  * You may obtain a copy of the License at
  15:Core/cmsis_gcc.h ****  *
  16:Core/cmsis_gcc.h ****  * www.apache.org/licenses/LICENSE-2.0
  17:Core/cmsis_gcc.h ****  *
  18:Core/cmsis_gcc.h ****  * Unless required by applicable law or agreed to in writing, software
  19:Core/cmsis_gcc.h ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  20:Core/cmsis_gcc.h ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  21:Core/cmsis_gcc.h ****  * See the License for the specific language governing permissions and
  22:Core/cmsis_gcc.h ****  * limitations under the License.
  23:Core/cmsis_gcc.h ****  */
  24:Core/cmsis_gcc.h **** 
  25:Core/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
  26:Core/cmsis_gcc.h **** #define __CMSIS_GCC_H
  27:Core/cmsis_gcc.h **** 
  28:Core/cmsis_gcc.h **** /* ignore some GCC warnings */
  29:Core/cmsis_gcc.h **** #pragma GCC diagnostic push
  30:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
ARM GAS  /tmp/cculkdOS.s 			page 34


  31:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
  32:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
  33:Core/cmsis_gcc.h **** 
  34:Core/cmsis_gcc.h **** /* Fallback for __has_builtin */
  35:Core/cmsis_gcc.h **** #ifndef __has_builtin
  36:Core/cmsis_gcc.h ****   #define __has_builtin(x) (0)
  37:Core/cmsis_gcc.h **** #endif
  38:Core/cmsis_gcc.h **** 
  39:Core/cmsis_gcc.h **** /* CMSIS compiler specific defines */
  40:Core/cmsis_gcc.h **** #ifndef   __ASM
  41:Core/cmsis_gcc.h ****   #define __ASM                                  __asm
  42:Core/cmsis_gcc.h **** #endif
  43:Core/cmsis_gcc.h **** #ifndef   __INLINE
  44:Core/cmsis_gcc.h ****   #define __INLINE                               inline
  45:Core/cmsis_gcc.h **** #endif
  46:Core/cmsis_gcc.h **** #ifndef   __STATIC_INLINE
  47:Core/cmsis_gcc.h ****   #define __STATIC_INLINE                        static inline
  48:Core/cmsis_gcc.h **** #endif
  49:Core/cmsis_gcc.h **** #ifndef   __STATIC_FORCEINLINE
  50:Core/cmsis_gcc.h ****   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
  51:Core/cmsis_gcc.h **** #endif
  52:Core/cmsis_gcc.h **** #ifndef   __NO_RETURN
  53:Core/cmsis_gcc.h ****   #define __NO_RETURN                            __attribute__((__noreturn__))
  54:Core/cmsis_gcc.h **** #endif
  55:Core/cmsis_gcc.h **** #ifndef   __USED
  56:Core/cmsis_gcc.h ****   #define __USED                                 __attribute__((used))
  57:Core/cmsis_gcc.h **** #endif
  58:Core/cmsis_gcc.h **** #ifndef   __WEAK
  59:Core/cmsis_gcc.h ****   #define __WEAK                                 __attribute__((weak))
  60:Core/cmsis_gcc.h **** #endif
  61:Core/cmsis_gcc.h **** #ifndef   __PACKED
  62:Core/cmsis_gcc.h ****   #define __PACKED                               __attribute__((packed, aligned(1)))
  63:Core/cmsis_gcc.h **** #endif
  64:Core/cmsis_gcc.h **** #ifndef   __PACKED_STRUCT
  65:Core/cmsis_gcc.h ****   #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
  66:Core/cmsis_gcc.h **** #endif
  67:Core/cmsis_gcc.h **** #ifndef   __PACKED_UNION
  68:Core/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
  69:Core/cmsis_gcc.h **** #endif
  70:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32        /* deprecated */
  71:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  72:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  73:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  74:Core/cmsis_gcc.h ****   struct __attribute__((packed)) T_UINT32 { uint32_t v; };
  75:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  76:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
  77:Core/cmsis_gcc.h **** #endif
  78:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_WRITE
  79:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  80:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  81:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  82:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
  83:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  84:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
  85:Core/cmsis_gcc.h **** #endif
  86:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_READ
  87:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
ARM GAS  /tmp/cculkdOS.s 			page 35


  88:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  89:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  90:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
  91:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  92:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(add
  93:Core/cmsis_gcc.h **** #endif
  94:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_WRITE
  95:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  96:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  97:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  98:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
  99:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 100:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
 101:Core/cmsis_gcc.h **** #endif
 102:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_READ
 103:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
 104:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
 105:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
 106:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
 107:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 108:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(add
 109:Core/cmsis_gcc.h **** #endif
 110:Core/cmsis_gcc.h **** #ifndef   __ALIGNED
 111:Core/cmsis_gcc.h ****   #define __ALIGNED(x)                           __attribute__((aligned(x)))
 112:Core/cmsis_gcc.h **** #endif
 113:Core/cmsis_gcc.h **** #ifndef   __RESTRICT
 114:Core/cmsis_gcc.h ****   #define __RESTRICT                             __restrict
 115:Core/cmsis_gcc.h **** #endif
 116:Core/cmsis_gcc.h **** #ifndef   __COMPILER_BARRIER
 117:Core/cmsis_gcc.h ****   #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
 118:Core/cmsis_gcc.h **** #endif
 119:Core/cmsis_gcc.h **** 
 120:Core/cmsis_gcc.h **** /* #########################  Startup and Lowlevel Init  ######################## */
 121:Core/cmsis_gcc.h **** 
 122:Core/cmsis_gcc.h **** #ifndef __PROGRAM_START
 123:Core/cmsis_gcc.h **** 
 124:Core/cmsis_gcc.h **** /**
 125:Core/cmsis_gcc.h ****   \brief   Initializes data and bss sections
 126:Core/cmsis_gcc.h ****   \details This default implementations initialized all data and additional bss
 127:Core/cmsis_gcc.h ****            sections relying on .copy.table and .zero.table specified properly
 128:Core/cmsis_gcc.h ****            in the used linker script.
 129:Core/cmsis_gcc.h **** 
 130:Core/cmsis_gcc.h ****  */
 131:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
 132:Core/cmsis_gcc.h **** {
 133:Core/cmsis_gcc.h ****   extern void _start(void) __NO_RETURN;
 134:Core/cmsis_gcc.h **** 
 135:Core/cmsis_gcc.h ****   typedef struct {
 136:Core/cmsis_gcc.h ****     uint32_t const* src;
 137:Core/cmsis_gcc.h ****     uint32_t* dest;
 138:Core/cmsis_gcc.h ****     uint32_t  wlen;
 139:Core/cmsis_gcc.h ****   } __copy_table_t;
 140:Core/cmsis_gcc.h **** 
 141:Core/cmsis_gcc.h ****   typedef struct {
 142:Core/cmsis_gcc.h ****     uint32_t* dest;
 143:Core/cmsis_gcc.h ****     uint32_t  wlen;
 144:Core/cmsis_gcc.h ****   } __zero_table_t;
ARM GAS  /tmp/cculkdOS.s 			page 36


 145:Core/cmsis_gcc.h **** 
 146:Core/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_start__;
 147:Core/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_end__;
 148:Core/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_start__;
 149:Core/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_end__;
 150:Core/cmsis_gcc.h **** 
 151:Core/cmsis_gcc.h ****   for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
 152:Core/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 153:Core/cmsis_gcc.h ****       pTable->dest[i] = pTable->src[i];
 154:Core/cmsis_gcc.h ****     }
 155:Core/cmsis_gcc.h ****   }
 156:Core/cmsis_gcc.h **** 
 157:Core/cmsis_gcc.h ****   for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
 158:Core/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 159:Core/cmsis_gcc.h ****       pTable->dest[i] = 0u;
 160:Core/cmsis_gcc.h ****     }
 161:Core/cmsis_gcc.h ****   }
 162:Core/cmsis_gcc.h **** 
 163:Core/cmsis_gcc.h ****   _start();
 164:Core/cmsis_gcc.h **** }
 165:Core/cmsis_gcc.h **** 
 166:Core/cmsis_gcc.h **** #define __PROGRAM_START           __cmsis_start
 167:Core/cmsis_gcc.h **** #endif
 168:Core/cmsis_gcc.h **** 
 169:Core/cmsis_gcc.h **** #ifndef __INITIAL_SP
 170:Core/cmsis_gcc.h **** #define __INITIAL_SP              __StackTop
 171:Core/cmsis_gcc.h **** #endif
 172:Core/cmsis_gcc.h **** 
 173:Core/cmsis_gcc.h **** #ifndef __STACK_LIMIT
 174:Core/cmsis_gcc.h **** #define __STACK_LIMIT             __StackLimit
 175:Core/cmsis_gcc.h **** #endif
 176:Core/cmsis_gcc.h **** 
 177:Core/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
 178:Core/cmsis_gcc.h **** #define __VECTOR_TABLE            __Vectors
 179:Core/cmsis_gcc.h **** #endif
 180:Core/cmsis_gcc.h **** 
 181:Core/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
 182:Core/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section(".vectors")))
 183:Core/cmsis_gcc.h **** #endif
 184:Core/cmsis_gcc.h **** 
 185:Core/cmsis_gcc.h **** #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 186:Core/cmsis_gcc.h **** #ifndef __STACK_SEAL
 187:Core/cmsis_gcc.h **** #define __STACK_SEAL              __StackSeal
 188:Core/cmsis_gcc.h **** #endif
 189:Core/cmsis_gcc.h **** 
 190:Core/cmsis_gcc.h **** #ifndef __TZ_STACK_SEAL_SIZE
 191:Core/cmsis_gcc.h **** #define __TZ_STACK_SEAL_SIZE      8U
 192:Core/cmsis_gcc.h **** #endif
 193:Core/cmsis_gcc.h **** 
 194:Core/cmsis_gcc.h **** #ifndef __TZ_STACK_SEAL_VALUE
 195:Core/cmsis_gcc.h **** #define __TZ_STACK_SEAL_VALUE     0xFEF5EDA5FEF5EDA5ULL
 196:Core/cmsis_gcc.h **** #endif
 197:Core/cmsis_gcc.h **** 
 198:Core/cmsis_gcc.h **** 
 199:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
 200:Core/cmsis_gcc.h ****   *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE;
 201:Core/cmsis_gcc.h **** }
ARM GAS  /tmp/cculkdOS.s 			page 37


 202:Core/cmsis_gcc.h **** #endif
 203:Core/cmsis_gcc.h **** 
 204:Core/cmsis_gcc.h **** 
 205:Core/cmsis_gcc.h **** /* ##########################  Core Instruction Access  ######################### */
 206:Core/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
 207:Core/cmsis_gcc.h ****   Access to dedicated instructions
 208:Core/cmsis_gcc.h ****   @{
 209:Core/cmsis_gcc.h **** */
 210:Core/cmsis_gcc.h **** 
 211:Core/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
 212:Core/cmsis_gcc.h ****  * For thumb1, use low register (r0-r7), specified by constraint "l"
 213:Core/cmsis_gcc.h ****  * Otherwise, use general registers, specified by constraint "r" */
 214:Core/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
 215:Core/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
 216:Core/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
 217:Core/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
 218:Core/cmsis_gcc.h **** #else
 219:Core/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
 220:Core/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
 221:Core/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
 222:Core/cmsis_gcc.h **** #endif
 223:Core/cmsis_gcc.h **** 
 224:Core/cmsis_gcc.h **** /**
 225:Core/cmsis_gcc.h ****   \brief   No Operation
 226:Core/cmsis_gcc.h ****   \details No Operation does nothing. This instruction can be used for code alignment purposes.
 227:Core/cmsis_gcc.h ****  */
 228:Core/cmsis_gcc.h **** #define __NOP()                             __ASM volatile ("nop")
 229:Core/cmsis_gcc.h **** 
 230:Core/cmsis_gcc.h **** /**
 231:Core/cmsis_gcc.h ****   \brief   Wait For Interrupt
 232:Core/cmsis_gcc.h ****   \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
 233:Core/cmsis_gcc.h ****  */
 234:Core/cmsis_gcc.h **** #define __WFI()                             __ASM volatile ("wfi":::"memory")
 235:Core/cmsis_gcc.h **** 
 236:Core/cmsis_gcc.h **** 
 237:Core/cmsis_gcc.h **** /**
 238:Core/cmsis_gcc.h ****   \brief   Wait For Event
 239:Core/cmsis_gcc.h ****   \details Wait For Event is a hint instruction that permits the processor to enter
 240:Core/cmsis_gcc.h ****            a low-power state until one of a number of events occurs.
 241:Core/cmsis_gcc.h ****  */
 242:Core/cmsis_gcc.h **** #define __WFE()                             __ASM volatile ("wfe":::"memory")
 243:Core/cmsis_gcc.h **** 
 244:Core/cmsis_gcc.h **** 
 245:Core/cmsis_gcc.h **** /**
 246:Core/cmsis_gcc.h ****   \brief   Send Event
 247:Core/cmsis_gcc.h ****   \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
 248:Core/cmsis_gcc.h ****  */
 249:Core/cmsis_gcc.h **** #define __SEV()                             __ASM volatile ("sev")
 250:Core/cmsis_gcc.h **** 
 251:Core/cmsis_gcc.h **** 
 252:Core/cmsis_gcc.h **** /**
 253:Core/cmsis_gcc.h ****   \brief   Instruction Synchronization Barrier
 254:Core/cmsis_gcc.h ****   \details Instruction Synchronization Barrier flushes the pipeline in the processor,
 255:Core/cmsis_gcc.h ****            so that all instructions following the ISB are fetched from cache or memory,
 256:Core/cmsis_gcc.h ****            after the instruction has been completed.
 257:Core/cmsis_gcc.h ****  */
 258:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
ARM GAS  /tmp/cculkdOS.s 			page 38


 1212              		.loc 2 258 27 view .LVU390
 1213              	.LBB11:
 259:Core/cmsis_gcc.h **** {
 260:Core/cmsis_gcc.h ****   __ASM volatile ("isb 0xF":::"memory");
 1214              		.loc 2 260 3 view .LVU391
 1215              		.syntax divided
 1216              	@ 260 "Core/cmsis_gcc.h" 1
 1217 0030 BFF36F8F 		isb 0xF
 1218              	@ 0 "" 2
 1219              		.thumb
 1220              		.syntax unified
 1221              	.LBE11:
 1222              	.LBE10:
 1223              		.loc 1 457 3 discriminator 1 view .LVU392
 1224              	.LBB12:
 1225              	.LBI12:
 261:Core/cmsis_gcc.h **** }
 262:Core/cmsis_gcc.h **** 
 263:Core/cmsis_gcc.h **** 
 264:Core/cmsis_gcc.h **** /**
 265:Core/cmsis_gcc.h ****   \brief   Data Synchronization Barrier
 266:Core/cmsis_gcc.h ****   \details Acts as a special kind of Data Memory Barrier.
 267:Core/cmsis_gcc.h ****            It completes when all explicit memory accesses before this instruction complete.
 268:Core/cmsis_gcc.h ****  */
 269:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
 270:Core/cmsis_gcc.h **** {
 271:Core/cmsis_gcc.h ****   __ASM volatile ("dsb 0xF":::"memory");
 272:Core/cmsis_gcc.h **** }
 273:Core/cmsis_gcc.h **** 
 274:Core/cmsis_gcc.h **** 
 275:Core/cmsis_gcc.h **** /**
 276:Core/cmsis_gcc.h ****   \brief   Data Memory Barrier
 277:Core/cmsis_gcc.h ****   \details Ensures the apparent order of the explicit memory operations before
 278:Core/cmsis_gcc.h ****            and after the instruction, without ensuring their completion.
 279:Core/cmsis_gcc.h ****  */
 280:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
 281:Core/cmsis_gcc.h **** {
 282:Core/cmsis_gcc.h ****   __ASM volatile ("dmb 0xF":::"memory");
 283:Core/cmsis_gcc.h **** }
 284:Core/cmsis_gcc.h **** 
 285:Core/cmsis_gcc.h **** 
 286:Core/cmsis_gcc.h **** /**
 287:Core/cmsis_gcc.h ****   \brief   Reverse byte order (32 bit)
 288:Core/cmsis_gcc.h ****   \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
 289:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 290:Core/cmsis_gcc.h ****   \return               Reversed value
 291:Core/cmsis_gcc.h ****  */
 292:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
 293:Core/cmsis_gcc.h **** {
 294:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
 295:Core/cmsis_gcc.h ****   return __builtin_bswap32(value);
 296:Core/cmsis_gcc.h **** #else
 297:Core/cmsis_gcc.h ****   uint32_t result;
 298:Core/cmsis_gcc.h **** 
 299:Core/cmsis_gcc.h ****   __ASM ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 300:Core/cmsis_gcc.h ****   return result;
 301:Core/cmsis_gcc.h **** #endif
ARM GAS  /tmp/cculkdOS.s 			page 39


 302:Core/cmsis_gcc.h **** }
 303:Core/cmsis_gcc.h **** 
 304:Core/cmsis_gcc.h **** 
 305:Core/cmsis_gcc.h **** /**
 306:Core/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 307:Core/cmsis_gcc.h ****   \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 
 308:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 309:Core/cmsis_gcc.h ****   \return               Reversed value
 310:Core/cmsis_gcc.h ****  */
 311:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
 312:Core/cmsis_gcc.h **** {
 313:Core/cmsis_gcc.h ****   uint32_t result;
 314:Core/cmsis_gcc.h **** 
 315:Core/cmsis_gcc.h ****   __ASM ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 316:Core/cmsis_gcc.h ****   return result;
 317:Core/cmsis_gcc.h **** }
 318:Core/cmsis_gcc.h **** 
 319:Core/cmsis_gcc.h **** 
 320:Core/cmsis_gcc.h **** /**
 321:Core/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 322:Core/cmsis_gcc.h ****   \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
 323:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 324:Core/cmsis_gcc.h ****   \return               Reversed value
 325:Core/cmsis_gcc.h ****  */
 326:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
 327:Core/cmsis_gcc.h **** {
 328:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 329:Core/cmsis_gcc.h ****   return (int16_t)__builtin_bswap16(value);
 330:Core/cmsis_gcc.h **** #else
 331:Core/cmsis_gcc.h ****   int16_t result;
 332:Core/cmsis_gcc.h **** 
 333:Core/cmsis_gcc.h ****   __ASM ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 334:Core/cmsis_gcc.h ****   return result;
 335:Core/cmsis_gcc.h **** #endif
 336:Core/cmsis_gcc.h **** }
 337:Core/cmsis_gcc.h **** 
 338:Core/cmsis_gcc.h **** 
 339:Core/cmsis_gcc.h **** /**
 340:Core/cmsis_gcc.h ****   \brief   Rotate Right in unsigned value (32 bit)
 341:Core/cmsis_gcc.h ****   \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
 342:Core/cmsis_gcc.h ****   \param [in]    op1  Value to rotate
 343:Core/cmsis_gcc.h ****   \param [in]    op2  Number of Bits to rotate
 344:Core/cmsis_gcc.h ****   \return               Rotated value
 345:Core/cmsis_gcc.h ****  */
 346:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
 347:Core/cmsis_gcc.h **** {
 348:Core/cmsis_gcc.h ****   op2 %= 32U;
 349:Core/cmsis_gcc.h ****   if (op2 == 0U)
 350:Core/cmsis_gcc.h ****   {
 351:Core/cmsis_gcc.h ****     return op1;
 352:Core/cmsis_gcc.h ****   }
 353:Core/cmsis_gcc.h ****   return (op1 >> op2) | (op1 << (32U - op2));
 354:Core/cmsis_gcc.h **** }
 355:Core/cmsis_gcc.h **** 
 356:Core/cmsis_gcc.h **** 
 357:Core/cmsis_gcc.h **** /**
 358:Core/cmsis_gcc.h ****   \brief   Breakpoint
ARM GAS  /tmp/cculkdOS.s 			page 40


 359:Core/cmsis_gcc.h ****   \details Causes the processor to enter Debug state.
 360:Core/cmsis_gcc.h ****            Debug tools can use this to investigate system state when the instruction at a particula
 361:Core/cmsis_gcc.h ****   \param [in]    value  is ignored by the processor.
 362:Core/cmsis_gcc.h ****                  If required, a debugger can use it to store additional information about the break
 363:Core/cmsis_gcc.h ****  */
 364:Core/cmsis_gcc.h **** #define __BKPT(value)                       __ASM volatile ("bkpt "#value)
 365:Core/cmsis_gcc.h **** 
 366:Core/cmsis_gcc.h **** 
 367:Core/cmsis_gcc.h **** /**
 368:Core/cmsis_gcc.h ****   \brief   Reverse bit order of value
 369:Core/cmsis_gcc.h ****   \details Reverses the bit order of the given value.
 370:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 371:Core/cmsis_gcc.h ****   \return               Reversed value
 372:Core/cmsis_gcc.h ****  */
 373:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
 374:Core/cmsis_gcc.h **** {
 375:Core/cmsis_gcc.h ****   uint32_t result;
 376:Core/cmsis_gcc.h **** 
 377:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 378:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 379:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
 380:Core/cmsis_gcc.h ****    __ASM ("rbit %0, %1" : "=r" (result) : "r" (value) );
 381:Core/cmsis_gcc.h **** #else
 382:Core/cmsis_gcc.h ****   uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
 383:Core/cmsis_gcc.h **** 
 384:Core/cmsis_gcc.h ****   result = value;                      /* r will be reversed bits of v; first get LSB of v */
 385:Core/cmsis_gcc.h ****   for (value >>= 1U; value != 0U; value >>= 1U)
 386:Core/cmsis_gcc.h ****   {
 387:Core/cmsis_gcc.h ****     result <<= 1U;
 388:Core/cmsis_gcc.h ****     result |= value & 1U;
 389:Core/cmsis_gcc.h ****     s--;
 390:Core/cmsis_gcc.h ****   }
 391:Core/cmsis_gcc.h ****   result <<= s;                        /* shift when v's highest bits are zero */
 392:Core/cmsis_gcc.h **** #endif
 393:Core/cmsis_gcc.h ****   return result;
 394:Core/cmsis_gcc.h **** }
 395:Core/cmsis_gcc.h **** 
 396:Core/cmsis_gcc.h **** 
 397:Core/cmsis_gcc.h **** /**
 398:Core/cmsis_gcc.h ****   \brief   Count leading zeros
 399:Core/cmsis_gcc.h ****   \details Counts the number of leading zeros of a data value.
 400:Core/cmsis_gcc.h ****   \param [in]  value  Value to count the leading zeros
 401:Core/cmsis_gcc.h ****   \return             number of leading zeros in value
 402:Core/cmsis_gcc.h ****  */
 403:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
 404:Core/cmsis_gcc.h **** {
 405:Core/cmsis_gcc.h ****   /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
 406:Core/cmsis_gcc.h ****      __builtin_clz(0) is undefined behaviour, so handle this case specially.
 407:Core/cmsis_gcc.h ****      This guarantees ARM-compatible results if happening to compile on a non-ARM
 408:Core/cmsis_gcc.h ****      target, and ensures the compiler doesn't decide to activate any
 409:Core/cmsis_gcc.h ****      optimisations using the logic "value was passed to __builtin_clz, so it
 410:Core/cmsis_gcc.h ****      is non-zero".
 411:Core/cmsis_gcc.h ****      ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
 412:Core/cmsis_gcc.h ****      single CLZ instruction.
 413:Core/cmsis_gcc.h ****    */
 414:Core/cmsis_gcc.h ****   if (value == 0U)
 415:Core/cmsis_gcc.h ****   {
ARM GAS  /tmp/cculkdOS.s 			page 41


 416:Core/cmsis_gcc.h ****     return 32U;
 417:Core/cmsis_gcc.h ****   }
 418:Core/cmsis_gcc.h ****   return __builtin_clz(value);
 419:Core/cmsis_gcc.h **** }
 420:Core/cmsis_gcc.h **** 
 421:Core/cmsis_gcc.h **** 
 422:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 423:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 424:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 425:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
 426:Core/cmsis_gcc.h **** /**
 427:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (8 bit)
 428:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 8 bit value.
 429:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 430:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 431:Core/cmsis_gcc.h ****  */
 432:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
 433:Core/cmsis_gcc.h **** {
 434:Core/cmsis_gcc.h ****     uint32_t result;
 435:Core/cmsis_gcc.h **** 
 436:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 437:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
 438:Core/cmsis_gcc.h **** #else
 439:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 440:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 441:Core/cmsis_gcc.h ****     */
 442:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
 443:Core/cmsis_gcc.h **** #endif
 444:Core/cmsis_gcc.h ****    return ((uint8_t) result);    /* Add explicit type cast here */
 445:Core/cmsis_gcc.h **** }
 446:Core/cmsis_gcc.h **** 
 447:Core/cmsis_gcc.h **** 
 448:Core/cmsis_gcc.h **** /**
 449:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (16 bit)
 450:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 16 bit values.
 451:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 452:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 453:Core/cmsis_gcc.h ****  */
 454:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
 455:Core/cmsis_gcc.h **** {
 456:Core/cmsis_gcc.h ****     uint32_t result;
 457:Core/cmsis_gcc.h **** 
 458:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 459:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
 460:Core/cmsis_gcc.h **** #else
 461:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 462:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 463:Core/cmsis_gcc.h ****     */
 464:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
 465:Core/cmsis_gcc.h **** #endif
 466:Core/cmsis_gcc.h ****    return ((uint16_t) result);    /* Add explicit type cast here */
 467:Core/cmsis_gcc.h **** }
 468:Core/cmsis_gcc.h **** 
 469:Core/cmsis_gcc.h **** 
 470:Core/cmsis_gcc.h **** /**
 471:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (32 bit)
 472:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 32 bit values.
ARM GAS  /tmp/cculkdOS.s 			page 42


 473:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 474:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 475:Core/cmsis_gcc.h ****  */
 476:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
 477:Core/cmsis_gcc.h **** {
 478:Core/cmsis_gcc.h ****     uint32_t result;
 479:Core/cmsis_gcc.h **** 
 480:Core/cmsis_gcc.h ****    __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 481:Core/cmsis_gcc.h ****    return(result);
 482:Core/cmsis_gcc.h **** }
 483:Core/cmsis_gcc.h **** 
 484:Core/cmsis_gcc.h **** 
 485:Core/cmsis_gcc.h **** /**
 486:Core/cmsis_gcc.h ****   \brief   STR Exclusive (8 bit)
 487:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 8 bit values.
 488:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 489:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 490:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 491:Core/cmsis_gcc.h ****   \return          1  Function failed
 492:Core/cmsis_gcc.h ****  */
 493:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
 494:Core/cmsis_gcc.h **** {
 495:Core/cmsis_gcc.h ****    uint32_t result;
 496:Core/cmsis_gcc.h **** 
 497:Core/cmsis_gcc.h ****    __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
 498:Core/cmsis_gcc.h ****    return(result);
 499:Core/cmsis_gcc.h **** }
 500:Core/cmsis_gcc.h **** 
 501:Core/cmsis_gcc.h **** 
 502:Core/cmsis_gcc.h **** /**
 503:Core/cmsis_gcc.h ****   \brief   STR Exclusive (16 bit)
 504:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 16 bit values.
 505:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 506:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 507:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 508:Core/cmsis_gcc.h ****   \return          1  Function failed
 509:Core/cmsis_gcc.h ****  */
 510:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
 511:Core/cmsis_gcc.h **** {
 512:Core/cmsis_gcc.h ****    uint32_t result;
 513:Core/cmsis_gcc.h **** 
 514:Core/cmsis_gcc.h ****    __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
 515:Core/cmsis_gcc.h ****    return(result);
 516:Core/cmsis_gcc.h **** }
 517:Core/cmsis_gcc.h **** 
 518:Core/cmsis_gcc.h **** 
 519:Core/cmsis_gcc.h **** /**
 520:Core/cmsis_gcc.h ****   \brief   STR Exclusive (32 bit)
 521:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 32 bit values.
 522:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 523:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 524:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 525:Core/cmsis_gcc.h ****   \return          1  Function failed
 526:Core/cmsis_gcc.h ****  */
 527:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
 528:Core/cmsis_gcc.h **** {
 529:Core/cmsis_gcc.h ****    uint32_t result;
ARM GAS  /tmp/cculkdOS.s 			page 43


 530:Core/cmsis_gcc.h **** 
 531:Core/cmsis_gcc.h ****    __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 532:Core/cmsis_gcc.h ****    return(result);
 533:Core/cmsis_gcc.h **** }
 534:Core/cmsis_gcc.h **** 
 535:Core/cmsis_gcc.h **** 
 536:Core/cmsis_gcc.h **** /**
 537:Core/cmsis_gcc.h ****   \brief   Remove the exclusive lock
 538:Core/cmsis_gcc.h ****   \details Removes the exclusive lock which is created by LDREX.
 539:Core/cmsis_gcc.h ****  */
 540:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void)
 541:Core/cmsis_gcc.h **** {
 542:Core/cmsis_gcc.h ****   __ASM volatile ("clrex" ::: "memory");
 543:Core/cmsis_gcc.h **** }
 544:Core/cmsis_gcc.h **** 
 545:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 546:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 547:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 548:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 549:Core/cmsis_gcc.h **** 
 550:Core/cmsis_gcc.h **** 
 551:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 552:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 553:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
 554:Core/cmsis_gcc.h **** /**
 555:Core/cmsis_gcc.h ****   \brief   Signed Saturate
 556:Core/cmsis_gcc.h ****   \details Saturates a signed value.
 557:Core/cmsis_gcc.h ****   \param [in]  ARG1  Value to be saturated
 558:Core/cmsis_gcc.h ****   \param [in]  ARG2  Bit position to saturate to (1..32)
 559:Core/cmsis_gcc.h ****   \return             Saturated value
 560:Core/cmsis_gcc.h ****  */
 561:Core/cmsis_gcc.h **** #define __SSAT(ARG1, ARG2) \
 562:Core/cmsis_gcc.h **** __extension__ \
 563:Core/cmsis_gcc.h **** ({                          \
 564:Core/cmsis_gcc.h ****   int32_t __RES, __ARG1 = (ARG1); \
 565:Core/cmsis_gcc.h ****   __ASM volatile ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
 566:Core/cmsis_gcc.h ****   __RES; \
 567:Core/cmsis_gcc.h ****  })
 568:Core/cmsis_gcc.h **** 
 569:Core/cmsis_gcc.h **** 
 570:Core/cmsis_gcc.h **** /**
 571:Core/cmsis_gcc.h ****   \brief   Unsigned Saturate
 572:Core/cmsis_gcc.h ****   \details Saturates an unsigned value.
 573:Core/cmsis_gcc.h ****   \param [in]  ARG1  Value to be saturated
 574:Core/cmsis_gcc.h ****   \param [in]  ARG2  Bit position to saturate to (0..31)
 575:Core/cmsis_gcc.h ****   \return             Saturated value
 576:Core/cmsis_gcc.h ****  */
 577:Core/cmsis_gcc.h **** #define __USAT(ARG1, ARG2) \
 578:Core/cmsis_gcc.h **** __extension__ \
 579:Core/cmsis_gcc.h **** ({                          \
 580:Core/cmsis_gcc.h ****   uint32_t __RES, __ARG1 = (ARG1); \
 581:Core/cmsis_gcc.h ****   __ASM volatile ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
 582:Core/cmsis_gcc.h ****   __RES; \
 583:Core/cmsis_gcc.h ****  })
 584:Core/cmsis_gcc.h **** 
 585:Core/cmsis_gcc.h **** 
 586:Core/cmsis_gcc.h **** /**
ARM GAS  /tmp/cculkdOS.s 			page 44


 587:Core/cmsis_gcc.h ****   \brief   Rotate Right with Extend (32 bit)
 588:Core/cmsis_gcc.h ****   \details Moves each bit of a bitstring right by one bit.
 589:Core/cmsis_gcc.h ****            The carry input is shifted in at the left end of the bitstring.
 590:Core/cmsis_gcc.h ****   \param [in]    value  Value to rotate
 591:Core/cmsis_gcc.h ****   \return               Rotated value
 592:Core/cmsis_gcc.h ****  */
 593:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
 594:Core/cmsis_gcc.h **** {
 595:Core/cmsis_gcc.h ****   uint32_t result;
 596:Core/cmsis_gcc.h **** 
 597:Core/cmsis_gcc.h ****   __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 598:Core/cmsis_gcc.h ****   return(result);
 599:Core/cmsis_gcc.h **** }
 600:Core/cmsis_gcc.h **** 
 601:Core/cmsis_gcc.h **** 
 602:Core/cmsis_gcc.h **** /**
 603:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (8 bit)
 604:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 8 bit value.
 605:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 606:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 607:Core/cmsis_gcc.h ****  */
 608:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
 609:Core/cmsis_gcc.h **** {
 610:Core/cmsis_gcc.h ****     uint32_t result;
 611:Core/cmsis_gcc.h **** 
 612:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 613:Core/cmsis_gcc.h ****    __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
 614:Core/cmsis_gcc.h **** #else
 615:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 616:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 617:Core/cmsis_gcc.h ****     */
 618:Core/cmsis_gcc.h ****    __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
 619:Core/cmsis_gcc.h **** #endif
 620:Core/cmsis_gcc.h ****    return ((uint8_t) result);    /* Add explicit type cast here */
 621:Core/cmsis_gcc.h **** }
 622:Core/cmsis_gcc.h **** 
 623:Core/cmsis_gcc.h **** 
 624:Core/cmsis_gcc.h **** /**
 625:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (16 bit)
 626:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 16 bit values.
 627:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 628:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 629:Core/cmsis_gcc.h ****  */
 630:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
 631:Core/cmsis_gcc.h **** {
 632:Core/cmsis_gcc.h ****     uint32_t result;
 633:Core/cmsis_gcc.h **** 
 634:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 635:Core/cmsis_gcc.h ****    __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
 636:Core/cmsis_gcc.h **** #else
 637:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 638:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 639:Core/cmsis_gcc.h ****     */
 640:Core/cmsis_gcc.h ****    __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
 641:Core/cmsis_gcc.h **** #endif
 642:Core/cmsis_gcc.h ****    return ((uint16_t) result);    /* Add explicit type cast here */
 643:Core/cmsis_gcc.h **** }
ARM GAS  /tmp/cculkdOS.s 			page 45


 644:Core/cmsis_gcc.h **** 
 645:Core/cmsis_gcc.h **** 
 646:Core/cmsis_gcc.h **** /**
 647:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (32 bit)
 648:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 32 bit values.
 649:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 650:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 651:Core/cmsis_gcc.h ****  */
 652:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
 653:Core/cmsis_gcc.h **** {
 654:Core/cmsis_gcc.h ****     uint32_t result;
 655:Core/cmsis_gcc.h **** 
 656:Core/cmsis_gcc.h ****    __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
 657:Core/cmsis_gcc.h ****    return(result);
 658:Core/cmsis_gcc.h **** }
 659:Core/cmsis_gcc.h **** 
 660:Core/cmsis_gcc.h **** 
 661:Core/cmsis_gcc.h **** /**
 662:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (8 bit)
 663:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 8 bit values.
 664:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 665:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 666:Core/cmsis_gcc.h ****  */
 667:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
 668:Core/cmsis_gcc.h **** {
 669:Core/cmsis_gcc.h ****    __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
 670:Core/cmsis_gcc.h **** }
 671:Core/cmsis_gcc.h **** 
 672:Core/cmsis_gcc.h **** 
 673:Core/cmsis_gcc.h **** /**
 674:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (16 bit)
 675:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 16 bit values.
 676:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 677:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 678:Core/cmsis_gcc.h ****  */
 679:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
 680:Core/cmsis_gcc.h **** {
 681:Core/cmsis_gcc.h ****    __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
 682:Core/cmsis_gcc.h **** }
 683:Core/cmsis_gcc.h **** 
 684:Core/cmsis_gcc.h **** 
 685:Core/cmsis_gcc.h **** /**
 686:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (32 bit)
 687:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 32 bit values.
 688:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 689:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 690:Core/cmsis_gcc.h ****  */
 691:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
 692:Core/cmsis_gcc.h **** {
 693:Core/cmsis_gcc.h ****    __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
 694:Core/cmsis_gcc.h **** }
 695:Core/cmsis_gcc.h **** 
 696:Core/cmsis_gcc.h **** #else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 697:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 698:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 699:Core/cmsis_gcc.h **** 
 700:Core/cmsis_gcc.h **** /**
ARM GAS  /tmp/cculkdOS.s 			page 46


 701:Core/cmsis_gcc.h ****   \brief   Signed Saturate
 702:Core/cmsis_gcc.h ****   \details Saturates a signed value.
 703:Core/cmsis_gcc.h ****   \param [in]  value  Value to be saturated
 704:Core/cmsis_gcc.h ****   \param [in]    sat  Bit position to saturate to (1..32)
 705:Core/cmsis_gcc.h ****   \return             Saturated value
 706:Core/cmsis_gcc.h ****  */
 707:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
 708:Core/cmsis_gcc.h **** {
 709:Core/cmsis_gcc.h ****   if ((sat >= 1U) && (sat <= 32U))
 710:Core/cmsis_gcc.h ****   {
 711:Core/cmsis_gcc.h ****     const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
 712:Core/cmsis_gcc.h ****     const int32_t min = -1 - max ;
 713:Core/cmsis_gcc.h ****     if (val > max)
 714:Core/cmsis_gcc.h ****     {
 715:Core/cmsis_gcc.h ****       return max;
 716:Core/cmsis_gcc.h ****     }
 717:Core/cmsis_gcc.h ****     else if (val < min)
 718:Core/cmsis_gcc.h ****     {
 719:Core/cmsis_gcc.h ****       return min;
 720:Core/cmsis_gcc.h ****     }
 721:Core/cmsis_gcc.h ****   }
 722:Core/cmsis_gcc.h ****   return val;
 723:Core/cmsis_gcc.h **** }
 724:Core/cmsis_gcc.h **** 
 725:Core/cmsis_gcc.h **** /**
 726:Core/cmsis_gcc.h ****   \brief   Unsigned Saturate
 727:Core/cmsis_gcc.h ****   \details Saturates an unsigned value.
 728:Core/cmsis_gcc.h ****   \param [in]  value  Value to be saturated
 729:Core/cmsis_gcc.h ****   \param [in]    sat  Bit position to saturate to (0..31)
 730:Core/cmsis_gcc.h ****   \return             Saturated value
 731:Core/cmsis_gcc.h ****  */
 732:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
 733:Core/cmsis_gcc.h **** {
 734:Core/cmsis_gcc.h ****   if (sat <= 31U)
 735:Core/cmsis_gcc.h ****   {
 736:Core/cmsis_gcc.h ****     const uint32_t max = ((1U << sat) - 1U);
 737:Core/cmsis_gcc.h ****     if (val > (int32_t)max)
 738:Core/cmsis_gcc.h ****     {
 739:Core/cmsis_gcc.h ****       return max;
 740:Core/cmsis_gcc.h ****     }
 741:Core/cmsis_gcc.h ****     else if (val < 0)
 742:Core/cmsis_gcc.h ****     {
 743:Core/cmsis_gcc.h ****       return 0U;
 744:Core/cmsis_gcc.h ****     }
 745:Core/cmsis_gcc.h ****   }
 746:Core/cmsis_gcc.h ****   return (uint32_t)val;
 747:Core/cmsis_gcc.h **** }
 748:Core/cmsis_gcc.h **** 
 749:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 750:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 751:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 752:Core/cmsis_gcc.h **** 
 753:Core/cmsis_gcc.h **** 
 754:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 755:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
 756:Core/cmsis_gcc.h **** /**
 757:Core/cmsis_gcc.h ****   \brief   Load-Acquire (8 bit)
ARM GAS  /tmp/cculkdOS.s 			page 47


 758:Core/cmsis_gcc.h ****   \details Executes a LDAB instruction for 8 bit value.
 759:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 760:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 761:Core/cmsis_gcc.h ****  */
 762:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
 763:Core/cmsis_gcc.h **** {
 764:Core/cmsis_gcc.h ****     uint32_t result;
 765:Core/cmsis_gcc.h **** 
 766:Core/cmsis_gcc.h ****    __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 767:Core/cmsis_gcc.h ****    return ((uint8_t) result);
 768:Core/cmsis_gcc.h **** }
 769:Core/cmsis_gcc.h **** 
 770:Core/cmsis_gcc.h **** 
 771:Core/cmsis_gcc.h **** /**
 772:Core/cmsis_gcc.h ****   \brief   Load-Acquire (16 bit)
 773:Core/cmsis_gcc.h ****   \details Executes a LDAH instruction for 16 bit values.
 774:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 775:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 776:Core/cmsis_gcc.h ****  */
 777:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
 778:Core/cmsis_gcc.h **** {
 779:Core/cmsis_gcc.h ****     uint32_t result;
 780:Core/cmsis_gcc.h **** 
 781:Core/cmsis_gcc.h ****    __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 782:Core/cmsis_gcc.h ****    return ((uint16_t) result);
 783:Core/cmsis_gcc.h **** }
 784:Core/cmsis_gcc.h **** 
 785:Core/cmsis_gcc.h **** 
 786:Core/cmsis_gcc.h **** /**
 787:Core/cmsis_gcc.h ****   \brief   Load-Acquire (32 bit)
 788:Core/cmsis_gcc.h ****   \details Executes a LDA instruction for 32 bit values.
 789:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 790:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 791:Core/cmsis_gcc.h ****  */
 792:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
 793:Core/cmsis_gcc.h **** {
 794:Core/cmsis_gcc.h ****     uint32_t result;
 795:Core/cmsis_gcc.h **** 
 796:Core/cmsis_gcc.h ****    __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 797:Core/cmsis_gcc.h ****    return(result);
 798:Core/cmsis_gcc.h **** }
 799:Core/cmsis_gcc.h **** 
 800:Core/cmsis_gcc.h **** 
 801:Core/cmsis_gcc.h **** /**
 802:Core/cmsis_gcc.h ****   \brief   Store-Release (8 bit)
 803:Core/cmsis_gcc.h ****   \details Executes a STLB instruction for 8 bit values.
 804:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 805:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 806:Core/cmsis_gcc.h ****  */
 807:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
 808:Core/cmsis_gcc.h **** {
 809:Core/cmsis_gcc.h ****    __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 810:Core/cmsis_gcc.h **** }
 811:Core/cmsis_gcc.h **** 
 812:Core/cmsis_gcc.h **** 
 813:Core/cmsis_gcc.h **** /**
 814:Core/cmsis_gcc.h ****   \brief   Store-Release (16 bit)
ARM GAS  /tmp/cculkdOS.s 			page 48


 815:Core/cmsis_gcc.h ****   \details Executes a STLH instruction for 16 bit values.
 816:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 817:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 818:Core/cmsis_gcc.h ****  */
 819:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
 820:Core/cmsis_gcc.h **** {
 821:Core/cmsis_gcc.h ****    __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 822:Core/cmsis_gcc.h **** }
 823:Core/cmsis_gcc.h **** 
 824:Core/cmsis_gcc.h **** 
 825:Core/cmsis_gcc.h **** /**
 826:Core/cmsis_gcc.h ****   \brief   Store-Release (32 bit)
 827:Core/cmsis_gcc.h ****   \details Executes a STL instruction for 32 bit values.
 828:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 829:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 830:Core/cmsis_gcc.h ****  */
 831:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
 832:Core/cmsis_gcc.h **** {
 833:Core/cmsis_gcc.h ****    __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 834:Core/cmsis_gcc.h **** }
 835:Core/cmsis_gcc.h **** 
 836:Core/cmsis_gcc.h **** 
 837:Core/cmsis_gcc.h **** /**
 838:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (8 bit)
 839:Core/cmsis_gcc.h ****   \details Executes a LDAB exclusive instruction for 8 bit value.
 840:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 841:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 842:Core/cmsis_gcc.h ****  */
 843:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
 844:Core/cmsis_gcc.h **** {
 845:Core/cmsis_gcc.h ****     uint32_t result;
 846:Core/cmsis_gcc.h **** 
 847:Core/cmsis_gcc.h ****    __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 848:Core/cmsis_gcc.h ****    return ((uint8_t) result);
 849:Core/cmsis_gcc.h **** }
 850:Core/cmsis_gcc.h **** 
 851:Core/cmsis_gcc.h **** 
 852:Core/cmsis_gcc.h **** /**
 853:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (16 bit)
 854:Core/cmsis_gcc.h ****   \details Executes a LDAH exclusive instruction for 16 bit values.
 855:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 856:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 857:Core/cmsis_gcc.h ****  */
 858:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
 859:Core/cmsis_gcc.h **** {
 860:Core/cmsis_gcc.h ****     uint32_t result;
 861:Core/cmsis_gcc.h **** 
 862:Core/cmsis_gcc.h ****    __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 863:Core/cmsis_gcc.h ****    return ((uint16_t) result);
 864:Core/cmsis_gcc.h **** }
 865:Core/cmsis_gcc.h **** 
 866:Core/cmsis_gcc.h **** 
 867:Core/cmsis_gcc.h **** /**
 868:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (32 bit)
 869:Core/cmsis_gcc.h ****   \details Executes a LDA exclusive instruction for 32 bit values.
 870:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 871:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
ARM GAS  /tmp/cculkdOS.s 			page 49


 872:Core/cmsis_gcc.h ****  */
 873:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
 874:Core/cmsis_gcc.h **** {
 875:Core/cmsis_gcc.h ****     uint32_t result;
 876:Core/cmsis_gcc.h **** 
 877:Core/cmsis_gcc.h ****    __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 878:Core/cmsis_gcc.h ****    return(result);
 879:Core/cmsis_gcc.h **** }
 880:Core/cmsis_gcc.h **** 
 881:Core/cmsis_gcc.h **** 
 882:Core/cmsis_gcc.h **** /**
 883:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (8 bit)
 884:Core/cmsis_gcc.h ****   \details Executes a STLB exclusive instruction for 8 bit values.
 885:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 886:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 887:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 888:Core/cmsis_gcc.h ****   \return          1  Function failed
 889:Core/cmsis_gcc.h ****  */
 890:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
 891:Core/cmsis_gcc.h **** {
 892:Core/cmsis_gcc.h ****    uint32_t result;
 893:Core/cmsis_gcc.h **** 
 894:Core/cmsis_gcc.h ****    __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "mem
 895:Core/cmsis_gcc.h ****    return(result);
 896:Core/cmsis_gcc.h **** }
 897:Core/cmsis_gcc.h **** 
 898:Core/cmsis_gcc.h **** 
 899:Core/cmsis_gcc.h **** /**
 900:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (16 bit)
 901:Core/cmsis_gcc.h ****   \details Executes a STLH exclusive instruction for 16 bit values.
 902:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 903:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 904:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 905:Core/cmsis_gcc.h ****   \return          1  Function failed
 906:Core/cmsis_gcc.h ****  */
 907:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
 908:Core/cmsis_gcc.h **** {
 909:Core/cmsis_gcc.h ****    uint32_t result;
 910:Core/cmsis_gcc.h **** 
 911:Core/cmsis_gcc.h ****    __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "mem
 912:Core/cmsis_gcc.h ****    return(result);
 913:Core/cmsis_gcc.h **** }
 914:Core/cmsis_gcc.h **** 
 915:Core/cmsis_gcc.h **** 
 916:Core/cmsis_gcc.h **** /**
 917:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (32 bit)
 918:Core/cmsis_gcc.h ****   \details Executes a STL exclusive instruction for 32 bit values.
 919:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 920:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 921:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 922:Core/cmsis_gcc.h ****   \return          1  Function failed
 923:Core/cmsis_gcc.h ****  */
 924:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
 925:Core/cmsis_gcc.h **** {
 926:Core/cmsis_gcc.h ****    uint32_t result;
 927:Core/cmsis_gcc.h **** 
 928:Core/cmsis_gcc.h ****    __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memo
ARM GAS  /tmp/cculkdOS.s 			page 50


 929:Core/cmsis_gcc.h ****    return(result);
 930:Core/cmsis_gcc.h **** }
 931:Core/cmsis_gcc.h **** 
 932:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 933:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 934:Core/cmsis_gcc.h **** 
 935:Core/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
 936:Core/cmsis_gcc.h **** 
 937:Core/cmsis_gcc.h **** 
 938:Core/cmsis_gcc.h **** /* ###########################  Core Function Access  ########################### */
 939:Core/cmsis_gcc.h **** /** \ingroup  CMSIS_Core_FunctionInterface
 940:Core/cmsis_gcc.h ****     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
 941:Core/cmsis_gcc.h ****   @{
 942:Core/cmsis_gcc.h ****  */
 943:Core/cmsis_gcc.h **** 
 944:Core/cmsis_gcc.h **** /**
 945:Core/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
 946:Core/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing special-purpose register PRIMASK.
 947:Core/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 948:Core/cmsis_gcc.h ****  */
 949:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
 950:Core/cmsis_gcc.h **** {
 951:Core/cmsis_gcc.h ****   __ASM volatile ("cpsie i" : : : "memory");
 952:Core/cmsis_gcc.h **** }
 953:Core/cmsis_gcc.h **** 
 954:Core/cmsis_gcc.h **** 
 955:Core/cmsis_gcc.h **** /**
 956:Core/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
 957:Core/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting special-purpose register PRIMASK.
 958:Core/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 959:Core/cmsis_gcc.h ****  */
 960:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
 961:Core/cmsis_gcc.h **** {
 962:Core/cmsis_gcc.h ****   __ASM volatile ("cpsid i" : : : "memory");
 963:Core/cmsis_gcc.h **** }
 964:Core/cmsis_gcc.h **** 
 965:Core/cmsis_gcc.h **** 
 966:Core/cmsis_gcc.h **** /**
 967:Core/cmsis_gcc.h ****   \brief   Get Control Register
 968:Core/cmsis_gcc.h ****   \details Returns the content of the Control Register.
 969:Core/cmsis_gcc.h ****   \return               Control Register value
 970:Core/cmsis_gcc.h ****  */
 971:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
 972:Core/cmsis_gcc.h **** {
 973:Core/cmsis_gcc.h ****   uint32_t result;
 974:Core/cmsis_gcc.h **** 
 975:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control" : "=r" (result) );
 976:Core/cmsis_gcc.h ****   return(result);
 977:Core/cmsis_gcc.h **** }
 978:Core/cmsis_gcc.h **** 
 979:Core/cmsis_gcc.h **** 
 980:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 981:Core/cmsis_gcc.h **** /**
 982:Core/cmsis_gcc.h ****   \brief   Get Control Register (non-secure)
 983:Core/cmsis_gcc.h ****   \details Returns the content of the non-secure Control Register when in secure mode.
 984:Core/cmsis_gcc.h ****   \return               non-secure Control Register value
 985:Core/cmsis_gcc.h ****  */
ARM GAS  /tmp/cculkdOS.s 			page 51


 986:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
 987:Core/cmsis_gcc.h **** {
 988:Core/cmsis_gcc.h ****   uint32_t result;
 989:Core/cmsis_gcc.h **** 
 990:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
 991:Core/cmsis_gcc.h ****   return(result);
 992:Core/cmsis_gcc.h **** }
 993:Core/cmsis_gcc.h **** #endif
 994:Core/cmsis_gcc.h **** 
 995:Core/cmsis_gcc.h **** 
 996:Core/cmsis_gcc.h **** /**
 997:Core/cmsis_gcc.h ****   \brief   Set Control Register
 998:Core/cmsis_gcc.h ****   \details Writes the given value to the Control Register.
 999:Core/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
1000:Core/cmsis_gcc.h ****  */
1001:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
1002:Core/cmsis_gcc.h **** {
1003:Core/cmsis_gcc.h ****   __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
1004:Core/cmsis_gcc.h ****   __ISB();
1005:Core/cmsis_gcc.h **** }
1006:Core/cmsis_gcc.h **** 
1007:Core/cmsis_gcc.h **** 
1008:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1009:Core/cmsis_gcc.h **** /**
1010:Core/cmsis_gcc.h ****   \brief   Set Control Register (non-secure)
1011:Core/cmsis_gcc.h ****   \details Writes the given value to the non-secure Control Register when in secure state.
1012:Core/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
1013:Core/cmsis_gcc.h ****  */
1014:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
1015:Core/cmsis_gcc.h **** {
1016:Core/cmsis_gcc.h ****   __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
1017:Core/cmsis_gcc.h ****   __ISB();
1018:Core/cmsis_gcc.h **** }
1019:Core/cmsis_gcc.h **** #endif
1020:Core/cmsis_gcc.h **** 
1021:Core/cmsis_gcc.h **** 
1022:Core/cmsis_gcc.h **** /**
1023:Core/cmsis_gcc.h ****   \brief   Get IPSR Register
1024:Core/cmsis_gcc.h ****   \details Returns the content of the IPSR Register.
1025:Core/cmsis_gcc.h ****   \return               IPSR Register value
1026:Core/cmsis_gcc.h ****  */
1027:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
1028:Core/cmsis_gcc.h **** {
1029:Core/cmsis_gcc.h ****   uint32_t result;
1030:Core/cmsis_gcc.h **** 
1031:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
1032:Core/cmsis_gcc.h ****   return(result);
1033:Core/cmsis_gcc.h **** }
1034:Core/cmsis_gcc.h **** 
1035:Core/cmsis_gcc.h **** 
1036:Core/cmsis_gcc.h **** /**
1037:Core/cmsis_gcc.h ****   \brief   Get APSR Register
1038:Core/cmsis_gcc.h ****   \details Returns the content of the APSR Register.
1039:Core/cmsis_gcc.h ****   \return               APSR Register value
1040:Core/cmsis_gcc.h ****  */
1041:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
1042:Core/cmsis_gcc.h **** {
ARM GAS  /tmp/cculkdOS.s 			page 52


1043:Core/cmsis_gcc.h ****   uint32_t result;
1044:Core/cmsis_gcc.h **** 
1045:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, apsr" : "=r" (result) );
1046:Core/cmsis_gcc.h ****   return(result);
1047:Core/cmsis_gcc.h **** }
1048:Core/cmsis_gcc.h **** 
1049:Core/cmsis_gcc.h **** 
1050:Core/cmsis_gcc.h **** /**
1051:Core/cmsis_gcc.h ****   \brief   Get xPSR Register
1052:Core/cmsis_gcc.h ****   \details Returns the content of the xPSR Register.
1053:Core/cmsis_gcc.h ****   \return               xPSR Register value
1054:Core/cmsis_gcc.h ****  */
1055:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
1056:Core/cmsis_gcc.h **** {
1057:Core/cmsis_gcc.h ****   uint32_t result;
1058:Core/cmsis_gcc.h **** 
1059:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
1060:Core/cmsis_gcc.h ****   return(result);
1061:Core/cmsis_gcc.h **** }
1062:Core/cmsis_gcc.h **** 
1063:Core/cmsis_gcc.h **** 
1064:Core/cmsis_gcc.h **** /**
1065:Core/cmsis_gcc.h ****   \brief   Get Process Stack Pointer
1066:Core/cmsis_gcc.h ****   \details Returns the current value of the Process Stack Pointer (PSP).
1067:Core/cmsis_gcc.h ****   \return               PSP Register value
1068:Core/cmsis_gcc.h ****  */
1069:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
1070:Core/cmsis_gcc.h **** {
1071:Core/cmsis_gcc.h ****   uint32_t result;
1072:Core/cmsis_gcc.h **** 
1073:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp"  : "=r" (result) );
1074:Core/cmsis_gcc.h ****   return(result);
1075:Core/cmsis_gcc.h **** }
1076:Core/cmsis_gcc.h **** 
1077:Core/cmsis_gcc.h **** 
1078:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1079:Core/cmsis_gcc.h **** /**
1080:Core/cmsis_gcc.h ****   \brief   Get Process Stack Pointer (non-secure)
1081:Core/cmsis_gcc.h ****   \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
1082:Core/cmsis_gcc.h ****   \return               PSP Register value
1083:Core/cmsis_gcc.h ****  */
1084:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
1085:Core/cmsis_gcc.h **** {
1086:Core/cmsis_gcc.h ****   uint32_t result;
1087:Core/cmsis_gcc.h **** 
1088:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
1089:Core/cmsis_gcc.h ****   return(result);
1090:Core/cmsis_gcc.h **** }
1091:Core/cmsis_gcc.h **** #endif
1092:Core/cmsis_gcc.h **** 
1093:Core/cmsis_gcc.h **** 
1094:Core/cmsis_gcc.h **** /**
1095:Core/cmsis_gcc.h ****   \brief   Set Process Stack Pointer
1096:Core/cmsis_gcc.h ****   \details Assigns the given value to the Process Stack Pointer (PSP).
1097:Core/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
1098:Core/cmsis_gcc.h ****  */
1099:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
ARM GAS  /tmp/cculkdOS.s 			page 53


1100:Core/cmsis_gcc.h **** {
1101:Core/cmsis_gcc.h ****   __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
1102:Core/cmsis_gcc.h **** }
1103:Core/cmsis_gcc.h **** 
1104:Core/cmsis_gcc.h **** 
1105:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1106:Core/cmsis_gcc.h **** /**
1107:Core/cmsis_gcc.h ****   \brief   Set Process Stack Pointer (non-secure)
1108:Core/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
1109:Core/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
1110:Core/cmsis_gcc.h ****  */
1111:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
1112:Core/cmsis_gcc.h **** {
1113:Core/cmsis_gcc.h ****   __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
1114:Core/cmsis_gcc.h **** }
1115:Core/cmsis_gcc.h **** #endif
1116:Core/cmsis_gcc.h **** 
1117:Core/cmsis_gcc.h **** 
1118:Core/cmsis_gcc.h **** /**
1119:Core/cmsis_gcc.h ****   \brief   Get Main Stack Pointer
1120:Core/cmsis_gcc.h ****   \details Returns the current value of the Main Stack Pointer (MSP).
1121:Core/cmsis_gcc.h ****   \return               MSP Register value
1122:Core/cmsis_gcc.h ****  */
1123:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
1124:Core/cmsis_gcc.h **** {
1125:Core/cmsis_gcc.h ****   uint32_t result;
1126:Core/cmsis_gcc.h **** 
1127:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp" : "=r" (result) );
1128:Core/cmsis_gcc.h ****   return(result);
1129:Core/cmsis_gcc.h **** }
1130:Core/cmsis_gcc.h **** 
1131:Core/cmsis_gcc.h **** 
1132:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1133:Core/cmsis_gcc.h **** /**
1134:Core/cmsis_gcc.h ****   \brief   Get Main Stack Pointer (non-secure)
1135:Core/cmsis_gcc.h ****   \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
1136:Core/cmsis_gcc.h ****   \return               MSP Register value
1137:Core/cmsis_gcc.h ****  */
1138:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
1139:Core/cmsis_gcc.h **** {
1140:Core/cmsis_gcc.h ****   uint32_t result;
1141:Core/cmsis_gcc.h **** 
1142:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
1143:Core/cmsis_gcc.h ****   return(result);
1144:Core/cmsis_gcc.h **** }
1145:Core/cmsis_gcc.h **** #endif
1146:Core/cmsis_gcc.h **** 
1147:Core/cmsis_gcc.h **** 
1148:Core/cmsis_gcc.h **** /**
1149:Core/cmsis_gcc.h ****   \brief   Set Main Stack Pointer
1150:Core/cmsis_gcc.h ****   \details Assigns the given value to the Main Stack Pointer (MSP).
1151:Core/cmsis_gcc.h ****   \param [in]    topOfMainStack  Main Stack Pointer value to set
1152:Core/cmsis_gcc.h ****  */
1153:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
1154:Core/cmsis_gcc.h **** {
1155:Core/cmsis_gcc.h ****   __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
1156:Core/cmsis_gcc.h **** }
ARM GAS  /tmp/cculkdOS.s 			page 54


1157:Core/cmsis_gcc.h **** 
1158:Core/cmsis_gcc.h **** 
1159:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1160:Core/cmsis_gcc.h **** /**
1161:Core/cmsis_gcc.h ****   \brief   Set Main Stack Pointer (non-secure)
1162:Core/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
1163:Core/cmsis_gcc.h ****   \param [in]    topOfMainStack  Main Stack Pointer value to set
1164:Core/cmsis_gcc.h ****  */
1165:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
1166:Core/cmsis_gcc.h **** {
1167:Core/cmsis_gcc.h ****   __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
1168:Core/cmsis_gcc.h **** }
1169:Core/cmsis_gcc.h **** #endif
1170:Core/cmsis_gcc.h **** 
1171:Core/cmsis_gcc.h **** 
1172:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1173:Core/cmsis_gcc.h **** /**
1174:Core/cmsis_gcc.h ****   \brief   Get Stack Pointer (non-secure)
1175:Core/cmsis_gcc.h ****   \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
1176:Core/cmsis_gcc.h ****   \return               SP Register value
1177:Core/cmsis_gcc.h ****  */
1178:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
1179:Core/cmsis_gcc.h **** {
1180:Core/cmsis_gcc.h ****   uint32_t result;
1181:Core/cmsis_gcc.h **** 
1182:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
1183:Core/cmsis_gcc.h ****   return(result);
1184:Core/cmsis_gcc.h **** }
1185:Core/cmsis_gcc.h **** 
1186:Core/cmsis_gcc.h **** 
1187:Core/cmsis_gcc.h **** /**
1188:Core/cmsis_gcc.h ****   \brief   Set Stack Pointer (non-secure)
1189:Core/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
1190:Core/cmsis_gcc.h ****   \param [in]    topOfStack  Stack Pointer value to set
1191:Core/cmsis_gcc.h ****  */
1192:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
1193:Core/cmsis_gcc.h **** {
1194:Core/cmsis_gcc.h ****   __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
1195:Core/cmsis_gcc.h **** }
1196:Core/cmsis_gcc.h **** #endif
1197:Core/cmsis_gcc.h **** 
1198:Core/cmsis_gcc.h **** 
1199:Core/cmsis_gcc.h **** /**
1200:Core/cmsis_gcc.h ****   \brief   Get Priority Mask
1201:Core/cmsis_gcc.h ****   \details Returns the current state of the priority mask bit from the Priority Mask Register.
1202:Core/cmsis_gcc.h ****   \return               Priority Mask value
1203:Core/cmsis_gcc.h ****  */
1204:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
 1226              		.loc 2 1204 31 view .LVU393
 1227              	.LBB13:
1205:Core/cmsis_gcc.h **** {
1206:Core/cmsis_gcc.h ****   uint32_t result;
 1228              		.loc 2 1206 3 view .LVU394
1207:Core/cmsis_gcc.h **** 
1208:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, primask" : "=r" (result) );
 1229              		.loc 2 1208 3 view .LVU395
 1230              		.syntax divided
ARM GAS  /tmp/cculkdOS.s 			page 55


 1231              	@ 1208 "Core/cmsis_gcc.h" 1
 1232 0034 EFF31083 		MRS r3, primask
 1233              	@ 0 "" 2
 1234              	.LVL49:
1209:Core/cmsis_gcc.h ****   return(result);
 1235              		.loc 2 1209 3 view .LVU396
 1236              		.loc 2 1209 3 is_stmt 0 view .LVU397
 1237              		.thumb
 1238              		.syntax unified
 1239              	.LBE13:
 1240              	.LBE12:
 1241              		.loc 1 457 3 is_stmt 1 discriminator 2 view .LVU398
 1242              	.LBB14:
 1243              	.LBI14:
 960:Core/cmsis_gcc.h **** {
 1244              		.loc 2 960 27 view .LVU399
 1245              	.LBB15:
 962:Core/cmsis_gcc.h **** }
 1246              		.loc 2 962 3 view .LVU400
 1247              		.syntax divided
 1248              	@ 962 "Core/cmsis_gcc.h" 1
 1249 0038 72B6     		cpsid i
 1250              	@ 0 "" 2
 1251              		.thumb
 1252              		.syntax unified
 1253              	.LBE15:
 1254              	.LBE14:
 1255              		.loc 1 457 3 discriminator 3 view .LVU401
 1256 003a 064B     		ldr	r3, .L62+12
 1257 003c 0649     		ldr	r1, .L62+16
 1258 003e 1960     		str	r1, [r3]
 1259              		.loc 1 457 19 discriminator 3 view .LVU402
 458:Library/src/lcm32f06x_dma.c ****   SYSCTRL->EDU_CFG0 = tmpreg;
 1260              		.loc 1 458 3 view .LVU403
 1261              		.loc 1 458 21 is_stmt 0 view .LVU404
 1262 0040 2262     		str	r2, [r4, #32]
 459:Library/src/lcm32f06x_dma.c ****   __dekey();
 1263              		.loc 1 459 3 is_stmt 1 view .LVU405
 1264              	.LBB16:
 1265              	.LBI16:
 949:Core/cmsis_gcc.h **** {
 1266              		.loc 2 949 27 view .LVU406
 1267              	.LBB17:
 951:Core/cmsis_gcc.h **** }
 1268              		.loc 2 951 3 view .LVU407
 1269              		.syntax divided
 1270              	@ 951 "Core/cmsis_gcc.h" 1
 1271 0042 62B6     		cpsie i
 1272              	@ 0 "" 2
 1273              		.thumb
 1274              		.syntax unified
 1275              	.LBE17:
 1276              	.LBE16:
 1277              		.loc 1 459 12 discriminator 1 view .LVU408
 460:Library/src/lcm32f06x_dma.c **** }
 1278              		.loc 1 460 1 is_stmt 0 view .LVU409
 1279              		@ sp needed
ARM GAS  /tmp/cculkdOS.s 			page 56


 1280 0044 F0BD     		pop	{r4, r5, r6, r7, pc}
 1281              	.L63:
 1282 0046 C046     		.align	2
 1283              	.L62:
 1284 0048 FFC7FFFF 		.word	-14337
 1285 004c 7FFCFFFF 		.word	-897
 1286 0050 00700048 		.word	1207988224
 1287 0054 7C700048 		.word	1207988348
 1288 0058 9A65FA05 		.word	100296090
 1289              		.cfi_endproc
 1290              	.LFE56:
 1292              		.section	.text.DMA_ReEnable_Config,"ax",%progbits
 1293              		.align	1
 1294              		.p2align 2,,3
 1295              		.global	DMA_ReEnable_Config
 1296              		.syntax unified
 1297              		.code	16
 1298              		.thumb_func
 1300              	DMA_ReEnable_Config:
 1301              	.LVL50:
 1302              	.LFB57:
 461:Library/src/lcm32f06x_dma.c **** 
 462:Library/src/lcm32f06x_dma.c **** 
 463:Library/src/lcm32f06x_dma.c **** /**
 464:Library/src/lcm32f06x_dma.c ****   * @name   DMA_ReEnable_Config
 465:Library/src/lcm32f06x_dma.c ****   * @brief  EN: DMA restart. After each DMA completion, the interface needs to be called in DMA non
 466:Library/src/lcm32f06x_dma.c ****   *         CN: DMA 重新启动。每次DMA完成之后需要调用接口，DMA非循环模式。
 467:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_Channelx: 
 468:Library/src/lcm32f06x_dma.c ****   *         EN: where y is 1 to select DMA, where x can be 0 or 1 to select DMAy channel.
 469:Library/src/lcm32f06x_dma.c ****   *         CN: 其中 y 是 1 以选择 DMA，其中 x 可以是 0 或 1 以选择 DMAy 通道。
 470:Library/src/lcm32f06x_dma.c ****   * @param  SAdress: 
 471:Library/src/lcm32f06x_dma.c ****   *         EN: DMA source address.
 472:Library/src/lcm32f06x_dma.c ****   *         CN: DMA 源地址。
 473:Library/src/lcm32f06x_dma.c ****   * @param  DAdress: 
 474:Library/src/lcm32f06x_dma.c ****   *         EN: DMA target address.
 475:Library/src/lcm32f06x_dma.c ****   *         CN: DMA 目标地址。
 476:Library/src/lcm32f06x_dma.c ****   * @param  NewState: 
 477:Library/src/lcm32f06x_dma.c ****   *         EN: Enable/Disable.
 478:Library/src/lcm32f06x_dma.c ****   *         CN: 使能或禁止。
 479:Library/src/lcm32f06x_dma.c ****   * @retval None
 480:Library/src/lcm32f06x_dma.c ****   */
 481:Library/src/lcm32f06x_dma.c **** void DMA_ReEnable_Config(DMA_Channel_TypeDef *DMAy_Channelx, uint32_t SAdress, uint32_t DAdress,Fun
 482:Library/src/lcm32f06x_dma.c **** {
 1303              		.loc 1 482 1 is_stmt 1 view -0
 1304              		.cfi_startproc
 1305              		@ args = 0, pretend = 0, frame = 0
 1306              		@ frame_needed = 0, uses_anonymous_args = 0
 483:Library/src/lcm32f06x_dma.c ****   uint32_t ch;
 1307              		.loc 1 483 3 view .LVU411
 484:Library/src/lcm32f06x_dma.c ****   uint32_t tmpreg;
 1308              		.loc 1 484 3 view .LVU412
 485:Library/src/lcm32f06x_dma.c ****   assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
 1309              		.loc 1 485 3 view .LVU413
 486:Library/src/lcm32f06x_dma.c ****   assert_param(IS_FUNCTIONAL_STATE(NewState));
 1310              		.loc 1 486 3 view .LVU414
 487:Library/src/lcm32f06x_dma.c ****   
 488:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->DAR = SAdress;
ARM GAS  /tmp/cculkdOS.s 			page 57


 1311              		.loc 1 488 3 view .LVU415
 482:Library/src/lcm32f06x_dma.c ****   uint32_t ch;
 1312              		.loc 1 482 1 is_stmt 0 view .LVU416
 1313 0000 30B5     		push	{r4, r5, lr}
 1314              	.LCFI7:
 1315              		.cfi_def_cfa_offset 12
 1316              		.cfi_offset 4, -12
 1317              		.cfi_offset 5, -8
 1318              		.cfi_offset 14, -4
 1319              		.loc 1 488 22 view .LVU417
 1320 0002 8160     		str	r1, [r0, #8]
 489:Library/src/lcm32f06x_dma.c ****   DMAy_Channelx->SAR = DAdress;
 1321              		.loc 1 489 3 is_stmt 1 view .LVU418
 1322              		.loc 1 489 22 is_stmt 0 view .LVU419
 1323 0004 0260     		str	r2, [r0]
 490:Library/src/lcm32f06x_dma.c ****   if (DMAy_Channelx == DMA1_Channel0)
 1324              		.loc 1 490 3 is_stmt 1 view .LVU420
 1325              		.loc 1 490 6 is_stmt 0 view .LVU421
 1326 0006 164A     		ldr	r2, .L72
 1327              	.LVL51:
 1328              		.loc 1 490 6 view .LVU422
 1329 0008 9042     		cmp	r0, r2
 1330 000a 22D0     		beq	.L68
 491:Library/src/lcm32f06x_dma.c ****     ch = 0;
 492:Library/src/lcm32f06x_dma.c ****   else if (DMAy_Channelx == DMA1_Channel1)
 1331              		.loc 1 492 8 is_stmt 1 view .LVU423
 1332              		.loc 1 492 11 is_stmt 0 view .LVU424
 1333 000c 154A     		ldr	r2, .L72+4
 1334 000e 9042     		cmp	r0, r2
 1335 0010 10D0     		beq	.L70
 1336 0012 0522     		movs	r2, #5
 1337 0014 8024     		movs	r4, #128
 1338 0016 144D     		ldr	r5, .L72+8
 1339 0018 5242     		rsbs	r2, r2, #0
 1340 001a E400     		lsls	r4, r4, #3
 1341              	.L65:
 493:Library/src/lcm32f06x_dma.c ****     ch = 1;
 494:Library/src/lcm32f06x_dma.c ****   else
 495:Library/src/lcm32f06x_dma.c ****     ch = 2; // invaild
 496:Library/src/lcm32f06x_dma.c ****   tmpreg = DMA1->ChEnReg;
 1342              		.loc 1 496 3 is_stmt 1 view .LVU425
 1343              		.loc 1 496 10 is_stmt 0 view .LVU426
 1344 001c E821     		movs	r1, #232
 1345              	.LVL52:
 1346              		.loc 1 496 10 view .LVU427
 1347 001e 1048     		ldr	r0, .L72
 1348              	.LVL53:
 1349              		.loc 1 496 10 view .LVU428
 1350 0020 8900     		lsls	r1, r1, #2
 1351 0022 4158     		ldr	r1, [r0, r1]
 1352              	.LVL54:
 497:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 1353              		.loc 1 497 3 is_stmt 1 view .LVU429
 1354              		.loc 1 497 6 is_stmt 0 view .LVU430
 1355 0024 002B     		cmp	r3, #0
 1356 0026 10D0     		beq	.L66
 1357              	.L71:
ARM GAS  /tmp/cculkdOS.s 			page 58


 498:Library/src/lcm32f06x_dma.c ****   {
 499:Library/src/lcm32f06x_dma.c ****     /* Enable the selected DMAy Channelx */
 500:Library/src/lcm32f06x_dma.c ****     tmpreg |= 0x101 << ch;
 1358              		.loc 1 500 5 is_stmt 1 view .LVU431
 1359              		.loc 1 500 12 is_stmt 0 view .LVU432
 1360 0028 0D43     		orrs	r5, r1
 1361              	.LVL55:
 1362              	.L67:
 501:Library/src/lcm32f06x_dma.c ****   }
 502:Library/src/lcm32f06x_dma.c ****   else
 503:Library/src/lcm32f06x_dma.c ****   {
 504:Library/src/lcm32f06x_dma.c ****     /* Disable the selected DMAy Channelx */
 505:Library/src/lcm32f06x_dma.c ****     tmpreg |= 0x100 << ch;
 506:Library/src/lcm32f06x_dma.c ****     tmpreg &= ~(1 << ch);
 507:Library/src/lcm32f06x_dma.c ****   }
 508:Library/src/lcm32f06x_dma.c ****   DMA1->ChEnReg = tmpreg;
 1363              		.loc 1 508 3 is_stmt 1 view .LVU433
 1364              		.loc 1 508 17 is_stmt 0 view .LVU434
 1365 002a E822     		movs	r2, #232
 509:Library/src/lcm32f06x_dma.c **** }
 1366              		.loc 1 509 1 view .LVU435
 1367              		@ sp needed
 508:Library/src/lcm32f06x_dma.c **** }
 1368              		.loc 1 508 17 view .LVU436
 1369 002c 0C49     		ldr	r1, .L72
 1370 002e 9200     		lsls	r2, r2, #2
 1371 0030 8D50     		str	r5, [r1, r2]
 1372              	.LVL56:
 1373              	.LVL57:
 1374              		.loc 1 509 1 view .LVU437
 1375 0032 30BD     		pop	{r4, r5, pc}
 1376              	.LVL58:
 1377              	.L70:
 496:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 1378              		.loc 1 496 10 view .LVU438
 1379 0034 E821     		movs	r1, #232
 1380              	.LVL59:
 492:Library/src/lcm32f06x_dma.c ****     ch = 1;
 1381              		.loc 1 492 11 view .LVU439
 1382 0036 0322     		movs	r2, #3
 1383 0038 8024     		movs	r4, #128
 496:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 1384              		.loc 1 496 10 view .LVU440
 1385 003a 0948     		ldr	r0, .L72
 1386              	.LVL60:
 496:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 1387              		.loc 1 496 10 view .LVU441
 1388 003c 8900     		lsls	r1, r1, #2
 492:Library/src/lcm32f06x_dma.c ****     ch = 1;
 1389              		.loc 1 492 11 view .LVU442
 1390 003e 0B4D     		ldr	r5, .L72+12
 496:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 1391              		.loc 1 496 3 is_stmt 1 view .LVU443
 496:Library/src/lcm32f06x_dma.c ****   if (NewState != DISABLE)
 1392              		.loc 1 496 10 is_stmt 0 view .LVU444
 1393 0040 4158     		ldr	r1, [r0, r1]
 1394              	.LVL61:
ARM GAS  /tmp/cculkdOS.s 			page 59


 497:Library/src/lcm32f06x_dma.c ****   {
 1395              		.loc 1 497 3 is_stmt 1 view .LVU445
 492:Library/src/lcm32f06x_dma.c ****     ch = 1;
 1396              		.loc 1 492 11 is_stmt 0 view .LVU446
 1397 0042 5242     		rsbs	r2, r2, #0
 1398 0044 A400     		lsls	r4, r4, #2
 497:Library/src/lcm32f06x_dma.c ****   {
 1399              		.loc 1 497 6 view .LVU447
 1400 0046 002B     		cmp	r3, #0
 1401 0048 EED1     		bne	.L71
 1402              	.L66:
 505:Library/src/lcm32f06x_dma.c ****     tmpreg &= ~(1 << ch);
 1403              		.loc 1 505 5 is_stmt 1 view .LVU448
 505:Library/src/lcm32f06x_dma.c ****     tmpreg &= ~(1 << ch);
 1404              		.loc 1 505 12 is_stmt 0 view .LVU449
 1405 004a 2143     		orrs	r1, r4
 1406              	.LVL62:
 506:Library/src/lcm32f06x_dma.c ****   }
 1407              		.loc 1 506 5 is_stmt 1 view .LVU450
 506:Library/src/lcm32f06x_dma.c ****   }
 1408              		.loc 1 506 12 is_stmt 0 view .LVU451
 1409 004c 0A40     		ands	r2, r1
 1410 004e 1500     		movs	r5, r2
 1411 0050 EBE7     		b	.L67
 1412              	.LVL63:
 1413              	.L68:
 506:Library/src/lcm32f06x_dma.c ****   }
 1414              		.loc 1 506 12 view .LVU452
 1415 0052 0222     		movs	r2, #2
 1416 0054 8024     		movs	r4, #128
 1417 0056 0225     		movs	r5, #2
 1418 0058 5242     		rsbs	r2, r2, #0
 1419 005a 6400     		lsls	r4, r4, #1
 1420 005c FF35     		adds	r5, r5, #255
 1421 005e DDE7     		b	.L65
 1422              	.L73:
 1423              		.align	2
 1424              	.L72:
 1425 0060 00400048 		.word	1207975936
 1426 0064 58400048 		.word	1207976024
 1427 0068 04040000 		.word	1028
 1428 006c 02020000 		.word	514
 1429              		.cfi_endproc
 1430              	.LFE57:
 1432              		.section	.text.DMA_One_Config,"ax",%progbits
 1433              		.align	1
 1434              		.p2align 2,,3
 1435              		.global	DMA_One_Config
 1436              		.syntax unified
 1437              		.code	16
 1438              		.thumb_func
 1440              	DMA_One_Config:
 1441              	.LVL64:
 1442              	.LFB58:
 510:Library/src/lcm32f06x_dma.c **** 
 511:Library/src/lcm32f06x_dma.c **** /**
 512:Library/src/lcm32f06x_dma.c ****   * @name   DMA_One_Config
ARM GAS  /tmp/cculkdOS.s 			page 60


 513:Library/src/lcm32f06x_dma.c ****   * @brief  EN: DMA single transfer mode.
 514:Library/src/lcm32f06x_dma.c ****   *         CN: DMA单次传输模式。
 515:Library/src/lcm32f06x_dma.c ****   * @param  DMAy_Channelx: 
 516:Library/src/lcm32f06x_dma.c ****   *         EN: where y is 1 to select DMA, where x can be 0 or 1 to select DMAy channel.
 517:Library/src/lcm32f06x_dma.c ****   *         CN: 其中 y 是 1 以选择 DMA，其中 x 可以是 0 或 1 以选择 DMAy 通道。
 518:Library/src/lcm32f06x_dma.c ****   * @param  SAdress: 
 519:Library/src/lcm32f06x_dma.c ****   *         EN: DMA source address.
 520:Library/src/lcm32f06x_dma.c ****   *         CN: DMA 源地址。
 521:Library/src/lcm32f06x_dma.c ****   * @param  DAdress: 
 522:Library/src/lcm32f06x_dma.c ****   *         EN: DMA target address.
 523:Library/src/lcm32f06x_dma.c ****   *         CN: DMA 目标地址。
 524:Library/src/lcm32f06x_dma.c ****   * @param  Block_size: 
 525:Library/src/lcm32f06x_dma.c ****   *         EN: DMA block transfer size.
 526:Library/src/lcm32f06x_dma.c ****   *         CN: DMA 块传输大小。
 527:Library/src/lcm32f06x_dma.c ****   * @retval None
 528:Library/src/lcm32f06x_dma.c ****   */
 529:Library/src/lcm32f06x_dma.c **** void DMA_One_Config(DMA_Channel_TypeDef *DMAy_Channelx, uint32_t SAdress, uint32_t DAdress,uint32_t
 530:Library/src/lcm32f06x_dma.c **** {
 1443              		.loc 1 530 1 is_stmt 1 view -0
 1444              		.cfi_startproc
 1445              		@ args = 0, pretend = 0, frame = 0
 1446              		@ frame_needed = 0, uses_anonymous_args = 0
 1447              		@ link register save eliminated.
 531:Library/src/lcm32f06x_dma.c ****     assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
 1448              		.loc 1 531 5 view .LVU454
 532:Library/src/lcm32f06x_dma.c **** 
 533:Library/src/lcm32f06x_dma.c ****     
 534:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->SAR = SAdress;
 1449              		.loc 1 534 5 view .LVU455
 1450              		.loc 1 534 24 is_stmt 0 view .LVU456
 1451 0000 0160     		str	r1, [r0]
 535:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->DAR = DAdress;
 1452              		.loc 1 535 5 is_stmt 1 view .LVU457
 1453              		.loc 1 535 24 is_stmt 0 view .LVU458
 1454 0002 8260     		str	r2, [r0, #8]
 536:Library/src/lcm32f06x_dma.c **** 
 537:Library/src/lcm32f06x_dma.c ****     DMAy_Channelx->CTL_H_b.BLOCK_TS = Block_size;
 1455              		.loc 1 537 5 is_stmt 1 view .LVU459
 1456              		.loc 1 537 37 is_stmt 0 view .LVU460
 1457 0004 1A05     		lsls	r2, r3, #20
 1458              	.LVL65:
 1459              		.loc 1 537 37 view .LVU461
 1460 0006 838B     		ldrh	r3, [r0, #28]
 1461              	.LVL66:
 1462              		.loc 1 537 37 view .LVU462
 1463 0008 120D     		lsrs	r2, r2, #20
 1464 000a 1B0B     		lsrs	r3, r3, #12
 1465 000c 1B03     		lsls	r3, r3, #12
 1466 000e 1343     		orrs	r3, r2
 1467 0010 8383     		strh	r3, [r0, #28]
 1468              	.LVL67:
 538:Library/src/lcm32f06x_dma.c **** }
 1469              		.loc 1 538 1 view .LVU463
 1470              		@ sp needed
 1471 0012 7047     		bx	lr
 1472              		.cfi_endproc
 1473              	.LFE58:
ARM GAS  /tmp/cculkdOS.s 			page 61


 1475              		.text
 1476              	.Letext0:
 1477              		.file 3 "Library/inc/lcm32f06x.h"
 1478              		.file 4 "/home/ha/toolchain/arm-gnu-toolchain-14.3/arm-none-eabi/include/machine/_default_types.h"
 1479              		.file 5 "/home/ha/toolchain/arm-gnu-toolchain-14.3/arm-none-eabi/include/sys/_stdint.h"
 1480              		.file 6 "Library/inc/lcm32f06x_dma.h"
ARM GAS  /tmp/cculkdOS.s 			page 62


DEFINED SYMBOLS
                            *ABS*:00000000 lcm32f06x_dma.c
     /tmp/cculkdOS.s:17     .text.DMA_DeInit:00000000 $t
     /tmp/cculkdOS.s:24     .text.DMA_DeInit:00000000 DMA_DeInit
     /tmp/cculkdOS.s:228    .text.DMA_DeInit:000000c4 $d
     /tmp/cculkdOS.s:234    .text.DMA_Init:00000000 $t
     /tmp/cculkdOS.s:241    .text.DMA_Init:00000000 DMA_Init
     /tmp/cculkdOS.s:461    .text.DMA_Init:000000e0 $d
     /tmp/cculkdOS.s:470    .text.DMA_StructInit:00000000 $t
     /tmp/cculkdOS.s:477    .text.DMA_StructInit:00000000 DMA_StructInit
     /tmp/cculkdOS.s:527    .text.DMA_Cmd:00000000 $t
     /tmp/cculkdOS.s:534    .text.DMA_Cmd:00000000 DMA_Cmd
     /tmp/cculkdOS.s:649    .text.DMA_Cmd:0000005c $d
     /tmp/cculkdOS.s:657    .text.DMA_SetCurrDataCounter:00000000 $t
     /tmp/cculkdOS.s:664    .text.DMA_SetCurrDataCounter:00000000 DMA_SetCurrDataCounter
     /tmp/cculkdOS.s:688    .text.DMA_GetCurrDataCounter:00000000 $t
     /tmp/cculkdOS.s:695    .text.DMA_GetCurrDataCounter:00000000 DMA_GetCurrDataCounter
     /tmp/cculkdOS.s:720    .text.DMA_ITConfig:00000000 $t
     /tmp/cculkdOS.s:727    .text.DMA_ITConfig:00000000 DMA_ITConfig
     /tmp/cculkdOS.s:851    .text.DMA_ITConfig:00000064 $d
     /tmp/cculkdOS.s:856    .text.DMA_GetFlagStatus:00000000 $t
     /tmp/cculkdOS.s:863    .text.DMA_GetFlagStatus:00000000 DMA_GetFlagStatus
     /tmp/cculkdOS.s:920    .text.DMA_GetFlagStatus:0000002c $d
     /tmp/cculkdOS.s:925    .text.DMA_ClearFlag:00000000 $t
     /tmp/cculkdOS.s:932    .text.DMA_ClearFlag:00000000 DMA_ClearFlag
     /tmp/cculkdOS.s:996    .text.DMA_ClearFlag:00000034 $d
     /tmp/cculkdOS.s:1001   .text.DMA_GetITStatus:00000000 $t
     /tmp/cculkdOS.s:1008   .text.DMA_GetITStatus:00000000 DMA_GetITStatus
     /tmp/cculkdOS.s:1065   .text.DMA_GetITStatus:0000002c $d
     /tmp/cculkdOS.s:1070   .text.DMA_ClearITPendingBit:00000000 $t
     /tmp/cculkdOS.s:1077   .text.DMA_ClearITPendingBit:00000000 DMA_ClearITPendingBit
     /tmp/cculkdOS.s:1136   .text.DMA_ClearITPendingBit:00000034 $d
     /tmp/cculkdOS.s:1141   .text.DMA_RemapConfig:00000000 $t
     /tmp/cculkdOS.s:1148   .text.DMA_RemapConfig:00000000 DMA_RemapConfig
     /tmp/cculkdOS.s:1284   .text.DMA_RemapConfig:00000048 $d
     /tmp/cculkdOS.s:1293   .text.DMA_ReEnable_Config:00000000 $t
     /tmp/cculkdOS.s:1300   .text.DMA_ReEnable_Config:00000000 DMA_ReEnable_Config
     /tmp/cculkdOS.s:1425   .text.DMA_ReEnable_Config:00000060 $d
     /tmp/cculkdOS.s:1433   .text.DMA_One_Config:00000000 $t
     /tmp/cculkdOS.s:1440   .text.DMA_One_Config:00000000 DMA_One_Config

NO UNDEFINED SYMBOLS
