ARM GAS  /tmp/ccteMF1S.s 			page 1


   1              		.cpu cortex-m0
   2              		.arch armv6s-m
   3              		.fpu softvfp
   4              		.eabi_attribute 23, 1
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 2
   9              		.eabi_attribute 34, 0
  10              		.eabi_attribute 18, 4
  11              		.file	"lcm32f06x_cordic.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.file 1 "Library/src/lcm32f06x_cordic.c"
  16              		.section	.text.CORDIC_Init,"ax",%progbits
  17              		.align	1
  18              		.p2align 2,,3
  19              		.global	CORDIC_Init
  20              		.syntax unified
  21              		.code	16
  22              		.thumb_func
  24              	CORDIC_Init:
  25              	.LVL0:
  26              	.LFB45:
   1:Library/src/lcm32f06x_cordic.c **** /**
   2:Library/src/lcm32f06x_cordic.c ****   ******************************************************************************
   3:Library/src/lcm32f06x_cordic.c ****   * @file    lcm32f06x_cordic.c
   4:Library/src/lcm32f06x_cordic.c ****   * @author  System R&D Team
   5:Library/src/lcm32f06x_cordic.c ****   * @version V2.0.2
   6:Library/src/lcm32f06x_cordic.c ****   * @date    10-April-2025
   7:Library/src/lcm32f06x_cordic.c ****   * @brief   This file provides all the cordic firmware functions.
   8:Library/src/lcm32f06x_cordic.c ****   ******************************************************************************
   9:Library/src/lcm32f06x_cordic.c ****   * @attention
  10:Library/src/lcm32f06x_cordic.c ****   *
  11:Library/src/lcm32f06x_cordic.c ****   * Copyright (c) Hangzhou Lingxin Microelectronics Co.
  12:Library/src/lcm32f06x_cordic.c ****   * All rights reserved.
  13:Library/src/lcm32f06x_cordic.c ****   *
  14:Library/src/lcm32f06x_cordic.c ****   * This software is licensed under terms that can be found in the LICENSE file
  15:Library/src/lcm32f06x_cordic.c ****   * in the root directory of this software component.
  16:Library/src/lcm32f06x_cordic.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  17:Library/src/lcm32f06x_cordic.c ****   *
  18:Library/src/lcm32f06x_cordic.c ****   ******************************************************************************
  19:Library/src/lcm32f06x_cordic.c ****   */
  20:Library/src/lcm32f06x_cordic.c **** 
  21:Library/src/lcm32f06x_cordic.c **** /* Includes ------------------------------------------------------------------*/
  22:Library/src/lcm32f06x_cordic.c **** #include "lcm32f06x_cordic.h"
  23:Library/src/lcm32f06x_cordic.c **** 
  24:Library/src/lcm32f06x_cordic.c **** 
  25:Library/src/lcm32f06x_cordic.c **** /**
  26:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Init
  27:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Initializes the CORDIC peripheral according to the specified 
  28:Library/src/lcm32f06x_cordic.c ****   *             parameters in the CORDIC_InitStruct.
  29:Library/src/lcm32f06x_cordic.c ****   *         CN: 根据指定的参数初始化 CORDIC 外设在 CORDIC_InitStruct 中。
  30:Library/src/lcm32f06x_cordic.c ****   * @param  CORDIC_InitStruct: 
  31:Library/src/lcm32f06x_cordic.c ****   *         EN: Pointer to an CORDIC_InitTypeDef structure that contains the 
  32:Library/src/lcm32f06x_cordic.c ****   *             configuration information for the specified CORDIC peripheral.
ARM GAS  /tmp/ccteMF1S.s 			page 2


  33:Library/src/lcm32f06x_cordic.c ****   *         CN: 指向 CORDIC_InitTypeDef 结构的指针，该结构包含指定 CORDIC 外设的配置信息。
  34:Library/src/lcm32f06x_cordic.c ****   * @retval None
  35:Library/src/lcm32f06x_cordic.c ****   */
  36:Library/src/lcm32f06x_cordic.c **** void CORDIC_Init(CORDIC_InitTypeDef *CORDIC_InitStruct)
  37:Library/src/lcm32f06x_cordic.c **** {
  27              		.loc 1 37 1 view -0
  28              		.cfi_startproc
  29              		@ args = 0, pretend = 0, frame = 0
  30              		@ frame_needed = 0, uses_anonymous_args = 0
  31              		@ link register save eliminated.
  38:Library/src/lcm32f06x_cordic.c ****   CORDIC->CFG = (CORDIC_InitStruct->Cordic_Function | CORDIC_InitStruct->Cordic_Mode | \
  32              		.loc 1 38 3 view .LVU1
  33              		.loc 1 38 53 is_stmt 0 view .LVU2
  34 0000 4268     		ldr	r2, [r0, #4]
  35 0002 0368     		ldr	r3, [r0]
  39:Library/src/lcm32f06x_cordic.c ****                   CORDIC_InitStruct->Cordic_Cycles | (uint32_t)(CORDIC_InitStruct->Cordic_BypassPOS
  40:Library/src/lcm32f06x_cordic.c ****                  (uint32_t)(CORDIC_InitStruct->Cordic_BypassPRE << CORDIC_CFG_BYPASS_PRE_Pos));
  41:Library/src/lcm32f06x_cordic.c **** 
  42:Library/src/lcm32f06x_cordic.c ****   CORDIC->XI = CORDIC_InitStruct->Cordic_Xi;
  43:Library/src/lcm32f06x_cordic.c ****   CORDIC->YI = CORDIC_InitStruct->Cordic_Yi;
  44:Library/src/lcm32f06x_cordic.c ****   CORDIC->ZI = CORDIC_InitStruct->Cordic_Zi;
  45:Library/src/lcm32f06x_cordic.c **** }
  36              		.loc 1 45 1 view .LVU3
  37              		@ sp needed
  38:Library/src/lcm32f06x_cordic.c ****   CORDIC->CFG = (CORDIC_InitStruct->Cordic_Function | CORDIC_InitStruct->Cordic_Mode | \
  38              		.loc 1 38 53 view .LVU4
  39 0004 1343     		orrs	r3, r2
  38:Library/src/lcm32f06x_cordic.c ****   CORDIC->CFG = (CORDIC_InitStruct->Cordic_Function | CORDIC_InitStruct->Cordic_Mode | \
  40              		.loc 1 38 86 view .LVU5
  41 0006 8268     		ldr	r2, [r0, #8]
  42 0008 1343     		orrs	r3, r2
  39:Library/src/lcm32f06x_cordic.c ****                   CORDIC_InitStruct->Cordic_Cycles | (uint32_t)(CORDIC_InitStruct->Cordic_BypassPOS
  43              		.loc 1 39 102 view .LVU6
  44 000a 027E     		ldrb	r2, [r0, #24]
  39:Library/src/lcm32f06x_cordic.c ****                   CORDIC_InitStruct->Cordic_Cycles | (uint32_t)(CORDIC_InitStruct->Cordic_BypassPOS
  45              		.loc 1 39 54 view .LVU7
  46 000c 5201     		lsls	r2, r2, #5
  39:Library/src/lcm32f06x_cordic.c ****                   CORDIC_InitStruct->Cordic_Cycles | (uint32_t)(CORDIC_InitStruct->Cordic_BypassPOS
  47              		.loc 1 39 52 view .LVU8
  48 000e 1343     		orrs	r3, r2
  40:Library/src/lcm32f06x_cordic.c **** 
  49              		.loc 1 40 65 view .LVU9
  50 0010 427E     		ldrb	r2, [r0, #25]
  40:Library/src/lcm32f06x_cordic.c **** 
  51              		.loc 1 40 18 view .LVU10
  52 0012 1201     		lsls	r2, r2, #4
  39:Library/src/lcm32f06x_cordic.c ****                   CORDIC_InitStruct->Cordic_Cycles | (uint32_t)(CORDIC_InitStruct->Cordic_BypassPOS
  53              		.loc 1 39 133 view .LVU11
  54 0014 1343     		orrs	r3, r2
  38:Library/src/lcm32f06x_cordic.c ****   CORDIC->CFG = (CORDIC_InitStruct->Cordic_Function | CORDIC_InitStruct->Cordic_Mode | \
  55              		.loc 1 38 15 view .LVU12
  56 0016 044A     		ldr	r2, .L3
  57 0018 5360     		str	r3, [r2, #4]
  42:Library/src/lcm32f06x_cordic.c ****   CORDIC->YI = CORDIC_InitStruct->Cordic_Yi;
  58              		.loc 1 42 3 is_stmt 1 view .LVU13
  42:Library/src/lcm32f06x_cordic.c ****   CORDIC->YI = CORDIC_InitStruct->Cordic_Yi;
  59              		.loc 1 42 33 is_stmt 0 view .LVU14
ARM GAS  /tmp/ccteMF1S.s 			page 3


  60 001a C368     		ldr	r3, [r0, #12]
  42:Library/src/lcm32f06x_cordic.c ****   CORDIC->YI = CORDIC_InitStruct->Cordic_Yi;
  61              		.loc 1 42 14 view .LVU15
  62 001c D360     		str	r3, [r2, #12]
  43:Library/src/lcm32f06x_cordic.c ****   CORDIC->ZI = CORDIC_InitStruct->Cordic_Zi;
  63              		.loc 1 43 3 is_stmt 1 view .LVU16
  43:Library/src/lcm32f06x_cordic.c ****   CORDIC->ZI = CORDIC_InitStruct->Cordic_Zi;
  64              		.loc 1 43 33 is_stmt 0 view .LVU17
  65 001e 0369     		ldr	r3, [r0, #16]
  43:Library/src/lcm32f06x_cordic.c ****   CORDIC->ZI = CORDIC_InitStruct->Cordic_Zi;
  66              		.loc 1 43 14 view .LVU18
  67 0020 1361     		str	r3, [r2, #16]
  44:Library/src/lcm32f06x_cordic.c **** }
  68              		.loc 1 44 3 is_stmt 1 view .LVU19
  44:Library/src/lcm32f06x_cordic.c **** }
  69              		.loc 1 44 33 is_stmt 0 view .LVU20
  70 0022 4369     		ldr	r3, [r0, #20]
  44:Library/src/lcm32f06x_cordic.c **** }
  71              		.loc 1 44 14 view .LVU21
  72 0024 5361     		str	r3, [r2, #20]
  73              		.loc 1 45 1 view .LVU22
  74 0026 7047     		bx	lr
  75              	.L4:
  76              		.align	2
  77              	.L3:
  78 0028 00000148 		.word	1208025088
  79              		.cfi_endproc
  80              	.LFE45:
  82              		.section	.text.CORDIC_Start,"ax",%progbits
  83              		.align	1
  84              		.p2align 2,,3
  85              		.global	CORDIC_Start
  86              		.syntax unified
  87              		.code	16
  88              		.thumb_func
  90              	CORDIC_Start:
  91              	.LVL1:
  92              	.LFB46:
  46:Library/src/lcm32f06x_cordic.c **** 
  47:Library/src/lcm32f06x_cordic.c **** /**
  48:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Start
  49:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: CORDIC starts calculation.
  50:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC开始运算。
  51:Library/src/lcm32f06x_cordic.c ****   * @retval Cordic_Result_t
  52:Library/src/lcm32f06x_cordic.c ****   *         EN: Operation result.
  53:Library/src/lcm32f06x_cordic.c ****   *         CN: 运算结果。
  54:Library/src/lcm32f06x_cordic.c ****   */
  55:Library/src/lcm32f06x_cordic.c **** Cordic_Result_t CORDIC_Start(void)
  56:Library/src/lcm32f06x_cordic.c **** {
  93              		.loc 1 56 1 is_stmt 1 view -0
  94              		.cfi_startproc
  95              		@ args = 0, pretend = 0, frame = 0
  96              		@ frame_needed = 0, uses_anonymous_args = 0
  97              		@ link register save eliminated.
  57:Library/src/lcm32f06x_cordic.c ****   Cordic_Result_t result;
  98              		.loc 1 57 3 view .LVU24
  58:Library/src/lcm32f06x_cordic.c ****   CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
ARM GAS  /tmp/ccteMF1S.s 			page 4


  99              		.loc 1 58 3 view .LVU25
 100              		.loc 1 58 16 is_stmt 0 view .LVU26
 101 0000 8023     		movs	r3, #128
 102              		.loc 1 58 9 view .LVU27
 103 0002 0C4A     		ldr	r2, .L11
 104              		.loc 1 58 16 view .LVU28
 105 0004 5B00     		lsls	r3, r3, #1
 106              		.loc 1 58 9 view .LVU29
 107 0006 1168     		ldr	r1, [r2]
 108              		.loc 1 58 16 view .LVU30
 109 0008 0B43     		orrs	r3, r1
 110 000a 1360     		str	r3, [r2]
  59:Library/src/lcm32f06x_cordic.c ****   while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 111              		.loc 1 59 3 is_stmt 1 view .LVU31
 112              		.loc 1 59 9 view .LVU32
 113              		.loc 1 59 17 is_stmt 0 view .LVU33
 114 000c 1368     		ldr	r3, [r2]
 115              		.loc 1 59 9 view .LVU34
 116 000e DB07     		lsls	r3, r3, #31
 117 0010 08D4     		bmi	.L6
 118              		.loc 1 59 24 view .LVU35
 119 0012 0121     		movs	r1, #1
 120              	.L7:
  60:Library/src/lcm32f06x_cordic.c ****   {
  61:Library/src/lcm32f06x_cordic.c ****     __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 121              		.loc 1 61 5 is_stmt 1 view .LVU36
 122              		.syntax divided
 123              	@ 61 "Library/src/lcm32f06x_cordic.c" 1
 124 0014 C046     		nop
 125              	@ 0 "" 2
 126              		.loc 1 61 14 view .LVU37
 127              	@ 61 "Library/src/lcm32f06x_cordic.c" 1
 128 0016 C046     		nop
 129              	@ 0 "" 2
 130              		.loc 1 61 23 view .LVU38
 131              	@ 61 "Library/src/lcm32f06x_cordic.c" 1
 132 0018 C046     		nop
 133              	@ 0 "" 2
 134              		.loc 1 61 32 view .LVU39
 135              	@ 61 "Library/src/lcm32f06x_cordic.c" 1
 136 001a C046     		nop
 137              	@ 0 "" 2
 138              		.loc 1 61 41 view .LVU40
 139              	@ 61 "Library/src/lcm32f06x_cordic.c" 1
 140 001c C046     		nop
 141              	@ 0 "" 2
  59:Library/src/lcm32f06x_cordic.c ****   while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 142              		.loc 1 59 9 view .LVU41
  59:Library/src/lcm32f06x_cordic.c ****   while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 143              		.loc 1 59 17 is_stmt 0 view .LVU42
 144              		.thumb
 145              		.syntax unified
 146 001e 1368     		ldr	r3, [r2]
  59:Library/src/lcm32f06x_cordic.c ****   while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 147              		.loc 1 59 9 view .LVU43
 148 0020 1942     		tst	r1, r3
 149 0022 F7D0     		beq	.L7
ARM GAS  /tmp/ccteMF1S.s 			page 5


 150              	.L6:
  62:Library/src/lcm32f06x_cordic.c ****   };
 151              		.loc 1 62 4 is_stmt 1 view .LVU44
  63:Library/src/lcm32f06x_cordic.c ****   result.XO = CORDIC->XO;
 152              		.loc 1 63 3 view .LVU45
  64:Library/src/lcm32f06x_cordic.c ****   result.YO = CORDIC->YO;
  65:Library/src/lcm32f06x_cordic.c ****   result.ZO = CORDIC->ZO;
  66:Library/src/lcm32f06x_cordic.c ****   return result;
  67:Library/src/lcm32f06x_cordic.c **** }
 153              		.loc 1 67 1 is_stmt 0 view .LVU46
 154              		@ sp needed
  63:Library/src/lcm32f06x_cordic.c ****   result.XO = CORDIC->XO;
 155              		.loc 1 63 21 view .LVU47
 156 0024 034B     		ldr	r3, .L11
 157 0026 9969     		ldr	r1, [r3, #24]
 158              	.LVL2:
  64:Library/src/lcm32f06x_cordic.c ****   result.YO = CORDIC->YO;
 159              		.loc 1 64 3 is_stmt 1 view .LVU48
  64:Library/src/lcm32f06x_cordic.c ****   result.YO = CORDIC->YO;
 160              		.loc 1 64 21 is_stmt 0 view .LVU49
 161 0028 DA69     		ldr	r2, [r3, #28]
 162              	.LVL3:
  65:Library/src/lcm32f06x_cordic.c ****   return result;
 163              		.loc 1 65 3 is_stmt 1 view .LVU50
  65:Library/src/lcm32f06x_cordic.c ****   return result;
 164              		.loc 1 65 21 is_stmt 0 view .LVU51
 165 002a 1B6A     		ldr	r3, [r3, #32]
 166              	.LVL4:
  66:Library/src/lcm32f06x_cordic.c **** }
 167              		.loc 1 66 3 is_stmt 1 view .LVU52
  66:Library/src/lcm32f06x_cordic.c **** }
 168              		.loc 1 66 10 is_stmt 0 view .LVU53
 169 002c 0160     		str	r1, [r0]
 170 002e 4260     		str	r2, [r0, #4]
 171 0030 8360     		str	r3, [r0, #8]
 172              	.LVL5:
 173              		.loc 1 67 1 view .LVU54
 174 0032 7047     		bx	lr
 175              	.L12:
 176              		.align	2
 177              	.L11:
 178 0034 00000148 		.word	1208025088
 179              		.cfi_endproc
 180              	.LFE46:
 182              		.section	.text.CORDIC_Circle_System_Config,"ax",%progbits
 183              		.align	1
 184              		.p2align 2,,3
 185              		.global	CORDIC_Circle_System_Config
 186              		.syntax unified
 187              		.code	16
 188              		.thumb_func
 190              	CORDIC_Circle_System_Config:
 191              	.LVL6:
 192              	.LFB47:
  68:Library/src/lcm32f06x_cordic.c **** 
  69:Library/src/lcm32f06x_cordic.c **** /**
  70:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Circle_System_Config
ARM GAS  /tmp/ccteMF1S.s 			page 6


  71:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Circumferential system.
  72:Library/src/lcm32f06x_cordic.c ****   *         CN: 圆周系统。
  73:Library/src/lcm32f06x_cordic.c ****   * @param  Mode:
  74:Library/src/lcm32f06x_cordic.c ****   *         EN: CORDIC mode selection.
  75:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 模式选择
  76:Library/src/lcm32f06x_cordic.c ****   * @param  Cycles:
  77:Library/src/lcm32f06x_cordic.c ****   *         EN: The number of iterations for CORDIC operations.
  78:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数。
  79:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
  80:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
  81:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
  82:Library/src/lcm32f06x_cordic.c ****   * @param  Xi:
  83:Library/src/lcm32f06x_cordic.c ****   *         EN: X input value.
  84:Library/src/lcm32f06x_cordic.c ****   *         CN: X 输入值。
  85:Library/src/lcm32f06x_cordic.c ****   * @param  Yi:
  86:Library/src/lcm32f06x_cordic.c ****   *         EN: Y input value.
  87:Library/src/lcm32f06x_cordic.c ****   *         CN: Y 输入值。
  88:Library/src/lcm32f06x_cordic.c ****   * @param  Zi:
  89:Library/src/lcm32f06x_cordic.c ****   *         EN: Z input value.
  90:Library/src/lcm32f06x_cordic.c ****   *         CN: Z 输入值。
  91:Library/src/lcm32f06x_cordic.c ****   * @retval Cordic_Result_t
  92:Library/src/lcm32f06x_cordic.c ****   *         EN: Operation result.
  93:Library/src/lcm32f06x_cordic.c ****   *         CN: 运算结果。
  94:Library/src/lcm32f06x_cordic.c ****   */
  95:Library/src/lcm32f06x_cordic.c **** Cordic_Result_t CORDIC_Circle_System_Config(uint32_t Mode, uint32_t Cycles, uint32_t Xi, uint32_t Y
  96:Library/src/lcm32f06x_cordic.c **** {
 193              		.loc 1 96 1 is_stmt 1 view -0
 194              		.cfi_startproc
 195              		@ args = 8, pretend = 0, frame = 0
 196              		@ frame_needed = 0, uses_anonymous_args = 0
  97:Library/src/lcm32f06x_cordic.c **** 
  98:Library/src/lcm32f06x_cordic.c ****   Cordic_Result_t result;
 197              		.loc 1 98 3 view .LVU56
  99:Library/src/lcm32f06x_cordic.c **** 
 100:Library/src/lcm32f06x_cordic.c ****   CORDIC->CFG = CORDIC_FUNC_CIRCLE | Mode | Cycles;
 198              		.loc 1 100 3 view .LVU57
 199              		.loc 1 100 43 is_stmt 0 view .LVU58
 200 0000 0A43     		orrs	r2, r1
 201              	.LVL7:
  96:Library/src/lcm32f06x_cordic.c **** 
 202              		.loc 1 96 1 view .LVU59
 203 0002 F0B5     		push	{r4, r5, r6, r7, lr}
 204              	.LCFI0:
 205              		.cfi_def_cfa_offset 20
 206              		.cfi_offset 4, -20
 207              		.cfi_offset 5, -16
 208              		.cfi_offset 6, -12
 209              		.cfi_offset 7, -8
 210              		.cfi_offset 14, -4
 211 0004 0E00     		movs	r6, r1
 212              		.loc 1 100 43 view .LVU60
 213 0006 1100     		movs	r1, r2
 214              	.LVL8:
 215              		.loc 1 100 43 view .LVU61
 216 0008 8022     		movs	r2, #128
  96:Library/src/lcm32f06x_cordic.c **** 
 217              		.loc 1 96 1 view .LVU62
ARM GAS  /tmp/ccteMF1S.s 			page 7


 218 000a C646     		mov	lr, r8
 219              		.loc 1 100 15 view .LVU63
 220 000c 264C     		ldr	r4, .L26
 221              		.loc 1 100 43 view .LVU64
 222 000e 5201     		lsls	r2, r2, #5
 223 0010 0A43     		orrs	r2, r1
  96:Library/src/lcm32f06x_cordic.c **** 
 224              		.loc 1 96 1 view .LVU65
 225 0012 0500     		movs	r5, r0
 226 0014 00B5     		push	{lr}
 227              	.LCFI1:
 228              		.cfi_def_cfa_offset 24
 229              		.cfi_offset 8, -24
  96:Library/src/lcm32f06x_cordic.c **** 
 230              		.loc 1 96 1 view .LVU66
 231 0016 1800     		movs	r0, r3
 232              	.LVL9:
 233              		.loc 1 100 15 view .LVU67
 234 0018 6260     		str	r2, [r4, #4]
 235              	.LVL10:
 101:Library/src/lcm32f06x_cordic.c **** 
 102:Library/src/lcm32f06x_cordic.c ****   if (Mode == CORDIC_MODE_ROTATE)
 236              		.loc 1 102 3 is_stmt 1 view .LVU68
 237              		.loc 1 102 6 is_stmt 0 view .LVU69
 238 001a 002E     		cmp	r6, #0
 239 001c 2BD1     		bne	.L14
 103:Library/src/lcm32f06x_cordic.c ****   {
 104:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = (1/1.64676 * Xi);
 240              		.loc 1 104 5 is_stmt 1 view .LVU70
 241              		.loc 1 104 29 is_stmt 0 view .LVU71
 242 001e FFF7FEFF 		bl	__aeabi_ui2d
 243              	.LVL11:
 244              		.loc 1 104 29 view .LVU72
 245 0022 224A     		ldr	r2, .L26+4
 246 0024 224B     		ldr	r3, .L26+8
 247 0026 FFF7FEFF 		bl	__aeabi_dmul
 248              	.LVL12:
 249              		.loc 1 104 16 view .LVU73
 250 002a FFF7FEFF 		bl	__aeabi_d2uiz
 251              	.LVL13:
 252 002e E060     		str	r0, [r4, #12]
 105:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 253              		.loc 1 105 5 is_stmt 1 view .LVU74
 254              		.loc 1 105 16 is_stmt 0 view .LVU75
 255 0030 2661     		str	r6, [r4, #16]
 106:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = Zi;
 256              		.loc 1 106 5 is_stmt 1 view .LVU76
 257              		.loc 1 106 16 is_stmt 0 view .LVU77
 258 0032 079B     		ldr	r3, [sp, #28]
 259 0034 6361     		str	r3, [r4, #20]
 107:Library/src/lcm32f06x_cordic.c **** 
 108:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 260              		.loc 1 108 5 is_stmt 1 view .LVU78
 261              		.loc 1 108 18 is_stmt 0 view .LVU79
 262 0036 8023     		movs	r3, #128
 263              		.loc 1 108 11 view .LVU80
 264 0038 2268     		ldr	r2, [r4]
ARM GAS  /tmp/ccteMF1S.s 			page 8


 265              		.loc 1 108 18 view .LVU81
 266 003a 5B00     		lsls	r3, r3, #1
 267 003c 1343     		orrs	r3, r2
 268 003e 2360     		str	r3, [r4]
 109:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 269              		.loc 1 109 5 is_stmt 1 view .LVU82
 270              		.loc 1 109 11 view .LVU83
 271              		.loc 1 109 19 is_stmt 0 view .LVU84
 272 0040 2368     		ldr	r3, [r4]
 273              		.loc 1 109 11 view .LVU85
 274 0042 DB07     		lsls	r3, r3, #31
 275 0044 08D4     		bmi	.L18
 276              		.loc 1 109 26 view .LVU86
 277 0046 0122     		movs	r2, #1
 278              	.L16:
 110:Library/src/lcm32f06x_cordic.c ****     {
 111:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 279              		.loc 1 111 9 is_stmt 1 view .LVU87
 280              		.syntax divided
 281              	@ 111 "Library/src/lcm32f06x_cordic.c" 1
 282 0048 C046     		nop
 283              	@ 0 "" 2
 284              		.loc 1 111 18 view .LVU88
 285              	@ 111 "Library/src/lcm32f06x_cordic.c" 1
 286 004a C046     		nop
 287              	@ 0 "" 2
 288              		.loc 1 111 27 view .LVU89
 289              	@ 111 "Library/src/lcm32f06x_cordic.c" 1
 290 004c C046     		nop
 291              	@ 0 "" 2
 292              		.loc 1 111 36 view .LVU90
 293              	@ 111 "Library/src/lcm32f06x_cordic.c" 1
 294 004e C046     		nop
 295              	@ 0 "" 2
 296              		.loc 1 111 45 view .LVU91
 297              	@ 111 "Library/src/lcm32f06x_cordic.c" 1
 298 0050 C046     		nop
 299              	@ 0 "" 2
 109:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 300              		.loc 1 109 11 view .LVU92
 109:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 301              		.loc 1 109 19 is_stmt 0 view .LVU93
 302              		.thumb
 303              		.syntax unified
 304 0052 2368     		ldr	r3, [r4]
 109:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 305              		.loc 1 109 11 view .LVU94
 306 0054 1A42     		tst	r2, r3
 307 0056 F7D0     		beq	.L16
 308              	.LVL14:
 309              	.L18:
 112:Library/src/lcm32f06x_cordic.c ****     };
 113:Library/src/lcm32f06x_cordic.c **** 
 114:Library/src/lcm32f06x_cordic.c ****     result.XO = CORDIC->XO;
 115:Library/src/lcm32f06x_cordic.c ****     result.YO = CORDIC->YO;
 116:Library/src/lcm32f06x_cordic.c ****     result.ZO = CORDIC->ZO;
 117:Library/src/lcm32f06x_cordic.c ****   }
ARM GAS  /tmp/ccteMF1S.s 			page 9


 118:Library/src/lcm32f06x_cordic.c ****   else if (Mode == CORDIC_MODE_VECTOR)
 119:Library/src/lcm32f06x_cordic.c ****   {
 120:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = Xi;
 121:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = Yi;
 122:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 123:Library/src/lcm32f06x_cordic.c **** 
 124:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 125:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 126:Library/src/lcm32f06x_cordic.c ****     {
 127:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 128:Library/src/lcm32f06x_cordic.c ****     };
 310              		.loc 1 128 6 is_stmt 1 view .LVU95
 129:Library/src/lcm32f06x_cordic.c **** 
 130:Library/src/lcm32f06x_cordic.c ****     result.XO = CORDIC->XO;
 311              		.loc 1 130 5 view .LVU96
 312              		.loc 1 130 23 is_stmt 0 view .LVU97
 313 0058 134B     		ldr	r3, .L26
 314 005a 9A69     		ldr	r2, [r3, #24]
 315 005c 9046     		mov	r8, r2
 316              	.LVL15:
 131:Library/src/lcm32f06x_cordic.c ****     result.YO = CORDIC->YO;
 317              		.loc 1 131 5 is_stmt 1 view .LVU98
 318              		.loc 1 131 23 is_stmt 0 view .LVU99
 319 005e DA69     		ldr	r2, [r3, #28]
 320              	.LVL16:
 132:Library/src/lcm32f06x_cordic.c ****     result.ZO = CORDIC->ZO;
 321              		.loc 1 132 23 view .LVU100
 322 0060 1F6A     		ldr	r7, [r3, #32]
 131:Library/src/lcm32f06x_cordic.c ****     result.YO = CORDIC->YO;
 323              		.loc 1 131 23 view .LVU101
 324 0062 9446     		mov	ip, r2
 325              	.LVL17:
 326              		.loc 1 132 5 is_stmt 1 view .LVU102
 327              	.L17:
 133:Library/src/lcm32f06x_cordic.c ****   }
 134:Library/src/lcm32f06x_cordic.c ****   return result;
 328              		.loc 1 134 3 view .LVU103
 135:Library/src/lcm32f06x_cordic.c **** }
 329              		.loc 1 135 1 is_stmt 0 view .LVU104
 330              		@ sp needed
 134:Library/src/lcm32f06x_cordic.c **** }
 331              		.loc 1 134 10 view .LVU105
 332 0064 4346     		mov	r3, r8
 333 0066 2B60     		str	r3, [r5]
 334 0068 6346     		mov	r3, ip
 335              		.loc 1 135 1 view .LVU106
 336 006a 2800     		movs	r0, r5
 134:Library/src/lcm32f06x_cordic.c **** }
 337              		.loc 1 134 10 view .LVU107
 338 006c AF60     		str	r7, [r5, #8]
 339              	.LVL18:
 134:Library/src/lcm32f06x_cordic.c **** }
 340              		.loc 1 134 10 view .LVU108
 341 006e 6B60     		str	r3, [r5, #4]
 342              	.LVL19:
 343              		.loc 1 135 1 view .LVU109
 344 0070 80BC     		pop	{r7}
ARM GAS  /tmp/ccteMF1S.s 			page 10


 345 0072 B846     		mov	r8, r7
 346 0074 F0BD     		pop	{r4, r5, r6, r7, pc}
 347              	.LVL20:
 348              	.L14:
 118:Library/src/lcm32f06x_cordic.c ****   {
 349              		.loc 1 118 8 is_stmt 1 view .LVU110
 118:Library/src/lcm32f06x_cordic.c ****   {
 350              		.loc 1 118 11 is_stmt 0 view .LVU111
 351 0076 8022     		movs	r2, #128
 352 0078 5200     		lsls	r2, r2, #1
 353 007a 9642     		cmp	r6, r2
 354 007c F2D1     		bne	.L17
 120:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = Yi;
 355              		.loc 1 120 5 is_stmt 1 view .LVU112
 120:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = Yi;
 356              		.loc 1 120 16 is_stmt 0 view .LVU113
 357 007e E360     		str	r3, [r4, #12]
 121:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 358              		.loc 1 121 5 is_stmt 1 view .LVU114
 121:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 359              		.loc 1 121 16 is_stmt 0 view .LVU115
 360 0080 069B     		ldr	r3, [sp, #24]
 361 0082 2361     		str	r3, [r4, #16]
 122:Library/src/lcm32f06x_cordic.c **** 
 362              		.loc 1 122 5 is_stmt 1 view .LVU116
 122:Library/src/lcm32f06x_cordic.c **** 
 363              		.loc 1 122 16 is_stmt 0 view .LVU117
 364 0084 0023     		movs	r3, #0
 365 0086 6361     		str	r3, [r4, #20]
 124:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 366              		.loc 1 124 5 is_stmt 1 view .LVU118
 124:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 367              		.loc 1 124 11 is_stmt 0 view .LVU119
 368 0088 2368     		ldr	r3, [r4]
 124:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 369              		.loc 1 124 18 view .LVU120
 370 008a 1E43     		orrs	r6, r3
 371              	.LVL21:
 124:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 372              		.loc 1 124 18 view .LVU121
 373 008c 2660     		str	r6, [r4]
 125:Library/src/lcm32f06x_cordic.c ****     {
 374              		.loc 1 125 5 is_stmt 1 view .LVU122
 125:Library/src/lcm32f06x_cordic.c ****     {
 375              		.loc 1 125 11 view .LVU123
 125:Library/src/lcm32f06x_cordic.c ****     {
 376              		.loc 1 125 19 is_stmt 0 view .LVU124
 377 008e 2368     		ldr	r3, [r4]
 125:Library/src/lcm32f06x_cordic.c ****     {
 378              		.loc 1 125 11 view .LVU125
 379 0090 DB07     		lsls	r3, r3, #31
 380 0092 E1D4     		bmi	.L18
 125:Library/src/lcm32f06x_cordic.c ****     {
 381              		.loc 1 125 26 view .LVU126
 382 0094 FF3A     		subs	r2, r2, #255
 383              	.L19:
 127:Library/src/lcm32f06x_cordic.c ****     };
ARM GAS  /tmp/ccteMF1S.s 			page 11


 384              		.loc 1 127 9 is_stmt 1 view .LVU127
 385              		.syntax divided
 386              	@ 127 "Library/src/lcm32f06x_cordic.c" 1
 387 0096 C046     		nop
 388              	@ 0 "" 2
 127:Library/src/lcm32f06x_cordic.c ****     };
 389              		.loc 1 127 18 view .LVU128
 390              	@ 127 "Library/src/lcm32f06x_cordic.c" 1
 391 0098 C046     		nop
 392              	@ 0 "" 2
 127:Library/src/lcm32f06x_cordic.c ****     };
 393              		.loc 1 127 27 view .LVU129
 394              	@ 127 "Library/src/lcm32f06x_cordic.c" 1
 395 009a C046     		nop
 396              	@ 0 "" 2
 127:Library/src/lcm32f06x_cordic.c ****     };
 397              		.loc 1 127 36 view .LVU130
 398              	@ 127 "Library/src/lcm32f06x_cordic.c" 1
 399 009c C046     		nop
 400              	@ 0 "" 2
 127:Library/src/lcm32f06x_cordic.c ****     };
 401              		.loc 1 127 45 view .LVU131
 402              	@ 127 "Library/src/lcm32f06x_cordic.c" 1
 403 009e C046     		nop
 404              	@ 0 "" 2
 125:Library/src/lcm32f06x_cordic.c ****     {
 405              		.loc 1 125 11 view .LVU132
 125:Library/src/lcm32f06x_cordic.c ****     {
 406              		.loc 1 125 19 is_stmt 0 view .LVU133
 407              		.thumb
 408              		.syntax unified
 409 00a0 2368     		ldr	r3, [r4]
 125:Library/src/lcm32f06x_cordic.c ****     {
 410              		.loc 1 125 11 view .LVU134
 411 00a2 1A42     		tst	r2, r3
 412 00a4 F7D0     		beq	.L19
 413 00a6 D7E7     		b	.L18
 414              	.L27:
 415              		.align	2
 416              	.L26:
 417 00a8 00000148 		.word	1208025088
 418 00ac E65F22E8 		.word	-400400410
 419 00b0 9D6EE33F 		.word	1071869597
 420              		.cfi_endproc
 421              	.LFE47:
 423              		.section	.text.CORDIC_Hyperbolic_System_Config,"ax",%progbits
 424              		.align	1
 425              		.p2align 2,,3
 426              		.global	CORDIC_Hyperbolic_System_Config
 427              		.syntax unified
 428              		.code	16
 429              		.thumb_func
 431              	CORDIC_Hyperbolic_System_Config:
 432              	.LVL22:
 433              	.LFB48:
 136:Library/src/lcm32f06x_cordic.c **** 
 137:Library/src/lcm32f06x_cordic.c **** /**
ARM GAS  /tmp/ccteMF1S.s 			page 12


 138:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Hyperbolic_System_Config
 139:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Hyperbolic system
 140:Library/src/lcm32f06x_cordic.c ****   *         CN: 双曲系统
 141:Library/src/lcm32f06x_cordic.c ****   * @param  Mode:
 142:Library/src/lcm32f06x_cordic.c ****   *         EN: CORDIC mode selection.
 143:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 模式选择
 144:Library/src/lcm32f06x_cordic.c ****   * @param  Cycles:
 145:Library/src/lcm32f06x_cordic.c ****   *         EN: The number of iterations for CORDIC operations.
 146:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数。
 147:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 148:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 149:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 150:Library/src/lcm32f06x_cordic.c ****   * @param  Xi:
 151:Library/src/lcm32f06x_cordic.c ****   *         EN: X input value.
 152:Library/src/lcm32f06x_cordic.c ****   *         CN: X 输入值。
 153:Library/src/lcm32f06x_cordic.c ****   * @param  Yi:
 154:Library/src/lcm32f06x_cordic.c ****   *         EN: Y input value.
 155:Library/src/lcm32f06x_cordic.c ****   *         CN: Y 输入值。
 156:Library/src/lcm32f06x_cordic.c ****   * @param  Zi:
 157:Library/src/lcm32f06x_cordic.c ****   *         EN: Z input value.
 158:Library/src/lcm32f06x_cordic.c ****   *         CN: Z 输入值。
 159:Library/src/lcm32f06x_cordic.c ****   * @retval Cordic_Result_t
 160:Library/src/lcm32f06x_cordic.c ****   *         EN: Operation result.
 161:Library/src/lcm32f06x_cordic.c ****   *         CN: 运算结果。
 162:Library/src/lcm32f06x_cordic.c ****   */
 163:Library/src/lcm32f06x_cordic.c **** Cordic_Result_t CORDIC_Hyperbolic_System_Config(uint32_t Mode, uint32_t Cycles, uint32_t Xi, uint32
 164:Library/src/lcm32f06x_cordic.c **** {
 434              		.loc 1 164 1 is_stmt 1 view -0
 435              		.cfi_startproc
 436              		@ args = 8, pretend = 0, frame = 0
 437              		@ frame_needed = 0, uses_anonymous_args = 0
 165:Library/src/lcm32f06x_cordic.c ****   Cordic_Result_t result;
 438              		.loc 1 165 3 view .LVU136
 166:Library/src/lcm32f06x_cordic.c **** 
 167:Library/src/lcm32f06x_cordic.c ****   CORDIC->CFG = CORDIC_FUNC_HYPERBOLIC | Mode | Cycles;
 439              		.loc 1 167 3 view .LVU137
 440              		.loc 1 167 47 is_stmt 0 view .LVU138
 441 0000 0A43     		orrs	r2, r1
 442              	.LVL23:
 164:Library/src/lcm32f06x_cordic.c ****   Cordic_Result_t result;
 443              		.loc 1 164 1 view .LVU139
 444 0002 F0B5     		push	{r4, r5, r6, r7, lr}
 445              	.LCFI2:
 446              		.cfi_def_cfa_offset 20
 447              		.cfi_offset 4, -20
 448              		.cfi_offset 5, -16
 449              		.cfi_offset 6, -12
 450              		.cfi_offset 7, -8
 451              		.cfi_offset 14, -4
 452 0004 0E00     		movs	r6, r1
 453              		.loc 1 167 47 view .LVU140
 454 0006 1100     		movs	r1, r2
 455              	.LVL24:
 456              		.loc 1 167 47 view .LVU141
 457 0008 C022     		movs	r2, #192
 164:Library/src/lcm32f06x_cordic.c ****   Cordic_Result_t result;
 458              		.loc 1 164 1 view .LVU142
ARM GAS  /tmp/ccteMF1S.s 			page 13


 459 000a C646     		mov	lr, r8
 460              		.loc 1 167 15 view .LVU143
 461 000c 264C     		ldr	r4, .L41
 462              		.loc 1 167 47 view .LVU144
 463 000e 9201     		lsls	r2, r2, #6
 464 0010 0A43     		orrs	r2, r1
 164:Library/src/lcm32f06x_cordic.c ****   Cordic_Result_t result;
 465              		.loc 1 164 1 view .LVU145
 466 0012 0500     		movs	r5, r0
 467 0014 00B5     		push	{lr}
 468              	.LCFI3:
 469              		.cfi_def_cfa_offset 24
 470              		.cfi_offset 8, -24
 164:Library/src/lcm32f06x_cordic.c ****   Cordic_Result_t result;
 471              		.loc 1 164 1 view .LVU146
 472 0016 1800     		movs	r0, r3
 473              	.LVL25:
 474              		.loc 1 167 15 view .LVU147
 475 0018 6260     		str	r2, [r4, #4]
 476              	.LVL26:
 168:Library/src/lcm32f06x_cordic.c **** 
 169:Library/src/lcm32f06x_cordic.c ****   if (Mode == CORDIC_MODE_ROTATE)
 477              		.loc 1 169 3 is_stmt 1 view .LVU148
 478              		.loc 1 169 6 is_stmt 0 view .LVU149
 479 001a 002E     		cmp	r6, #0
 480 001c 2BD1     		bne	.L29
 170:Library/src/lcm32f06x_cordic.c ****   {
 171:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = (Xi/0.82815936);
 481              		.loc 1 171 5 is_stmt 1 view .LVU150
 482              		.loc 1 171 21 is_stmt 0 view .LVU151
 483 001e FFF7FEFF 		bl	__aeabi_ui2d
 484              	.LVL27:
 485              		.loc 1 171 21 view .LVU152
 486 0022 224A     		ldr	r2, .L41+4
 487 0024 224B     		ldr	r3, .L41+8
 488 0026 FFF7FEFF 		bl	__aeabi_dmul
 489              	.LVL28:
 490              		.loc 1 171 16 view .LVU153
 491 002a FFF7FEFF 		bl	__aeabi_d2uiz
 492              	.LVL29:
 493 002e E060     		str	r0, [r4, #12]
 172:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 494              		.loc 1 172 5 is_stmt 1 view .LVU154
 495              		.loc 1 172 16 is_stmt 0 view .LVU155
 496 0030 2661     		str	r6, [r4, #16]
 173:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = Zi;
 497              		.loc 1 173 5 is_stmt 1 view .LVU156
 498              		.loc 1 173 16 is_stmt 0 view .LVU157
 499 0032 079B     		ldr	r3, [sp, #28]
 500 0034 6361     		str	r3, [r4, #20]
 174:Library/src/lcm32f06x_cordic.c **** 
 175:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 501              		.loc 1 175 5 is_stmt 1 view .LVU158
 502              		.loc 1 175 18 is_stmt 0 view .LVU159
 503 0036 8023     		movs	r3, #128
 504              		.loc 1 175 11 view .LVU160
 505 0038 2268     		ldr	r2, [r4]
ARM GAS  /tmp/ccteMF1S.s 			page 14


 506              		.loc 1 175 18 view .LVU161
 507 003a 5B00     		lsls	r3, r3, #1
 508 003c 1343     		orrs	r3, r2
 509 003e 2360     		str	r3, [r4]
 176:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 510              		.loc 1 176 5 is_stmt 1 view .LVU162
 511              		.loc 1 176 11 view .LVU163
 512              		.loc 1 176 19 is_stmt 0 view .LVU164
 513 0040 2368     		ldr	r3, [r4]
 514              		.loc 1 176 11 view .LVU165
 515 0042 DB07     		lsls	r3, r3, #31
 516 0044 08D4     		bmi	.L33
 517              		.loc 1 176 26 view .LVU166
 518 0046 0122     		movs	r2, #1
 519              	.L31:
 177:Library/src/lcm32f06x_cordic.c ****     {
 178:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 520              		.loc 1 178 9 is_stmt 1 view .LVU167
 521              		.syntax divided
 522              	@ 178 "Library/src/lcm32f06x_cordic.c" 1
 523 0048 C046     		nop
 524              	@ 0 "" 2
 525              		.loc 1 178 18 view .LVU168
 526              	@ 178 "Library/src/lcm32f06x_cordic.c" 1
 527 004a C046     		nop
 528              	@ 0 "" 2
 529              		.loc 1 178 27 view .LVU169
 530              	@ 178 "Library/src/lcm32f06x_cordic.c" 1
 531 004c C046     		nop
 532              	@ 0 "" 2
 533              		.loc 1 178 36 view .LVU170
 534              	@ 178 "Library/src/lcm32f06x_cordic.c" 1
 535 004e C046     		nop
 536              	@ 0 "" 2
 537              		.loc 1 178 45 view .LVU171
 538              	@ 178 "Library/src/lcm32f06x_cordic.c" 1
 539 0050 C046     		nop
 540              	@ 0 "" 2
 176:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 541              		.loc 1 176 11 view .LVU172
 176:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 542              		.loc 1 176 19 is_stmt 0 view .LVU173
 543              		.thumb
 544              		.syntax unified
 545 0052 2368     		ldr	r3, [r4]
 176:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 546              		.loc 1 176 11 view .LVU174
 547 0054 1A42     		tst	r2, r3
 548 0056 F7D0     		beq	.L31
 549              	.LVL30:
 550              	.L33:
 179:Library/src/lcm32f06x_cordic.c ****     };
 180:Library/src/lcm32f06x_cordic.c **** 
 181:Library/src/lcm32f06x_cordic.c ****     result.XO = CORDIC->XO;
 182:Library/src/lcm32f06x_cordic.c ****     result.YO = CORDIC->YO;
 183:Library/src/lcm32f06x_cordic.c ****     result.ZO = CORDIC->ZO;
 184:Library/src/lcm32f06x_cordic.c ****   }
ARM GAS  /tmp/ccteMF1S.s 			page 15


 185:Library/src/lcm32f06x_cordic.c ****   else if (Mode == CORDIC_MODE_VECTOR)
 186:Library/src/lcm32f06x_cordic.c ****   {
 187:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = Xi;
 188:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = Yi;
 189:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 190:Library/src/lcm32f06x_cordic.c **** 
 191:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 192:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 193:Library/src/lcm32f06x_cordic.c ****     {
 194:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 195:Library/src/lcm32f06x_cordic.c ****     };
 551              		.loc 1 195 6 is_stmt 1 view .LVU175
 196:Library/src/lcm32f06x_cordic.c **** 
 197:Library/src/lcm32f06x_cordic.c ****     result.XO = CORDIC->XO;
 552              		.loc 1 197 5 view .LVU176
 553              		.loc 1 197 23 is_stmt 0 view .LVU177
 554 0058 134B     		ldr	r3, .L41
 555 005a 9A69     		ldr	r2, [r3, #24]
 556 005c 9046     		mov	r8, r2
 557              	.LVL31:
 198:Library/src/lcm32f06x_cordic.c ****     result.YO = CORDIC->YO;
 558              		.loc 1 198 5 is_stmt 1 view .LVU178
 559              		.loc 1 198 23 is_stmt 0 view .LVU179
 560 005e DA69     		ldr	r2, [r3, #28]
 561              	.LVL32:
 199:Library/src/lcm32f06x_cordic.c ****     result.ZO = CORDIC->ZO;
 562              		.loc 1 199 23 view .LVU180
 563 0060 1F6A     		ldr	r7, [r3, #32]
 198:Library/src/lcm32f06x_cordic.c ****     result.YO = CORDIC->YO;
 564              		.loc 1 198 23 view .LVU181
 565 0062 9446     		mov	ip, r2
 566              	.LVL33:
 567              		.loc 1 199 5 is_stmt 1 view .LVU182
 568              	.L32:
 200:Library/src/lcm32f06x_cordic.c ****   }
 201:Library/src/lcm32f06x_cordic.c ****   return result;
 569              		.loc 1 201 3 view .LVU183
 202:Library/src/lcm32f06x_cordic.c **** }
 570              		.loc 1 202 1 is_stmt 0 view .LVU184
 571              		@ sp needed
 201:Library/src/lcm32f06x_cordic.c **** }
 572              		.loc 1 201 10 view .LVU185
 573 0064 4346     		mov	r3, r8
 574 0066 2B60     		str	r3, [r5]
 575 0068 6346     		mov	r3, ip
 576              		.loc 1 202 1 view .LVU186
 577 006a 2800     		movs	r0, r5
 201:Library/src/lcm32f06x_cordic.c **** }
 578              		.loc 1 201 10 view .LVU187
 579 006c AF60     		str	r7, [r5, #8]
 580              	.LVL34:
 201:Library/src/lcm32f06x_cordic.c **** }
 581              		.loc 1 201 10 view .LVU188
 582 006e 6B60     		str	r3, [r5, #4]
 583              	.LVL35:
 584              		.loc 1 202 1 view .LVU189
 585 0070 80BC     		pop	{r7}
ARM GAS  /tmp/ccteMF1S.s 			page 16


 586 0072 B846     		mov	r8, r7
 587 0074 F0BD     		pop	{r4, r5, r6, r7, pc}
 588              	.LVL36:
 589              	.L29:
 185:Library/src/lcm32f06x_cordic.c ****   {
 590              		.loc 1 185 8 is_stmt 1 view .LVU190
 185:Library/src/lcm32f06x_cordic.c ****   {
 591              		.loc 1 185 11 is_stmt 0 view .LVU191
 592 0076 8022     		movs	r2, #128
 593 0078 5200     		lsls	r2, r2, #1
 594 007a 9642     		cmp	r6, r2
 595 007c F2D1     		bne	.L32
 187:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = Yi;
 596              		.loc 1 187 5 is_stmt 1 view .LVU192
 187:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = Yi;
 597              		.loc 1 187 16 is_stmt 0 view .LVU193
 598 007e E360     		str	r3, [r4, #12]
 188:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 599              		.loc 1 188 5 is_stmt 1 view .LVU194
 188:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 600              		.loc 1 188 16 is_stmt 0 view .LVU195
 601 0080 069B     		ldr	r3, [sp, #24]
 602 0082 2361     		str	r3, [r4, #16]
 189:Library/src/lcm32f06x_cordic.c **** 
 603              		.loc 1 189 5 is_stmt 1 view .LVU196
 189:Library/src/lcm32f06x_cordic.c **** 
 604              		.loc 1 189 16 is_stmt 0 view .LVU197
 605 0084 0023     		movs	r3, #0
 606 0086 6361     		str	r3, [r4, #20]
 191:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 607              		.loc 1 191 5 is_stmt 1 view .LVU198
 191:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 608              		.loc 1 191 11 is_stmt 0 view .LVU199
 609 0088 2368     		ldr	r3, [r4]
 191:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 610              		.loc 1 191 18 view .LVU200
 611 008a 1E43     		orrs	r6, r3
 612              	.LVL37:
 191:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 613              		.loc 1 191 18 view .LVU201
 614 008c 2660     		str	r6, [r4]
 192:Library/src/lcm32f06x_cordic.c ****     {
 615              		.loc 1 192 5 is_stmt 1 view .LVU202
 192:Library/src/lcm32f06x_cordic.c ****     {
 616              		.loc 1 192 11 view .LVU203
 192:Library/src/lcm32f06x_cordic.c ****     {
 617              		.loc 1 192 19 is_stmt 0 view .LVU204
 618 008e 2368     		ldr	r3, [r4]
 192:Library/src/lcm32f06x_cordic.c ****     {
 619              		.loc 1 192 11 view .LVU205
 620 0090 DB07     		lsls	r3, r3, #31
 621 0092 E1D4     		bmi	.L33
 192:Library/src/lcm32f06x_cordic.c ****     {
 622              		.loc 1 192 26 view .LVU206
 623 0094 FF3A     		subs	r2, r2, #255
 624              	.L34:
 194:Library/src/lcm32f06x_cordic.c ****     };
ARM GAS  /tmp/ccteMF1S.s 			page 17


 625              		.loc 1 194 9 is_stmt 1 view .LVU207
 626              		.syntax divided
 627              	@ 194 "Library/src/lcm32f06x_cordic.c" 1
 628 0096 C046     		nop
 629              	@ 0 "" 2
 194:Library/src/lcm32f06x_cordic.c ****     };
 630              		.loc 1 194 18 view .LVU208
 631              	@ 194 "Library/src/lcm32f06x_cordic.c" 1
 632 0098 C046     		nop
 633              	@ 0 "" 2
 194:Library/src/lcm32f06x_cordic.c ****     };
 634              		.loc 1 194 27 view .LVU209
 635              	@ 194 "Library/src/lcm32f06x_cordic.c" 1
 636 009a C046     		nop
 637              	@ 0 "" 2
 194:Library/src/lcm32f06x_cordic.c ****     };
 638              		.loc 1 194 36 view .LVU210
 639              	@ 194 "Library/src/lcm32f06x_cordic.c" 1
 640 009c C046     		nop
 641              	@ 0 "" 2
 194:Library/src/lcm32f06x_cordic.c ****     };
 642              		.loc 1 194 45 view .LVU211
 643              	@ 194 "Library/src/lcm32f06x_cordic.c" 1
 644 009e C046     		nop
 645              	@ 0 "" 2
 192:Library/src/lcm32f06x_cordic.c ****     {
 646              		.loc 1 192 11 view .LVU212
 192:Library/src/lcm32f06x_cordic.c ****     {
 647              		.loc 1 192 19 is_stmt 0 view .LVU213
 648              		.thumb
 649              		.syntax unified
 650 00a0 2368     		ldr	r3, [r4]
 192:Library/src/lcm32f06x_cordic.c ****     {
 651              		.loc 1 192 11 view .LVU214
 652 00a2 1A42     		tst	r2, r3
 653 00a4 F7D0     		beq	.L34
 654 00a6 D7E7     		b	.L33
 655              	.L42:
 656              		.align	2
 657              	.L41:
 658 00a8 00000148 		.word	1208025088
 659 00ac 8D246172 		.word	1918968973
 660 00b0 E851F33F 		.word	1072910824
 661              		.cfi_endproc
 662              	.LFE48:
 664              		.section	.text.CORDIC_ITConfig,"ax",%progbits
 665              		.align	1
 666              		.p2align 2,,3
 667              		.global	CORDIC_ITConfig
 668              		.syntax unified
 669              		.code	16
 670              		.thumb_func
 672              	CORDIC_ITConfig:
 673              	.LVL38:
 674              	.LFB49:
 203:Library/src/lcm32f06x_cordic.c **** 
 204:Library/src/lcm32f06x_cordic.c **** /**
ARM GAS  /tmp/ccteMF1S.s 			page 18


 205:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_ITConfig
 206:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Enables or disables the specified Cordic interrupts.
 207:Library/src/lcm32f06x_cordic.c ****   *         CN: 启用或禁用指定的Cordic中断。
 208:Library/src/lcm32f06x_cordic.c ****   * @param  CORDIC_IT: 
 209:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 210:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定要启用或禁用的CORDIC中断源。
 211:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_IT_OVF
 212:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_IT_DONE
 213:Library/src/lcm32f06x_cordic.c ****   * @param  NewState: 
 214:Library/src/lcm32f06x_cordic.c ****   *         EN: new state of the specified CORDIC interrupts.
 215:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定CORDIC中断的新状态。
 216:Library/src/lcm32f06x_cordic.c ****   *             @arg ENABLE
 217:Library/src/lcm32f06x_cordic.c ****   *             @arg DISABLE
 218:Library/src/lcm32f06x_cordic.c ****   * @retval None
 219:Library/src/lcm32f06x_cordic.c ****   */
 220:Library/src/lcm32f06x_cordic.c **** void CORDIC_ITConfig(uint32_t CORDIC_IT, FunctionalState NewState)
 221:Library/src/lcm32f06x_cordic.c **** {
 675              		.loc 1 221 1 is_stmt 1 view -0
 676              		.cfi_startproc
 677              		@ args = 0, pretend = 0, frame = 0
 678              		@ frame_needed = 0, uses_anonymous_args = 0
 679              		@ link register save eliminated.
 222:Library/src/lcm32f06x_cordic.c ****   assert_param(IS_CORDIC_IT(CORDIC_IT));
 680              		.loc 1 222 3 view .LVU216
 223:Library/src/lcm32f06x_cordic.c ****   /* Check the parameters */
 224:Library/src/lcm32f06x_cordic.c ****   if (NewState != DISABLE)
 681              		.loc 1 224 3 view .LVU217
 225:Library/src/lcm32f06x_cordic.c ****   {
 226:Library/src/lcm32f06x_cordic.c ****     /* Enable the selected CORDIC interrupts */
 227:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_IT;
 682              		.loc 1 227 11 is_stmt 0 view .LVU218
 683 0000 044A     		ldr	r2, .L46
 684 0002 1368     		ldr	r3, [r2]
 224:Library/src/lcm32f06x_cordic.c ****   {
 685              		.loc 1 224 6 view .LVU219
 686 0004 0029     		cmp	r1, #0
 687 0006 02D0     		beq	.L44
 688              		.loc 1 227 5 is_stmt 1 view .LVU220
 689              		.loc 1 227 18 is_stmt 0 view .LVU221
 690 0008 0343     		orrs	r3, r0
 691 000a 1360     		str	r3, [r2]
 692              	.L43:
 228:Library/src/lcm32f06x_cordic.c ****   }
 229:Library/src/lcm32f06x_cordic.c ****   else
 230:Library/src/lcm32f06x_cordic.c ****   {
 231:Library/src/lcm32f06x_cordic.c ****     /* Disable the selected CORDIC interrupts */
 232:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL &= (~(uint32_t)CORDIC_IT);
 233:Library/src/lcm32f06x_cordic.c ****   }
 234:Library/src/lcm32f06x_cordic.c **** }
 693              		.loc 1 234 1 view .LVU222
 694              		@ sp needed
 695 000c 7047     		bx	lr
 696              	.L44:
 232:Library/src/lcm32f06x_cordic.c ****   }
 697              		.loc 1 232 5 is_stmt 1 view .LVU223
 232:Library/src/lcm32f06x_cordic.c ****   }
 698              		.loc 1 232 18 is_stmt 0 view .LVU224
ARM GAS  /tmp/ccteMF1S.s 			page 19


 699 000e 8343     		bics	r3, r0
 700 0010 1360     		str	r3, [r2]
 701              		.loc 1 234 1 view .LVU225
 702 0012 FBE7     		b	.L43
 703              	.L47:
 704              		.align	2
 705              	.L46:
 706 0014 00000148 		.word	1208025088
 707              		.cfi_endproc
 708              	.LFE49:
 710              		.section	.text.CORDIC_GetFlagStatus,"ax",%progbits
 711              		.align	1
 712              		.p2align 2,,3
 713              		.global	CORDIC_GetFlagStatus
 714              		.syntax unified
 715              		.code	16
 716              		.thumb_func
 718              	CORDIC_GetFlagStatus:
 719              	.LVL39:
 720              	.LFB50:
 235:Library/src/lcm32f06x_cordic.c **** 
 236:Library/src/lcm32f06x_cordic.c **** /**
 237:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_GetFlagStatus
 238:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Read Cordic status flags.
 239:Library/src/lcm32f06x_cordic.c ****   *         CN: 读取Cordic状态标志。
 240:Library/src/lcm32f06x_cordic.c ****   * @param  CORDIC_FLAG: 
 241:Library/src/lcm32f06x_cordic.c ****   *         EN: Specify the Cordic flag to be read.
 242:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定Cordic要读取的标志。
 243:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_FLAG_OVF
 244:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_FLAG_DONE
 245:Library/src/lcm32f06x_cordic.c ****   * @retval FlagStatus
 246:Library/src/lcm32f06x_cordic.c ****   */
 247:Library/src/lcm32f06x_cordic.c **** FlagStatus CORDIC_GetFlagStatus(uint32_t CORDIC_FLAG)
 248:Library/src/lcm32f06x_cordic.c **** {
 721              		.loc 1 248 1 is_stmt 1 view -0
 722              		.cfi_startproc
 723              		@ args = 0, pretend = 0, frame = 0
 724              		@ frame_needed = 0, uses_anonymous_args = 0
 725              		@ link register save eliminated.
 249:Library/src/lcm32f06x_cordic.c ****   FlagStatus bitstatus = RESET;
 726              		.loc 1 249 3 view .LVU227
 250:Library/src/lcm32f06x_cordic.c **** 
 251:Library/src/lcm32f06x_cordic.c ****   /* Check the parameters */
 252:Library/src/lcm32f06x_cordic.c ****   assert_param(IS_CORDIC_FLAG(CORDIC_FLAG));
 727              		.loc 1 252 3 view .LVU228
 253:Library/src/lcm32f06x_cordic.c **** 
 254:Library/src/lcm32f06x_cordic.c ****   /* Check the status of the specified ADC flag */
 255:Library/src/lcm32f06x_cordic.c ****   if ((CORDIC->CTRL & CORDIC_FLAG) != (uint32_t)RESET)
 728              		.loc 1 255 3 view .LVU229
 729              		.loc 1 255 14 is_stmt 0 view .LVU230
 730 0000 034B     		ldr	r3, .L49
 256:Library/src/lcm32f06x_cordic.c ****   {
 257:Library/src/lcm32f06x_cordic.c ****     /* ADC_FLAG is set */
 258:Library/src/lcm32f06x_cordic.c ****     bitstatus = SET;
 259:Library/src/lcm32f06x_cordic.c ****   }
 260:Library/src/lcm32f06x_cordic.c ****   else
 261:Library/src/lcm32f06x_cordic.c ****   {
ARM GAS  /tmp/ccteMF1S.s 			page 20


 262:Library/src/lcm32f06x_cordic.c ****     /* ADC_FLAG is reset */
 263:Library/src/lcm32f06x_cordic.c ****     bitstatus = RESET;
 264:Library/src/lcm32f06x_cordic.c ****   }
 265:Library/src/lcm32f06x_cordic.c ****   /* Return the ADC_FLAG status */
 266:Library/src/lcm32f06x_cordic.c ****   return bitstatus;
 267:Library/src/lcm32f06x_cordic.c **** }
 731              		.loc 1 267 1 view .LVU231
 732              		@ sp needed
 255:Library/src/lcm32f06x_cordic.c ****   {
 733              		.loc 1 255 14 view .LVU232
 734 0002 1B68     		ldr	r3, [r3]
 735              	.LVL40:
 266:Library/src/lcm32f06x_cordic.c **** }
 736              		.loc 1 266 3 is_stmt 1 view .LVU233
 255:Library/src/lcm32f06x_cordic.c ****   {
 737              		.loc 1 255 21 is_stmt 0 view .LVU234
 738 0004 1840     		ands	r0, r3
 739              	.LVL41:
 255:Library/src/lcm32f06x_cordic.c ****   {
 740              		.loc 1 255 6 view .LVU235
 741 0006 431E     		subs	r3, r0, #1
 742 0008 9841     		sbcs	r0, r0, r3
 743              	.LVL42:
 266:Library/src/lcm32f06x_cordic.c **** }
 744              		.loc 1 266 10 discriminator 1 view .LVU236
 745 000a C0B2     		uxtb	r0, r0
 746              		.loc 1 267 1 view .LVU237
 747 000c 7047     		bx	lr
 748              	.L50:
 749 000e C046     		.align	2
 750              	.L49:
 751 0010 00000148 		.word	1208025088
 752              		.cfi_endproc
 753              	.LFE50:
 755              		.section	.text.CORDIC_ClearITPendingBit,"ax",%progbits
 756              		.align	1
 757              		.p2align 2,,3
 758              		.global	CORDIC_ClearITPendingBit
 759              		.syntax unified
 760              		.code	16
 761              		.thumb_func
 763              	CORDIC_ClearITPendingBit:
 764              	.LVL43:
 765              	.LFB51:
 268:Library/src/lcm32f06x_cordic.c **** 
 269:Library/src/lcm32f06x_cordic.c **** /**
 270:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_ClearITPendingBit
 271:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Clears the Cordic interrupt pending bits.
 272:Library/src/lcm32f06x_cordic.c ****   *         CN: 清除Cordic的中断挂起位。
 273:Library/src/lcm32f06x_cordic.c ****   * @param  CORDIC_FLAG: 
 274:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 275:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定要启用或禁用的CORDIC中断源。
 276:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_FLAG_OVF
 277:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_FLAG_DONE
 278:Library/src/lcm32f06x_cordic.c ****   * @retval None
 279:Library/src/lcm32f06x_cordic.c ****   */
 280:Library/src/lcm32f06x_cordic.c **** void CORDIC_ClearITPendingBit(uint32_t CORDIC_FLAG)
ARM GAS  /tmp/ccteMF1S.s 			page 21


 281:Library/src/lcm32f06x_cordic.c **** {
 766              		.loc 1 281 1 is_stmt 1 view -0
 767              		.cfi_startproc
 768              		@ args = 0, pretend = 0, frame = 0
 769              		@ frame_needed = 0, uses_anonymous_args = 0
 770              		@ link register save eliminated.
 282:Library/src/lcm32f06x_cordic.c ****   /* Check the parameters */
 283:Library/src/lcm32f06x_cordic.c ****   assert_param(IS_CORDIC_FLAG(CORDIC_FLAG));
 771              		.loc 1 283 3 view .LVU239
 284:Library/src/lcm32f06x_cordic.c **** 
 285:Library/src/lcm32f06x_cordic.c ****   /* Clear the selected ADC interrupt pending bits */
 286:Library/src/lcm32f06x_cordic.c ****   CORDIC->CTRL = (uint32_t)CORDIC_FLAG; 
 772              		.loc 1 286 3 view .LVU240
 773              		.loc 1 286 16 is_stmt 0 view .LVU241
 774 0000 014B     		ldr	r3, .L52
 287:Library/src/lcm32f06x_cordic.c **** }
 775              		.loc 1 287 1 view .LVU242
 776              		@ sp needed
 286:Library/src/lcm32f06x_cordic.c **** }
 777              		.loc 1 286 16 view .LVU243
 778 0002 1860     		str	r0, [r3]
 779              		.loc 1 287 1 view .LVU244
 780 0004 7047     		bx	lr
 781              	.L53:
 782 0006 C046     		.align	2
 783              	.L52:
 784 0008 00000148 		.word	1208025088
 785              		.cfi_endproc
 786              	.LFE51:
 788              		.section	.text.CORDIC_Sqrt,"ax",%progbits
 789              		.align	1
 790              		.p2align 2,,3
 791              		.global	CORDIC_Sqrt
 792              		.syntax unified
 793              		.code	16
 794              		.thumb_func
 796              	CORDIC_Sqrt:
 797              	.LVL44:
 798              	.LFB52:
 288:Library/src/lcm32f06x_cordic.c **** 
 289:Library/src/lcm32f06x_cordic.c **** 
 290:Library/src/lcm32f06x_cordic.c **** /**
 291:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Sqrt
 292:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the square root of input data.
 293:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算输入数据平方根。
 294:Library/src/lcm32f06x_cordic.c ****   * @param  InputValue: 
 295:Library/src/lcm32f06x_cordic.c ****   *         EN: input value(IQ format). （IQ13 - IQ31）。
 296:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值（IQ格式）。 （IQ13 - IQ31）。
 297:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 298:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 299:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 300:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 301:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 302:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 303:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 304:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 305:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
ARM GAS  /tmp/ccteMF1S.s 			page 22


 306:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
 307:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 308:Library/src/lcm32f06x_cordic.c ****   * @retval uint32_t:
 309:Library/src/lcm32f06x_cordic.c ****   *         EN: Return the square root of the input value. (input in IQ format).
 310:Library/src/lcm32f06x_cordic.c ****   *         CN: 返回输入值的平方根（输入IQ格式）。
 311:Library/src/lcm32f06x_cordic.c ****   */
 312:Library/src/lcm32f06x_cordic.c **** uint32_t CORDIC_Sqrt(uint32_t InputValue, uint8_t IQnIn, uint32_t Accuracy)
 313:Library/src/lcm32f06x_cordic.c **** {
 799              		.loc 1 313 1 is_stmt 1 view -0
 800              		.cfi_startproc
 801              		@ args = 0, pretend = 0, frame = 0
 802              		@ frame_needed = 0, uses_anonymous_args = 0
 314:Library/src/lcm32f06x_cordic.c ****     __disable_irq();
 803              		.loc 1 314 5 view .LVU246
 804              	.LBB10:
 805              	.LBI10:
 806              		.file 2 "Core/cmsis_gcc.h"
   1:Core/cmsis_gcc.h **** /**************************************************************************//**
   2:Core/cmsis_gcc.h ****  * @file     cmsis_gcc.h
   3:Core/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
   4:Core/cmsis_gcc.h ****  * @version  V5.4.1
   5:Core/cmsis_gcc.h ****  * @date     27. May 2021
   6:Core/cmsis_gcc.h ****  ******************************************************************************/
   7:Core/cmsis_gcc.h **** /*
   8:Core/cmsis_gcc.h ****  * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
   9:Core/cmsis_gcc.h ****  *
  10:Core/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
  11:Core/cmsis_gcc.h ****  *
  12:Core/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  13:Core/cmsis_gcc.h ****  * not use this file except in compliance with the License.
  14:Core/cmsis_gcc.h ****  * You may obtain a copy of the License at
  15:Core/cmsis_gcc.h ****  *
  16:Core/cmsis_gcc.h ****  * www.apache.org/licenses/LICENSE-2.0
  17:Core/cmsis_gcc.h ****  *
  18:Core/cmsis_gcc.h ****  * Unless required by applicable law or agreed to in writing, software
  19:Core/cmsis_gcc.h ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  20:Core/cmsis_gcc.h ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  21:Core/cmsis_gcc.h ****  * See the License for the specific language governing permissions and
  22:Core/cmsis_gcc.h ****  * limitations under the License.
  23:Core/cmsis_gcc.h ****  */
  24:Core/cmsis_gcc.h **** 
  25:Core/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
  26:Core/cmsis_gcc.h **** #define __CMSIS_GCC_H
  27:Core/cmsis_gcc.h **** 
  28:Core/cmsis_gcc.h **** /* ignore some GCC warnings */
  29:Core/cmsis_gcc.h **** #pragma GCC diagnostic push
  30:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
  31:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
  32:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
  33:Core/cmsis_gcc.h **** 
  34:Core/cmsis_gcc.h **** /* Fallback for __has_builtin */
  35:Core/cmsis_gcc.h **** #ifndef __has_builtin
  36:Core/cmsis_gcc.h ****   #define __has_builtin(x) (0)
  37:Core/cmsis_gcc.h **** #endif
  38:Core/cmsis_gcc.h **** 
  39:Core/cmsis_gcc.h **** /* CMSIS compiler specific defines */
  40:Core/cmsis_gcc.h **** #ifndef   __ASM
ARM GAS  /tmp/ccteMF1S.s 			page 23


  41:Core/cmsis_gcc.h ****   #define __ASM                                  __asm
  42:Core/cmsis_gcc.h **** #endif
  43:Core/cmsis_gcc.h **** #ifndef   __INLINE
  44:Core/cmsis_gcc.h ****   #define __INLINE                               inline
  45:Core/cmsis_gcc.h **** #endif
  46:Core/cmsis_gcc.h **** #ifndef   __STATIC_INLINE
  47:Core/cmsis_gcc.h ****   #define __STATIC_INLINE                        static inline
  48:Core/cmsis_gcc.h **** #endif
  49:Core/cmsis_gcc.h **** #ifndef   __STATIC_FORCEINLINE
  50:Core/cmsis_gcc.h ****   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
  51:Core/cmsis_gcc.h **** #endif
  52:Core/cmsis_gcc.h **** #ifndef   __NO_RETURN
  53:Core/cmsis_gcc.h ****   #define __NO_RETURN                            __attribute__((__noreturn__))
  54:Core/cmsis_gcc.h **** #endif
  55:Core/cmsis_gcc.h **** #ifndef   __USED
  56:Core/cmsis_gcc.h ****   #define __USED                                 __attribute__((used))
  57:Core/cmsis_gcc.h **** #endif
  58:Core/cmsis_gcc.h **** #ifndef   __WEAK
  59:Core/cmsis_gcc.h ****   #define __WEAK                                 __attribute__((weak))
  60:Core/cmsis_gcc.h **** #endif
  61:Core/cmsis_gcc.h **** #ifndef   __PACKED
  62:Core/cmsis_gcc.h ****   #define __PACKED                               __attribute__((packed, aligned(1)))
  63:Core/cmsis_gcc.h **** #endif
  64:Core/cmsis_gcc.h **** #ifndef   __PACKED_STRUCT
  65:Core/cmsis_gcc.h ****   #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
  66:Core/cmsis_gcc.h **** #endif
  67:Core/cmsis_gcc.h **** #ifndef   __PACKED_UNION
  68:Core/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
  69:Core/cmsis_gcc.h **** #endif
  70:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32        /* deprecated */
  71:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  72:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  73:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  74:Core/cmsis_gcc.h ****   struct __attribute__((packed)) T_UINT32 { uint32_t v; };
  75:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  76:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
  77:Core/cmsis_gcc.h **** #endif
  78:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_WRITE
  79:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  80:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  81:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  82:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
  83:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  84:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
  85:Core/cmsis_gcc.h **** #endif
  86:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_READ
  87:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  88:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  89:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  90:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
  91:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  92:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(add
  93:Core/cmsis_gcc.h **** #endif
  94:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_WRITE
  95:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  96:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  97:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
ARM GAS  /tmp/ccteMF1S.s 			page 24


  98:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
  99:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 100:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
 101:Core/cmsis_gcc.h **** #endif
 102:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_READ
 103:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
 104:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
 105:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
 106:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
 107:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 108:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(add
 109:Core/cmsis_gcc.h **** #endif
 110:Core/cmsis_gcc.h **** #ifndef   __ALIGNED
 111:Core/cmsis_gcc.h ****   #define __ALIGNED(x)                           __attribute__((aligned(x)))
 112:Core/cmsis_gcc.h **** #endif
 113:Core/cmsis_gcc.h **** #ifndef   __RESTRICT
 114:Core/cmsis_gcc.h ****   #define __RESTRICT                             __restrict
 115:Core/cmsis_gcc.h **** #endif
 116:Core/cmsis_gcc.h **** #ifndef   __COMPILER_BARRIER
 117:Core/cmsis_gcc.h ****   #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
 118:Core/cmsis_gcc.h **** #endif
 119:Core/cmsis_gcc.h **** 
 120:Core/cmsis_gcc.h **** /* #########################  Startup and Lowlevel Init  ######################## */
 121:Core/cmsis_gcc.h **** 
 122:Core/cmsis_gcc.h **** #ifndef __PROGRAM_START
 123:Core/cmsis_gcc.h **** 
 124:Core/cmsis_gcc.h **** /**
 125:Core/cmsis_gcc.h ****   \brief   Initializes data and bss sections
 126:Core/cmsis_gcc.h ****   \details This default implementations initialized all data and additional bss
 127:Core/cmsis_gcc.h ****            sections relying on .copy.table and .zero.table specified properly
 128:Core/cmsis_gcc.h ****            in the used linker script.
 129:Core/cmsis_gcc.h **** 
 130:Core/cmsis_gcc.h ****  */
 131:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
 132:Core/cmsis_gcc.h **** {
 133:Core/cmsis_gcc.h ****   extern void _start(void) __NO_RETURN;
 134:Core/cmsis_gcc.h **** 
 135:Core/cmsis_gcc.h ****   typedef struct {
 136:Core/cmsis_gcc.h ****     uint32_t const* src;
 137:Core/cmsis_gcc.h ****     uint32_t* dest;
 138:Core/cmsis_gcc.h ****     uint32_t  wlen;
 139:Core/cmsis_gcc.h ****   } __copy_table_t;
 140:Core/cmsis_gcc.h **** 
 141:Core/cmsis_gcc.h ****   typedef struct {
 142:Core/cmsis_gcc.h ****     uint32_t* dest;
 143:Core/cmsis_gcc.h ****     uint32_t  wlen;
 144:Core/cmsis_gcc.h ****   } __zero_table_t;
 145:Core/cmsis_gcc.h **** 
 146:Core/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_start__;
 147:Core/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_end__;
 148:Core/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_start__;
 149:Core/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_end__;
 150:Core/cmsis_gcc.h **** 
 151:Core/cmsis_gcc.h ****   for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
 152:Core/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 153:Core/cmsis_gcc.h ****       pTable->dest[i] = pTable->src[i];
 154:Core/cmsis_gcc.h ****     }
ARM GAS  /tmp/ccteMF1S.s 			page 25


 155:Core/cmsis_gcc.h ****   }
 156:Core/cmsis_gcc.h **** 
 157:Core/cmsis_gcc.h ****   for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
 158:Core/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 159:Core/cmsis_gcc.h ****       pTable->dest[i] = 0u;
 160:Core/cmsis_gcc.h ****     }
 161:Core/cmsis_gcc.h ****   }
 162:Core/cmsis_gcc.h **** 
 163:Core/cmsis_gcc.h ****   _start();
 164:Core/cmsis_gcc.h **** }
 165:Core/cmsis_gcc.h **** 
 166:Core/cmsis_gcc.h **** #define __PROGRAM_START           __cmsis_start
 167:Core/cmsis_gcc.h **** #endif
 168:Core/cmsis_gcc.h **** 
 169:Core/cmsis_gcc.h **** #ifndef __INITIAL_SP
 170:Core/cmsis_gcc.h **** #define __INITIAL_SP              __StackTop
 171:Core/cmsis_gcc.h **** #endif
 172:Core/cmsis_gcc.h **** 
 173:Core/cmsis_gcc.h **** #ifndef __STACK_LIMIT
 174:Core/cmsis_gcc.h **** #define __STACK_LIMIT             __StackLimit
 175:Core/cmsis_gcc.h **** #endif
 176:Core/cmsis_gcc.h **** 
 177:Core/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
 178:Core/cmsis_gcc.h **** #define __VECTOR_TABLE            __Vectors
 179:Core/cmsis_gcc.h **** #endif
 180:Core/cmsis_gcc.h **** 
 181:Core/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
 182:Core/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section(".vectors")))
 183:Core/cmsis_gcc.h **** #endif
 184:Core/cmsis_gcc.h **** 
 185:Core/cmsis_gcc.h **** #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 186:Core/cmsis_gcc.h **** #ifndef __STACK_SEAL
 187:Core/cmsis_gcc.h **** #define __STACK_SEAL              __StackSeal
 188:Core/cmsis_gcc.h **** #endif
 189:Core/cmsis_gcc.h **** 
 190:Core/cmsis_gcc.h **** #ifndef __TZ_STACK_SEAL_SIZE
 191:Core/cmsis_gcc.h **** #define __TZ_STACK_SEAL_SIZE      8U
 192:Core/cmsis_gcc.h **** #endif
 193:Core/cmsis_gcc.h **** 
 194:Core/cmsis_gcc.h **** #ifndef __TZ_STACK_SEAL_VALUE
 195:Core/cmsis_gcc.h **** #define __TZ_STACK_SEAL_VALUE     0xFEF5EDA5FEF5EDA5ULL
 196:Core/cmsis_gcc.h **** #endif
 197:Core/cmsis_gcc.h **** 
 198:Core/cmsis_gcc.h **** 
 199:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
 200:Core/cmsis_gcc.h ****   *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE;
 201:Core/cmsis_gcc.h **** }
 202:Core/cmsis_gcc.h **** #endif
 203:Core/cmsis_gcc.h **** 
 204:Core/cmsis_gcc.h **** 
 205:Core/cmsis_gcc.h **** /* ##########################  Core Instruction Access  ######################### */
 206:Core/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
 207:Core/cmsis_gcc.h ****   Access to dedicated instructions
 208:Core/cmsis_gcc.h ****   @{
 209:Core/cmsis_gcc.h **** */
 210:Core/cmsis_gcc.h **** 
 211:Core/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
ARM GAS  /tmp/ccteMF1S.s 			page 26


 212:Core/cmsis_gcc.h ****  * For thumb1, use low register (r0-r7), specified by constraint "l"
 213:Core/cmsis_gcc.h ****  * Otherwise, use general registers, specified by constraint "r" */
 214:Core/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
 215:Core/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
 216:Core/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
 217:Core/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
 218:Core/cmsis_gcc.h **** #else
 219:Core/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
 220:Core/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
 221:Core/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
 222:Core/cmsis_gcc.h **** #endif
 223:Core/cmsis_gcc.h **** 
 224:Core/cmsis_gcc.h **** /**
 225:Core/cmsis_gcc.h ****   \brief   No Operation
 226:Core/cmsis_gcc.h ****   \details No Operation does nothing. This instruction can be used for code alignment purposes.
 227:Core/cmsis_gcc.h ****  */
 228:Core/cmsis_gcc.h **** #define __NOP()                             __ASM volatile ("nop")
 229:Core/cmsis_gcc.h **** 
 230:Core/cmsis_gcc.h **** /**
 231:Core/cmsis_gcc.h ****   \brief   Wait For Interrupt
 232:Core/cmsis_gcc.h ****   \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
 233:Core/cmsis_gcc.h ****  */
 234:Core/cmsis_gcc.h **** #define __WFI()                             __ASM volatile ("wfi":::"memory")
 235:Core/cmsis_gcc.h **** 
 236:Core/cmsis_gcc.h **** 
 237:Core/cmsis_gcc.h **** /**
 238:Core/cmsis_gcc.h ****   \brief   Wait For Event
 239:Core/cmsis_gcc.h ****   \details Wait For Event is a hint instruction that permits the processor to enter
 240:Core/cmsis_gcc.h ****            a low-power state until one of a number of events occurs.
 241:Core/cmsis_gcc.h ****  */
 242:Core/cmsis_gcc.h **** #define __WFE()                             __ASM volatile ("wfe":::"memory")
 243:Core/cmsis_gcc.h **** 
 244:Core/cmsis_gcc.h **** 
 245:Core/cmsis_gcc.h **** /**
 246:Core/cmsis_gcc.h ****   \brief   Send Event
 247:Core/cmsis_gcc.h ****   \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
 248:Core/cmsis_gcc.h ****  */
 249:Core/cmsis_gcc.h **** #define __SEV()                             __ASM volatile ("sev")
 250:Core/cmsis_gcc.h **** 
 251:Core/cmsis_gcc.h **** 
 252:Core/cmsis_gcc.h **** /**
 253:Core/cmsis_gcc.h ****   \brief   Instruction Synchronization Barrier
 254:Core/cmsis_gcc.h ****   \details Instruction Synchronization Barrier flushes the pipeline in the processor,
 255:Core/cmsis_gcc.h ****            so that all instructions following the ISB are fetched from cache or memory,
 256:Core/cmsis_gcc.h ****            after the instruction has been completed.
 257:Core/cmsis_gcc.h ****  */
 258:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
 259:Core/cmsis_gcc.h **** {
 260:Core/cmsis_gcc.h ****   __ASM volatile ("isb 0xF":::"memory");
 261:Core/cmsis_gcc.h **** }
 262:Core/cmsis_gcc.h **** 
 263:Core/cmsis_gcc.h **** 
 264:Core/cmsis_gcc.h **** /**
 265:Core/cmsis_gcc.h ****   \brief   Data Synchronization Barrier
 266:Core/cmsis_gcc.h ****   \details Acts as a special kind of Data Memory Barrier.
 267:Core/cmsis_gcc.h ****            It completes when all explicit memory accesses before this instruction complete.
 268:Core/cmsis_gcc.h ****  */
ARM GAS  /tmp/ccteMF1S.s 			page 27


 269:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
 270:Core/cmsis_gcc.h **** {
 271:Core/cmsis_gcc.h ****   __ASM volatile ("dsb 0xF":::"memory");
 272:Core/cmsis_gcc.h **** }
 273:Core/cmsis_gcc.h **** 
 274:Core/cmsis_gcc.h **** 
 275:Core/cmsis_gcc.h **** /**
 276:Core/cmsis_gcc.h ****   \brief   Data Memory Barrier
 277:Core/cmsis_gcc.h ****   \details Ensures the apparent order of the explicit memory operations before
 278:Core/cmsis_gcc.h ****            and after the instruction, without ensuring their completion.
 279:Core/cmsis_gcc.h ****  */
 280:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
 281:Core/cmsis_gcc.h **** {
 282:Core/cmsis_gcc.h ****   __ASM volatile ("dmb 0xF":::"memory");
 283:Core/cmsis_gcc.h **** }
 284:Core/cmsis_gcc.h **** 
 285:Core/cmsis_gcc.h **** 
 286:Core/cmsis_gcc.h **** /**
 287:Core/cmsis_gcc.h ****   \brief   Reverse byte order (32 bit)
 288:Core/cmsis_gcc.h ****   \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
 289:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 290:Core/cmsis_gcc.h ****   \return               Reversed value
 291:Core/cmsis_gcc.h ****  */
 292:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
 293:Core/cmsis_gcc.h **** {
 294:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
 295:Core/cmsis_gcc.h ****   return __builtin_bswap32(value);
 296:Core/cmsis_gcc.h **** #else
 297:Core/cmsis_gcc.h ****   uint32_t result;
 298:Core/cmsis_gcc.h **** 
 299:Core/cmsis_gcc.h ****   __ASM ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 300:Core/cmsis_gcc.h ****   return result;
 301:Core/cmsis_gcc.h **** #endif
 302:Core/cmsis_gcc.h **** }
 303:Core/cmsis_gcc.h **** 
 304:Core/cmsis_gcc.h **** 
 305:Core/cmsis_gcc.h **** /**
 306:Core/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 307:Core/cmsis_gcc.h ****   \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 
 308:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 309:Core/cmsis_gcc.h ****   \return               Reversed value
 310:Core/cmsis_gcc.h ****  */
 311:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
 312:Core/cmsis_gcc.h **** {
 313:Core/cmsis_gcc.h ****   uint32_t result;
 314:Core/cmsis_gcc.h **** 
 315:Core/cmsis_gcc.h ****   __ASM ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 316:Core/cmsis_gcc.h ****   return result;
 317:Core/cmsis_gcc.h **** }
 318:Core/cmsis_gcc.h **** 
 319:Core/cmsis_gcc.h **** 
 320:Core/cmsis_gcc.h **** /**
 321:Core/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 322:Core/cmsis_gcc.h ****   \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
 323:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 324:Core/cmsis_gcc.h ****   \return               Reversed value
 325:Core/cmsis_gcc.h ****  */
ARM GAS  /tmp/ccteMF1S.s 			page 28


 326:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
 327:Core/cmsis_gcc.h **** {
 328:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 329:Core/cmsis_gcc.h ****   return (int16_t)__builtin_bswap16(value);
 330:Core/cmsis_gcc.h **** #else
 331:Core/cmsis_gcc.h ****   int16_t result;
 332:Core/cmsis_gcc.h **** 
 333:Core/cmsis_gcc.h ****   __ASM ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 334:Core/cmsis_gcc.h ****   return result;
 335:Core/cmsis_gcc.h **** #endif
 336:Core/cmsis_gcc.h **** }
 337:Core/cmsis_gcc.h **** 
 338:Core/cmsis_gcc.h **** 
 339:Core/cmsis_gcc.h **** /**
 340:Core/cmsis_gcc.h ****   \brief   Rotate Right in unsigned value (32 bit)
 341:Core/cmsis_gcc.h ****   \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
 342:Core/cmsis_gcc.h ****   \param [in]    op1  Value to rotate
 343:Core/cmsis_gcc.h ****   \param [in]    op2  Number of Bits to rotate
 344:Core/cmsis_gcc.h ****   \return               Rotated value
 345:Core/cmsis_gcc.h ****  */
 346:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
 347:Core/cmsis_gcc.h **** {
 348:Core/cmsis_gcc.h ****   op2 %= 32U;
 349:Core/cmsis_gcc.h ****   if (op2 == 0U)
 350:Core/cmsis_gcc.h ****   {
 351:Core/cmsis_gcc.h ****     return op1;
 352:Core/cmsis_gcc.h ****   }
 353:Core/cmsis_gcc.h ****   return (op1 >> op2) | (op1 << (32U - op2));
 354:Core/cmsis_gcc.h **** }
 355:Core/cmsis_gcc.h **** 
 356:Core/cmsis_gcc.h **** 
 357:Core/cmsis_gcc.h **** /**
 358:Core/cmsis_gcc.h ****   \brief   Breakpoint
 359:Core/cmsis_gcc.h ****   \details Causes the processor to enter Debug state.
 360:Core/cmsis_gcc.h ****            Debug tools can use this to investigate system state when the instruction at a particula
 361:Core/cmsis_gcc.h ****   \param [in]    value  is ignored by the processor.
 362:Core/cmsis_gcc.h ****                  If required, a debugger can use it to store additional information about the break
 363:Core/cmsis_gcc.h ****  */
 364:Core/cmsis_gcc.h **** #define __BKPT(value)                       __ASM volatile ("bkpt "#value)
 365:Core/cmsis_gcc.h **** 
 366:Core/cmsis_gcc.h **** 
 367:Core/cmsis_gcc.h **** /**
 368:Core/cmsis_gcc.h ****   \brief   Reverse bit order of value
 369:Core/cmsis_gcc.h ****   \details Reverses the bit order of the given value.
 370:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 371:Core/cmsis_gcc.h ****   \return               Reversed value
 372:Core/cmsis_gcc.h ****  */
 373:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
 374:Core/cmsis_gcc.h **** {
 375:Core/cmsis_gcc.h ****   uint32_t result;
 376:Core/cmsis_gcc.h **** 
 377:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 378:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 379:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
 380:Core/cmsis_gcc.h ****    __ASM ("rbit %0, %1" : "=r" (result) : "r" (value) );
 381:Core/cmsis_gcc.h **** #else
 382:Core/cmsis_gcc.h ****   uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
ARM GAS  /tmp/ccteMF1S.s 			page 29


 383:Core/cmsis_gcc.h **** 
 384:Core/cmsis_gcc.h ****   result = value;                      /* r will be reversed bits of v; first get LSB of v */
 385:Core/cmsis_gcc.h ****   for (value >>= 1U; value != 0U; value >>= 1U)
 386:Core/cmsis_gcc.h ****   {
 387:Core/cmsis_gcc.h ****     result <<= 1U;
 388:Core/cmsis_gcc.h ****     result |= value & 1U;
 389:Core/cmsis_gcc.h ****     s--;
 390:Core/cmsis_gcc.h ****   }
 391:Core/cmsis_gcc.h ****   result <<= s;                        /* shift when v's highest bits are zero */
 392:Core/cmsis_gcc.h **** #endif
 393:Core/cmsis_gcc.h ****   return result;
 394:Core/cmsis_gcc.h **** }
 395:Core/cmsis_gcc.h **** 
 396:Core/cmsis_gcc.h **** 
 397:Core/cmsis_gcc.h **** /**
 398:Core/cmsis_gcc.h ****   \brief   Count leading zeros
 399:Core/cmsis_gcc.h ****   \details Counts the number of leading zeros of a data value.
 400:Core/cmsis_gcc.h ****   \param [in]  value  Value to count the leading zeros
 401:Core/cmsis_gcc.h ****   \return             number of leading zeros in value
 402:Core/cmsis_gcc.h ****  */
 403:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
 404:Core/cmsis_gcc.h **** {
 405:Core/cmsis_gcc.h ****   /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
 406:Core/cmsis_gcc.h ****      __builtin_clz(0) is undefined behaviour, so handle this case specially.
 407:Core/cmsis_gcc.h ****      This guarantees ARM-compatible results if happening to compile on a non-ARM
 408:Core/cmsis_gcc.h ****      target, and ensures the compiler doesn't decide to activate any
 409:Core/cmsis_gcc.h ****      optimisations using the logic "value was passed to __builtin_clz, so it
 410:Core/cmsis_gcc.h ****      is non-zero".
 411:Core/cmsis_gcc.h ****      ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
 412:Core/cmsis_gcc.h ****      single CLZ instruction.
 413:Core/cmsis_gcc.h ****    */
 414:Core/cmsis_gcc.h ****   if (value == 0U)
 415:Core/cmsis_gcc.h ****   {
 416:Core/cmsis_gcc.h ****     return 32U;
 417:Core/cmsis_gcc.h ****   }
 418:Core/cmsis_gcc.h ****   return __builtin_clz(value);
 419:Core/cmsis_gcc.h **** }
 420:Core/cmsis_gcc.h **** 
 421:Core/cmsis_gcc.h **** 
 422:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 423:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 424:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 425:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
 426:Core/cmsis_gcc.h **** /**
 427:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (8 bit)
 428:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 8 bit value.
 429:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 430:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 431:Core/cmsis_gcc.h ****  */
 432:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
 433:Core/cmsis_gcc.h **** {
 434:Core/cmsis_gcc.h ****     uint32_t result;
 435:Core/cmsis_gcc.h **** 
 436:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 437:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
 438:Core/cmsis_gcc.h **** #else
 439:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
ARM GAS  /tmp/ccteMF1S.s 			page 30


 440:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 441:Core/cmsis_gcc.h ****     */
 442:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
 443:Core/cmsis_gcc.h **** #endif
 444:Core/cmsis_gcc.h ****    return ((uint8_t) result);    /* Add explicit type cast here */
 445:Core/cmsis_gcc.h **** }
 446:Core/cmsis_gcc.h **** 
 447:Core/cmsis_gcc.h **** 
 448:Core/cmsis_gcc.h **** /**
 449:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (16 bit)
 450:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 16 bit values.
 451:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 452:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 453:Core/cmsis_gcc.h ****  */
 454:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
 455:Core/cmsis_gcc.h **** {
 456:Core/cmsis_gcc.h ****     uint32_t result;
 457:Core/cmsis_gcc.h **** 
 458:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 459:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
 460:Core/cmsis_gcc.h **** #else
 461:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 462:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 463:Core/cmsis_gcc.h ****     */
 464:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
 465:Core/cmsis_gcc.h **** #endif
 466:Core/cmsis_gcc.h ****    return ((uint16_t) result);    /* Add explicit type cast here */
 467:Core/cmsis_gcc.h **** }
 468:Core/cmsis_gcc.h **** 
 469:Core/cmsis_gcc.h **** 
 470:Core/cmsis_gcc.h **** /**
 471:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (32 bit)
 472:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 32 bit values.
 473:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 474:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 475:Core/cmsis_gcc.h ****  */
 476:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
 477:Core/cmsis_gcc.h **** {
 478:Core/cmsis_gcc.h ****     uint32_t result;
 479:Core/cmsis_gcc.h **** 
 480:Core/cmsis_gcc.h ****    __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 481:Core/cmsis_gcc.h ****    return(result);
 482:Core/cmsis_gcc.h **** }
 483:Core/cmsis_gcc.h **** 
 484:Core/cmsis_gcc.h **** 
 485:Core/cmsis_gcc.h **** /**
 486:Core/cmsis_gcc.h ****   \brief   STR Exclusive (8 bit)
 487:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 8 bit values.
 488:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 489:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 490:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 491:Core/cmsis_gcc.h ****   \return          1  Function failed
 492:Core/cmsis_gcc.h ****  */
 493:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
 494:Core/cmsis_gcc.h **** {
 495:Core/cmsis_gcc.h ****    uint32_t result;
 496:Core/cmsis_gcc.h **** 
ARM GAS  /tmp/ccteMF1S.s 			page 31


 497:Core/cmsis_gcc.h ****    __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
 498:Core/cmsis_gcc.h ****    return(result);
 499:Core/cmsis_gcc.h **** }
 500:Core/cmsis_gcc.h **** 
 501:Core/cmsis_gcc.h **** 
 502:Core/cmsis_gcc.h **** /**
 503:Core/cmsis_gcc.h ****   \brief   STR Exclusive (16 bit)
 504:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 16 bit values.
 505:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 506:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 507:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 508:Core/cmsis_gcc.h ****   \return          1  Function failed
 509:Core/cmsis_gcc.h ****  */
 510:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
 511:Core/cmsis_gcc.h **** {
 512:Core/cmsis_gcc.h ****    uint32_t result;
 513:Core/cmsis_gcc.h **** 
 514:Core/cmsis_gcc.h ****    __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
 515:Core/cmsis_gcc.h ****    return(result);
 516:Core/cmsis_gcc.h **** }
 517:Core/cmsis_gcc.h **** 
 518:Core/cmsis_gcc.h **** 
 519:Core/cmsis_gcc.h **** /**
 520:Core/cmsis_gcc.h ****   \brief   STR Exclusive (32 bit)
 521:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 32 bit values.
 522:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 523:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 524:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 525:Core/cmsis_gcc.h ****   \return          1  Function failed
 526:Core/cmsis_gcc.h ****  */
 527:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
 528:Core/cmsis_gcc.h **** {
 529:Core/cmsis_gcc.h ****    uint32_t result;
 530:Core/cmsis_gcc.h **** 
 531:Core/cmsis_gcc.h ****    __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 532:Core/cmsis_gcc.h ****    return(result);
 533:Core/cmsis_gcc.h **** }
 534:Core/cmsis_gcc.h **** 
 535:Core/cmsis_gcc.h **** 
 536:Core/cmsis_gcc.h **** /**
 537:Core/cmsis_gcc.h ****   \brief   Remove the exclusive lock
 538:Core/cmsis_gcc.h ****   \details Removes the exclusive lock which is created by LDREX.
 539:Core/cmsis_gcc.h ****  */
 540:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void)
 541:Core/cmsis_gcc.h **** {
 542:Core/cmsis_gcc.h ****   __ASM volatile ("clrex" ::: "memory");
 543:Core/cmsis_gcc.h **** }
 544:Core/cmsis_gcc.h **** 
 545:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 546:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 547:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 548:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 549:Core/cmsis_gcc.h **** 
 550:Core/cmsis_gcc.h **** 
 551:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 552:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 553:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
ARM GAS  /tmp/ccteMF1S.s 			page 32


 554:Core/cmsis_gcc.h **** /**
 555:Core/cmsis_gcc.h ****   \brief   Signed Saturate
 556:Core/cmsis_gcc.h ****   \details Saturates a signed value.
 557:Core/cmsis_gcc.h ****   \param [in]  ARG1  Value to be saturated
 558:Core/cmsis_gcc.h ****   \param [in]  ARG2  Bit position to saturate to (1..32)
 559:Core/cmsis_gcc.h ****   \return             Saturated value
 560:Core/cmsis_gcc.h ****  */
 561:Core/cmsis_gcc.h **** #define __SSAT(ARG1, ARG2) \
 562:Core/cmsis_gcc.h **** __extension__ \
 563:Core/cmsis_gcc.h **** ({                          \
 564:Core/cmsis_gcc.h ****   int32_t __RES, __ARG1 = (ARG1); \
 565:Core/cmsis_gcc.h ****   __ASM volatile ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
 566:Core/cmsis_gcc.h ****   __RES; \
 567:Core/cmsis_gcc.h ****  })
 568:Core/cmsis_gcc.h **** 
 569:Core/cmsis_gcc.h **** 
 570:Core/cmsis_gcc.h **** /**
 571:Core/cmsis_gcc.h ****   \brief   Unsigned Saturate
 572:Core/cmsis_gcc.h ****   \details Saturates an unsigned value.
 573:Core/cmsis_gcc.h ****   \param [in]  ARG1  Value to be saturated
 574:Core/cmsis_gcc.h ****   \param [in]  ARG2  Bit position to saturate to (0..31)
 575:Core/cmsis_gcc.h ****   \return             Saturated value
 576:Core/cmsis_gcc.h ****  */
 577:Core/cmsis_gcc.h **** #define __USAT(ARG1, ARG2) \
 578:Core/cmsis_gcc.h **** __extension__ \
 579:Core/cmsis_gcc.h **** ({                          \
 580:Core/cmsis_gcc.h ****   uint32_t __RES, __ARG1 = (ARG1); \
 581:Core/cmsis_gcc.h ****   __ASM volatile ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
 582:Core/cmsis_gcc.h ****   __RES; \
 583:Core/cmsis_gcc.h ****  })
 584:Core/cmsis_gcc.h **** 
 585:Core/cmsis_gcc.h **** 
 586:Core/cmsis_gcc.h **** /**
 587:Core/cmsis_gcc.h ****   \brief   Rotate Right with Extend (32 bit)
 588:Core/cmsis_gcc.h ****   \details Moves each bit of a bitstring right by one bit.
 589:Core/cmsis_gcc.h ****            The carry input is shifted in at the left end of the bitstring.
 590:Core/cmsis_gcc.h ****   \param [in]    value  Value to rotate
 591:Core/cmsis_gcc.h ****   \return               Rotated value
 592:Core/cmsis_gcc.h ****  */
 593:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
 594:Core/cmsis_gcc.h **** {
 595:Core/cmsis_gcc.h ****   uint32_t result;
 596:Core/cmsis_gcc.h **** 
 597:Core/cmsis_gcc.h ****   __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 598:Core/cmsis_gcc.h ****   return(result);
 599:Core/cmsis_gcc.h **** }
 600:Core/cmsis_gcc.h **** 
 601:Core/cmsis_gcc.h **** 
 602:Core/cmsis_gcc.h **** /**
 603:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (8 bit)
 604:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 8 bit value.
 605:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 606:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 607:Core/cmsis_gcc.h ****  */
 608:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
 609:Core/cmsis_gcc.h **** {
 610:Core/cmsis_gcc.h ****     uint32_t result;
ARM GAS  /tmp/ccteMF1S.s 			page 33


 611:Core/cmsis_gcc.h **** 
 612:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 613:Core/cmsis_gcc.h ****    __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
 614:Core/cmsis_gcc.h **** #else
 615:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 616:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 617:Core/cmsis_gcc.h ****     */
 618:Core/cmsis_gcc.h ****    __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
 619:Core/cmsis_gcc.h **** #endif
 620:Core/cmsis_gcc.h ****    return ((uint8_t) result);    /* Add explicit type cast here */
 621:Core/cmsis_gcc.h **** }
 622:Core/cmsis_gcc.h **** 
 623:Core/cmsis_gcc.h **** 
 624:Core/cmsis_gcc.h **** /**
 625:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (16 bit)
 626:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 16 bit values.
 627:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 628:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 629:Core/cmsis_gcc.h ****  */
 630:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
 631:Core/cmsis_gcc.h **** {
 632:Core/cmsis_gcc.h ****     uint32_t result;
 633:Core/cmsis_gcc.h **** 
 634:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 635:Core/cmsis_gcc.h ****    __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
 636:Core/cmsis_gcc.h **** #else
 637:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 638:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 639:Core/cmsis_gcc.h ****     */
 640:Core/cmsis_gcc.h ****    __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
 641:Core/cmsis_gcc.h **** #endif
 642:Core/cmsis_gcc.h ****    return ((uint16_t) result);    /* Add explicit type cast here */
 643:Core/cmsis_gcc.h **** }
 644:Core/cmsis_gcc.h **** 
 645:Core/cmsis_gcc.h **** 
 646:Core/cmsis_gcc.h **** /**
 647:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (32 bit)
 648:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 32 bit values.
 649:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 650:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 651:Core/cmsis_gcc.h ****  */
 652:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
 653:Core/cmsis_gcc.h **** {
 654:Core/cmsis_gcc.h ****     uint32_t result;
 655:Core/cmsis_gcc.h **** 
 656:Core/cmsis_gcc.h ****    __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
 657:Core/cmsis_gcc.h ****    return(result);
 658:Core/cmsis_gcc.h **** }
 659:Core/cmsis_gcc.h **** 
 660:Core/cmsis_gcc.h **** 
 661:Core/cmsis_gcc.h **** /**
 662:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (8 bit)
 663:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 8 bit values.
 664:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 665:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 666:Core/cmsis_gcc.h ****  */
 667:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
ARM GAS  /tmp/ccteMF1S.s 			page 34


 668:Core/cmsis_gcc.h **** {
 669:Core/cmsis_gcc.h ****    __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
 670:Core/cmsis_gcc.h **** }
 671:Core/cmsis_gcc.h **** 
 672:Core/cmsis_gcc.h **** 
 673:Core/cmsis_gcc.h **** /**
 674:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (16 bit)
 675:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 16 bit values.
 676:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 677:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 678:Core/cmsis_gcc.h ****  */
 679:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
 680:Core/cmsis_gcc.h **** {
 681:Core/cmsis_gcc.h ****    __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
 682:Core/cmsis_gcc.h **** }
 683:Core/cmsis_gcc.h **** 
 684:Core/cmsis_gcc.h **** 
 685:Core/cmsis_gcc.h **** /**
 686:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (32 bit)
 687:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 32 bit values.
 688:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 689:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 690:Core/cmsis_gcc.h ****  */
 691:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
 692:Core/cmsis_gcc.h **** {
 693:Core/cmsis_gcc.h ****    __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
 694:Core/cmsis_gcc.h **** }
 695:Core/cmsis_gcc.h **** 
 696:Core/cmsis_gcc.h **** #else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 697:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 698:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 699:Core/cmsis_gcc.h **** 
 700:Core/cmsis_gcc.h **** /**
 701:Core/cmsis_gcc.h ****   \brief   Signed Saturate
 702:Core/cmsis_gcc.h ****   \details Saturates a signed value.
 703:Core/cmsis_gcc.h ****   \param [in]  value  Value to be saturated
 704:Core/cmsis_gcc.h ****   \param [in]    sat  Bit position to saturate to (1..32)
 705:Core/cmsis_gcc.h ****   \return             Saturated value
 706:Core/cmsis_gcc.h ****  */
 707:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
 708:Core/cmsis_gcc.h **** {
 709:Core/cmsis_gcc.h ****   if ((sat >= 1U) && (sat <= 32U))
 710:Core/cmsis_gcc.h ****   {
 711:Core/cmsis_gcc.h ****     const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
 712:Core/cmsis_gcc.h ****     const int32_t min = -1 - max ;
 713:Core/cmsis_gcc.h ****     if (val > max)
 714:Core/cmsis_gcc.h ****     {
 715:Core/cmsis_gcc.h ****       return max;
 716:Core/cmsis_gcc.h ****     }
 717:Core/cmsis_gcc.h ****     else if (val < min)
 718:Core/cmsis_gcc.h ****     {
 719:Core/cmsis_gcc.h ****       return min;
 720:Core/cmsis_gcc.h ****     }
 721:Core/cmsis_gcc.h ****   }
 722:Core/cmsis_gcc.h ****   return val;
 723:Core/cmsis_gcc.h **** }
 724:Core/cmsis_gcc.h **** 
ARM GAS  /tmp/ccteMF1S.s 			page 35


 725:Core/cmsis_gcc.h **** /**
 726:Core/cmsis_gcc.h ****   \brief   Unsigned Saturate
 727:Core/cmsis_gcc.h ****   \details Saturates an unsigned value.
 728:Core/cmsis_gcc.h ****   \param [in]  value  Value to be saturated
 729:Core/cmsis_gcc.h ****   \param [in]    sat  Bit position to saturate to (0..31)
 730:Core/cmsis_gcc.h ****   \return             Saturated value
 731:Core/cmsis_gcc.h ****  */
 732:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
 733:Core/cmsis_gcc.h **** {
 734:Core/cmsis_gcc.h ****   if (sat <= 31U)
 735:Core/cmsis_gcc.h ****   {
 736:Core/cmsis_gcc.h ****     const uint32_t max = ((1U << sat) - 1U);
 737:Core/cmsis_gcc.h ****     if (val > (int32_t)max)
 738:Core/cmsis_gcc.h ****     {
 739:Core/cmsis_gcc.h ****       return max;
 740:Core/cmsis_gcc.h ****     }
 741:Core/cmsis_gcc.h ****     else if (val < 0)
 742:Core/cmsis_gcc.h ****     {
 743:Core/cmsis_gcc.h ****       return 0U;
 744:Core/cmsis_gcc.h ****     }
 745:Core/cmsis_gcc.h ****   }
 746:Core/cmsis_gcc.h ****   return (uint32_t)val;
 747:Core/cmsis_gcc.h **** }
 748:Core/cmsis_gcc.h **** 
 749:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 750:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 751:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 752:Core/cmsis_gcc.h **** 
 753:Core/cmsis_gcc.h **** 
 754:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 755:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
 756:Core/cmsis_gcc.h **** /**
 757:Core/cmsis_gcc.h ****   \brief   Load-Acquire (8 bit)
 758:Core/cmsis_gcc.h ****   \details Executes a LDAB instruction for 8 bit value.
 759:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 760:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 761:Core/cmsis_gcc.h ****  */
 762:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
 763:Core/cmsis_gcc.h **** {
 764:Core/cmsis_gcc.h ****     uint32_t result;
 765:Core/cmsis_gcc.h **** 
 766:Core/cmsis_gcc.h ****    __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 767:Core/cmsis_gcc.h ****    return ((uint8_t) result);
 768:Core/cmsis_gcc.h **** }
 769:Core/cmsis_gcc.h **** 
 770:Core/cmsis_gcc.h **** 
 771:Core/cmsis_gcc.h **** /**
 772:Core/cmsis_gcc.h ****   \brief   Load-Acquire (16 bit)
 773:Core/cmsis_gcc.h ****   \details Executes a LDAH instruction for 16 bit values.
 774:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 775:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 776:Core/cmsis_gcc.h ****  */
 777:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
 778:Core/cmsis_gcc.h **** {
 779:Core/cmsis_gcc.h ****     uint32_t result;
 780:Core/cmsis_gcc.h **** 
 781:Core/cmsis_gcc.h ****    __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
ARM GAS  /tmp/ccteMF1S.s 			page 36


 782:Core/cmsis_gcc.h ****    return ((uint16_t) result);
 783:Core/cmsis_gcc.h **** }
 784:Core/cmsis_gcc.h **** 
 785:Core/cmsis_gcc.h **** 
 786:Core/cmsis_gcc.h **** /**
 787:Core/cmsis_gcc.h ****   \brief   Load-Acquire (32 bit)
 788:Core/cmsis_gcc.h ****   \details Executes a LDA instruction for 32 bit values.
 789:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 790:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 791:Core/cmsis_gcc.h ****  */
 792:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
 793:Core/cmsis_gcc.h **** {
 794:Core/cmsis_gcc.h ****     uint32_t result;
 795:Core/cmsis_gcc.h **** 
 796:Core/cmsis_gcc.h ****    __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 797:Core/cmsis_gcc.h ****    return(result);
 798:Core/cmsis_gcc.h **** }
 799:Core/cmsis_gcc.h **** 
 800:Core/cmsis_gcc.h **** 
 801:Core/cmsis_gcc.h **** /**
 802:Core/cmsis_gcc.h ****   \brief   Store-Release (8 bit)
 803:Core/cmsis_gcc.h ****   \details Executes a STLB instruction for 8 bit values.
 804:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 805:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 806:Core/cmsis_gcc.h ****  */
 807:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
 808:Core/cmsis_gcc.h **** {
 809:Core/cmsis_gcc.h ****    __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 810:Core/cmsis_gcc.h **** }
 811:Core/cmsis_gcc.h **** 
 812:Core/cmsis_gcc.h **** 
 813:Core/cmsis_gcc.h **** /**
 814:Core/cmsis_gcc.h ****   \brief   Store-Release (16 bit)
 815:Core/cmsis_gcc.h ****   \details Executes a STLH instruction for 16 bit values.
 816:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 817:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 818:Core/cmsis_gcc.h ****  */
 819:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
 820:Core/cmsis_gcc.h **** {
 821:Core/cmsis_gcc.h ****    __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 822:Core/cmsis_gcc.h **** }
 823:Core/cmsis_gcc.h **** 
 824:Core/cmsis_gcc.h **** 
 825:Core/cmsis_gcc.h **** /**
 826:Core/cmsis_gcc.h ****   \brief   Store-Release (32 bit)
 827:Core/cmsis_gcc.h ****   \details Executes a STL instruction for 32 bit values.
 828:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 829:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 830:Core/cmsis_gcc.h ****  */
 831:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
 832:Core/cmsis_gcc.h **** {
 833:Core/cmsis_gcc.h ****    __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 834:Core/cmsis_gcc.h **** }
 835:Core/cmsis_gcc.h **** 
 836:Core/cmsis_gcc.h **** 
 837:Core/cmsis_gcc.h **** /**
 838:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (8 bit)
ARM GAS  /tmp/ccteMF1S.s 			page 37


 839:Core/cmsis_gcc.h ****   \details Executes a LDAB exclusive instruction for 8 bit value.
 840:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 841:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 842:Core/cmsis_gcc.h ****  */
 843:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
 844:Core/cmsis_gcc.h **** {
 845:Core/cmsis_gcc.h ****     uint32_t result;
 846:Core/cmsis_gcc.h **** 
 847:Core/cmsis_gcc.h ****    __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 848:Core/cmsis_gcc.h ****    return ((uint8_t) result);
 849:Core/cmsis_gcc.h **** }
 850:Core/cmsis_gcc.h **** 
 851:Core/cmsis_gcc.h **** 
 852:Core/cmsis_gcc.h **** /**
 853:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (16 bit)
 854:Core/cmsis_gcc.h ****   \details Executes a LDAH exclusive instruction for 16 bit values.
 855:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 856:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 857:Core/cmsis_gcc.h ****  */
 858:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
 859:Core/cmsis_gcc.h **** {
 860:Core/cmsis_gcc.h ****     uint32_t result;
 861:Core/cmsis_gcc.h **** 
 862:Core/cmsis_gcc.h ****    __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 863:Core/cmsis_gcc.h ****    return ((uint16_t) result);
 864:Core/cmsis_gcc.h **** }
 865:Core/cmsis_gcc.h **** 
 866:Core/cmsis_gcc.h **** 
 867:Core/cmsis_gcc.h **** /**
 868:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (32 bit)
 869:Core/cmsis_gcc.h ****   \details Executes a LDA exclusive instruction for 32 bit values.
 870:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 871:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 872:Core/cmsis_gcc.h ****  */
 873:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
 874:Core/cmsis_gcc.h **** {
 875:Core/cmsis_gcc.h ****     uint32_t result;
 876:Core/cmsis_gcc.h **** 
 877:Core/cmsis_gcc.h ****    __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 878:Core/cmsis_gcc.h ****    return(result);
 879:Core/cmsis_gcc.h **** }
 880:Core/cmsis_gcc.h **** 
 881:Core/cmsis_gcc.h **** 
 882:Core/cmsis_gcc.h **** /**
 883:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (8 bit)
 884:Core/cmsis_gcc.h ****   \details Executes a STLB exclusive instruction for 8 bit values.
 885:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 886:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 887:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 888:Core/cmsis_gcc.h ****   \return          1  Function failed
 889:Core/cmsis_gcc.h ****  */
 890:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
 891:Core/cmsis_gcc.h **** {
 892:Core/cmsis_gcc.h ****    uint32_t result;
 893:Core/cmsis_gcc.h **** 
 894:Core/cmsis_gcc.h ****    __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "mem
 895:Core/cmsis_gcc.h ****    return(result);
ARM GAS  /tmp/ccteMF1S.s 			page 38


 896:Core/cmsis_gcc.h **** }
 897:Core/cmsis_gcc.h **** 
 898:Core/cmsis_gcc.h **** 
 899:Core/cmsis_gcc.h **** /**
 900:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (16 bit)
 901:Core/cmsis_gcc.h ****   \details Executes a STLH exclusive instruction for 16 bit values.
 902:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 903:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 904:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 905:Core/cmsis_gcc.h ****   \return          1  Function failed
 906:Core/cmsis_gcc.h ****  */
 907:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
 908:Core/cmsis_gcc.h **** {
 909:Core/cmsis_gcc.h ****    uint32_t result;
 910:Core/cmsis_gcc.h **** 
 911:Core/cmsis_gcc.h ****    __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "mem
 912:Core/cmsis_gcc.h ****    return(result);
 913:Core/cmsis_gcc.h **** }
 914:Core/cmsis_gcc.h **** 
 915:Core/cmsis_gcc.h **** 
 916:Core/cmsis_gcc.h **** /**
 917:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (32 bit)
 918:Core/cmsis_gcc.h ****   \details Executes a STL exclusive instruction for 32 bit values.
 919:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 920:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 921:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 922:Core/cmsis_gcc.h ****   \return          1  Function failed
 923:Core/cmsis_gcc.h ****  */
 924:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
 925:Core/cmsis_gcc.h **** {
 926:Core/cmsis_gcc.h ****    uint32_t result;
 927:Core/cmsis_gcc.h **** 
 928:Core/cmsis_gcc.h ****    __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memo
 929:Core/cmsis_gcc.h ****    return(result);
 930:Core/cmsis_gcc.h **** }
 931:Core/cmsis_gcc.h **** 
 932:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 933:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 934:Core/cmsis_gcc.h **** 
 935:Core/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
 936:Core/cmsis_gcc.h **** 
 937:Core/cmsis_gcc.h **** 
 938:Core/cmsis_gcc.h **** /* ###########################  Core Function Access  ########################### */
 939:Core/cmsis_gcc.h **** /** \ingroup  CMSIS_Core_FunctionInterface
 940:Core/cmsis_gcc.h ****     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
 941:Core/cmsis_gcc.h ****   @{
 942:Core/cmsis_gcc.h ****  */
 943:Core/cmsis_gcc.h **** 
 944:Core/cmsis_gcc.h **** /**
 945:Core/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
 946:Core/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing special-purpose register PRIMASK.
 947:Core/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 948:Core/cmsis_gcc.h ****  */
 949:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
 950:Core/cmsis_gcc.h **** {
 951:Core/cmsis_gcc.h ****   __ASM volatile ("cpsie i" : : : "memory");
 952:Core/cmsis_gcc.h **** }
ARM GAS  /tmp/ccteMF1S.s 			page 39


 953:Core/cmsis_gcc.h **** 
 954:Core/cmsis_gcc.h **** 
 955:Core/cmsis_gcc.h **** /**
 956:Core/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
 957:Core/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting special-purpose register PRIMASK.
 958:Core/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 959:Core/cmsis_gcc.h ****  */
 960:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
 807              		.loc 2 960 27 view .LVU247
 808              	.LBB11:
 961:Core/cmsis_gcc.h **** {
 962:Core/cmsis_gcc.h ****   __ASM volatile ("cpsid i" : : : "memory");
 809              		.loc 2 962 3 view .LVU248
 810              	.LBE11:
 811              	.LBE10:
 313:Library/src/lcm32f06x_cordic.c ****     __disable_irq();
 812              		.loc 1 313 1 is_stmt 0 view .LVU249
 813 0000 30B5     		push	{r4, r5, lr}
 814              	.LCFI4:
 815              		.cfi_def_cfa_offset 12
 816              		.cfi_offset 4, -12
 817              		.cfi_offset 5, -8
 818              		.cfi_offset 14, -4
 313:Library/src/lcm32f06x_cordic.c ****     __disable_irq();
 819              		.loc 1 313 1 view .LVU250
 820 0002 1400     		movs	r4, r2
 821              	.LBB13:
 822              	.LBB12:
 823              		.loc 2 962 3 view .LVU251
 824              		.syntax divided
 825              	@ 962 "Core/cmsis_gcc.h" 1
 826 0004 72B6     		cpsid i
 827              	@ 0 "" 2
 828              		.thumb
 829              		.syntax unified
 830              	.LBE12:
 831              	.LBE13:
 315:Library/src/lcm32f06x_cordic.c ****     uint8_t i = 0;
 832              		.loc 1 315 5 is_stmt 1 view .LVU252
 833              	.LVL45:
 316:Library/src/lcm32f06x_cordic.c ****     uint32_t CordicHyperbolicAn = 1236;//  1/0.82815936 * (1 << 10);  1/0.82815936 = 1.20749707
 834              		.loc 1 316 5 view .LVU253
 317:Library/src/lcm32f06x_cordic.c ****     uint32_t temp = 0;
 835              		.loc 1 317 5 view .LVU254
 318:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG &= ~CORDIC_CFG_CYCLES_Msk; 
 836              		.loc 1 318 5 view .LVU255
 837              		.loc 1 318 11 is_stmt 0 view .LVU256
 838 0006 224B     		ldr	r3, .L68
 839              		.loc 1 318 17 view .LVU257
 840 0008 224D     		ldr	r5, .L68+4
 841              		.loc 1 318 11 view .LVU258
 842 000a 5A68     		ldr	r2, [r3, #4]
 843              	.LVL46:
 844              		.loc 1 318 17 view .LVU259
 845 000c 2A40     		ands	r2, r5
 846 000e 5A60     		str	r2, [r3, #4]
 319:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00003100 | Accuracy;
ARM GAS  /tmp/ccteMF1S.s 			page 40


 847              		.loc 1 319 5 is_stmt 1 view .LVU260
 848              		.loc 1 319 30 is_stmt 0 view .LVU261
 849 0010 C422     		movs	r2, #196
 850 0012 9201     		lsls	r2, r2, #6
 851 0014 2243     		orrs	r2, r4
 852              		.loc 1 319 17 view .LVU262
 853 0016 5A60     		str	r2, [r3, #4]
 320:Library/src/lcm32f06x_cordic.c **** 
 321:Library/src/lcm32f06x_cordic.c ****     while((InputValue >> IQnIn) > 9)
 854              		.loc 1 321 5 is_stmt 1 view .LVU263
 855              		.loc 1 321 33 view .LVU264
 856              		.loc 1 321 23 is_stmt 0 view .LVU265
 857 0018 0300     		movs	r3, r0
 858 001a CB40     		lsrs	r3, r3, r1
 859              		.loc 1 321 33 view .LVU266
 860 001c 092B     		cmp	r3, #9
 861 001e 34D9     		bls	.L60
 315:Library/src/lcm32f06x_cordic.c ****     uint32_t CordicHyperbolicAn = 1236;//  1/0.82815936 * (1 << 10);  1/0.82815936 = 1.20749707
 862              		.loc 1 315 13 view .LVU267
 863 0020 0023     		movs	r3, #0
 864              	.LVL47:
 865              	.L56:
 322:Library/src/lcm32f06x_cordic.c ****     {
 323:Library/src/lcm32f06x_cordic.c ****       InputValue = InputValue >> 1;
 866              		.loc 1 323 7 is_stmt 1 view .LVU268
 867 0022 0500     		movs	r5, r0
 868              		.loc 1 323 18 is_stmt 0 view .LVU269
 869 0024 4008     		lsrs	r0, r0, #1
 870              	.LVL48:
 324:Library/src/lcm32f06x_cordic.c ****       i ++;
 871              		.loc 1 324 7 is_stmt 1 view .LVU270
 321:Library/src/lcm32f06x_cordic.c ****     {
 872              		.loc 1 321 23 is_stmt 0 view .LVU271
 873 0026 0400     		movs	r4, r0
 874 0028 1A00     		movs	r2, r3
 875              		.loc 1 324 9 view .LVU272
 876 002a 0133     		adds	r3, r3, #1
 877              	.LVL49:
 321:Library/src/lcm32f06x_cordic.c ****     {
 878              		.loc 1 321 23 view .LVU273
 879 002c CC40     		lsrs	r4, r4, r1
 880              		.loc 1 324 9 view .LVU274
 881 002e DBB2     		uxtb	r3, r3
 882              	.LVL50:
 321:Library/src/lcm32f06x_cordic.c ****     {
 883              		.loc 1 321 33 is_stmt 1 view .LVU275
 884 0030 092C     		cmp	r4, #9
 885 0032 F6D8     		bhi	.L56
 325:Library/src/lcm32f06x_cordic.c ****     }
 326:Library/src/lcm32f06x_cordic.c ****     if(i & 0x1)
 886              		.loc 1 326 5 view .LVU276
 887              		.loc 1 326 7 is_stmt 0 view .LVU277
 888 0034 DC07     		lsls	r4, r3, #31
 889 0036 26D5     		bpl	.L67
 327:Library/src/lcm32f06x_cordic.c ****     {
 328:Library/src/lcm32f06x_cordic.c ****       InputValue = InputValue >> 1;
 890              		.loc 1 328 7 is_stmt 1 view .LVU278
ARM GAS  /tmp/ccteMF1S.s 			page 41


 329:Library/src/lcm32f06x_cordic.c ****       i ++;
 891              		.loc 1 329 9 is_stmt 0 view .LVU279
 892 0038 0232     		adds	r2, r2, #2
 330:Library/src/lcm32f06x_cordic.c ****     }
 331:Library/src/lcm32f06x_cordic.c **** 
 332:Library/src/lcm32f06x_cordic.c ****     i = i >> 1;
 893              		.loc 1 332 7 view .LVU280
 894 003a D2B2     		uxtb	r2, r2
 328:Library/src/lcm32f06x_cordic.c ****       i ++;
 895              		.loc 1 328 18 view .LVU281
 896 003c A808     		lsrs	r0, r5, #2
 897              	.LVL51:
 329:Library/src/lcm32f06x_cordic.c ****       i ++;
 898              		.loc 1 329 7 is_stmt 1 view .LVU282
 333:Library/src/lcm32f06x_cordic.c **** 
 334:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = InputValue + (1 << IQnIn);
 335:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValue - (1 << IQnIn);
 336:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 337:Library/src/lcm32f06x_cordic.c **** 
 338:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 339:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 340:Library/src/lcm32f06x_cordic.c ****     {
 341:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 342:Library/src/lcm32f06x_cordic.c ****     };
 343:Library/src/lcm32f06x_cordic.c **** 
 344:Library/src/lcm32f06x_cordic.c ****     temp = CORDIC->XO >> 11;
 345:Library/src/lcm32f06x_cordic.c ****     temp = temp * CordicHyperbolicAn;
 346:Library/src/lcm32f06x_cordic.c ****     __enable_irq();
 347:Library/src/lcm32f06x_cordic.c ****     return temp << i ;
 899              		.loc 1 347 17 is_stmt 0 view .LVU283
 900 003e 5208     		lsrs	r2, r2, #1
 901              	.L55:
 332:Library/src/lcm32f06x_cordic.c **** 
 902              		.loc 1 332 5 is_stmt 1 view .LVU284
 334:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValue - (1 << IQnIn);
 903              		.loc 1 334 5 view .LVU285
 334:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValue - (1 << IQnIn);
 904              		.loc 1 334 34 is_stmt 0 view .LVU286
 905 0040 0124     		movs	r4, #1
 906 0042 2300     		movs	r3, r4
 907 0044 8B40     		lsls	r3, r3, r1
 334:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValue - (1 << IQnIn);
 908              		.loc 1 334 29 view .LVU287
 909 0046 1D18     		adds	r5, r3, r0
 335:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 910              		.loc 1 335 29 view .LVU288
 911 0048 C01A     		subs	r0, r0, r3
 912              	.LVL52:
 336:Library/src/lcm32f06x_cordic.c **** 
 913              		.loc 1 336 16 view .LVU289
 914 004a 0023     		movs	r3, #0
 334:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValue - (1 << IQnIn);
 915              		.loc 1 334 16 view .LVU290
 916 004c 1049     		ldr	r1, .L68
 917              	.LVL53:
 334:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValue - (1 << IQnIn);
 918              		.loc 1 334 16 view .LVU291
ARM GAS  /tmp/ccteMF1S.s 			page 42


 919 004e CD60     		str	r5, [r1, #12]
 335:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 920              		.loc 1 335 5 is_stmt 1 view .LVU292
 335:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 921              		.loc 1 335 16 is_stmt 0 view .LVU293
 922 0050 0861     		str	r0, [r1, #16]
 336:Library/src/lcm32f06x_cordic.c **** 
 923              		.loc 1 336 5 is_stmt 1 view .LVU294
 336:Library/src/lcm32f06x_cordic.c **** 
 924              		.loc 1 336 16 is_stmt 0 view .LVU295
 925 0052 4B61     		str	r3, [r1, #20]
 338:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 926              		.loc 1 338 5 is_stmt 1 view .LVU296
 338:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 927              		.loc 1 338 11 is_stmt 0 view .LVU297
 928 0054 0868     		ldr	r0, [r1]
 338:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 929              		.loc 1 338 18 view .LVU298
 930 0056 0133     		adds	r3, r3, #1
 931 0058 FF33     		adds	r3, r3, #255
 932 005a 0343     		orrs	r3, r0
 933 005c 0B60     		str	r3, [r1]
 339:Library/src/lcm32f06x_cordic.c ****     {
 934              		.loc 1 339 5 is_stmt 1 view .LVU299
 339:Library/src/lcm32f06x_cordic.c ****     {
 935              		.loc 1 339 11 view .LVU300
 339:Library/src/lcm32f06x_cordic.c ****     {
 936              		.loc 1 339 19 is_stmt 0 view .LVU301
 937 005e 0B68     		ldr	r3, [r1]
 339:Library/src/lcm32f06x_cordic.c ****     {
 938              		.loc 1 339 26 view .LVU302
 939 0060 0120     		movs	r0, #1
 339:Library/src/lcm32f06x_cordic.c ****     {
 940              		.loc 1 339 11 view .LVU303
 941 0062 1C42     		tst	r4, r3
 942 0064 07D1     		bne	.L59
 943              	.L58:
 341:Library/src/lcm32f06x_cordic.c ****     };
 944              		.loc 1 341 9 is_stmt 1 view .LVU304
 945              		.syntax divided
 946              	@ 341 "Library/src/lcm32f06x_cordic.c" 1
 947 0066 C046     		nop
 948              	@ 0 "" 2
 341:Library/src/lcm32f06x_cordic.c ****     };
 949              		.loc 1 341 18 view .LVU305
 950              	@ 341 "Library/src/lcm32f06x_cordic.c" 1
 951 0068 C046     		nop
 952              	@ 0 "" 2
 341:Library/src/lcm32f06x_cordic.c ****     };
 953              		.loc 1 341 27 view .LVU306
 954              	@ 341 "Library/src/lcm32f06x_cordic.c" 1
 955 006a C046     		nop
 956              	@ 0 "" 2
 341:Library/src/lcm32f06x_cordic.c ****     };
 957              		.loc 1 341 36 view .LVU307
 958              	@ 341 "Library/src/lcm32f06x_cordic.c" 1
 959 006c C046     		nop
ARM GAS  /tmp/ccteMF1S.s 			page 43


 960              	@ 0 "" 2
 341:Library/src/lcm32f06x_cordic.c ****     };
 961              		.loc 1 341 45 view .LVU308
 962              	@ 341 "Library/src/lcm32f06x_cordic.c" 1
 963 006e C046     		nop
 964              	@ 0 "" 2
 339:Library/src/lcm32f06x_cordic.c ****     {
 965              		.loc 1 339 11 view .LVU309
 339:Library/src/lcm32f06x_cordic.c ****     {
 966              		.loc 1 339 19 is_stmt 0 view .LVU310
 967              		.thumb
 968              		.syntax unified
 969 0070 0B68     		ldr	r3, [r1]
 339:Library/src/lcm32f06x_cordic.c ****     {
 970              		.loc 1 339 11 view .LVU311
 971 0072 1842     		tst	r0, r3
 972 0074 F7D0     		beq	.L58
 973              	.L59:
 342:Library/src/lcm32f06x_cordic.c **** 
 974              		.loc 1 342 6 is_stmt 1 view .LVU312
 344:Library/src/lcm32f06x_cordic.c ****     temp = temp * CordicHyperbolicAn;
 975              		.loc 1 344 5 view .LVU313
 344:Library/src/lcm32f06x_cordic.c ****     temp = temp * CordicHyperbolicAn;
 976              		.loc 1 344 18 is_stmt 0 view .LVU314
 977 0076 064B     		ldr	r3, .L68
 978 0078 9B69     		ldr	r3, [r3, #24]
 344:Library/src/lcm32f06x_cordic.c ****     temp = temp * CordicHyperbolicAn;
 979              		.loc 1 344 10 view .LVU315
 980 007a DB0A     		lsrs	r3, r3, #11
 981              	.LVL54:
 345:Library/src/lcm32f06x_cordic.c ****     __enable_irq();
 982              		.loc 1 345 5 is_stmt 1 view .LVU316
 346:Library/src/lcm32f06x_cordic.c ****     return temp << i ;
 983              		.loc 1 346 5 view .LVU317
 984              	.LBB14:
 985              	.LBI14:
 949:Core/cmsis_gcc.h **** {
 986              		.loc 2 949 27 view .LVU318
 987              	.LBB15:
 951:Core/cmsis_gcc.h **** }
 988              		.loc 2 951 3 view .LVU319
 989              		.syntax divided
 990              	@ 951 "Core/cmsis_gcc.h" 1
 991 007c 62B6     		cpsie i
 992              	@ 0 "" 2
 993              		.thumb
 994              		.syntax unified
 995              	.LBE15:
 996              	.LBE14:
 997              		.loc 1 347 5 view .LVU320
 345:Library/src/lcm32f06x_cordic.c ****     __enable_irq();
 998              		.loc 1 345 10 is_stmt 0 view .LVU321
 999 007e 0648     		ldr	r0, .L68+8
 348:Library/src/lcm32f06x_cordic.c **** }
 1000              		.loc 1 348 1 view .LVU322
 1001              		@ sp needed
 345:Library/src/lcm32f06x_cordic.c ****     __enable_irq();
ARM GAS  /tmp/ccteMF1S.s 			page 44


 1002              		.loc 1 345 10 view .LVU323
 1003 0080 5843     		muls	r0, r3
 1004              	.LVL55:
 347:Library/src/lcm32f06x_cordic.c **** }
 1005              		.loc 1 347 17 view .LVU324
 1006 0082 9040     		lsls	r0, r0, r2
 1007              	.LVL56:
 1008              		.loc 1 348 1 view .LVU325
 1009 0084 30BD     		pop	{r4, r5, pc}
 1010              	.LVL57:
 1011              	.L67:
 347:Library/src/lcm32f06x_cordic.c **** }
 1012              		.loc 1 347 17 view .LVU326
 1013 0086 5A08     		lsrs	r2, r3, #1
 1014 0088 DAE7     		b	.L55
 1015              	.LVL58:
 1016              	.L60:
 321:Library/src/lcm32f06x_cordic.c ****     {
 1017              		.loc 1 321 33 view .LVU327
 1018 008a 0022     		movs	r2, #0
 1019 008c D8E7     		b	.L55
 1020              	.L69:
 1021 008e C046     		.align	2
 1022              	.L68:
 1023 0090 00000148 		.word	1208025088
 1024 0094 FFFFE0FF 		.word	-2031617
 1025 0098 D4040000 		.word	1236
 1026              		.cfi_endproc
 1027              	.LFE52:
 1029              		.section	.text.CORDIC_Sin,"ax",%progbits
 1030              		.align	1
 1031              		.p2align 2,,3
 1032              		.global	CORDIC_Sin
 1033              		.syntax unified
 1034              		.code	16
 1035              		.thumb_func
 1037              	CORDIC_Sin:
 1038              	.LVL59:
 1039              	.LFB53:
 349:Library/src/lcm32f06x_cordic.c **** 
 350:Library/src/lcm32f06x_cordic.c **** /**
 351:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Sin
 352:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the sine value of a given angle (in radians).
 353:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算给定角度（以弧度为单位）的正弦值。
 354:Library/src/lcm32f06x_cordic.c ****   * @param  InputValue: 
 355:Library/src/lcm32f06x_cordic.c ****   *         EN: input value.
 356:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值。
 357:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 358:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 359:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 360:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 361:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 362:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 363:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 364:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 365:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 366:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
ARM GAS  /tmp/ccteMF1S.s 			page 45


 367:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 368:Library/src/lcm32f06x_cordic.c ****   * @retval uint32_t:
 369:Library/src/lcm32f06x_cordic.c ****   *         EN: Return the sine value of a given angle (in radians). (input in IQ format).
 370:Library/src/lcm32f06x_cordic.c ****   *         CN: 返回给定角度（以弧度为单位）的正弦值。（输入IQ格式）。
 371:Library/src/lcm32f06x_cordic.c ****   */
 372:Library/src/lcm32f06x_cordic.c **** int32_t CORDIC_Sin(int32_t InputValue, uint8_t IQnIn, uint32_t Accuracy)
 373:Library/src/lcm32f06x_cordic.c **** {
 1040              		.loc 1 373 1 is_stmt 1 view -0
 1041              		.cfi_startproc
 1042              		@ args = 0, pretend = 0, frame = 0
 1043              		@ frame_needed = 0, uses_anonymous_args = 0
 374:Library/src/lcm32f06x_cordic.c ****     __disable_irq();
 1044              		.loc 1 374 5 view .LVU329
 1045              	.LBB16:
 1046              	.LBI16:
 960:Core/cmsis_gcc.h **** {
 1047              		.loc 2 960 27 view .LVU330
 1048              	.LBB17:
 1049              		.loc 2 962 3 view .LVU331
 1050              	.LBE17:
 1051              	.LBE16:
 373:Library/src/lcm32f06x_cordic.c ****     __disable_irq();
 1052              		.loc 1 373 1 is_stmt 0 view .LVU332
 1053 0000 1300     		movs	r3, r2
 1054 0002 10B5     		push	{r4, lr}
 1055              	.LCFI5:
 1056              		.cfi_def_cfa_offset 8
 1057              		.cfi_offset 4, -8
 1058              		.cfi_offset 14, -4
 1059              	.LBB19:
 1060              	.LBB18:
 1061              		.loc 2 962 3 view .LVU333
 1062              		.syntax divided
 1063              	@ 962 "Core/cmsis_gcc.h" 1
 1064 0004 72B6     		cpsid i
 1065              	@ 0 "" 2
 1066              		.thumb
 1067              		.syntax unified
 1068              	.LBE18:
 1069              	.LBE19:
 375:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00001000 | Accuracy;
 1070              		.loc 1 375 5 is_stmt 1 view .LVU334
 1071              		.loc 1 375 30 is_stmt 0 view .LVU335
 1072 0006 8022     		movs	r2, #128
 1073              	.LVL60:
 1074              		.loc 1 375 30 view .LVU336
 1075 0008 5201     		lsls	r2, r2, #5
 1076              		.loc 1 375 17 view .LVU337
 1077 000a 114C     		ldr	r4, .L76
 1078              		.loc 1 375 30 view .LVU338
 1079 000c 1A43     		orrs	r2, r3
 376:Library/src/lcm32f06x_cordic.c **** 
 377:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = 652032976; // 1/1.64676 * (1 << 30)
 1080              		.loc 1 377 16 view .LVU339
 1081 000e 114B     		ldr	r3, .L76+4
 1082              	.LVL61:
 375:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00001000 | Accuracy;
ARM GAS  /tmp/ccteMF1S.s 			page 46


 1083              		.loc 1 375 17 view .LVU340
 1084 0010 6260     		str	r2, [r4, #4]
 1085              		.loc 1 377 5 is_stmt 1 view .LVU341
 1086              		.loc 1 377 16 is_stmt 0 view .LVU342
 1087 0012 E360     		str	r3, [r4, #12]
 378:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 1088              		.loc 1 378 5 is_stmt 1 view .LVU343
 1089              		.loc 1 378 16 is_stmt 0 view .LVU344
 1090 0014 0023     		movs	r3, #0
 1091 0016 2361     		str	r3, [r4, #16]
 379:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1092              		.loc 1 379 5 is_stmt 1 view .LVU345
 1093              		.loc 1 379 36 is_stmt 0 view .LVU346
 1094 0018 1F33     		adds	r3, r3, #31
 1095 001a 5B1A     		subs	r3, r3, r1
 1096              		.loc 1 379 29 view .LVU347
 1097 001c 9840     		lsls	r0, r0, r3
 1098              	.LVL62:
 380:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 1099              		.loc 1 380 18 view .LVU348
 1100 001e 8023     		movs	r3, #128
 379:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1101              		.loc 1 379 16 view .LVU349
 1102 0020 6061     		str	r0, [r4, #20]
 1103              		.loc 1 380 5 is_stmt 1 view .LVU350
 1104              		.loc 1 380 11 is_stmt 0 view .LVU351
 1105 0022 2268     		ldr	r2, [r4]
 1106              		.loc 1 380 18 view .LVU352
 1107 0024 5B00     		lsls	r3, r3, #1
 1108 0026 1343     		orrs	r3, r2
 1109 0028 2360     		str	r3, [r4]
 381:Library/src/lcm32f06x_cordic.c **** 
 382:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1110              		.loc 1 382 5 is_stmt 1 view .LVU353
 1111              		.loc 1 382 11 view .LVU354
 1112              		.loc 1 382 19 is_stmt 0 view .LVU355
 1113 002a 2368     		ldr	r3, [r4]
 1114              		.loc 1 382 11 view .LVU356
 1115 002c DB07     		lsls	r3, r3, #31
 1116 002e 08D4     		bmi	.L71
 1117              		.loc 1 382 26 view .LVU357
 1118 0030 0122     		movs	r2, #1
 1119              	.L72:
 383:Library/src/lcm32f06x_cordic.c ****     {
 384:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 1120              		.loc 1 384 9 is_stmt 1 view .LVU358
 1121              		.syntax divided
 1122              	@ 384 "Library/src/lcm32f06x_cordic.c" 1
 1123 0032 C046     		nop
 1124              	@ 0 "" 2
 1125              		.loc 1 384 18 view .LVU359
 1126              	@ 384 "Library/src/lcm32f06x_cordic.c" 1
 1127 0034 C046     		nop
 1128              	@ 0 "" 2
 1129              		.loc 1 384 27 view .LVU360
 1130              	@ 384 "Library/src/lcm32f06x_cordic.c" 1
 1131 0036 C046     		nop
ARM GAS  /tmp/ccteMF1S.s 			page 47


 1132              	@ 0 "" 2
 1133              		.loc 1 384 36 view .LVU361
 1134              	@ 384 "Library/src/lcm32f06x_cordic.c" 1
 1135 0038 C046     		nop
 1136              	@ 0 "" 2
 1137              		.loc 1 384 45 view .LVU362
 1138              	@ 384 "Library/src/lcm32f06x_cordic.c" 1
 1139 003a C046     		nop
 1140              	@ 0 "" 2
 382:Library/src/lcm32f06x_cordic.c ****     {
 1141              		.loc 1 382 11 view .LVU363
 382:Library/src/lcm32f06x_cordic.c ****     {
 1142              		.loc 1 382 19 is_stmt 0 view .LVU364
 1143              		.thumb
 1144              		.syntax unified
 1145 003c 2368     		ldr	r3, [r4]
 382:Library/src/lcm32f06x_cordic.c ****     {
 1146              		.loc 1 382 11 view .LVU365
 1147 003e 1A42     		tst	r2, r3
 1148 0040 F7D0     		beq	.L72
 1149              	.L71:
 385:Library/src/lcm32f06x_cordic.c ****     };
 1150              		.loc 1 385 6 is_stmt 1 view .LVU366
 386:Library/src/lcm32f06x_cordic.c ****     __enable_irq();
 1151              		.loc 1 386 5 view .LVU367
 1152              	.LBB20:
 1153              	.LBI20:
 949:Core/cmsis_gcc.h **** {
 1154              		.loc 2 949 27 view .LVU368
 1155              	.LBB21:
 951:Core/cmsis_gcc.h **** }
 1156              		.loc 2 951 3 view .LVU369
 1157              		.syntax divided
 1158              	@ 951 "Core/cmsis_gcc.h" 1
 1159 0042 62B6     		cpsie i
 1160              	@ 0 "" 2
 1161              		.thumb
 1162              		.syntax unified
 1163              	.LBE21:
 1164              	.LBE20:
 387:Library/src/lcm32f06x_cordic.c ****     return ((int32_t)CORDIC->YO) >> (30 - IQnIn);
 1165              		.loc 1 387 5 view .LVU370
 388:Library/src/lcm32f06x_cordic.c **** }
 1166              		.loc 1 388 1 is_stmt 0 view .LVU371
 1167              		@ sp needed
 387:Library/src/lcm32f06x_cordic.c ****     return ((int32_t)CORDIC->YO) >> (30 - IQnIn);
 1168              		.loc 1 387 28 view .LVU372
 1169 0044 024B     		ldr	r3, .L76
 1170 0046 D869     		ldr	r0, [r3, #28]
 387:Library/src/lcm32f06x_cordic.c ****     return ((int32_t)CORDIC->YO) >> (30 - IQnIn);
 1171              		.loc 1 387 41 view .LVU373
 1172 0048 1E23     		movs	r3, #30
 1173 004a 591A     		subs	r1, r3, r1
 1174              	.LVL63:
 387:Library/src/lcm32f06x_cordic.c ****     return ((int32_t)CORDIC->YO) >> (30 - IQnIn);
 1175              		.loc 1 387 34 view .LVU374
 1176 004c 0841     		asrs	r0, r0, r1
ARM GAS  /tmp/ccteMF1S.s 			page 48


 1177              		.loc 1 388 1 view .LVU375
 1178 004e 10BD     		pop	{r4, pc}
 1179              	.L77:
 1180              		.align	2
 1181              	.L76:
 1182 0050 00000148 		.word	1208025088
 1183 0054 D03BDD26 		.word	652032976
 1184              		.cfi_endproc
 1185              	.LFE53:
 1187              		.section	.text.CORDIC_Cos,"ax",%progbits
 1188              		.align	1
 1189              		.p2align 2,,3
 1190              		.global	CORDIC_Cos
 1191              		.syntax unified
 1192              		.code	16
 1193              		.thumb_func
 1195              	CORDIC_Cos:
 1196              	.LVL64:
 1197              	.LFB54:
 389:Library/src/lcm32f06x_cordic.c **** 
 390:Library/src/lcm32f06x_cordic.c **** /**
 391:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Cos
 392:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the cosine value of a given angle (in radians).
 393:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算给定角度（以弧度为单位）的余弦值。
 394:Library/src/lcm32f06x_cordic.c ****   * @param  InputValue: 
 395:Library/src/lcm32f06x_cordic.c ****   *         EN: input value.
 396:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值。
 397:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 398:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 399:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 400:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 401:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 402:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 403:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 404:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 405:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 406:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
 407:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 408:Library/src/lcm32f06x_cordic.c ****   * @retval uint32_t:
 409:Library/src/lcm32f06x_cordic.c ****   *         EN: Return the cosine value of a given angle (in radians). (input in IQ format).
 410:Library/src/lcm32f06x_cordic.c ****   *         CN: 返回给定角度（以弧度为单位）的余弦值。（输入IQ格式）。
 411:Library/src/lcm32f06x_cordic.c ****   */
 412:Library/src/lcm32f06x_cordic.c **** int32_t CORDIC_Cos(int32_t InputValue, uint8_t IQnIn, uint32_t Accuracy)
 413:Library/src/lcm32f06x_cordic.c **** {
 1198              		.loc 1 413 1 is_stmt 1 view -0
 1199              		.cfi_startproc
 1200              		@ args = 0, pretend = 0, frame = 0
 1201              		@ frame_needed = 0, uses_anonymous_args = 0
 414:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00001000 | Accuracy;
 1202              		.loc 1 414 5 view .LVU377
 1203              		.loc 1 414 30 is_stmt 0 view .LVU378
 1204 0000 8023     		movs	r3, #128
 413:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00001000 | Accuracy;
 1205              		.loc 1 413 1 view .LVU379
 1206 0002 10B5     		push	{r4, lr}
 1207              	.LCFI6:
 1208              		.cfi_def_cfa_offset 8
ARM GAS  /tmp/ccteMF1S.s 			page 49


 1209              		.cfi_offset 4, -8
 1210              		.cfi_offset 14, -4
 1211              		.loc 1 414 30 view .LVU380
 1212 0004 5B01     		lsls	r3, r3, #5
 1213              		.loc 1 414 17 view .LVU381
 1214 0006 114C     		ldr	r4, .L84
 1215              		.loc 1 414 30 view .LVU382
 1216 0008 1343     		orrs	r3, r2
 1217              		.loc 1 414 17 view .LVU383
 1218 000a 6360     		str	r3, [r4, #4]
 415:Library/src/lcm32f06x_cordic.c **** 
 416:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = 652032976; // 1/1.64676 * (1 << 30)
 1219              		.loc 1 416 5 is_stmt 1 view .LVU384
 1220              		.loc 1 416 16 is_stmt 0 view .LVU385
 1221 000c 104B     		ldr	r3, .L84+4
 1222 000e E360     		str	r3, [r4, #12]
 417:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 1223              		.loc 1 417 5 is_stmt 1 view .LVU386
 1224              		.loc 1 417 16 is_stmt 0 view .LVU387
 1225 0010 0023     		movs	r3, #0
 1226 0012 2361     		str	r3, [r4, #16]
 418:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1227              		.loc 1 418 5 is_stmt 1 view .LVU388
 1228              		.loc 1 418 36 is_stmt 0 view .LVU389
 1229 0014 1F33     		adds	r3, r3, #31
 1230 0016 5B1A     		subs	r3, r3, r1
 1231              		.loc 1 418 29 view .LVU390
 1232 0018 9840     		lsls	r0, r0, r3
 1233              	.LVL65:
 419:Library/src/lcm32f06x_cordic.c ****   
 420:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 1234              		.loc 1 420 18 view .LVU391
 1235 001a 8023     		movs	r3, #128
 418:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1236              		.loc 1 418 16 view .LVU392
 1237 001c 6061     		str	r0, [r4, #20]
 1238              		.loc 1 420 5 is_stmt 1 view .LVU393
 1239              		.loc 1 420 11 is_stmt 0 view .LVU394
 1240 001e 2268     		ldr	r2, [r4]
 1241              	.LVL66:
 1242              		.loc 1 420 18 view .LVU395
 1243 0020 5B00     		lsls	r3, r3, #1
 1244 0022 1343     		orrs	r3, r2
 1245 0024 2360     		str	r3, [r4]
 421:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1246              		.loc 1 421 5 is_stmt 1 view .LVU396
 1247              		.loc 1 421 11 view .LVU397
 1248              		.loc 1 421 19 is_stmt 0 view .LVU398
 1249 0026 2368     		ldr	r3, [r4]
 1250              		.loc 1 421 11 view .LVU399
 1251 0028 DB07     		lsls	r3, r3, #31
 1252 002a 08D4     		bmi	.L79
 1253              		.loc 1 421 26 view .LVU400
 1254 002c 0122     		movs	r2, #1
 1255              	.L80:
 422:Library/src/lcm32f06x_cordic.c ****     {
 423:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
ARM GAS  /tmp/ccteMF1S.s 			page 50


 1256              		.loc 1 423 9 is_stmt 1 view .LVU401
 1257              		.syntax divided
 1258              	@ 423 "Library/src/lcm32f06x_cordic.c" 1
 1259 002e C046     		nop
 1260              	@ 0 "" 2
 1261              		.loc 1 423 18 view .LVU402
 1262              	@ 423 "Library/src/lcm32f06x_cordic.c" 1
 1263 0030 C046     		nop
 1264              	@ 0 "" 2
 1265              		.loc 1 423 27 view .LVU403
 1266              	@ 423 "Library/src/lcm32f06x_cordic.c" 1
 1267 0032 C046     		nop
 1268              	@ 0 "" 2
 1269              		.loc 1 423 36 view .LVU404
 1270              	@ 423 "Library/src/lcm32f06x_cordic.c" 1
 1271 0034 C046     		nop
 1272              	@ 0 "" 2
 1273              		.loc 1 423 45 view .LVU405
 1274              	@ 423 "Library/src/lcm32f06x_cordic.c" 1
 1275 0036 C046     		nop
 1276              	@ 0 "" 2
 421:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1277              		.loc 1 421 11 view .LVU406
 421:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1278              		.loc 1 421 19 is_stmt 0 view .LVU407
 1279              		.thumb
 1280              		.syntax unified
 1281 0038 2368     		ldr	r3, [r4]
 421:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1282              		.loc 1 421 11 view .LVU408
 1283 003a 1A42     		tst	r2, r3
 1284 003c F7D0     		beq	.L80
 1285              	.L79:
 424:Library/src/lcm32f06x_cordic.c ****     };
 1286              		.loc 1 424 6 is_stmt 1 view .LVU409
 425:Library/src/lcm32f06x_cordic.c **** 
 426:Library/src/lcm32f06x_cordic.c ****     return ((int32_t)CORDIC->XO) >> (30 - IQnIn);
 1287              		.loc 1 426 5 view .LVU410
 427:Library/src/lcm32f06x_cordic.c **** }
 1288              		.loc 1 427 1 is_stmt 0 view .LVU411
 1289              		@ sp needed
 426:Library/src/lcm32f06x_cordic.c **** }
 1290              		.loc 1 426 28 view .LVU412
 1291 003e 034B     		ldr	r3, .L84
 1292 0040 9869     		ldr	r0, [r3, #24]
 426:Library/src/lcm32f06x_cordic.c **** }
 1293              		.loc 1 426 41 view .LVU413
 1294 0042 1E23     		movs	r3, #30
 1295 0044 5B1A     		subs	r3, r3, r1
 426:Library/src/lcm32f06x_cordic.c **** }
 1296              		.loc 1 426 34 view .LVU414
 1297 0046 1841     		asrs	r0, r0, r3
 1298              		.loc 1 427 1 view .LVU415
 1299 0048 10BD     		pop	{r4, pc}
 1300              	.L85:
 1301 004a C046     		.align	2
 1302              	.L84:
ARM GAS  /tmp/ccteMF1S.s 			page 51


 1303 004c 00000148 		.word	1208025088
 1304 0050 D03BDD26 		.word	652032976
 1305              		.cfi_endproc
 1306              	.LFE54:
 1308              		.section	.text.CORDIC_SinCos,"ax",%progbits
 1309              		.align	1
 1310              		.p2align 2,,3
 1311              		.global	CORDIC_SinCos
 1312              		.syntax unified
 1313              		.code	16
 1314              		.thumb_func
 1316              	CORDIC_SinCos:
 1317              	.LVL67:
 1318              	.LFB55:
 428:Library/src/lcm32f06x_cordic.c **** 
 429:Library/src/lcm32f06x_cordic.c **** /**
 430:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_SinCos
 431:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the sine and cosine value of a given angle (in radians).
 432:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算给定角度（以弧度为单位）的正弦和余弦值。
 433:Library/src/lcm32f06x_cordic.c ****   * @param  InputValue: 
 434:Library/src/lcm32f06x_cordic.c ****   *         EN: input value.
 435:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值。
 436:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 437:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 438:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 439:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 440:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 441:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 442:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 443:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 444:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 445:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
 446:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 447:Library/src/lcm32f06x_cordic.c ****   * @param  pSin: 
 448:Library/src/lcm32f06x_cordic.c ****   *         EN: The sine value of a given angle (in radians). (Input IQ format).
 449:Library/src/lcm32f06x_cordic.c ****   *         CN: 给定角度（以弧度为单位）的正弦值。（输入IQ格式）。
 450:Library/src/lcm32f06x_cordic.c ****   * @param  pCos: 
 451:Library/src/lcm32f06x_cordic.c ****   *         EN: The cosine value of a given angle (in radians). (Input IQ format).
 452:Library/src/lcm32f06x_cordic.c ****   *         CN: 给定角度（以弧度为单位）的余弦值。（输入IQ格式）。
 453:Library/src/lcm32f06x_cordic.c ****   * @retval None
 454:Library/src/lcm32f06x_cordic.c ****   */
 455:Library/src/lcm32f06x_cordic.c **** void CORDIC_SinCos(int32_t InputValue, uint8_t IQnIn, uint32_t Accuracy, int32_t* pSin, int32_t* pC
 456:Library/src/lcm32f06x_cordic.c **** {
 1319              		.loc 1 456 1 is_stmt 1 view -0
 1320              		.cfi_startproc
 1321              		@ args = 4, pretend = 0, frame = 0
 1322              		@ frame_needed = 0, uses_anonymous_args = 0
 457:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00001000 | Accuracy;
 1323              		.loc 1 457 5 view .LVU417
 456:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00001000 | Accuracy;
 1324              		.loc 1 456 1 is_stmt 0 view .LVU418
 1325 0000 10B5     		push	{r4, lr}
 1326              	.LCFI7:
 1327              		.cfi_def_cfa_offset 8
 1328              		.cfi_offset 4, -8
 1329              		.cfi_offset 14, -4
 1330              		.loc 1 457 30 view .LVU419
ARM GAS  /tmp/ccteMF1S.s 			page 52


 1331 0002 8024     		movs	r4, #128
 1332 0004 6401     		lsls	r4, r4, #5
 1333 0006 2243     		orrs	r2, r4
 1334              	.LVL68:
 1335              		.loc 1 457 17 view .LVU420
 1336 0008 124C     		ldr	r4, .L92
 1337 000a 6260     		str	r2, [r4, #4]
 458:Library/src/lcm32f06x_cordic.c **** 
 459:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = 652032976; // 1/1.64676 * (1 << 30)
 1338              		.loc 1 459 5 is_stmt 1 view .LVU421
 1339              		.loc 1 459 16 is_stmt 0 view .LVU422
 1340 000c 124A     		ldr	r2, .L92+4
 1341 000e E260     		str	r2, [r4, #12]
 460:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 1342              		.loc 1 460 5 is_stmt 1 view .LVU423
 1343              		.loc 1 460 16 is_stmt 0 view .LVU424
 1344 0010 0022     		movs	r2, #0
 1345 0012 2261     		str	r2, [r4, #16]
 461:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1346              		.loc 1 461 5 is_stmt 1 view .LVU425
 1347              		.loc 1 461 36 is_stmt 0 view .LVU426
 1348 0014 1F32     		adds	r2, r2, #31
 1349 0016 521A     		subs	r2, r2, r1
 1350              		.loc 1 461 29 view .LVU427
 1351 0018 9040     		lsls	r0, r0, r2
 1352              	.LVL69:
 462:Library/src/lcm32f06x_cordic.c ****   
 463:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 1353              		.loc 1 463 18 view .LVU428
 1354 001a 8022     		movs	r2, #128
 461:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1355              		.loc 1 461 16 view .LVU429
 1356 001c 6061     		str	r0, [r4, #20]
 1357              		.loc 1 463 5 is_stmt 1 view .LVU430
 1358              		.loc 1 463 11 is_stmt 0 view .LVU431
 1359 001e 2068     		ldr	r0, [r4]
 1360              		.loc 1 463 18 view .LVU432
 1361 0020 5200     		lsls	r2, r2, #1
 1362 0022 0243     		orrs	r2, r0
 1363 0024 2260     		str	r2, [r4]
 464:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1364              		.loc 1 464 5 is_stmt 1 view .LVU433
 1365              		.loc 1 464 11 view .LVU434
 1366              		.loc 1 464 19 is_stmt 0 view .LVU435
 1367 0026 2268     		ldr	r2, [r4]
 1368              		.loc 1 464 11 view .LVU436
 1369 0028 D207     		lsls	r2, r2, #31
 1370 002a 08D4     		bmi	.L87
 1371              		.loc 1 464 26 view .LVU437
 1372 002c 0120     		movs	r0, #1
 1373              	.L88:
 465:Library/src/lcm32f06x_cordic.c ****     {
 466:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 1374              		.loc 1 466 9 is_stmt 1 view .LVU438
 1375              		.syntax divided
 1376              	@ 466 "Library/src/lcm32f06x_cordic.c" 1
 1377 002e C046     		nop
ARM GAS  /tmp/ccteMF1S.s 			page 53


 1378              	@ 0 "" 2
 1379              		.loc 1 466 18 view .LVU439
 1380              	@ 466 "Library/src/lcm32f06x_cordic.c" 1
 1381 0030 C046     		nop
 1382              	@ 0 "" 2
 1383              		.loc 1 466 27 view .LVU440
 1384              	@ 466 "Library/src/lcm32f06x_cordic.c" 1
 1385 0032 C046     		nop
 1386              	@ 0 "" 2
 1387              		.loc 1 466 36 view .LVU441
 1388              	@ 466 "Library/src/lcm32f06x_cordic.c" 1
 1389 0034 C046     		nop
 1390              	@ 0 "" 2
 1391              		.loc 1 466 45 view .LVU442
 1392              	@ 466 "Library/src/lcm32f06x_cordic.c" 1
 1393 0036 C046     		nop
 1394              	@ 0 "" 2
 464:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1395              		.loc 1 464 11 view .LVU443
 464:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1396              		.loc 1 464 19 is_stmt 0 view .LVU444
 1397              		.thumb
 1398              		.syntax unified
 1399 0038 2268     		ldr	r2, [r4]
 464:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1400              		.loc 1 464 11 view .LVU445
 1401 003a 1042     		tst	r0, r2
 1402 003c F7D0     		beq	.L88
 1403              	.L87:
 467:Library/src/lcm32f06x_cordic.c ****     };
 1404              		.loc 1 467 6 is_stmt 1 view .LVU446
 468:Library/src/lcm32f06x_cordic.c **** 
 469:Library/src/lcm32f06x_cordic.c ****     *pCos = (int32_t)CORDIC->XO >> (30 - IQnIn);
 1405              		.loc 1 469 5 view .LVU447
 470:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 471:Library/src/lcm32f06x_cordic.c **** }
 1406              		.loc 1 471 1 is_stmt 0 view .LVU448
 1407              		@ sp needed
 469:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1408              		.loc 1 469 40 view .LVU449
 1409 003e 1E22     		movs	r2, #30
 469:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1410              		.loc 1 469 28 view .LVU450
 1411 0040 044C     		ldr	r4, .L92
 469:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1412              		.loc 1 469 40 view .LVU451
 1413 0042 511A     		subs	r1, r2, r1
 1414              	.LVL70:
 469:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1415              		.loc 1 469 28 view .LVU452
 1416 0044 A069     		ldr	r0, [r4, #24]
 469:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1417              		.loc 1 469 11 view .LVU453
 1418 0046 029A     		ldr	r2, [sp, #8]
 469:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1419              		.loc 1 469 33 view .LVU454
 1420 0048 0841     		asrs	r0, r0, r1
ARM GAS  /tmp/ccteMF1S.s 			page 54


 469:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1421              		.loc 1 469 11 view .LVU455
 1422 004a 1060     		str	r0, [r2]
 470:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1423              		.loc 1 470 5 is_stmt 1 view .LVU456
 470:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1424              		.loc 1 470 28 is_stmt 0 view .LVU457
 1425 004c E269     		ldr	r2, [r4, #28]
 470:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1426              		.loc 1 470 33 view .LVU458
 1427 004e 0A41     		asrs	r2, r2, r1
 470:Library/src/lcm32f06x_cordic.c ****     *pSin = (int32_t)CORDIC->YO >> (30 - IQnIn);
 1428              		.loc 1 470 11 view .LVU459
 1429 0050 1A60     		str	r2, [r3]
 1430              		.loc 1 471 1 view .LVU460
 1431 0052 10BD     		pop	{r4, pc}
 1432              	.L93:
 1433              		.align	2
 1434              	.L92:
 1435 0054 00000148 		.word	1208025088
 1436 0058 D03BDD26 		.word	652032976
 1437              		.cfi_endproc
 1438              	.LFE55:
 1440              		.section	.text.CORDIC_Tan,"ax",%progbits
 1441              		.align	1
 1442              		.p2align 2,,3
 1443              		.global	CORDIC_Tan
 1444              		.syntax unified
 1445              		.code	16
 1446              		.thumb_func
 1448              	CORDIC_Tan:
 1449              	.LVL71:
 1450              	.LFB56:
 472:Library/src/lcm32f06x_cordic.c **** /**
 473:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Tan
 474:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the tangent value of a given angle (in radians).
 475:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算给定角度（以弧度为单位）的正切值。
 476:Library/src/lcm32f06x_cordic.c ****   * @param  InputValue: 
 477:Library/src/lcm32f06x_cordic.c ****   *         EN: input value.
 478:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值。
 479:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 480:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value (IQ6 - IQ26).
 481:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式 （IQ6 - IQ26）。
 482:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 483:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 484:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 485:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 486:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 487:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 488:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
 489:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 490:Library/src/lcm32f06x_cordic.c ****   * @retval uint32_t:
 491:Library/src/lcm32f06x_cordic.c ****   *         EN: Return the tangent value of a given angle (in radians). (input in IQ format).
 492:Library/src/lcm32f06x_cordic.c ****   *         CN: 返回给定角度（以弧度为单位）的正切值。
 493:Library/src/lcm32f06x_cordic.c ****   */
 494:Library/src/lcm32f06x_cordic.c **** int32_t CORDIC_Tan(int32_t InputValue, uint8_t IQnIn, uint32_t Accuracy)
 495:Library/src/lcm32f06x_cordic.c **** {
ARM GAS  /tmp/ccteMF1S.s 			page 55


 1451              		.loc 1 495 1 is_stmt 1 view -0
 1452              		.cfi_startproc
 1453              		@ args = 0, pretend = 0, frame = 0
 1454              		@ frame_needed = 0, uses_anonymous_args = 0
 496:Library/src/lcm32f06x_cordic.c ****     int32_t sinx,cosx = 0;
 1455              		.loc 1 496 5 view .LVU462
 497:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00001000 | Accuracy;
 1456              		.loc 1 497 5 view .LVU463
 1457              		.loc 1 497 30 is_stmt 0 view .LVU464
 1458 0000 8023     		movs	r3, #128
 495:Library/src/lcm32f06x_cordic.c ****     int32_t sinx,cosx = 0;
 1459              		.loc 1 495 1 view .LVU465
 1460 0002 30B5     		push	{r4, r5, lr}
 1461              	.LCFI8:
 1462              		.cfi_def_cfa_offset 12
 1463              		.cfi_offset 4, -12
 1464              		.cfi_offset 5, -8
 1465              		.cfi_offset 14, -4
 1466              		.loc 1 497 30 view .LVU466
 1467 0004 5B01     		lsls	r3, r3, #5
 1468              		.loc 1 497 17 view .LVU467
 1469 0006 1D4C     		ldr	r4, .L106
 1470              		.loc 1 497 30 view .LVU468
 1471 0008 1343     		orrs	r3, r2
 1472              		.loc 1 497 17 view .LVU469
 1473 000a 6360     		str	r3, [r4, #4]
 498:Library/src/lcm32f06x_cordic.c **** 
 499:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = 652032976; // 1/1.64676 * (1 << 30)
 1474              		.loc 1 499 5 is_stmt 1 view .LVU470
 1475              		.loc 1 499 16 is_stmt 0 view .LVU471
 1476 000c 1C4B     		ldr	r3, .L106+4
 1477 000e E360     		str	r3, [r4, #12]
 500:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 1478              		.loc 1 500 5 is_stmt 1 view .LVU472
 1479              		.loc 1 500 16 is_stmt 0 view .LVU473
 1480 0010 0023     		movs	r3, #0
 1481 0012 2361     		str	r3, [r4, #16]
 501:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1482              		.loc 1 501 5 is_stmt 1 view .LVU474
 1483              		.loc 1 501 36 is_stmt 0 view .LVU475
 1484 0014 1F33     		adds	r3, r3, #31
 1485 0016 5B1A     		subs	r3, r3, r1
 1486              		.loc 1 501 29 view .LVU476
 1487 0018 9840     		lsls	r0, r0, r3
 1488              	.LVL72:
 502:Library/src/lcm32f06x_cordic.c ****   
 503:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 1489              		.loc 1 503 18 view .LVU477
 1490 001a 8023     		movs	r3, #128
 501:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1491              		.loc 1 501 16 view .LVU478
 1492 001c 6061     		str	r0, [r4, #20]
 1493              		.loc 1 503 5 is_stmt 1 view .LVU479
 1494              		.loc 1 503 11 is_stmt 0 view .LVU480
 1495 001e 2268     		ldr	r2, [r4]
 1496              	.LVL73:
 1497              		.loc 1 503 18 view .LVU481
ARM GAS  /tmp/ccteMF1S.s 			page 56


 1498 0020 5B00     		lsls	r3, r3, #1
 1499 0022 1343     		orrs	r3, r2
 1500 0024 2360     		str	r3, [r4]
 504:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1501              		.loc 1 504 5 is_stmt 1 view .LVU482
 1502              		.loc 1 504 11 view .LVU483
 1503              		.loc 1 504 19 is_stmt 0 view .LVU484
 1504 0026 2368     		ldr	r3, [r4]
 1505              		.loc 1 504 11 view .LVU485
 1506 0028 DB07     		lsls	r3, r3, #31
 1507 002a 08D4     		bmi	.L95
 1508              		.loc 1 504 26 view .LVU486
 1509 002c 0122     		movs	r2, #1
 1510              	.L96:
 505:Library/src/lcm32f06x_cordic.c ****     {
 506:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 1511              		.loc 1 506 9 is_stmt 1 view .LVU487
 1512              		.syntax divided
 1513              	@ 506 "Library/src/lcm32f06x_cordic.c" 1
 1514 002e C046     		nop
 1515              	@ 0 "" 2
 1516              		.loc 1 506 18 view .LVU488
 1517              	@ 506 "Library/src/lcm32f06x_cordic.c" 1
 1518 0030 C046     		nop
 1519              	@ 0 "" 2
 1520              		.loc 1 506 27 view .LVU489
 1521              	@ 506 "Library/src/lcm32f06x_cordic.c" 1
 1522 0032 C046     		nop
 1523              	@ 0 "" 2
 1524              		.loc 1 506 36 view .LVU490
 1525              	@ 506 "Library/src/lcm32f06x_cordic.c" 1
 1526 0034 C046     		nop
 1527              	@ 0 "" 2
 1528              		.loc 1 506 45 view .LVU491
 1529              	@ 506 "Library/src/lcm32f06x_cordic.c" 1
 1530 0036 C046     		nop
 1531              	@ 0 "" 2
 504:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1532              		.loc 1 504 11 view .LVU492
 504:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1533              		.loc 1 504 19 is_stmt 0 view .LVU493
 1534              		.thumb
 1535              		.syntax unified
 1536 0038 2368     		ldr	r3, [r4]
 504:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1537              		.loc 1 504 11 view .LVU494
 1538 003a 1A42     		tst	r2, r3
 1539 003c F7D0     		beq	.L96
 1540              	.L95:
 507:Library/src/lcm32f06x_cordic.c ****     };
 1541              		.loc 1 507 6 is_stmt 1 view .LVU495
 508:Library/src/lcm32f06x_cordic.c ****     cosx = ((int32_t)CORDIC->XO) >> 6;
 1542              		.loc 1 508 5 view .LVU496
 1543              		.loc 1 508 28 is_stmt 0 view .LVU497
 1544 003e 0F4A     		ldr	r2, .L106
 509:Library/src/lcm32f06x_cordic.c ****     sinx = ((int32_t)CORDIC->YO) ;
 510:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_CTRL_b.DIV16 = 0; //被除数32位
ARM GAS  /tmp/ccteMF1S.s 			page 57


 1545              		.loc 1 510 28 view .LVU498
 1546 0040 104D     		ldr	r5, .L106+8
 508:Library/src/lcm32f06x_cordic.c ****     cosx = ((int32_t)CORDIC->XO) >> 6;
 1547              		.loc 1 508 28 view .LVU499
 1548 0042 9369     		ldr	r3, [r2, #24]
 1549              	.LVL74:
 509:Library/src/lcm32f06x_cordic.c ****     sinx = ((int32_t)CORDIC->YO) ;
 1550              		.loc 1 509 5 is_stmt 1 view .LVU500
 509:Library/src/lcm32f06x_cordic.c ****     sinx = ((int32_t)CORDIC->YO) ;
 1551              		.loc 1 509 28 is_stmt 0 view .LVU501
 1552 0044 D469     		ldr	r4, [r2, #28]
 1553              	.LVL75:
 1554              		.loc 1 510 5 is_stmt 1 view .LVU502
 1555              		.loc 1 510 28 is_stmt 0 view .LVU503
 1556 0046 104A     		ldr	r2, .L106+12
 508:Library/src/lcm32f06x_cordic.c ****     cosx = ((int32_t)CORDIC->XO) >> 6;
 1557              		.loc 1 508 10 view .LVU504
 1558 0048 9B11     		asrs	r3, r3, #6
 1559              	.LVL76:
 1560              		.loc 1 510 28 view .LVU505
 1561 004a 1068     		ldr	r0, [r2]
 1562 004c 2840     		ands	r0, r5
 1563 004e 1060     		str	r0, [r2]
 511:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_ALO = sinx;
 1564              		.loc 1 511 5 is_stmt 1 view .LVU506
 1565              		.loc 1 511 19 is_stmt 0 view .LVU507
 1566 0050 5460     		str	r4, [r2, #4]
 512:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_B = cosx;
 1567              		.loc 1 512 5 is_stmt 1 view .LVU508
 1568              		.loc 1 512 17 is_stmt 0 view .LVU509
 1569 0052 D360     		str	r3, [r2, #12]
 513:Library/src/lcm32f06x_cordic.c ****     while (DIV0->DIV_CTRL_b.DIV_IN_PROCCEED == RESET)
 1570              		.loc 1 513 5 is_stmt 1 view .LVU510
 1571              		.loc 1 513 45 view .LVU511
 1572              		.loc 1 513 28 is_stmt 0 view .LVU512
 1573 0054 1368     		ldr	r3, [r2]
 1574              	.LVL77:
 1575              		.loc 1 513 45 view .LVU513
 1576 0056 9B07     		lsls	r3, r3, #30
 1577 0058 07D4     		bmi	.L97
 1578              	.L98:
 514:Library/src/lcm32f06x_cordic.c ****     {
 515:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP();  __NOP(); __NOP();
 1579              		.loc 1 515 9 is_stmt 1 view .LVU514
 1580              		.syntax divided
 1581              	@ 515 "Library/src/lcm32f06x_cordic.c" 1
 1582 005a C046     		nop
 1583              	@ 0 "" 2
 1584              		.loc 1 515 18 view .LVU515
 1585              	@ 515 "Library/src/lcm32f06x_cordic.c" 1
 1586 005c C046     		nop
 1587              	@ 0 "" 2
 1588              		.loc 1 515 27 view .LVU516
 1589              	@ 515 "Library/src/lcm32f06x_cordic.c" 1
 1590 005e C046     		nop
 1591              	@ 0 "" 2
 1592              		.loc 1 515 37 view .LVU517
ARM GAS  /tmp/ccteMF1S.s 			page 58


 1593              	@ 515 "Library/src/lcm32f06x_cordic.c" 1
 1594 0060 C046     		nop
 1595              	@ 0 "" 2
 1596              		.loc 1 515 46 view .LVU518
 1597              	@ 515 "Library/src/lcm32f06x_cordic.c" 1
 1598 0062 C046     		nop
 1599              	@ 0 "" 2
 513:Library/src/lcm32f06x_cordic.c ****     while (DIV0->DIV_CTRL_b.DIV_IN_PROCCEED == RESET)
 1600              		.loc 1 513 45 view .LVU519
 513:Library/src/lcm32f06x_cordic.c ****     while (DIV0->DIV_CTRL_b.DIV_IN_PROCCEED == RESET)
 1601              		.loc 1 513 28 is_stmt 0 view .LVU520
 1602              		.thumb
 1603              		.syntax unified
 1604 0064 1368     		ldr	r3, [r2]
 513:Library/src/lcm32f06x_cordic.c ****     while (DIV0->DIV_CTRL_b.DIV_IN_PROCCEED == RESET)
 1605              		.loc 1 513 45 view .LVU521
 1606 0066 9B07     		lsls	r3, r3, #30
 1607 0068 F7D5     		bpl	.L98
 1608              	.L97:
 516:Library/src/lcm32f06x_cordic.c ****     };
 1609              		.loc 1 516 6 is_stmt 1 view .LVU522
 517:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_CTRL_b.DIV_IN_PROCCEED = SET; //写1清0
 1610              		.loc 1 517 5 view .LVU523
 518:Library/src/lcm32f06x_cordic.c **** 
 519:Library/src/lcm32f06x_cordic.c ****     return ((int32_t)DIV0->DIV_QUOT) << (IQnIn - 6);
 520:Library/src/lcm32f06x_cordic.c **** }
 1611              		.loc 1 520 1 is_stmt 0 view .LVU524
 1612              		@ sp needed
 517:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_CTRL_b.DIV_IN_PROCCEED = SET; //写1清0
 1613              		.loc 1 517 38 view .LVU525
 1614 006a 0220     		movs	r0, #2
 1615 006c 064B     		ldr	r3, .L106+12
 519:Library/src/lcm32f06x_cordic.c **** }
 1616              		.loc 1 519 48 view .LVU526
 1617 006e 0639     		subs	r1, r1, #6
 1618              	.LVL78:
 517:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_CTRL_b.DIV_IN_PROCCEED = SET; //写1清0
 1619              		.loc 1 517 38 view .LVU527
 1620 0070 1A68     		ldr	r2, [r3]
 1621              	.LVL79:
 517:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_CTRL_b.DIV_IN_PROCCEED = SET; //写1清0
 1622              		.loc 1 517 38 view .LVU528
 1623 0072 0243     		orrs	r2, r0
 1624 0074 1A60     		str	r2, [r3]
 1625              	.LVL80:
 519:Library/src/lcm32f06x_cordic.c **** }
 1626              		.loc 1 519 5 is_stmt 1 view .LVU529
 519:Library/src/lcm32f06x_cordic.c **** }
 1627              		.loc 1 519 26 is_stmt 0 view .LVU530
 1628 0076 1869     		ldr	r0, [r3, #16]
 519:Library/src/lcm32f06x_cordic.c **** }
 1629              		.loc 1 519 38 view .LVU531
 1630 0078 8840     		lsls	r0, r0, r1
 1631              	.LVL81:
 1632              		.loc 1 520 1 view .LVU532
 1633 007a 30BD     		pop	{r4, r5, pc}
 1634              	.L107:
ARM GAS  /tmp/ccteMF1S.s 			page 59


 1635              		.align	2
 1636              	.L106:
 1637 007c 00000148 		.word	1208025088
 1638 0080 D03BDD26 		.word	652032976
 1639 0084 FFFEFFFF 		.word	-257
 1640 0088 00500148 		.word	1208045568
 1641              		.cfi_endproc
 1642              	.LFE56:
 1644              		.section	.text.CORDIC_Sinh,"ax",%progbits
 1645              		.align	1
 1646              		.p2align 2,,3
 1647              		.global	CORDIC_Sinh
 1648              		.syntax unified
 1649              		.code	16
 1650              		.thumb_func
 1652              	CORDIC_Sinh:
 1653              	.LVL82:
 1654              	.LFB57:
 521:Library/src/lcm32f06x_cordic.c **** 
 522:Library/src/lcm32f06x_cordic.c **** /**
 523:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Sinh
 524:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the hyperbolic sine value of input data.
 525:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算输入数据的双曲正弦值。
 526:Library/src/lcm32f06x_cordic.c ****   * @param  InputValue: 
 527:Library/src/lcm32f06x_cordic.c ****   *         EN: input value.(The original value is limited to -1.1-1.1)
 528:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值。（原值限制在-1.1 - 1.1）
 529:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 530:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 531:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 532:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 533:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 534:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 535:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 536:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 537:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 538:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
 539:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 540:Library/src/lcm32f06x_cordic.c ****   * @retval uint32_t:
 541:Library/src/lcm32f06x_cordic.c ****   *         EN: Return the the hyperbolic sine value of input data. (input in IQ format).
 542:Library/src/lcm32f06x_cordic.c ****   *         CN: 返回输入数据的双曲正弦值。（输入IQ格式）。
 543:Library/src/lcm32f06x_cordic.c ****   */
 544:Library/src/lcm32f06x_cordic.c **** int32_t CORDIC_Sinh(int32_t InputValue, uint8_t IQnIn, uint32_t Accuracy)
 545:Library/src/lcm32f06x_cordic.c **** {
 1655              		.loc 1 545 1 is_stmt 1 view -0
 1656              		.cfi_startproc
 1657              		@ args = 0, pretend = 0, frame = 0
 1658              		@ frame_needed = 0, uses_anonymous_args = 0
 546:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00003000 | Accuracy;
 1659              		.loc 1 546 5 view .LVU534
 1660              		.loc 1 546 30 is_stmt 0 view .LVU535
 1661 0000 C023     		movs	r3, #192
 1662 0002 9B01     		lsls	r3, r3, #6
 1663 0004 1A43     		orrs	r2, r3
 1664              	.LVL83:
 1665              		.loc 1 546 17 view .LVU536
 1666 0006 1D4B     		ldr	r3, .L125
 545:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00003000 | Accuracy;
ARM GAS  /tmp/ccteMF1S.s 			page 60


 1667              		.loc 1 545 1 view .LVU537
 1668 0008 10B5     		push	{r4, lr}
 1669              	.LCFI9:
 1670              		.cfi_def_cfa_offset 8
 1671              		.cfi_offset 4, -8
 1672              		.cfi_offset 14, -4
 1673              		.loc 1 546 17 view .LVU538
 1674 000a 5A60     		str	r2, [r3, #4]
 547:Library/src/lcm32f06x_cordic.c ****     if(IQnIn < 23)
 1675              		.loc 1 547 5 is_stmt 1 view .LVU539
 548:Library/src/lcm32f06x_cordic.c ****     {
 549:Library/src/lcm32f06x_cordic.c ****         CORDIC->XI = 10129223;
 550:Library/src/lcm32f06x_cordic.c ****     }
 551:Library/src/lcm32f06x_cordic.c ****     else
 552:Library/src/lcm32f06x_cordic.c ****     {
 553:Library/src/lcm32f06x_cordic.c ****         CORDIC->XI = 10129223 << (IQnIn - 23); // 1/0.82815936 * (1 << 23)
 554:Library/src/lcm32f06x_cordic.c ****     }
 555:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 556:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1676              		.loc 1 556 36 is_stmt 0 view .LVU540
 1677 000c 1F22     		movs	r2, #31
 1678 000e 521A     		subs	r2, r2, r1
 1679              		.loc 1 556 29 view .LVU541
 1680 0010 9040     		lsls	r0, r0, r2
 1681              	.LVL84:
 547:Library/src/lcm32f06x_cordic.c ****     if(IQnIn < 23)
 1682              		.loc 1 547 7 view .LVU542
 1683 0012 1629     		cmp	r1, #22
 1684 0014 21D8     		bhi	.L109
 549:Library/src/lcm32f06x_cordic.c ****     }
 1685              		.loc 1 549 9 is_stmt 1 view .LVU543
 549:Library/src/lcm32f06x_cordic.c ****     }
 1686              		.loc 1 549 20 is_stmt 0 view .LVU544
 1687 0016 1A4A     		ldr	r2, .L125+4
 1688 0018 DA60     		str	r2, [r3, #12]
 555:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1689              		.loc 1 555 5 is_stmt 1 view .LVU545
 555:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1690              		.loc 1 555 16 is_stmt 0 view .LVU546
 1691 001a 0022     		movs	r2, #0
 1692 001c 1A61     		str	r2, [r3, #16]
 1693              		.loc 1 556 5 is_stmt 1 view .LVU547
 1694              		.loc 1 556 16 is_stmt 0 view .LVU548
 1695 001e 5861     		str	r0, [r3, #20]
 557:Library/src/lcm32f06x_cordic.c ****   
 558:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 1696              		.loc 1 558 5 is_stmt 1 view .LVU549
 1697              		.loc 1 558 11 is_stmt 0 view .LVU550
 1698 0020 1868     		ldr	r0, [r3]
 1699              		.loc 1 558 18 view .LVU551
 1700 0022 0132     		adds	r2, r2, #1
 1701 0024 FF32     		adds	r2, r2, #255
 1702 0026 0243     		orrs	r2, r0
 1703 0028 1A60     		str	r2, [r3]
 559:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1704              		.loc 1 559 5 is_stmt 1 view .LVU552
 1705              		.loc 1 559 11 view .LVU553
ARM GAS  /tmp/ccteMF1S.s 			page 61


 1706              		.loc 1 559 19 is_stmt 0 view .LVU554
 1707 002a 1B68     		ldr	r3, [r3]
 1708              		.loc 1 559 11 view .LVU555
 1709 002c DB07     		lsls	r3, r3, #31
 1710 002e 0ED4     		bmi	.L114
 1711              	.L110:
 1712              		.loc 1 559 26 view .LVU556
 1713 0030 0122     		movs	r2, #1
 1714              		.loc 1 559 19 view .LVU557
 1715 0032 1248     		ldr	r0, .L125
 1716              	.L112:
 560:Library/src/lcm32f06x_cordic.c ****     {
 561:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 1717              		.loc 1 561 9 is_stmt 1 view .LVU558
 1718              		.syntax divided
 1719              	@ 561 "Library/src/lcm32f06x_cordic.c" 1
 1720 0034 C046     		nop
 1721              	@ 0 "" 2
 1722              		.loc 1 561 18 view .LVU559
 1723              	@ 561 "Library/src/lcm32f06x_cordic.c" 1
 1724 0036 C046     		nop
 1725              	@ 0 "" 2
 1726              		.loc 1 561 27 view .LVU560
 1727              	@ 561 "Library/src/lcm32f06x_cordic.c" 1
 1728 0038 C046     		nop
 1729              	@ 0 "" 2
 1730              		.loc 1 561 36 view .LVU561
 1731              	@ 561 "Library/src/lcm32f06x_cordic.c" 1
 1732 003a C046     		nop
 1733              	@ 0 "" 2
 1734              		.loc 1 561 45 view .LVU562
 1735              	@ 561 "Library/src/lcm32f06x_cordic.c" 1
 1736 003c C046     		nop
 1737              	@ 0 "" 2
 559:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1738              		.loc 1 559 11 view .LVU563
 559:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1739              		.loc 1 559 19 is_stmt 0 view .LVU564
 1740              		.thumb
 1741              		.syntax unified
 1742 003e 0368     		ldr	r3, [r0]
 559:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1743              		.loc 1 559 11 view .LVU565
 1744 0040 1A42     		tst	r2, r3
 1745 0042 F7D0     		beq	.L112
 562:Library/src/lcm32f06x_cordic.c ****     };
 1746              		.loc 1 562 6 is_stmt 1 view .LVU566
 563:Library/src/lcm32f06x_cordic.c ****     if(IQnIn < 23)
 1747              		.loc 1 563 5 view .LVU567
 1748              		.loc 1 563 7 is_stmt 0 view .LVU568
 1749 0044 1629     		cmp	r1, #22
 1750 0046 02D9     		bls	.L114
 1751              	.L113:
 564:Library/src/lcm32f06x_cordic.c ****     {
 565:Library/src/lcm32f06x_cordic.c ****         return  ((int32_t)CORDIC->YO >> (23 - IQnIn));
 566:Library/src/lcm32f06x_cordic.c ****     }
 567:Library/src/lcm32f06x_cordic.c ****     else
ARM GAS  /tmp/ccteMF1S.s 			page 62


 568:Library/src/lcm32f06x_cordic.c ****     {
 569:Library/src/lcm32f06x_cordic.c ****         return  ((int32_t)CORDIC->YO);
 1752              		.loc 1 569 9 is_stmt 1 view .LVU569
 1753              		.loc 1 569 33 is_stmt 0 view .LVU570
 1754 0048 0C4B     		ldr	r3, .L125
 1755 004a D869     		ldr	r0, [r3, #28]
 1756              	.L108:
 570:Library/src/lcm32f06x_cordic.c ****     }
 571:Library/src/lcm32f06x_cordic.c **** }
 1757              		.loc 1 571 1 view .LVU571
 1758              		@ sp needed
 1759 004c 10BD     		pop	{r4, pc}
 1760              	.L114:
 565:Library/src/lcm32f06x_cordic.c ****     }
 1761              		.loc 1 565 9 is_stmt 1 view .LVU572
 565:Library/src/lcm32f06x_cordic.c ****     }
 1762              		.loc 1 565 33 is_stmt 0 view .LVU573
 1763 004e 0B4B     		ldr	r3, .L125
 1764 0050 D869     		ldr	r0, [r3, #28]
 565:Library/src/lcm32f06x_cordic.c ****     }
 1765              		.loc 1 565 45 view .LVU574
 1766 0052 1723     		movs	r3, #23
 1767 0054 5B1A     		subs	r3, r3, r1
 565:Library/src/lcm32f06x_cordic.c ****     }
 1768              		.loc 1 565 38 view .LVU575
 1769 0056 1841     		asrs	r0, r0, r3
 1770 0058 F8E7     		b	.L108
 1771              	.L109:
 553:Library/src/lcm32f06x_cordic.c ****     }
 1772              		.loc 1 553 9 is_stmt 1 view .LVU576
 553:Library/src/lcm32f06x_cordic.c ****     }
 1773              		.loc 1 553 41 is_stmt 0 view .LVU577
 1774 005a 0C00     		movs	r4, r1
 553:Library/src/lcm32f06x_cordic.c ****     }
 1775              		.loc 1 553 31 view .LVU578
 1776 005c 084A     		ldr	r2, .L125+4
 553:Library/src/lcm32f06x_cordic.c ****     }
 1777              		.loc 1 553 41 view .LVU579
 1778 005e 173C     		subs	r4, r4, #23
 553:Library/src/lcm32f06x_cordic.c ****     }
 1779              		.loc 1 553 31 view .LVU580
 1780 0060 A240     		lsls	r2, r2, r4
 553:Library/src/lcm32f06x_cordic.c ****     }
 1781              		.loc 1 553 20 view .LVU581
 1782 0062 DA60     		str	r2, [r3, #12]
 555:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1783              		.loc 1 555 5 is_stmt 1 view .LVU582
 555:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1784              		.loc 1 555 16 is_stmt 0 view .LVU583
 1785 0064 0022     		movs	r2, #0
 1786 0066 1A61     		str	r2, [r3, #16]
 556:Library/src/lcm32f06x_cordic.c ****   
 1787              		.loc 1 556 5 is_stmt 1 view .LVU584
 556:Library/src/lcm32f06x_cordic.c ****   
 1788              		.loc 1 556 16 is_stmt 0 view .LVU585
 1789 0068 5861     		str	r0, [r3, #20]
 558:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
ARM GAS  /tmp/ccteMF1S.s 			page 63


 1790              		.loc 1 558 5 is_stmt 1 view .LVU586
 558:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1791              		.loc 1 558 11 is_stmt 0 view .LVU587
 1792 006a 1868     		ldr	r0, [r3]
 558:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1793              		.loc 1 558 18 view .LVU588
 1794 006c 0132     		adds	r2, r2, #1
 1795 006e FF32     		adds	r2, r2, #255
 1796 0070 0243     		orrs	r2, r0
 1797 0072 1A60     		str	r2, [r3]
 559:Library/src/lcm32f06x_cordic.c ****     {
 1798              		.loc 1 559 5 is_stmt 1 view .LVU589
 559:Library/src/lcm32f06x_cordic.c ****     {
 1799              		.loc 1 559 11 view .LVU590
 559:Library/src/lcm32f06x_cordic.c ****     {
 1800              		.loc 1 559 19 is_stmt 0 view .LVU591
 1801 0074 1B68     		ldr	r3, [r3]
 559:Library/src/lcm32f06x_cordic.c ****     {
 1802              		.loc 1 559 11 view .LVU592
 1803 0076 DB07     		lsls	r3, r3, #31
 1804 0078 DAD5     		bpl	.L110
 1805 007a E5E7     		b	.L113
 1806              	.L126:
 1807              		.align	2
 1808              	.L125:
 1809 007c 00000148 		.word	1208025088
 1810 0080 478F9A00 		.word	10129223
 1811              		.cfi_endproc
 1812              	.LFE57:
 1814              		.section	.text.CORDIC_Cosh,"ax",%progbits
 1815              		.align	1
 1816              		.p2align 2,,3
 1817              		.global	CORDIC_Cosh
 1818              		.syntax unified
 1819              		.code	16
 1820              		.thumb_func
 1822              	CORDIC_Cosh:
 1823              	.LVL85:
 1824              	.LFB58:
 572:Library/src/lcm32f06x_cordic.c **** 
 573:Library/src/lcm32f06x_cordic.c **** /**
 574:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Cosh
 575:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the hyperbolic cosine value of input data.
 576:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算输入数据的双曲余弦值。
 577:Library/src/lcm32f06x_cordic.c ****   * @param  InputValue: 
 578:Library/src/lcm32f06x_cordic.c ****   *         EN: input value.(The original value is limited to -1.1-1.1)
 579:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值。（原值限制在-1.1 - 1.1）
 580:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 581:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 582:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 583:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 584:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 585:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 586:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 587:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 588:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 589:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
ARM GAS  /tmp/ccteMF1S.s 			page 64


 590:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 591:Library/src/lcm32f06x_cordic.c ****   * @retval uint32_t:
 592:Library/src/lcm32f06x_cordic.c ****   *         EN: Return the the hyperbolic cosine value of input data. (input in IQ format).
 593:Library/src/lcm32f06x_cordic.c ****   *         CN: 返回输入数据的双曲余弦值。（输入IQ格式）。
 594:Library/src/lcm32f06x_cordic.c ****   */
 595:Library/src/lcm32f06x_cordic.c **** int32_t CORDIC_Cosh(int32_t InputValue, uint8_t IQnIn, uint32_t Accuracy)
 596:Library/src/lcm32f06x_cordic.c **** {
 1825              		.loc 1 596 1 is_stmt 1 view -0
 1826              		.cfi_startproc
 1827              		@ args = 0, pretend = 0, frame = 0
 1828              		@ frame_needed = 0, uses_anonymous_args = 0
 597:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00003000 | Accuracy;
 1829              		.loc 1 597 5 view .LVU594
 1830              		.loc 1 597 30 is_stmt 0 view .LVU595
 1831 0000 C023     		movs	r3, #192
 1832 0002 9B01     		lsls	r3, r3, #6
 1833 0004 1A43     		orrs	r2, r3
 1834              	.LVL86:
 1835              		.loc 1 597 17 view .LVU596
 1836 0006 1D4B     		ldr	r3, .L144
 596:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00003000 | Accuracy;
 1837              		.loc 1 596 1 view .LVU597
 1838 0008 10B5     		push	{r4, lr}
 1839              	.LCFI10:
 1840              		.cfi_def_cfa_offset 8
 1841              		.cfi_offset 4, -8
 1842              		.cfi_offset 14, -4
 1843              		.loc 1 597 17 view .LVU598
 1844 000a 5A60     		str	r2, [r3, #4]
 598:Library/src/lcm32f06x_cordic.c **** 
 599:Library/src/lcm32f06x_cordic.c ****     if(IQnIn < 23)
 1845              		.loc 1 599 5 is_stmt 1 view .LVU599
 600:Library/src/lcm32f06x_cordic.c ****     {
 601:Library/src/lcm32f06x_cordic.c ****         CORDIC->XI = 10129223;
 602:Library/src/lcm32f06x_cordic.c ****     }
 603:Library/src/lcm32f06x_cordic.c ****     else
 604:Library/src/lcm32f06x_cordic.c ****     {
 605:Library/src/lcm32f06x_cordic.c ****         CORDIC->XI = 10129223 << (IQnIn - 23); // 1/0.82815936 * (1 << 23)
 606:Library/src/lcm32f06x_cordic.c ****     }
 607:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 608:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1846              		.loc 1 608 36 is_stmt 0 view .LVU600
 1847 000c 1F22     		movs	r2, #31
 1848 000e 521A     		subs	r2, r2, r1
 1849              		.loc 1 608 29 view .LVU601
 1850 0010 9040     		lsls	r0, r0, r2
 1851              	.LVL87:
 599:Library/src/lcm32f06x_cordic.c ****     {
 1852              		.loc 1 599 7 view .LVU602
 1853 0012 1629     		cmp	r1, #22
 1854 0014 21D8     		bhi	.L128
 601:Library/src/lcm32f06x_cordic.c ****     }
 1855              		.loc 1 601 9 is_stmt 1 view .LVU603
 601:Library/src/lcm32f06x_cordic.c ****     }
 1856              		.loc 1 601 20 is_stmt 0 view .LVU604
 1857 0016 1A4A     		ldr	r2, .L144+4
 1858 0018 DA60     		str	r2, [r3, #12]
ARM GAS  /tmp/ccteMF1S.s 			page 65


 607:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1859              		.loc 1 607 5 is_stmt 1 view .LVU605
 607:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1860              		.loc 1 607 16 is_stmt 0 view .LVU606
 1861 001a 0022     		movs	r2, #0
 1862 001c 1A61     		str	r2, [r3, #16]
 1863              		.loc 1 608 5 is_stmt 1 view .LVU607
 1864              		.loc 1 608 16 is_stmt 0 view .LVU608
 1865 001e 5861     		str	r0, [r3, #20]
 609:Library/src/lcm32f06x_cordic.c ****   
 610:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 1866              		.loc 1 610 5 is_stmt 1 view .LVU609
 1867              		.loc 1 610 11 is_stmt 0 view .LVU610
 1868 0020 1868     		ldr	r0, [r3]
 1869              		.loc 1 610 18 view .LVU611
 1870 0022 0132     		adds	r2, r2, #1
 1871 0024 FF32     		adds	r2, r2, #255
 1872 0026 0243     		orrs	r2, r0
 1873 0028 1A60     		str	r2, [r3]
 611:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1874              		.loc 1 611 5 is_stmt 1 view .LVU612
 1875              		.loc 1 611 11 view .LVU613
 1876              		.loc 1 611 19 is_stmt 0 view .LVU614
 1877 002a 1B68     		ldr	r3, [r3]
 1878              		.loc 1 611 11 view .LVU615
 1879 002c DB07     		lsls	r3, r3, #31
 1880 002e 0ED4     		bmi	.L133
 1881              	.L129:
 1882              		.loc 1 611 26 view .LVU616
 1883 0030 0122     		movs	r2, #1
 1884              		.loc 1 611 19 view .LVU617
 1885 0032 1248     		ldr	r0, .L144
 1886              	.L131:
 612:Library/src/lcm32f06x_cordic.c ****     {
 613:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 1887              		.loc 1 613 9 is_stmt 1 view .LVU618
 1888              		.syntax divided
 1889              	@ 613 "Library/src/lcm32f06x_cordic.c" 1
 1890 0034 C046     		nop
 1891              	@ 0 "" 2
 1892              		.loc 1 613 18 view .LVU619
 1893              	@ 613 "Library/src/lcm32f06x_cordic.c" 1
 1894 0036 C046     		nop
 1895              	@ 0 "" 2
 1896              		.loc 1 613 27 view .LVU620
 1897              	@ 613 "Library/src/lcm32f06x_cordic.c" 1
 1898 0038 C046     		nop
 1899              	@ 0 "" 2
 1900              		.loc 1 613 36 view .LVU621
 1901              	@ 613 "Library/src/lcm32f06x_cordic.c" 1
 1902 003a C046     		nop
 1903              	@ 0 "" 2
 1904              		.loc 1 613 45 view .LVU622
 1905              	@ 613 "Library/src/lcm32f06x_cordic.c" 1
 1906 003c C046     		nop
 1907              	@ 0 "" 2
 611:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
ARM GAS  /tmp/ccteMF1S.s 			page 66


 1908              		.loc 1 611 11 view .LVU623
 611:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1909              		.loc 1 611 19 is_stmt 0 view .LVU624
 1910              		.thumb
 1911              		.syntax unified
 1912 003e 0368     		ldr	r3, [r0]
 611:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1913              		.loc 1 611 11 view .LVU625
 1914 0040 1A42     		tst	r2, r3
 1915 0042 F7D0     		beq	.L131
 614:Library/src/lcm32f06x_cordic.c ****     };
 1916              		.loc 1 614 6 is_stmt 1 view .LVU626
 615:Library/src/lcm32f06x_cordic.c ****     if(IQnIn < 23)
 1917              		.loc 1 615 5 view .LVU627
 1918              		.loc 1 615 7 is_stmt 0 view .LVU628
 1919 0044 1629     		cmp	r1, #22
 1920 0046 02D9     		bls	.L133
 1921              	.L132:
 616:Library/src/lcm32f06x_cordic.c ****     {
 617:Library/src/lcm32f06x_cordic.c ****         return  ((int32_t)CORDIC->XO >> (23 - IQnIn));
 618:Library/src/lcm32f06x_cordic.c ****     }
 619:Library/src/lcm32f06x_cordic.c ****     else
 620:Library/src/lcm32f06x_cordic.c ****     {
 621:Library/src/lcm32f06x_cordic.c ****         return  ((int32_t)CORDIC->XO);
 1922              		.loc 1 621 9 is_stmt 1 view .LVU629
 1923              		.loc 1 621 33 is_stmt 0 view .LVU630
 1924 0048 0C4B     		ldr	r3, .L144
 1925 004a 9869     		ldr	r0, [r3, #24]
 1926              	.L127:
 622:Library/src/lcm32f06x_cordic.c ****     }
 623:Library/src/lcm32f06x_cordic.c **** }
 1927              		.loc 1 623 1 view .LVU631
 1928              		@ sp needed
 1929 004c 10BD     		pop	{r4, pc}
 1930              	.L133:
 617:Library/src/lcm32f06x_cordic.c ****     }
 1931              		.loc 1 617 9 is_stmt 1 view .LVU632
 617:Library/src/lcm32f06x_cordic.c ****     }
 1932              		.loc 1 617 33 is_stmt 0 view .LVU633
 1933 004e 0B4B     		ldr	r3, .L144
 1934 0050 9869     		ldr	r0, [r3, #24]
 617:Library/src/lcm32f06x_cordic.c ****     }
 1935              		.loc 1 617 45 view .LVU634
 1936 0052 1723     		movs	r3, #23
 1937 0054 5B1A     		subs	r3, r3, r1
 617:Library/src/lcm32f06x_cordic.c ****     }
 1938              		.loc 1 617 38 view .LVU635
 1939 0056 1841     		asrs	r0, r0, r3
 1940 0058 F8E7     		b	.L127
 1941              	.L128:
 605:Library/src/lcm32f06x_cordic.c ****     }
 1942              		.loc 1 605 9 is_stmt 1 view .LVU636
 605:Library/src/lcm32f06x_cordic.c ****     }
 1943              		.loc 1 605 41 is_stmt 0 view .LVU637
 1944 005a 0C00     		movs	r4, r1
 605:Library/src/lcm32f06x_cordic.c ****     }
 1945              		.loc 1 605 31 view .LVU638
ARM GAS  /tmp/ccteMF1S.s 			page 67


 1946 005c 084A     		ldr	r2, .L144+4
 605:Library/src/lcm32f06x_cordic.c ****     }
 1947              		.loc 1 605 41 view .LVU639
 1948 005e 173C     		subs	r4, r4, #23
 605:Library/src/lcm32f06x_cordic.c ****     }
 1949              		.loc 1 605 31 view .LVU640
 1950 0060 A240     		lsls	r2, r2, r4
 605:Library/src/lcm32f06x_cordic.c ****     }
 1951              		.loc 1 605 20 view .LVU641
 1952 0062 DA60     		str	r2, [r3, #12]
 607:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1953              		.loc 1 607 5 is_stmt 1 view .LVU642
 607:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 1954              		.loc 1 607 16 is_stmt 0 view .LVU643
 1955 0064 0022     		movs	r2, #0
 1956 0066 1A61     		str	r2, [r3, #16]
 608:Library/src/lcm32f06x_cordic.c ****   
 1957              		.loc 1 608 5 is_stmt 1 view .LVU644
 608:Library/src/lcm32f06x_cordic.c ****   
 1958              		.loc 1 608 16 is_stmt 0 view .LVU645
 1959 0068 5861     		str	r0, [r3, #20]
 610:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1960              		.loc 1 610 5 is_stmt 1 view .LVU646
 610:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1961              		.loc 1 610 11 is_stmt 0 view .LVU647
 1962 006a 1868     		ldr	r0, [r3]
 610:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 1963              		.loc 1 610 18 view .LVU648
 1964 006c 0132     		adds	r2, r2, #1
 1965 006e FF32     		adds	r2, r2, #255
 1966 0070 0243     		orrs	r2, r0
 1967 0072 1A60     		str	r2, [r3]
 611:Library/src/lcm32f06x_cordic.c ****     {
 1968              		.loc 1 611 5 is_stmt 1 view .LVU649
 611:Library/src/lcm32f06x_cordic.c ****     {
 1969              		.loc 1 611 11 view .LVU650
 611:Library/src/lcm32f06x_cordic.c ****     {
 1970              		.loc 1 611 19 is_stmt 0 view .LVU651
 1971 0074 1B68     		ldr	r3, [r3]
 611:Library/src/lcm32f06x_cordic.c ****     {
 1972              		.loc 1 611 11 view .LVU652
 1973 0076 DB07     		lsls	r3, r3, #31
 1974 0078 DAD5     		bpl	.L129
 1975 007a E5E7     		b	.L132
 1976              	.L145:
 1977              		.align	2
 1978              	.L144:
 1979 007c 00000148 		.word	1208025088
 1980 0080 478F9A00 		.word	10129223
 1981              		.cfi_endproc
 1982              	.LFE58:
 1984              		.section	.text.CORDIC_SinhCosh,"ax",%progbits
 1985              		.align	1
 1986              		.p2align 2,,3
 1987              		.global	CORDIC_SinhCosh
 1988              		.syntax unified
 1989              		.code	16
ARM GAS  /tmp/ccteMF1S.s 			page 68


 1990              		.thumb_func
 1992              	CORDIC_SinhCosh:
 1993              	.LVL88:
 1994              	.LFB59:
 624:Library/src/lcm32f06x_cordic.c **** 
 625:Library/src/lcm32f06x_cordic.c **** /**
 626:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_SinhCosh
 627:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the hyperbolic sine adn chyperbolic cosine value of input data.
 628:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算输入数据的双曲正弦和双曲余弦值。
 629:Library/src/lcm32f06x_cordic.c ****   * @param  InputValue: 
 630:Library/src/lcm32f06x_cordic.c ****   *         EN: input value.(The original value is limited to -1.1-1.1)
 631:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值。（原值限制在-1.1 - 1.1）
 632:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 633:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 634:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 635:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 636:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 637:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 638:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 639:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 640:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 641:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
 642:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 643:Library/src/lcm32f06x_cordic.c ****   * @param  pSinh: 
 644:Library/src/lcm32f06x_cordic.c ****   *         EN: The the hyperbolic sine value of input data. (input in IQ format).
 645:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入数据的双曲正弦值。（输入IQ格式）。
 646:Library/src/lcm32f06x_cordic.c ****   * @param  pCosh: 
 647:Library/src/lcm32f06x_cordic.c ****   *         EN: The the hyperbolic cosine value of input data. (input in IQ format).
 648:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入数据的双曲余弦值。（输入IQ格式）。
 649:Library/src/lcm32f06x_cordic.c ****   * @retval None
 650:Library/src/lcm32f06x_cordic.c ****   */
 651:Library/src/lcm32f06x_cordic.c **** void CORDIC_SinhCosh(int32_t InputValue, uint8_t IQnIn, uint32_t Accuracy, int32_t* pSinh, int32_t*
 652:Library/src/lcm32f06x_cordic.c **** {
 1995              		.loc 1 652 1 is_stmt 1 view -0
 1996              		.cfi_startproc
 1997              		@ args = 4, pretend = 0, frame = 0
 1998              		@ frame_needed = 0, uses_anonymous_args = 0
 653:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00003000 | Accuracy;
 1999              		.loc 1 653 5 view .LVU654
 652:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00003000 | Accuracy;
 2000              		.loc 1 652 1 is_stmt 0 view .LVU655
 2001 0000 30B5     		push	{r4, r5, lr}
 2002              	.LCFI11:
 2003              		.cfi_def_cfa_offset 12
 2004              		.cfi_offset 4, -12
 2005              		.cfi_offset 5, -8
 2006              		.cfi_offset 14, -4
 2007              		.loc 1 653 30 view .LVU656
 2008 0002 C024     		movs	r4, #192
 2009 0004 A401     		lsls	r4, r4, #6
 2010 0006 2243     		orrs	r2, r4
 2011              	.LVL89:
 2012              		.loc 1 653 17 view .LVU657
 2013 0008 204C     		ldr	r4, .L163
 2014 000a 6260     		str	r2, [r4, #4]
 654:Library/src/lcm32f06x_cordic.c **** 
 655:Library/src/lcm32f06x_cordic.c ****     if(IQnIn < 23)
ARM GAS  /tmp/ccteMF1S.s 			page 69


 2015              		.loc 1 655 5 is_stmt 1 view .LVU658
 656:Library/src/lcm32f06x_cordic.c ****     {
 657:Library/src/lcm32f06x_cordic.c ****         CORDIC->XI = 10129223;
 658:Library/src/lcm32f06x_cordic.c ****     }
 659:Library/src/lcm32f06x_cordic.c ****     else
 660:Library/src/lcm32f06x_cordic.c ****     {
 661:Library/src/lcm32f06x_cordic.c ****         CORDIC->XI = 10129223 << (IQnIn - 23); // 1/0.82815936 * (1 << 23)
 662:Library/src/lcm32f06x_cordic.c ****     }
 663:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 664:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2016              		.loc 1 664 36 is_stmt 0 view .LVU659
 2017 000c 1F22     		movs	r2, #31
 2018 000e 521A     		subs	r2, r2, r1
 2019              		.loc 1 664 29 view .LVU660
 2020 0010 9040     		lsls	r0, r0, r2
 2021              	.LVL90:
 655:Library/src/lcm32f06x_cordic.c ****     {
 2022              		.loc 1 655 7 view .LVU661
 2023 0012 1629     		cmp	r1, #22
 2024 0014 29D8     		bhi	.L147
 657:Library/src/lcm32f06x_cordic.c ****     }
 2025              		.loc 1 657 9 is_stmt 1 view .LVU662
 657:Library/src/lcm32f06x_cordic.c ****     }
 2026              		.loc 1 657 20 is_stmt 0 view .LVU663
 2027 0016 1E4A     		ldr	r2, .L163+4
 2028 0018 E260     		str	r2, [r4, #12]
 663:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2029              		.loc 1 663 5 is_stmt 1 view .LVU664
 663:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2030              		.loc 1 663 16 is_stmt 0 view .LVU665
 2031 001a 0022     		movs	r2, #0
 2032 001c 2261     		str	r2, [r4, #16]
 2033              		.loc 1 664 5 is_stmt 1 view .LVU666
 2034              		.loc 1 664 16 is_stmt 0 view .LVU667
 2035 001e 6061     		str	r0, [r4, #20]
 665:Library/src/lcm32f06x_cordic.c ****   
 666:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 2036              		.loc 1 666 5 is_stmt 1 view .LVU668
 2037              		.loc 1 666 11 is_stmt 0 view .LVU669
 2038 0020 2068     		ldr	r0, [r4]
 2039              		.loc 1 666 18 view .LVU670
 2040 0022 0132     		adds	r2, r2, #1
 2041 0024 FF32     		adds	r2, r2, #255
 2042 0026 0243     		orrs	r2, r0
 2043 0028 2260     		str	r2, [r4]
 667:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2044              		.loc 1 667 5 is_stmt 1 view .LVU671
 2045              		.loc 1 667 11 view .LVU672
 2046              		.loc 1 667 19 is_stmt 0 view .LVU673
 2047 002a 2268     		ldr	r2, [r4]
 2048              		.loc 1 667 11 view .LVU674
 2049 002c D207     		lsls	r2, r2, #31
 2050 002e 12D4     		bmi	.L152
 2051              	.L148:
 2052              		.loc 1 667 26 view .LVU675
 2053 0030 0120     		movs	r0, #1
 2054              		.loc 1 667 19 view .LVU676
ARM GAS  /tmp/ccteMF1S.s 			page 70


 2055 0032 164C     		ldr	r4, .L163
 2056              	.L150:
 668:Library/src/lcm32f06x_cordic.c ****     {
 669:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 2057              		.loc 1 669 9 is_stmt 1 view .LVU677
 2058              		.syntax divided
 2059              	@ 669 "Library/src/lcm32f06x_cordic.c" 1
 2060 0034 C046     		nop
 2061              	@ 0 "" 2
 2062              		.loc 1 669 18 view .LVU678
 2063              	@ 669 "Library/src/lcm32f06x_cordic.c" 1
 2064 0036 C046     		nop
 2065              	@ 0 "" 2
 2066              		.loc 1 669 27 view .LVU679
 2067              	@ 669 "Library/src/lcm32f06x_cordic.c" 1
 2068 0038 C046     		nop
 2069              	@ 0 "" 2
 2070              		.loc 1 669 36 view .LVU680
 2071              	@ 669 "Library/src/lcm32f06x_cordic.c" 1
 2072 003a C046     		nop
 2073              	@ 0 "" 2
 2074              		.loc 1 669 45 view .LVU681
 2075              	@ 669 "Library/src/lcm32f06x_cordic.c" 1
 2076 003c C046     		nop
 2077              	@ 0 "" 2
 667:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2078              		.loc 1 667 11 view .LVU682
 667:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2079              		.loc 1 667 19 is_stmt 0 view .LVU683
 2080              		.thumb
 2081              		.syntax unified
 2082 003e 2268     		ldr	r2, [r4]
 667:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2083              		.loc 1 667 11 view .LVU684
 2084 0040 1042     		tst	r0, r2
 2085 0042 F7D0     		beq	.L150
 670:Library/src/lcm32f06x_cordic.c ****     };
 2086              		.loc 1 670 6 is_stmt 1 view .LVU685
 671:Library/src/lcm32f06x_cordic.c ****     if(IQnIn < 23)
 2087              		.loc 1 671 5 view .LVU686
 2088              		.loc 1 671 7 is_stmt 0 view .LVU687
 2089 0044 1629     		cmp	r1, #22
 2090 0046 06D9     		bls	.L152
 2091              	.L151:
 672:Library/src/lcm32f06x_cordic.c ****     {
 673:Library/src/lcm32f06x_cordic.c ****         *pCosh = ((int32_t)CORDIC->XO>> (23 - IQnIn));
 674:Library/src/lcm32f06x_cordic.c ****         *pSinh = ((int32_t)CORDIC->YO>> (23 - IQnIn));
 675:Library/src/lcm32f06x_cordic.c ****     }
 676:Library/src/lcm32f06x_cordic.c ****     else
 677:Library/src/lcm32f06x_cordic.c ****     {
 678:Library/src/lcm32f06x_cordic.c ****         *pCosh = (int32_t)CORDIC->XO;
 2092              		.loc 1 678 9 is_stmt 1 view .LVU688
 2093              		.loc 1 678 33 is_stmt 0 view .LVU689
 2094 0048 104A     		ldr	r2, .L163
 2095              		.loc 1 678 16 view .LVU690
 2096 004a 0398     		ldr	r0, [sp, #12]
 2097              		.loc 1 678 33 view .LVU691
ARM GAS  /tmp/ccteMF1S.s 			page 71


 2098 004c 9169     		ldr	r1, [r2, #24]
 2099              	.LVL91:
 2100              		.loc 1 678 16 view .LVU692
 2101 004e 0160     		str	r1, [r0]
 679:Library/src/lcm32f06x_cordic.c ****         *pSinh = (int32_t)CORDIC->YO;
 2102              		.loc 1 679 9 is_stmt 1 view .LVU693
 2103              		.loc 1 679 33 is_stmt 0 view .LVU694
 2104 0050 D269     		ldr	r2, [r2, #28]
 2105              	.L149:
 674:Library/src/lcm32f06x_cordic.c ****     }
 2106              		.loc 1 674 16 view .LVU695
 2107 0052 1A60     		str	r2, [r3]
 680:Library/src/lcm32f06x_cordic.c ****     }
 681:Library/src/lcm32f06x_cordic.c **** 
 682:Library/src/lcm32f06x_cordic.c **** }
 2108              		.loc 1 682 1 view .LVU696
 2109              		@ sp needed
 2110 0054 30BD     		pop	{r4, r5, pc}
 2111              	.LVL92:
 2112              	.L152:
 673:Library/src/lcm32f06x_cordic.c ****         *pSinh = ((int32_t)CORDIC->YO>> (23 - IQnIn));
 2113              		.loc 1 673 9 is_stmt 1 view .LVU697
 673:Library/src/lcm32f06x_cordic.c ****         *pSinh = ((int32_t)CORDIC->YO>> (23 - IQnIn));
 2114              		.loc 1 673 45 is_stmt 0 view .LVU698
 2115 0056 1722     		movs	r2, #23
 673:Library/src/lcm32f06x_cordic.c ****         *pSinh = ((int32_t)CORDIC->YO>> (23 - IQnIn));
 2116              		.loc 1 673 34 view .LVU699
 2117 0058 0C4C     		ldr	r4, .L163
 673:Library/src/lcm32f06x_cordic.c ****         *pSinh = ((int32_t)CORDIC->YO>> (23 - IQnIn));
 2118              		.loc 1 673 45 view .LVU700
 2119 005a 511A     		subs	r1, r2, r1
 2120              	.LVL93:
 673:Library/src/lcm32f06x_cordic.c ****         *pSinh = ((int32_t)CORDIC->YO>> (23 - IQnIn));
 2121              		.loc 1 673 34 view .LVU701
 2122 005c A069     		ldr	r0, [r4, #24]
 673:Library/src/lcm32f06x_cordic.c ****         *pSinh = ((int32_t)CORDIC->YO>> (23 - IQnIn));
 2123              		.loc 1 673 16 view .LVU702
 2124 005e 039A     		ldr	r2, [sp, #12]
 673:Library/src/lcm32f06x_cordic.c ****         *pSinh = ((int32_t)CORDIC->YO>> (23 - IQnIn));
 2125              		.loc 1 673 38 view .LVU703
 2126 0060 0841     		asrs	r0, r0, r1
 673:Library/src/lcm32f06x_cordic.c ****         *pSinh = ((int32_t)CORDIC->YO>> (23 - IQnIn));
 2127              		.loc 1 673 16 view .LVU704
 2128 0062 1060     		str	r0, [r2]
 674:Library/src/lcm32f06x_cordic.c ****     }
 2129              		.loc 1 674 9 is_stmt 1 view .LVU705
 674:Library/src/lcm32f06x_cordic.c ****     }
 2130              		.loc 1 674 34 is_stmt 0 view .LVU706
 2131 0064 E269     		ldr	r2, [r4, #28]
 674:Library/src/lcm32f06x_cordic.c ****     }
 2132              		.loc 1 674 38 view .LVU707
 2133 0066 0A41     		asrs	r2, r2, r1
 2134 0068 F3E7     		b	.L149
 2135              	.LVL94:
 2136              	.L147:
 661:Library/src/lcm32f06x_cordic.c ****     }
 2137              		.loc 1 661 9 is_stmt 1 view .LVU708
ARM GAS  /tmp/ccteMF1S.s 			page 72


 661:Library/src/lcm32f06x_cordic.c ****     }
 2138              		.loc 1 661 41 is_stmt 0 view .LVU709
 2139 006a 0D00     		movs	r5, r1
 661:Library/src/lcm32f06x_cordic.c ****     }
 2140              		.loc 1 661 31 view .LVU710
 2141 006c 084A     		ldr	r2, .L163+4
 661:Library/src/lcm32f06x_cordic.c ****     }
 2142              		.loc 1 661 41 view .LVU711
 2143 006e 173D     		subs	r5, r5, #23
 661:Library/src/lcm32f06x_cordic.c ****     }
 2144              		.loc 1 661 31 view .LVU712
 2145 0070 AA40     		lsls	r2, r2, r5
 661:Library/src/lcm32f06x_cordic.c ****     }
 2146              		.loc 1 661 20 view .LVU713
 2147 0072 E260     		str	r2, [r4, #12]
 663:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2148              		.loc 1 663 5 is_stmt 1 view .LVU714
 663:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2149              		.loc 1 663 16 is_stmt 0 view .LVU715
 2150 0074 0022     		movs	r2, #0
 2151 0076 2261     		str	r2, [r4, #16]
 664:Library/src/lcm32f06x_cordic.c ****   
 2152              		.loc 1 664 5 is_stmt 1 view .LVU716
 664:Library/src/lcm32f06x_cordic.c ****   
 2153              		.loc 1 664 16 is_stmt 0 view .LVU717
 2154 0078 6061     		str	r0, [r4, #20]
 666:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2155              		.loc 1 666 5 is_stmt 1 view .LVU718
 666:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2156              		.loc 1 666 11 is_stmt 0 view .LVU719
 2157 007a 2068     		ldr	r0, [r4]
 666:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2158              		.loc 1 666 18 view .LVU720
 2159 007c 0132     		adds	r2, r2, #1
 2160 007e FF32     		adds	r2, r2, #255
 2161 0080 0243     		orrs	r2, r0
 2162 0082 2260     		str	r2, [r4]
 667:Library/src/lcm32f06x_cordic.c ****     {
 2163              		.loc 1 667 5 is_stmt 1 view .LVU721
 667:Library/src/lcm32f06x_cordic.c ****     {
 2164              		.loc 1 667 11 view .LVU722
 667:Library/src/lcm32f06x_cordic.c ****     {
 2165              		.loc 1 667 19 is_stmt 0 view .LVU723
 2166 0084 2268     		ldr	r2, [r4]
 667:Library/src/lcm32f06x_cordic.c ****     {
 2167              		.loc 1 667 11 view .LVU724
 2168 0086 D207     		lsls	r2, r2, #31
 2169 0088 D2D5     		bpl	.L148
 2170 008a DDE7     		b	.L151
 2171              	.L164:
 2172              		.align	2
 2173              	.L163:
 2174 008c 00000148 		.word	1208025088
 2175 0090 478F9A00 		.word	10129223
 2176              		.cfi_endproc
 2177              	.LFE59:
 2179              		.section	.text.CORDIC_Tanh,"ax",%progbits
ARM GAS  /tmp/ccteMF1S.s 			page 73


 2180              		.align	1
 2181              		.p2align 2,,3
 2182              		.global	CORDIC_Tanh
 2183              		.syntax unified
 2184              		.code	16
 2185              		.thumb_func
 2187              	CORDIC_Tanh:
 2188              	.LVL95:
 2189              	.LFB60:
 683:Library/src/lcm32f06x_cordic.c **** /**
 684:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Tanh
 685:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the hyperbolic tangent of input data.
 686:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算输入数据的双曲正切值。
 687:Library/src/lcm32f06x_cordic.c ****   * @param  InputValue: 
 688:Library/src/lcm32f06x_cordic.c ****   *         EN: input value.(The original value is limited to -1.1-1.1)
 689:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值。（原值限制在-1.1 - 1.1）
 690:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 691:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 692:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 693:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 694:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 695:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 696:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 697:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 698:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 699:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
 700:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 701:Library/src/lcm32f06x_cordic.c ****   * @retval uint32_t:
 702:Library/src/lcm32f06x_cordic.c ****   *         EN: Return Hyperbolic tangent value of input data. (input in IQ format).
 703:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入数据的双曲正切值。（输入IQ格式）。
 704:Library/src/lcm32f06x_cordic.c ****   */
 705:Library/src/lcm32f06x_cordic.c **** int32_t CORDIC_Tanh(int32_t InputValue, uint8_t IQnIn, uint32_t Accuracy)
 706:Library/src/lcm32f06x_cordic.c **** {
 2190              		.loc 1 706 1 is_stmt 1 view -0
 2191              		.cfi_startproc
 2192              		@ args = 0, pretend = 0, frame = 0
 2193              		@ frame_needed = 0, uses_anonymous_args = 0
 707:Library/src/lcm32f06x_cordic.c ****     int32_t sinhx,coshx,tanhx = 0;
 2194              		.loc 1 707 5 view .LVU726
 708:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00003000 | Accuracy;
 2195              		.loc 1 708 5 view .LVU727
 2196              		.loc 1 708 30 is_stmt 0 view .LVU728
 2197 0000 C023     		movs	r3, #192
 2198 0002 9B01     		lsls	r3, r3, #6
 2199 0004 1343     		orrs	r3, r2
 2200              		.loc 1 708 17 view .LVU729
 2201 0006 2B4A     		ldr	r2, .L187
 2202              	.LVL96:
 706:Library/src/lcm32f06x_cordic.c ****     int32_t sinhx,coshx,tanhx = 0;
 2203              		.loc 1 706 1 view .LVU730
 2204 0008 30B5     		push	{r4, r5, lr}
 2205              	.LCFI12:
 2206              		.cfi_def_cfa_offset 12
 2207              		.cfi_offset 4, -12
 2208              		.cfi_offset 5, -8
 2209              		.cfi_offset 14, -4
 2210              		.loc 1 708 17 view .LVU731
ARM GAS  /tmp/ccteMF1S.s 			page 74


 2211 000a 5360     		str	r3, [r2, #4]
 709:Library/src/lcm32f06x_cordic.c **** 
 710:Library/src/lcm32f06x_cordic.c ****     if(IQnIn < 23)
 2212              		.loc 1 710 5 is_stmt 1 view .LVU732
 2213              		.loc 1 710 7 is_stmt 0 view .LVU733
 2214 000c 1629     		cmp	r1, #22
 2215 000e 4AD8     		bhi	.L166
 711:Library/src/lcm32f06x_cordic.c ****     {
 712:Library/src/lcm32f06x_cordic.c ****         CORDIC->XI = 10129223;
 2216              		.loc 1 712 9 is_stmt 1 view .LVU734
 2217              		.loc 1 712 20 is_stmt 0 view .LVU735
 2218 0010 294B     		ldr	r3, .L187+4
 2219 0012 D360     		str	r3, [r2, #12]
 2220              	.L167:
 713:Library/src/lcm32f06x_cordic.c ****     }
 714:Library/src/lcm32f06x_cordic.c ****     else
 715:Library/src/lcm32f06x_cordic.c ****     {
 716:Library/src/lcm32f06x_cordic.c ****         CORDIC->XI = 10129223 << (IQnIn - 23); // 1/0.82815936 * (1 << 23)
 717:Library/src/lcm32f06x_cordic.c ****     }
 718:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 2221              		.loc 1 718 5 is_stmt 1 view .LVU736
 2222              		.loc 1 718 16 is_stmt 0 view .LVU737
 2223 0014 0023     		movs	r3, #0
 2224 0016 274A     		ldr	r2, .L187
 2225 0018 1361     		str	r3, [r2, #16]
 719:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2226              		.loc 1 719 5 is_stmt 1 view .LVU738
 2227              		.loc 1 719 36 is_stmt 0 view .LVU739
 2228 001a 1F33     		adds	r3, r3, #31
 2229 001c 5B1A     		subs	r3, r3, r1
 2230              		.loc 1 719 29 view .LVU740
 2231 001e 9840     		lsls	r0, r0, r3
 2232              	.LVL97:
 720:Library/src/lcm32f06x_cordic.c ****   
 721:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 2233              		.loc 1 721 18 view .LVU741
 2234 0020 8023     		movs	r3, #128
 719:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2235              		.loc 1 719 16 view .LVU742
 2236 0022 5061     		str	r0, [r2, #20]
 2237              		.loc 1 721 5 is_stmt 1 view .LVU743
 2238              		.loc 1 721 11 is_stmt 0 view .LVU744
 2239 0024 1068     		ldr	r0, [r2]
 2240              		.loc 1 721 18 view .LVU745
 2241 0026 5B00     		lsls	r3, r3, #1
 2242 0028 0343     		orrs	r3, r0
 2243 002a 1360     		str	r3, [r2]
 722:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2244              		.loc 1 722 5 is_stmt 1 view .LVU746
 2245              		.loc 1 722 11 view .LVU747
 2246              		.loc 1 722 19 is_stmt 0 view .LVU748
 2247 002c 1368     		ldr	r3, [r2]
 2248              		.loc 1 722 26 view .LVU749
 2249 002e 0120     		movs	r0, #1
 2250              		.loc 1 722 11 view .LVU750
 2251 0030 DB07     		lsls	r3, r3, #31
 2252 0032 07D4     		bmi	.L171
ARM GAS  /tmp/ccteMF1S.s 			page 75


 2253              	.L168:
 723:Library/src/lcm32f06x_cordic.c ****     {
 724:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 2254              		.loc 1 724 9 is_stmt 1 view .LVU751
 2255              		.syntax divided
 2256              	@ 724 "Library/src/lcm32f06x_cordic.c" 1
 2257 0034 C046     		nop
 2258              	@ 0 "" 2
 2259              		.loc 1 724 18 view .LVU752
 2260              	@ 724 "Library/src/lcm32f06x_cordic.c" 1
 2261 0036 C046     		nop
 2262              	@ 0 "" 2
 2263              		.loc 1 724 27 view .LVU753
 2264              	@ 724 "Library/src/lcm32f06x_cordic.c" 1
 2265 0038 C046     		nop
 2266              	@ 0 "" 2
 2267              		.loc 1 724 36 view .LVU754
 2268              	@ 724 "Library/src/lcm32f06x_cordic.c" 1
 2269 003a C046     		nop
 2270              	@ 0 "" 2
 2271              		.loc 1 724 45 view .LVU755
 2272              	@ 724 "Library/src/lcm32f06x_cordic.c" 1
 2273 003c C046     		nop
 2274              	@ 0 "" 2
 722:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2275              		.loc 1 722 11 view .LVU756
 722:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2276              		.loc 1 722 19 is_stmt 0 view .LVU757
 2277              		.thumb
 2278              		.syntax unified
 2279 003e 1368     		ldr	r3, [r2]
 722:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2280              		.loc 1 722 11 view .LVU758
 2281 0040 1842     		tst	r0, r3
 2282 0042 F7D0     		beq	.L168
 2283              	.L171:
 725:Library/src/lcm32f06x_cordic.c ****     };
 2284              		.loc 1 725 6 is_stmt 1 view .LVU759
 726:Library/src/lcm32f06x_cordic.c **** 
 727:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 2285              		.loc 1 727 5 view .LVU760
 2286              		.loc 1 727 18 is_stmt 0 view .LVU761
 2287 0044 8023     		movs	r3, #128
 2288              		.loc 1 727 11 view .LVU762
 2289 0046 1B4A     		ldr	r2, .L187
 2290              		.loc 1 727 18 view .LVU763
 2291 0048 5B00     		lsls	r3, r3, #1
 2292              		.loc 1 727 11 view .LVU764
 2293 004a 1068     		ldr	r0, [r2]
 2294              		.loc 1 727 18 view .LVU765
 2295 004c 0343     		orrs	r3, r0
 2296 004e 1360     		str	r3, [r2]
 728:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2297              		.loc 1 728 5 is_stmt 1 view .LVU766
 2298              		.loc 1 728 11 view .LVU767
 2299              		.loc 1 728 19 is_stmt 0 view .LVU768
 2300 0050 1368     		ldr	r3, [r2]
ARM GAS  /tmp/ccteMF1S.s 			page 76


 2301              		.loc 1 728 26 view .LVU769
 2302 0052 0120     		movs	r0, #1
 2303              		.loc 1 728 11 view .LVU770
 2304 0054 DB07     		lsls	r3, r3, #31
 2305 0056 07D4     		bmi	.L170
 2306              	.L169:
 729:Library/src/lcm32f06x_cordic.c ****     {
 730:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 2307              		.loc 1 730 9 is_stmt 1 view .LVU771
 2308              		.syntax divided
 2309              	@ 730 "Library/src/lcm32f06x_cordic.c" 1
 2310 0058 C046     		nop
 2311              	@ 0 "" 2
 2312              		.loc 1 730 18 view .LVU772
 2313              	@ 730 "Library/src/lcm32f06x_cordic.c" 1
 2314 005a C046     		nop
 2315              	@ 0 "" 2
 2316              		.loc 1 730 27 view .LVU773
 2317              	@ 730 "Library/src/lcm32f06x_cordic.c" 1
 2318 005c C046     		nop
 2319              	@ 0 "" 2
 2320              		.loc 1 730 36 view .LVU774
 2321              	@ 730 "Library/src/lcm32f06x_cordic.c" 1
 2322 005e C046     		nop
 2323              	@ 0 "" 2
 2324              		.loc 1 730 45 view .LVU775
 2325              	@ 730 "Library/src/lcm32f06x_cordic.c" 1
 2326 0060 C046     		nop
 2327              	@ 0 "" 2
 728:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2328              		.loc 1 728 11 view .LVU776
 728:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2329              		.loc 1 728 19 is_stmt 0 view .LVU777
 2330              		.thumb
 2331              		.syntax unified
 2332 0062 1368     		ldr	r3, [r2]
 728:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2333              		.loc 1 728 11 view .LVU778
 2334 0064 1842     		tst	r0, r3
 2335 0066 F7D0     		beq	.L169
 2336              	.L170:
 731:Library/src/lcm32f06x_cordic.c ****     };
 2337              		.loc 1 731 6 is_stmt 1 view .LVU779
 732:Library/src/lcm32f06x_cordic.c ****     coshx = CORDIC->XO >> 7;
 2338              		.loc 1 732 5 view .LVU780
 2339              		.loc 1 732 19 is_stmt 0 view .LVU781
 2340 0068 124A     		ldr	r2, .L187
 733:Library/src/lcm32f06x_cordic.c ****     sinhx = CORDIC->YO;
 734:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_CTRL_b.DIV16 = 0; //被除数32位
 2341              		.loc 1 734 28 view .LVU782
 2342 006a 144D     		ldr	r5, .L187+8
 732:Library/src/lcm32f06x_cordic.c ****     coshx = CORDIC->XO >> 7;
 2343              		.loc 1 732 19 view .LVU783
 2344 006c 9369     		ldr	r3, [r2, #24]
 733:Library/src/lcm32f06x_cordic.c ****     sinhx = CORDIC->YO;
 2345              		.loc 1 733 19 view .LVU784
 2346 006e D469     		ldr	r4, [r2, #28]
ARM GAS  /tmp/ccteMF1S.s 			page 77


 2347              		.loc 1 734 28 view .LVU785
 2348 0070 134A     		ldr	r2, .L187+12
 732:Library/src/lcm32f06x_cordic.c ****     coshx = CORDIC->XO >> 7;
 2349              		.loc 1 732 24 view .LVU786
 2350 0072 DB09     		lsrs	r3, r3, #7
 2351              	.LVL98:
 733:Library/src/lcm32f06x_cordic.c ****     sinhx = CORDIC->YO;
 2352              		.loc 1 733 5 is_stmt 1 view .LVU787
 2353              		.loc 1 734 5 view .LVU788
 2354              		.loc 1 734 28 is_stmt 0 view .LVU789
 2355 0074 1068     		ldr	r0, [r2]
 2356 0076 2840     		ands	r0, r5
 2357 0078 1060     		str	r0, [r2]
 735:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_ALO = sinhx;
 2358              		.loc 1 735 5 is_stmt 1 view .LVU790
 2359              		.loc 1 735 19 is_stmt 0 view .LVU791
 2360 007a 5460     		str	r4, [r2, #4]
 736:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_B = coshx;
 2361              		.loc 1 736 5 is_stmt 1 view .LVU792
 2362              		.loc 1 736 17 is_stmt 0 view .LVU793
 2363 007c D360     		str	r3, [r2, #12]
 737:Library/src/lcm32f06x_cordic.c ****     while (DIV0->DIV_CTRL_b.DIV_IN_PROCCEED == RESET)
 2364              		.loc 1 737 5 is_stmt 1 view .LVU794
 2365              		.loc 1 737 45 view .LVU795
 2366              		.loc 1 737 28 is_stmt 0 view .LVU796
 2367 007e 1368     		ldr	r3, [r2]
 2368              	.LVL99:
 2369              		.loc 1 737 45 view .LVU797
 2370 0080 9B07     		lsls	r3, r3, #30
 2371 0082 07D4     		bmi	.L172
 2372              	.L173:
 738:Library/src/lcm32f06x_cordic.c ****     {
 739:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 2373              		.loc 1 739 9 is_stmt 1 view .LVU798
 2374              		.syntax divided
 2375              	@ 739 "Library/src/lcm32f06x_cordic.c" 1
 2376 0084 C046     		nop
 2377              	@ 0 "" 2
 2378              		.loc 1 739 18 view .LVU799
 2379              	@ 739 "Library/src/lcm32f06x_cordic.c" 1
 2380 0086 C046     		nop
 2381              	@ 0 "" 2
 2382              		.loc 1 739 27 view .LVU800
 2383              	@ 739 "Library/src/lcm32f06x_cordic.c" 1
 2384 0088 C046     		nop
 2385              	@ 0 "" 2
 2386              		.loc 1 739 36 view .LVU801
 2387              	@ 739 "Library/src/lcm32f06x_cordic.c" 1
 2388 008a C046     		nop
 2389              	@ 0 "" 2
 2390              		.loc 1 739 45 view .LVU802
 2391              	@ 739 "Library/src/lcm32f06x_cordic.c" 1
 2392 008c C046     		nop
 2393              	@ 0 "" 2
 737:Library/src/lcm32f06x_cordic.c ****     while (DIV0->DIV_CTRL_b.DIV_IN_PROCCEED == RESET)
 2394              		.loc 1 737 45 view .LVU803
 737:Library/src/lcm32f06x_cordic.c ****     while (DIV0->DIV_CTRL_b.DIV_IN_PROCCEED == RESET)
ARM GAS  /tmp/ccteMF1S.s 			page 78


 2395              		.loc 1 737 28 is_stmt 0 view .LVU804
 2396              		.thumb
 2397              		.syntax unified
 2398 008e 1368     		ldr	r3, [r2]
 737:Library/src/lcm32f06x_cordic.c ****     while (DIV0->DIV_CTRL_b.DIV_IN_PROCCEED == RESET)
 2399              		.loc 1 737 45 view .LVU805
 2400 0090 9B07     		lsls	r3, r3, #30
 2401 0092 F7D5     		bpl	.L173
 2402              	.L172:
 740:Library/src/lcm32f06x_cordic.c ****     };
 2403              		.loc 1 740 6 is_stmt 1 view .LVU806
 741:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_CTRL_b.DIV_IN_PROCCEED = SET; //写1清0
 2404              		.loc 1 741 5 view .LVU807
 742:Library/src/lcm32f06x_cordic.c ****     tanhx = ((int32_t)DIV0->DIV_QUOT) << (IQnIn - 7);
 743:Library/src/lcm32f06x_cordic.c ****     return  ((int32_t)tanhx);
 744:Library/src/lcm32f06x_cordic.c **** }
 2405              		.loc 1 744 1 is_stmt 0 view .LVU808
 2406              		@ sp needed
 741:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_CTRL_b.DIV_IN_PROCCEED = SET; //写1清0
 2407              		.loc 1 741 38 view .LVU809
 2408 0094 0220     		movs	r0, #2
 2409 0096 0A4B     		ldr	r3, .L187+12
 742:Library/src/lcm32f06x_cordic.c ****     tanhx = ((int32_t)DIV0->DIV_QUOT) << (IQnIn - 7);
 2410              		.loc 1 742 49 view .LVU810
 2411 0098 0739     		subs	r1, r1, #7
 2412              	.LVL100:
 741:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_CTRL_b.DIV_IN_PROCCEED = SET; //写1清0
 2413              		.loc 1 741 38 view .LVU811
 2414 009a 1A68     		ldr	r2, [r3]
 2415              	.LVL101:
 741:Library/src/lcm32f06x_cordic.c ****     DIV0->DIV_CTRL_b.DIV_IN_PROCCEED = SET; //写1清0
 2416              		.loc 1 741 38 view .LVU812
 2417 009c 0243     		orrs	r2, r0
 2418 009e 1A60     		str	r2, [r3]
 2419              	.LVL102:
 742:Library/src/lcm32f06x_cordic.c ****     tanhx = ((int32_t)DIV0->DIV_QUOT) << (IQnIn - 7);
 2420              		.loc 1 742 5 is_stmt 1 view .LVU813
 742:Library/src/lcm32f06x_cordic.c ****     tanhx = ((int32_t)DIV0->DIV_QUOT) << (IQnIn - 7);
 2421              		.loc 1 742 27 is_stmt 0 view .LVU814
 2422 00a0 1869     		ldr	r0, [r3, #16]
 2423              	.LVL103:
 743:Library/src/lcm32f06x_cordic.c **** }
 2424              		.loc 1 743 5 is_stmt 1 view .LVU815
 742:Library/src/lcm32f06x_cordic.c ****     tanhx = ((int32_t)DIV0->DIV_QUOT) << (IQnIn - 7);
 2425              		.loc 1 742 11 is_stmt 0 view .LVU816
 2426 00a2 8840     		lsls	r0, r0, r1
 2427              	.LVL104:
 2428              		.loc 1 744 1 view .LVU817
 2429 00a4 30BD     		pop	{r4, r5, pc}
 2430              	.LVL105:
 2431              	.L166:
 716:Library/src/lcm32f06x_cordic.c ****     }
 2432              		.loc 1 716 9 is_stmt 1 view .LVU818
 716:Library/src/lcm32f06x_cordic.c ****     }
 2433              		.loc 1 716 41 is_stmt 0 view .LVU819
 2434 00a6 0C00     		movs	r4, r1
 716:Library/src/lcm32f06x_cordic.c ****     }
ARM GAS  /tmp/ccteMF1S.s 			page 79


 2435              		.loc 1 716 31 view .LVU820
 2436 00a8 034B     		ldr	r3, .L187+4
 716:Library/src/lcm32f06x_cordic.c ****     }
 2437              		.loc 1 716 41 view .LVU821
 2438 00aa 173C     		subs	r4, r4, #23
 716:Library/src/lcm32f06x_cordic.c ****     }
 2439              		.loc 1 716 31 view .LVU822
 2440 00ac A340     		lsls	r3, r3, r4
 716:Library/src/lcm32f06x_cordic.c ****     }
 2441              		.loc 1 716 20 view .LVU823
 2442 00ae D360     		str	r3, [r2, #12]
 2443 00b0 B0E7     		b	.L167
 2444              	.L188:
 2445 00b2 C046     		.align	2
 2446              	.L187:
 2447 00b4 00000148 		.word	1208025088
 2448 00b8 478F9A00 		.word	10129223
 2449 00bc FFFEFFFF 		.word	-257
 2450 00c0 00500148 		.word	1208045568
 2451              		.cfi_endproc
 2452              	.LFE60:
 2454              		.section	.text.CORDIC_Exp,"ax",%progbits
 2455              		.align	1
 2456              		.p2align 2,,3
 2457              		.global	CORDIC_Exp
 2458              		.syntax unified
 2459              		.code	16
 2460              		.thumb_func
 2462              	CORDIC_Exp:
 2463              	.LVL106:
 2464              	.LFB61:
 745:Library/src/lcm32f06x_cordic.c **** 
 746:Library/src/lcm32f06x_cordic.c **** /**
 747:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Exp
 748:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the x-power of e.
 749:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算e 的 x 次幂。
 750:Library/src/lcm32f06x_cordic.c ****   * @param  InputValue: 
 751:Library/src/lcm32f06x_cordic.c ****   *         EN: input value.(The original value is limited to -1.1-1.1)
 752:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值。（原值限制在-1.1 - 1.1）
 753:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 754:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 755:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 756:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 757:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 758:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 759:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 760:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 761:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 762:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
 763:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 764:Library/src/lcm32f06x_cordic.c ****   * @retval uint32_t:
 765:Library/src/lcm32f06x_cordic.c ****   *         EN: Return the x-power of e. (input in IQ format).
 766:Library/src/lcm32f06x_cordic.c ****   *         CN: 返回e 的 x 次幂。（输入IQ格式）。
 767:Library/src/lcm32f06x_cordic.c ****   */
 768:Library/src/lcm32f06x_cordic.c **** int32_t CORDIC_Exp(int32_t InputValue, uint8_t IQnIn, uint32_t Accuracy)
 769:Library/src/lcm32f06x_cordic.c **** {
 2465              		.loc 1 769 1 is_stmt 1 view -0
ARM GAS  /tmp/ccteMF1S.s 			page 80


 2466              		.cfi_startproc
 2467              		@ args = 0, pretend = 0, frame = 0
 2468              		@ frame_needed = 0, uses_anonymous_args = 0
 770:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00003000 | Accuracy;
 2469              		.loc 1 770 5 view .LVU825
 2470              		.loc 1 770 30 is_stmt 0 view .LVU826
 2471 0000 C023     		movs	r3, #192
 2472 0002 9B01     		lsls	r3, r3, #6
 2473 0004 1A43     		orrs	r2, r3
 2474              	.LVL107:
 2475              		.loc 1 770 17 view .LVU827
 2476 0006 1F4B     		ldr	r3, .L206
 769:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00003000 | Accuracy;
 2477              		.loc 1 769 1 view .LVU828
 2478 0008 10B5     		push	{r4, lr}
 2479              	.LCFI13:
 2480              		.cfi_def_cfa_offset 8
 2481              		.cfi_offset 4, -8
 2482              		.cfi_offset 14, -4
 2483              		.loc 1 770 17 view .LVU829
 2484 000a 5A60     		str	r2, [r3, #4]
 771:Library/src/lcm32f06x_cordic.c **** 
 772:Library/src/lcm32f06x_cordic.c ****     if(IQnIn < 23)
 2485              		.loc 1 772 5 is_stmt 1 view .LVU830
 773:Library/src/lcm32f06x_cordic.c ****     {
 774:Library/src/lcm32f06x_cordic.c ****         CORDIC->XI = 10129223;
 775:Library/src/lcm32f06x_cordic.c ****     }
 776:Library/src/lcm32f06x_cordic.c ****     else
 777:Library/src/lcm32f06x_cordic.c ****     {
 778:Library/src/lcm32f06x_cordic.c ****         CORDIC->XI = 10129223 << (IQnIn - 23); // 1/0.82815936 * (1 << 23)
 779:Library/src/lcm32f06x_cordic.c ****     }
 780:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = 0;
 781:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2486              		.loc 1 781 36 is_stmt 0 view .LVU831
 2487 000c 1F22     		movs	r2, #31
 2488 000e 521A     		subs	r2, r2, r1
 2489              		.loc 1 781 29 view .LVU832
 2490 0010 9040     		lsls	r0, r0, r2
 2491              	.LVL108:
 772:Library/src/lcm32f06x_cordic.c ****     {
 2492              		.loc 1 772 7 view .LVU833
 2493 0012 1629     		cmp	r1, #22
 2494 0014 25D8     		bhi	.L190
 774:Library/src/lcm32f06x_cordic.c ****     }
 2495              		.loc 1 774 9 is_stmt 1 view .LVU834
 774:Library/src/lcm32f06x_cordic.c ****     }
 2496              		.loc 1 774 20 is_stmt 0 view .LVU835
 2497 0016 1C4A     		ldr	r2, .L206+4
 2498 0018 DA60     		str	r2, [r3, #12]
 780:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2499              		.loc 1 780 5 is_stmt 1 view .LVU836
 780:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2500              		.loc 1 780 16 is_stmt 0 view .LVU837
 2501 001a 0022     		movs	r2, #0
 2502 001c 1A61     		str	r2, [r3, #16]
 2503              		.loc 1 781 5 is_stmt 1 view .LVU838
 2504              		.loc 1 781 16 is_stmt 0 view .LVU839
ARM GAS  /tmp/ccteMF1S.s 			page 81


 2505 001e 5861     		str	r0, [r3, #20]
 782:Library/src/lcm32f06x_cordic.c ****   
 783:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 2506              		.loc 1 783 5 is_stmt 1 view .LVU840
 2507              		.loc 1 783 11 is_stmt 0 view .LVU841
 2508 0020 1868     		ldr	r0, [r3]
 2509              		.loc 1 783 18 view .LVU842
 2510 0022 0132     		adds	r2, r2, #1
 2511 0024 FF32     		adds	r2, r2, #255
 2512 0026 0243     		orrs	r2, r0
 2513 0028 1A60     		str	r2, [r3]
 784:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2514              		.loc 1 784 5 is_stmt 1 view .LVU843
 2515              		.loc 1 784 11 view .LVU844
 2516              		.loc 1 784 19 is_stmt 0 view .LVU845
 2517 002a 1B68     		ldr	r3, [r3]
 2518              		.loc 1 784 11 view .LVU846
 2519 002c DB07     		lsls	r3, r3, #31
 2520 002e 10D4     		bmi	.L195
 2521              	.L191:
 2522              		.loc 1 784 26 view .LVU847
 2523 0030 0122     		movs	r2, #1
 2524              		.loc 1 784 19 view .LVU848
 2525 0032 1448     		ldr	r0, .L206
 2526              	.L193:
 785:Library/src/lcm32f06x_cordic.c ****     {
 786:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 2527              		.loc 1 786 9 is_stmt 1 view .LVU849
 2528              		.syntax divided
 2529              	@ 786 "Library/src/lcm32f06x_cordic.c" 1
 2530 0034 C046     		nop
 2531              	@ 0 "" 2
 2532              		.loc 1 786 18 view .LVU850
 2533              	@ 786 "Library/src/lcm32f06x_cordic.c" 1
 2534 0036 C046     		nop
 2535              	@ 0 "" 2
 2536              		.loc 1 786 27 view .LVU851
 2537              	@ 786 "Library/src/lcm32f06x_cordic.c" 1
 2538 0038 C046     		nop
 2539              	@ 0 "" 2
 2540              		.loc 1 786 36 view .LVU852
 2541              	@ 786 "Library/src/lcm32f06x_cordic.c" 1
 2542 003a C046     		nop
 2543              	@ 0 "" 2
 2544              		.loc 1 786 45 view .LVU853
 2545              	@ 786 "Library/src/lcm32f06x_cordic.c" 1
 2546 003c C046     		nop
 2547              	@ 0 "" 2
 784:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2548              		.loc 1 784 11 view .LVU854
 784:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2549              		.loc 1 784 19 is_stmt 0 view .LVU855
 2550              		.thumb
 2551              		.syntax unified
 2552 003e 0368     		ldr	r3, [r0]
 784:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2553              		.loc 1 784 11 view .LVU856
ARM GAS  /tmp/ccteMF1S.s 			page 82


 2554 0040 1A42     		tst	r2, r3
 2555 0042 F7D0     		beq	.L193
 787:Library/src/lcm32f06x_cordic.c ****     };
 2556              		.loc 1 787 6 is_stmt 1 view .LVU857
 788:Library/src/lcm32f06x_cordic.c ****     if(IQnIn < 23)
 2557              		.loc 1 788 5 view .LVU858
 2558              		.loc 1 788 7 is_stmt 0 view .LVU859
 2559 0044 1629     		cmp	r1, #22
 2560 0046 04D9     		bls	.L195
 2561              	.L194:
 789:Library/src/lcm32f06x_cordic.c ****     {
 790:Library/src/lcm32f06x_cordic.c ****         return  ((int32_t)((int32_t)CORDIC->XO + (int32_t)CORDIC->YO) >> (23 - IQnIn));
 791:Library/src/lcm32f06x_cordic.c ****     }
 792:Library/src/lcm32f06x_cordic.c ****     else
 793:Library/src/lcm32f06x_cordic.c ****     {
 794:Library/src/lcm32f06x_cordic.c ****         return  ((int32_t)CORDIC->XO + (int32_t)CORDIC->YO);
 2562              		.loc 1 794 9 is_stmt 1 view .LVU860
 2563              		.loc 1 794 33 is_stmt 0 view .LVU861
 2564 0048 0E4B     		ldr	r3, .L206
 2565 004a 9869     		ldr	r0, [r3, #24]
 2566              		.loc 1 794 55 view .LVU862
 2567 004c DB69     		ldr	r3, [r3, #28]
 2568              		.loc 1 794 38 view .LVU863
 2569 004e C018     		adds	r0, r0, r3
 2570              	.L189:
 795:Library/src/lcm32f06x_cordic.c ****     }
 796:Library/src/lcm32f06x_cordic.c **** }
 2571              		.loc 1 796 1 view .LVU864
 2572              		@ sp needed
 2573 0050 10BD     		pop	{r4, pc}
 2574              	.L195:
 790:Library/src/lcm32f06x_cordic.c ****     }
 2575              		.loc 1 790 9 is_stmt 1 view .LVU865
 790:Library/src/lcm32f06x_cordic.c ****     }
 2576              		.loc 1 790 43 is_stmt 0 view .LVU866
 2577 0052 0C4B     		ldr	r3, .L206
 2578 0054 9869     		ldr	r0, [r3, #24]
 790:Library/src/lcm32f06x_cordic.c ****     }
 2579              		.loc 1 790 65 view .LVU867
 2580 0056 DB69     		ldr	r3, [r3, #28]
 790:Library/src/lcm32f06x_cordic.c ****     }
 2581              		.loc 1 790 18 view .LVU868
 2582 0058 C018     		adds	r0, r0, r3
 790:Library/src/lcm32f06x_cordic.c ****     }
 2583              		.loc 1 790 78 view .LVU869
 2584 005a 1723     		movs	r3, #23
 2585 005c 5B1A     		subs	r3, r3, r1
 790:Library/src/lcm32f06x_cordic.c ****     }
 2586              		.loc 1 790 71 view .LVU870
 2587 005e 1841     		asrs	r0, r0, r3
 2588 0060 F6E7     		b	.L189
 2589              	.L190:
 778:Library/src/lcm32f06x_cordic.c ****     }
 2590              		.loc 1 778 9 is_stmt 1 view .LVU871
 778:Library/src/lcm32f06x_cordic.c ****     }
 2591              		.loc 1 778 41 is_stmt 0 view .LVU872
 2592 0062 0C00     		movs	r4, r1
ARM GAS  /tmp/ccteMF1S.s 			page 83


 778:Library/src/lcm32f06x_cordic.c ****     }
 2593              		.loc 1 778 31 view .LVU873
 2594 0064 084A     		ldr	r2, .L206+4
 778:Library/src/lcm32f06x_cordic.c ****     }
 2595              		.loc 1 778 41 view .LVU874
 2596 0066 173C     		subs	r4, r4, #23
 778:Library/src/lcm32f06x_cordic.c ****     }
 2597              		.loc 1 778 31 view .LVU875
 2598 0068 A240     		lsls	r2, r2, r4
 778:Library/src/lcm32f06x_cordic.c ****     }
 2599              		.loc 1 778 20 view .LVU876
 2600 006a DA60     		str	r2, [r3, #12]
 780:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2601              		.loc 1 780 5 is_stmt 1 view .LVU877
 780:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = InputValue << (31 - IQnIn);
 2602              		.loc 1 780 16 is_stmt 0 view .LVU878
 2603 006c 0022     		movs	r2, #0
 2604 006e 1A61     		str	r2, [r3, #16]
 781:Library/src/lcm32f06x_cordic.c ****   
 2605              		.loc 1 781 5 is_stmt 1 view .LVU879
 781:Library/src/lcm32f06x_cordic.c ****   
 2606              		.loc 1 781 16 is_stmt 0 view .LVU880
 2607 0070 5861     		str	r0, [r3, #20]
 783:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2608              		.loc 1 783 5 is_stmt 1 view .LVU881
 783:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2609              		.loc 1 783 11 is_stmt 0 view .LVU882
 2610 0072 1868     		ldr	r0, [r3]
 783:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2611              		.loc 1 783 18 view .LVU883
 2612 0074 0132     		adds	r2, r2, #1
 2613 0076 FF32     		adds	r2, r2, #255
 2614 0078 0243     		orrs	r2, r0
 2615 007a 1A60     		str	r2, [r3]
 784:Library/src/lcm32f06x_cordic.c ****     {
 2616              		.loc 1 784 5 is_stmt 1 view .LVU884
 784:Library/src/lcm32f06x_cordic.c ****     {
 2617              		.loc 1 784 11 view .LVU885
 784:Library/src/lcm32f06x_cordic.c ****     {
 2618              		.loc 1 784 19 is_stmt 0 view .LVU886
 2619 007c 1B68     		ldr	r3, [r3]
 784:Library/src/lcm32f06x_cordic.c ****     {
 2620              		.loc 1 784 11 view .LVU887
 2621 007e DB07     		lsls	r3, r3, #31
 2622 0080 D6D5     		bpl	.L191
 2623 0082 E1E7     		b	.L194
 2624              	.L207:
 2625              		.align	2
 2626              	.L206:
 2627 0084 00000148 		.word	1208025088
 2628 0088 478F9A00 		.word	10129223
 2629              		.cfi_endproc
 2630              	.LFE61:
 2632              		.section	.text.CORDIC_arcTan2,"ax",%progbits
 2633              		.align	1
 2634              		.p2align 2,,3
 2635              		.global	CORDIC_arcTan2
ARM GAS  /tmp/ccteMF1S.s 			page 84


 2636              		.syntax unified
 2637              		.code	16
 2638              		.thumb_func
 2640              	CORDIC_arcTan2:
 2641              	.LVL109:
 2642              	.LFB62:
 797:Library/src/lcm32f06x_cordic.c **** 
 798:Library/src/lcm32f06x_cordic.c **** /**
 799:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_arcTan2
 800:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the arctangent of input data.
 801:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算输入数据的反正切值。
 802:Library/src/lcm32f06x_cordic.c ****   * @param  InputValueX: 
 803:Library/src/lcm32f06x_cordic.c ****   *         EN: input value x cos.
 804:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值X cos。
 805:Library/src/lcm32f06x_cordic.c ****   * @param  InputValueY: 
 806:Library/src/lcm32f06x_cordic.c ****   *         EN: input value Y sin.
 807:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值Y sin。
 808:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 809:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 810:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 811:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 812:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 813:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 814:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 815:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 816:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 817:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
 818:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 819:Library/src/lcm32f06x_cordic.c ****   * @retval uint32_t:
 820:Library/src/lcm32f06x_cordic.c ****   *         EN: Return the arctangent value of the input data. (input in IQ format).
 821:Library/src/lcm32f06x_cordic.c ****   *         CN: 返回输入数据的反正切值。（输入IQ格式）。
 822:Library/src/lcm32f06x_cordic.c ****   */
 823:Library/src/lcm32f06x_cordic.c **** int32_t CORDIC_arcTan2(int32_t InputValueX, int32_t InputValueY, uint8_t IQnIn, uint32_t Accuracy)
 824:Library/src/lcm32f06x_cordic.c **** {
 2643              		.loc 1 824 1 is_stmt 1 view -0
 2644              		.cfi_startproc
 2645              		@ args = 0, pretend = 0, frame = 0
 2646              		@ frame_needed = 0, uses_anonymous_args = 0
 825:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00001100 | Accuracy;
 2647              		.loc 1 825 5 view .LVU889
 824:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00001100 | Accuracy;
 2648              		.loc 1 824 1 is_stmt 0 view .LVU890
 2649 0000 10B5     		push	{r4, lr}
 2650              	.LCFI14:
 2651              		.cfi_def_cfa_offset 8
 2652              		.cfi_offset 4, -8
 2653              		.cfi_offset 14, -4
 2654              		.loc 1 825 30 view .LVU891
 2655 0002 8824     		movs	r4, #136
 2656 0004 6401     		lsls	r4, r4, #5
 2657 0006 2343     		orrs	r3, r4
 2658              	.LVL110:
 2659              		.loc 1 825 17 view .LVU892
 2660 0008 0E4C     		ldr	r4, .L214
 2661 000a 6360     		str	r3, [r4, #4]
 826:Library/src/lcm32f06x_cordic.c **** 
 827:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = InputValueX; 
ARM GAS  /tmp/ccteMF1S.s 			page 85


 2662              		.loc 1 827 5 is_stmt 1 view .LVU893
 828:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValueY;
 829:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 2663              		.loc 1 829 16 is_stmt 0 view .LVU894
 2664 000c 0023     		movs	r3, #0
 827:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValueY;
 2665              		.loc 1 827 16 view .LVU895
 2666 000e E060     		str	r0, [r4, #12]
 828:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValueY;
 2667              		.loc 1 828 5 is_stmt 1 view .LVU896
 828:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValueY;
 2668              		.loc 1 828 16 is_stmt 0 view .LVU897
 2669 0010 2161     		str	r1, [r4, #16]
 2670              		.loc 1 829 5 is_stmt 1 view .LVU898
 2671              		.loc 1 829 16 is_stmt 0 view .LVU899
 2672 0012 6361     		str	r3, [r4, #20]
 830:Library/src/lcm32f06x_cordic.c ****   
 831:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 2673              		.loc 1 831 5 is_stmt 1 view .LVU900
 2674              		.loc 1 831 11 is_stmt 0 view .LVU901
 2675 0014 2168     		ldr	r1, [r4]
 2676              	.LVL111:
 2677              		.loc 1 831 18 view .LVU902
 2678 0016 0133     		adds	r3, r3, #1
 2679 0018 FF33     		adds	r3, r3, #255
 2680 001a 0B43     		orrs	r3, r1
 2681 001c 2360     		str	r3, [r4]
 832:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2682              		.loc 1 832 5 is_stmt 1 view .LVU903
 2683              		.loc 1 832 11 view .LVU904
 2684              		.loc 1 832 19 is_stmt 0 view .LVU905
 2685 001e 2368     		ldr	r3, [r4]
 2686              		.loc 1 832 11 view .LVU906
 2687 0020 DB07     		lsls	r3, r3, #31
 2688 0022 08D4     		bmi	.L209
 2689              		.loc 1 832 26 view .LVU907
 2690 0024 0121     		movs	r1, #1
 2691              	.L210:
 833:Library/src/lcm32f06x_cordic.c ****     {
 834:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 2692              		.loc 1 834 9 is_stmt 1 view .LVU908
 2693              		.syntax divided
 2694              	@ 834 "Library/src/lcm32f06x_cordic.c" 1
 2695 0026 C046     		nop
 2696              	@ 0 "" 2
 2697              		.loc 1 834 18 view .LVU909
 2698              	@ 834 "Library/src/lcm32f06x_cordic.c" 1
 2699 0028 C046     		nop
 2700              	@ 0 "" 2
 2701              		.loc 1 834 27 view .LVU910
 2702              	@ 834 "Library/src/lcm32f06x_cordic.c" 1
 2703 002a C046     		nop
 2704              	@ 0 "" 2
 2705              		.loc 1 834 36 view .LVU911
 2706              	@ 834 "Library/src/lcm32f06x_cordic.c" 1
 2707 002c C046     		nop
 2708              	@ 0 "" 2
ARM GAS  /tmp/ccteMF1S.s 			page 86


 2709              		.loc 1 834 45 view .LVU912
 2710              	@ 834 "Library/src/lcm32f06x_cordic.c" 1
 2711 002e C046     		nop
 2712              	@ 0 "" 2
 832:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2713              		.loc 1 832 11 view .LVU913
 832:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2714              		.loc 1 832 19 is_stmt 0 view .LVU914
 2715              		.thumb
 2716              		.syntax unified
 2717 0030 2368     		ldr	r3, [r4]
 832:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2718              		.loc 1 832 11 view .LVU915
 2719 0032 1942     		tst	r1, r3
 2720 0034 F7D0     		beq	.L210
 2721              	.L209:
 835:Library/src/lcm32f06x_cordic.c ****     };
 2722              		.loc 1 835 6 is_stmt 1 view .LVU916
 836:Library/src/lcm32f06x_cordic.c ****     return ((int32_t)CORDIC->ZO) >> (31 - IQnIn);
 2723              		.loc 1 836 5 view .LVU917
 837:Library/src/lcm32f06x_cordic.c **** }
 2724              		.loc 1 837 1 is_stmt 0 view .LVU918
 2725              		@ sp needed
 836:Library/src/lcm32f06x_cordic.c ****     return ((int32_t)CORDIC->ZO) >> (31 - IQnIn);
 2726              		.loc 1 836 28 view .LVU919
 2727 0036 034B     		ldr	r3, .L214
 2728 0038 186A     		ldr	r0, [r3, #32]
 2729              	.LVL112:
 836:Library/src/lcm32f06x_cordic.c ****     return ((int32_t)CORDIC->ZO) >> (31 - IQnIn);
 2730              		.loc 1 836 41 view .LVU920
 2731 003a 1F23     		movs	r3, #31
 2732 003c 9A1A     		subs	r2, r3, r2
 2733              	.LVL113:
 836:Library/src/lcm32f06x_cordic.c ****     return ((int32_t)CORDIC->ZO) >> (31 - IQnIn);
 2734              		.loc 1 836 34 view .LVU921
 2735 003e 1041     		asrs	r0, r0, r2
 2736              		.loc 1 837 1 view .LVU922
 2737 0040 10BD     		pop	{r4, pc}
 2738              	.L215:
 2739 0042 C046     		.align	2
 2740              	.L214:
 2741 0044 00000148 		.word	1208025088
 2742              		.cfi_endproc
 2743              	.LFE62:
 2745              		.section	.text.CORDIC_Mod,"ax",%progbits
 2746              		.align	1
 2747              		.p2align 2,,3
 2748              		.global	CORDIC_Mod
 2749              		.syntax unified
 2750              		.code	16
 2751              		.thumb_func
 2753              	CORDIC_Mod:
 2754              	.LVL114:
 2755              	.LFB63:
 838:Library/src/lcm32f06x_cordic.c **** 
 839:Library/src/lcm32f06x_cordic.c **** /**
 840:Library/src/lcm32f06x_cordic.c ****   * @name   CORDIC_Mod
ARM GAS  /tmp/ccteMF1S.s 			page 87


 841:Library/src/lcm32f06x_cordic.c ****   * @brief  EN: Calculate the modulus of input data.
 842:Library/src/lcm32f06x_cordic.c ****   *         CN: 计算输入数据的模值。
 843:Library/src/lcm32f06x_cordic.c ****   * @param  InputValueX: 
 844:Library/src/lcm32f06x_cordic.c ****   *         EN: input value x.
 845:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值X。
 846:Library/src/lcm32f06x_cordic.c ****   * @param  InputValueY: 
 847:Library/src/lcm32f06x_cordic.c ****   *         EN: input value Y.
 848:Library/src/lcm32f06x_cordic.c ****   *         CN: 输入值Y。
 849:Library/src/lcm32f06x_cordic.c ****   * @param  IQnIn: 
 850:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the IQ format of the input value.
 851:Library/src/lcm32f06x_cordic.c ****   *         CN: 指定输入数据的IQ格式。
 852:Library/src/lcm32f06x_cordic.c ****   * @param  Accuracy: 
 853:Library/src/lcm32f06x_cordic.c ****   *         EN: Specifies the CORDIC interrupt sources to be enabled or disabled.
 854:Library/src/lcm32f06x_cordic.c ****   *         CN: CORDIC 运算的迭代次数，计算消耗的周期数。
 855:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_1
 856:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_2
 857:Library/src/lcm32f06x_cordic.c ****   *             @arg ...
 858:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_31
 859:Library/src/lcm32f06x_cordic.c ****   *             @arg CORDIC_CYCLES_32
 860:Library/src/lcm32f06x_cordic.c ****   * @retval uint32_t:
 861:Library/src/lcm32f06x_cordic.c ****   *         EN: Return the modulus value of the input data. (input in IQ format).
 862:Library/src/lcm32f06x_cordic.c ****   *         CN: 返回输入数据的模值。（输入IQ格式）。
 863:Library/src/lcm32f06x_cordic.c ****   */
 864:Library/src/lcm32f06x_cordic.c **** uint32_t CORDIC_Mod(int32_t InputValueX, int32_t InputValueY, uint8_t IQnIn, uint32_t Accuracy)
 865:Library/src/lcm32f06x_cordic.c **** {
 2756              		.loc 1 865 1 is_stmt 1 view -0
 2757              		.cfi_startproc
 2758              		@ args = 0, pretend = 0, frame = 0
 2759              		@ frame_needed = 0, uses_anonymous_args = 0
 866:Library/src/lcm32f06x_cordic.c ****     uint32_t Mod = 0;
 2760              		.loc 1 866 5 view .LVU924
 867:Library/src/lcm32f06x_cordic.c ****     CORDIC->CFG = 0x00001100 | Accuracy;
 2761              		.loc 1 867 5 view .LVU925
 865:Library/src/lcm32f06x_cordic.c ****     uint32_t Mod = 0;
 2762              		.loc 1 865 1 is_stmt 0 view .LVU926
 2763 0000 10B5     		push	{r4, lr}
 2764              	.LCFI15:
 2765              		.cfi_def_cfa_offset 8
 2766              		.cfi_offset 4, -8
 2767              		.cfi_offset 14, -4
 2768              		.loc 1 867 30 view .LVU927
 2769 0002 8824     		movs	r4, #136
 2770 0004 6401     		lsls	r4, r4, #5
 2771 0006 2343     		orrs	r3, r4
 2772              	.LVL115:
 2773              		.loc 1 867 17 view .LVU928
 2774 0008 0F4C     		ldr	r4, .L222
 2775 000a 6360     		str	r3, [r4, #4]
 868:Library/src/lcm32f06x_cordic.c **** 
 869:Library/src/lcm32f06x_cordic.c ****     CORDIC->XI = InputValueX; 
 2776              		.loc 1 869 5 is_stmt 1 view .LVU929
 870:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValueY;
 871:Library/src/lcm32f06x_cordic.c ****     CORDIC->ZI = 0;
 2777              		.loc 1 871 16 is_stmt 0 view .LVU930
 2778 000c 0023     		movs	r3, #0
 869:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValueY;
 2779              		.loc 1 869 16 view .LVU931
ARM GAS  /tmp/ccteMF1S.s 			page 88


 2780 000e E060     		str	r0, [r4, #12]
 870:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValueY;
 2781              		.loc 1 870 5 is_stmt 1 view .LVU932
 870:Library/src/lcm32f06x_cordic.c ****     CORDIC->YI = InputValueY;
 2782              		.loc 1 870 16 is_stmt 0 view .LVU933
 2783 0010 2161     		str	r1, [r4, #16]
 2784              		.loc 1 871 5 is_stmt 1 view .LVU934
 2785              		.loc 1 871 16 is_stmt 0 view .LVU935
 2786 0012 6361     		str	r3, [r4, #20]
 872:Library/src/lcm32f06x_cordic.c ****   
 873:Library/src/lcm32f06x_cordic.c ****     CORDIC->CTRL |= CORDIC_CTRL_START_Msk;
 2787              		.loc 1 873 5 is_stmt 1 view .LVU936
 2788              		.loc 1 873 11 is_stmt 0 view .LVU937
 2789 0014 2168     		ldr	r1, [r4]
 2790              	.LVL116:
 2791              		.loc 1 873 18 view .LVU938
 2792 0016 0133     		adds	r3, r3, #1
 2793 0018 FF33     		adds	r3, r3, #255
 2794 001a 0B43     		orrs	r3, r1
 2795 001c 2360     		str	r3, [r4]
 874:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2796              		.loc 1 874 5 is_stmt 1 view .LVU939
 2797              		.loc 1 874 11 view .LVU940
 2798              		.loc 1 874 19 is_stmt 0 view .LVU941
 2799 001e 2368     		ldr	r3, [r4]
 2800              		.loc 1 874 11 view .LVU942
 2801 0020 DB07     		lsls	r3, r3, #31
 2802 0022 08D4     		bmi	.L217
 2803              		.loc 1 874 26 view .LVU943
 2804 0024 0121     		movs	r1, #1
 2805              	.L218:
 875:Library/src/lcm32f06x_cordic.c ****     {
 876:Library/src/lcm32f06x_cordic.c ****         __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
 2806              		.loc 1 876 9 is_stmt 1 view .LVU944
 2807              		.syntax divided
 2808              	@ 876 "Library/src/lcm32f06x_cordic.c" 1
 2809 0026 C046     		nop
 2810              	@ 0 "" 2
 2811              		.loc 1 876 18 view .LVU945
 2812              	@ 876 "Library/src/lcm32f06x_cordic.c" 1
 2813 0028 C046     		nop
 2814              	@ 0 "" 2
 2815              		.loc 1 876 27 view .LVU946
 2816              	@ 876 "Library/src/lcm32f06x_cordic.c" 1
 2817 002a C046     		nop
 2818              	@ 0 "" 2
 2819              		.loc 1 876 36 view .LVU947
 2820              	@ 876 "Library/src/lcm32f06x_cordic.c" 1
 2821 002c C046     		nop
 2822              	@ 0 "" 2
 2823              		.loc 1 876 45 view .LVU948
 2824              	@ 876 "Library/src/lcm32f06x_cordic.c" 1
 2825 002e C046     		nop
 2826              	@ 0 "" 2
 874:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2827              		.loc 1 874 11 view .LVU949
 874:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
ARM GAS  /tmp/ccteMF1S.s 			page 89


 2828              		.loc 1 874 19 is_stmt 0 view .LVU950
 2829              		.thumb
 2830              		.syntax unified
 2831 0030 2368     		ldr	r3, [r4]
 874:Library/src/lcm32f06x_cordic.c ****     while(!(CORDIC->CTRL & CORDIC_CTRL_DONE_Msk))
 2832              		.loc 1 874 11 view .LVU951
 2833 0032 1942     		tst	r1, r3
 2834 0034 F7D0     		beq	.L218
 2835              	.L217:
 877:Library/src/lcm32f06x_cordic.c ****     };
 2836              		.loc 1 877 6 is_stmt 1 view .LVU952
 878:Library/src/lcm32f06x_cordic.c ****     Mod = 1304065952 >> (IQnIn);
 2837              		.loc 1 878 5 view .LVU953
 2838              	.LVL117:
 879:Library/src/lcm32f06x_cordic.c ****     return (uint32_t)((CORDIC->XO) * Mod) >> (31 - IQnIn);
 2839              		.loc 1 879 5 view .LVU954
 880:Library/src/lcm32f06x_cordic.c **** }
 2840              		.loc 1 880 1 is_stmt 0 view .LVU955
 2841              		@ sp needed
 879:Library/src/lcm32f06x_cordic.c ****     return (uint32_t)((CORDIC->XO) * Mod) >> (31 - IQnIn);
 2842              		.loc 1 879 30 view .LVU956
 2843 0036 044B     		ldr	r3, .L222
 2844 0038 9869     		ldr	r0, [r3, #24]
 2845              	.LVL118:
 878:Library/src/lcm32f06x_cordic.c ****     Mod = 1304065952 >> (IQnIn);
 2846              		.loc 1 878 22 view .LVU957
 2847 003a 044B     		ldr	r3, .L222+4
 2848 003c 1341     		asrs	r3, r3, r2
 2849              	.LVL119:
 879:Library/src/lcm32f06x_cordic.c ****     return (uint32_t)((CORDIC->XO) * Mod) >> (31 - IQnIn);
 2850              		.loc 1 879 36 view .LVU958
 2851 003e 5843     		muls	r0, r3
 879:Library/src/lcm32f06x_cordic.c ****     return (uint32_t)((CORDIC->XO) * Mod) >> (31 - IQnIn);
 2852              		.loc 1 879 50 view .LVU959
 2853 0040 1F23     		movs	r3, #31
 2854              	.LVL120:
 879:Library/src/lcm32f06x_cordic.c ****     return (uint32_t)((CORDIC->XO) * Mod) >> (31 - IQnIn);
 2855              		.loc 1 879 50 view .LVU960
 2856 0042 9B1A     		subs	r3, r3, r2
 879:Library/src/lcm32f06x_cordic.c ****     return (uint32_t)((CORDIC->XO) * Mod) >> (31 - IQnIn);
 2857              		.loc 1 879 43 view .LVU961
 2858 0044 D840     		lsrs	r0, r0, r3
 2859              		.loc 1 880 1 view .LVU962
 2860 0046 10BD     		pop	{r4, pc}
 2861              	.L223:
 2862              		.align	2
 2863              	.L222:
 2864 0048 00000148 		.word	1208025088
 2865 004c A077BA4D 		.word	1304065952
 2866              		.cfi_endproc
 2867              	.LFE63:
 2869              		.text
 2870              	.Letext0:
 2871              		.file 3 "Library/inc/lcm32f06x.h"
 2872              		.file 4 "/home/ha/toolchain/arm-gnu-toolchain-14.3/arm-none-eabi/include/machine/_default_types.h"
 2873              		.file 5 "/home/ha/toolchain/arm-gnu-toolchain-14.3/arm-none-eabi/include/sys/_stdint.h"
 2874              		.file 6 "Library/inc/lcm32f06x_cordic.h"
ARM GAS  /tmp/ccteMF1S.s 			page 90


ARM GAS  /tmp/ccteMF1S.s 			page 91


DEFINED SYMBOLS
                            *ABS*:00000000 lcm32f06x_cordic.c
     /tmp/ccteMF1S.s:17     .text.CORDIC_Init:00000000 $t
     /tmp/ccteMF1S.s:24     .text.CORDIC_Init:00000000 CORDIC_Init
     /tmp/ccteMF1S.s:78     .text.CORDIC_Init:00000028 $d
     /tmp/ccteMF1S.s:83     .text.CORDIC_Start:00000000 $t
     /tmp/ccteMF1S.s:90     .text.CORDIC_Start:00000000 CORDIC_Start
     /tmp/ccteMF1S.s:178    .text.CORDIC_Start:00000034 $d
     /tmp/ccteMF1S.s:183    .text.CORDIC_Circle_System_Config:00000000 $t
     /tmp/ccteMF1S.s:190    .text.CORDIC_Circle_System_Config:00000000 CORDIC_Circle_System_Config
     /tmp/ccteMF1S.s:417    .text.CORDIC_Circle_System_Config:000000a8 $d
     /tmp/ccteMF1S.s:424    .text.CORDIC_Hyperbolic_System_Config:00000000 $t
     /tmp/ccteMF1S.s:431    .text.CORDIC_Hyperbolic_System_Config:00000000 CORDIC_Hyperbolic_System_Config
     /tmp/ccteMF1S.s:658    .text.CORDIC_Hyperbolic_System_Config:000000a8 $d
     /tmp/ccteMF1S.s:665    .text.CORDIC_ITConfig:00000000 $t
     /tmp/ccteMF1S.s:672    .text.CORDIC_ITConfig:00000000 CORDIC_ITConfig
     /tmp/ccteMF1S.s:706    .text.CORDIC_ITConfig:00000014 $d
     /tmp/ccteMF1S.s:711    .text.CORDIC_GetFlagStatus:00000000 $t
     /tmp/ccteMF1S.s:718    .text.CORDIC_GetFlagStatus:00000000 CORDIC_GetFlagStatus
     /tmp/ccteMF1S.s:751    .text.CORDIC_GetFlagStatus:00000010 $d
     /tmp/ccteMF1S.s:756    .text.CORDIC_ClearITPendingBit:00000000 $t
     /tmp/ccteMF1S.s:763    .text.CORDIC_ClearITPendingBit:00000000 CORDIC_ClearITPendingBit
     /tmp/ccteMF1S.s:784    .text.CORDIC_ClearITPendingBit:00000008 $d
     /tmp/ccteMF1S.s:789    .text.CORDIC_Sqrt:00000000 $t
     /tmp/ccteMF1S.s:796    .text.CORDIC_Sqrt:00000000 CORDIC_Sqrt
     /tmp/ccteMF1S.s:1023   .text.CORDIC_Sqrt:00000090 $d
     /tmp/ccteMF1S.s:1030   .text.CORDIC_Sin:00000000 $t
     /tmp/ccteMF1S.s:1037   .text.CORDIC_Sin:00000000 CORDIC_Sin
     /tmp/ccteMF1S.s:1182   .text.CORDIC_Sin:00000050 $d
     /tmp/ccteMF1S.s:1188   .text.CORDIC_Cos:00000000 $t
     /tmp/ccteMF1S.s:1195   .text.CORDIC_Cos:00000000 CORDIC_Cos
     /tmp/ccteMF1S.s:1303   .text.CORDIC_Cos:0000004c $d
     /tmp/ccteMF1S.s:1309   .text.CORDIC_SinCos:00000000 $t
     /tmp/ccteMF1S.s:1316   .text.CORDIC_SinCos:00000000 CORDIC_SinCos
     /tmp/ccteMF1S.s:1435   .text.CORDIC_SinCos:00000054 $d
     /tmp/ccteMF1S.s:1441   .text.CORDIC_Tan:00000000 $t
     /tmp/ccteMF1S.s:1448   .text.CORDIC_Tan:00000000 CORDIC_Tan
     /tmp/ccteMF1S.s:1637   .text.CORDIC_Tan:0000007c $d
     /tmp/ccteMF1S.s:1645   .text.CORDIC_Sinh:00000000 $t
     /tmp/ccteMF1S.s:1652   .text.CORDIC_Sinh:00000000 CORDIC_Sinh
     /tmp/ccteMF1S.s:1809   .text.CORDIC_Sinh:0000007c $d
     /tmp/ccteMF1S.s:1815   .text.CORDIC_Cosh:00000000 $t
     /tmp/ccteMF1S.s:1822   .text.CORDIC_Cosh:00000000 CORDIC_Cosh
     /tmp/ccteMF1S.s:1979   .text.CORDIC_Cosh:0000007c $d
     /tmp/ccteMF1S.s:1985   .text.CORDIC_SinhCosh:00000000 $t
     /tmp/ccteMF1S.s:1992   .text.CORDIC_SinhCosh:00000000 CORDIC_SinhCosh
     /tmp/ccteMF1S.s:2174   .text.CORDIC_SinhCosh:0000008c $d
     /tmp/ccteMF1S.s:2180   .text.CORDIC_Tanh:00000000 $t
     /tmp/ccteMF1S.s:2187   .text.CORDIC_Tanh:00000000 CORDIC_Tanh
     /tmp/ccteMF1S.s:2447   .text.CORDIC_Tanh:000000b4 $d
     /tmp/ccteMF1S.s:2455   .text.CORDIC_Exp:00000000 $t
     /tmp/ccteMF1S.s:2462   .text.CORDIC_Exp:00000000 CORDIC_Exp
     /tmp/ccteMF1S.s:2627   .text.CORDIC_Exp:00000084 $d
     /tmp/ccteMF1S.s:2633   .text.CORDIC_arcTan2:00000000 $t
     /tmp/ccteMF1S.s:2640   .text.CORDIC_arcTan2:00000000 CORDIC_arcTan2
     /tmp/ccteMF1S.s:2741   .text.CORDIC_arcTan2:00000044 $d
     /tmp/ccteMF1S.s:2746   .text.CORDIC_Mod:00000000 $t
ARM GAS  /tmp/ccteMF1S.s 			page 92


     /tmp/ccteMF1S.s:2753   .text.CORDIC_Mod:00000000 CORDIC_Mod
     /tmp/ccteMF1S.s:2864   .text.CORDIC_Mod:00000048 $d

UNDEFINED SYMBOLS
__aeabi_ui2d
__aeabi_dmul
__aeabi_d2uiz
