ARM GAS  /tmp/ccMDRKnu.s 			page 1


   1              		.cpu cortex-m0
   2              		.arch armv6s-m
   3              		.fpu softvfp
   4              		.eabi_attribute 23, 1
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 2
   9              		.eabi_attribute 34, 0
  10              		.eabi_attribute 18, 4
  11              		.file	"lcm32f06x_dac.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.file 1 "Library/src/lcm32f06x_dac.c"
  16              		.section	.text.DAC_DeInit,"ax",%progbits
  17              		.align	1
  18              		.p2align 2,,3
  19              		.global	DAC_DeInit
  20              		.syntax unified
  21              		.code	16
  22              		.thumb_func
  24              	DAC_DeInit:
  25              	.LFB45:
   1:Library/src/lcm32f06x_dac.c **** /**
   2:Library/src/lcm32f06x_dac.c ****   ******************************************************************************
   3:Library/src/lcm32f06x_dac.c ****   * @file    lcm32f06x_dac.c
   4:Library/src/lcm32f06x_dac.c ****   * @author  System R&D Team
   5:Library/src/lcm32f06x_dac.c ****   * @version V2.0.2
   6:Library/src/lcm32f06x_dac.c ****   * @date    10-April-2025
   7:Library/src/lcm32f06x_dac.c ****   * @brief   This file provides all the DAC firmware functions.
   8:Library/src/lcm32f06x_dac.c ****   ******************************************************************************
   9:Library/src/lcm32f06x_dac.c ****   * @attention
  10:Library/src/lcm32f06x_dac.c ****   *
  11:Library/src/lcm32f06x_dac.c ****   * Copyright (c) Hangzhou Lingxin Microelectronics Co.
  12:Library/src/lcm32f06x_dac.c ****   * All rights reserved.
  13:Library/src/lcm32f06x_dac.c ****   *
  14:Library/src/lcm32f06x_dac.c ****   * This software is licensed under terms that can be found in the LICENSE file
  15:Library/src/lcm32f06x_dac.c ****   * in the root directory of this software component.
  16:Library/src/lcm32f06x_dac.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  17:Library/src/lcm32f06x_dac.c ****   *
  18:Library/src/lcm32f06x_dac.c ****   ******************************************************************************
  19:Library/src/lcm32f06x_dac.c ****   */
  20:Library/src/lcm32f06x_dac.c **** 
  21:Library/src/lcm32f06x_dac.c **** /* Includes ------------------------------------------------------------------*/
  22:Library/src/lcm32f06x_dac.c **** #include "lcm32f06x_dac.h"
  23:Library/src/lcm32f06x_dac.c **** 
  24:Library/src/lcm32f06x_dac.c **** /**
  25:Library/src/lcm32f06x_dac.c ****   * @name   DAC_DeInit
  26:Library/src/lcm32f06x_dac.c ****   * @brief  EN: Deinitializes DAC peripheral registers to their default reset values.
  27:Library/src/lcm32f06x_dac.c ****   *         CN: 将 DAC 外设寄存器初始化为其默认重置值。
  28:Library/src/lcm32f06x_dac.c ****   * @param  None
  29:Library/src/lcm32f06x_dac.c ****   * @retval None
  30:Library/src/lcm32f06x_dac.c ****   * @note   EN: DAC ACMP and OPA share the same clock enable which can be used once.
  31:Library/src/lcm32f06x_dac.c ****   *         CN: DAC ACMP OPA 共用一个时钟使能，使用一次即可。
  32:Library/src/lcm32f06x_dac.c ****   */
  33:Library/src/lcm32f06x_dac.c **** void DAC_DeInit(void)
ARM GAS  /tmp/ccMDRKnu.s 			page 2


  34:Library/src/lcm32f06x_dac.c **** {
  26              		.loc 1 34 1 view -0
  27              		.cfi_startproc
  28              		@ args = 0, pretend = 0, frame = 0
  29              		@ frame_needed = 0, uses_anonymous_args = 0
  35:Library/src/lcm32f06x_dac.c ****   RCC_APB0PeriphResetCmd(RCC_APB0Periph_ANACTRL, ENABLE);
  30              		.loc 1 35 3 view .LVU1
  34:Library/src/lcm32f06x_dac.c ****   RCC_APB0PeriphResetCmd(RCC_APB0Periph_ANACTRL, ENABLE);
  31              		.loc 1 34 1 is_stmt 0 view .LVU2
  32 0000 10B5     		push	{r4, lr}
  33              	.LCFI0:
  34              		.cfi_def_cfa_offset 8
  35              		.cfi_offset 4, -8
  36              		.cfi_offset 14, -4
  37              		.loc 1 35 3 view .LVU3
  38 0002 0121     		movs	r1, #1
  36:Library/src/lcm32f06x_dac.c ****   RCC_APB0PeriphResetCmd(RCC_APB0Periph_ANACTRL, DISABLE);
  37:Library/src/lcm32f06x_dac.c **** }
  39              		.loc 1 37 1 view .LVU4
  40              		@ sp needed
  35:Library/src/lcm32f06x_dac.c ****   RCC_APB0PeriphResetCmd(RCC_APB0Periph_ANACTRL, DISABLE);
  41              		.loc 1 35 3 view .LVU5
  42 0004 2020     		movs	r0, #32
  43 0006 FFF7FEFF 		bl	RCC_APB0PeriphResetCmd
  44              	.LVL0:
  36:Library/src/lcm32f06x_dac.c ****   RCC_APB0PeriphResetCmd(RCC_APB0Periph_ANACTRL, DISABLE);
  45              		.loc 1 36 3 is_stmt 1 view .LVU6
  46 000a 0021     		movs	r1, #0
  47 000c 2020     		movs	r0, #32
  48 000e FFF7FEFF 		bl	RCC_APB0PeriphResetCmd
  49              	.LVL1:
  50              		.loc 1 37 1 is_stmt 0 view .LVU7
  51 0012 10BD     		pop	{r4, pc}
  52              		.cfi_endproc
  53              	.LFE45:
  55              		.section	.text.DAC_Init,"ax",%progbits
  56              		.align	1
  57              		.p2align 2,,3
  58              		.global	DAC_Init
  59              		.syntax unified
  60              		.code	16
  61              		.thumb_func
  63              	DAC_Init:
  64              	.LVL2:
  65              	.LFB46:
  38:Library/src/lcm32f06x_dac.c **** 
  39:Library/src/lcm32f06x_dac.c **** /**
  40:Library/src/lcm32f06x_dac.c ****   * @name   DAC_Init
  41:Library/src/lcm32f06x_dac.c ****   * @brief  EN: Initializes the DAC peripheral according to the specified 
  42:Library/src/lcm32f06x_dac.c ****   *             parameters in the DAC.
  43:Library/src/lcm32f06x_dac.c ****   *         CN: 根据 DAC_InitStruct 中指定的参数初始化 DAC。
  44:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
  45:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
  46:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
  47:Library/src/lcm32f06x_dac.c ****   * @param  DAC_InitStruct: 
  48:Library/src/lcm32f06x_dac.c ****   *         EN: pointer to a DAC_InitTypeDef structure that contains the 
  49:Library/src/lcm32f06x_dac.c ****   *             configuration information for the specified DAC peripheral.
ARM GAS  /tmp/ccMDRKnu.s 			page 3


  50:Library/src/lcm32f06x_dac.c ****   *         CN: 指向 DAC_InitTypeDef 结构的指针，该结构包含指定 DAC 外设的配置信息。
  51:Library/src/lcm32f06x_dac.c ****   * @retval None
  52:Library/src/lcm32f06x_dac.c ****   */
  53:Library/src/lcm32f06x_dac.c **** void DAC_Init(DAC_TypeDef *DACx, DAC_InitTypeDef *DAC_InitStruct)
  54:Library/src/lcm32f06x_dac.c **** {
  66              		.loc 1 54 1 is_stmt 1 view -0
  67              		.cfi_startproc
  68              		@ args = 0, pretend = 0, frame = 0
  69              		@ frame_needed = 0, uses_anonymous_args = 0
  70              		@ link register save eliminated.
  55:Library/src/lcm32f06x_dac.c ****   DACx->DAC_CR = ( DAC_InitStruct->DAC_WaveGeneration |
  71              		.loc 1 55 3 view .LVU9
  72              		.loc 1 55 55 is_stmt 0 view .LVU10
  73 0000 4A68     		ldr	r2, [r1, #4]
  74 0002 0B68     		ldr	r3, [r1]
  56:Library/src/lcm32f06x_dac.c ****                    DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_Vref_Sele
  57:Library/src/lcm32f06x_dac.c ****                    ((DAC_InitStruct->DAC_DmaMode) << 12) | ((DAC_InitStruct->DAC_DMAUDR_IE) << 13))
  58:Library/src/lcm32f06x_dac.c ****   ANACTRL->ANA_CTRL |= DAC_InitStruct->DAC_OutputBuffer;
  59:Library/src/lcm32f06x_dac.c **** }
  75              		.loc 1 59 1 view .LVU11
  76              		@ sp needed
  55:Library/src/lcm32f06x_dac.c ****   DACx->DAC_CR = ( DAC_InitStruct->DAC_WaveGeneration |
  77              		.loc 1 55 55 view .LVU12
  78 0004 1343     		orrs	r3, r2
  56:Library/src/lcm32f06x_dac.c ****                    DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_Vref_Sele
  79              		.loc 1 56 69 view .LVU13
  80 0006 CA68     		ldr	r2, [r1, #12]
  81 0008 1343     		orrs	r3, r2
  57:Library/src/lcm32f06x_dac.c ****   ANACTRL->ANA_CTRL |= DAC_InitStruct->DAC_OutputBuffer;
  82              		.loc 1 57 51 view .LVU14
  83 000a 0A7C     		ldrb	r2, [r1, #16]
  84 000c 1203     		lsls	r2, r2, #12
  56:Library/src/lcm32f06x_dac.c ****                    DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_Vref_Sele
  85              		.loc 1 56 103 view .LVU15
  86 000e 1343     		orrs	r3, r2
  57:Library/src/lcm32f06x_dac.c ****   ANACTRL->ANA_CTRL |= DAC_InitStruct->DAC_OutputBuffer;
  87              		.loc 1 57 93 view .LVU16
  88 0010 4A7C     		ldrb	r2, [r1, #17]
  58:Library/src/lcm32f06x_dac.c **** }
  89              		.loc 1 58 21 view .LVU17
  90 0012 8968     		ldr	r1, [r1, #8]
  91              	.LVL3:
  57:Library/src/lcm32f06x_dac.c ****   ANACTRL->ANA_CTRL |= DAC_InitStruct->DAC_OutputBuffer;
  92              		.loc 1 57 93 view .LVU18
  93 0014 5203     		lsls	r2, r2, #13
  57:Library/src/lcm32f06x_dac.c ****   ANACTRL->ANA_CTRL |= DAC_InitStruct->DAC_OutputBuffer;
  94              		.loc 1 57 58 view .LVU19
  95 0016 1343     		orrs	r3, r2
  58:Library/src/lcm32f06x_dac.c **** }
  96              		.loc 1 58 10 view .LVU20
  97 0018 F822     		movs	r2, #248
  55:Library/src/lcm32f06x_dac.c ****                    DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_Vref_Sele
  98              		.loc 1 55 16 view .LVU21
  99 001a 0364     		str	r3, [r0, #64]
  58:Library/src/lcm32f06x_dac.c **** }
 100              		.loc 1 58 3 is_stmt 1 view .LVU22
  58:Library/src/lcm32f06x_dac.c **** }
ARM GAS  /tmp/ccMDRKnu.s 			page 4


 101              		.loc 1 58 10 is_stmt 0 view .LVU23
 102 001c 0248     		ldr	r0, .L4
 103              	.LVL4:
  58:Library/src/lcm32f06x_dac.c **** }
 104              		.loc 1 58 10 view .LVU24
 105 001e 8358     		ldr	r3, [r0, r2]
  58:Library/src/lcm32f06x_dac.c **** }
 106              		.loc 1 58 21 view .LVU25
 107 0020 0B43     		orrs	r3, r1
 108 0022 8350     		str	r3, [r0, r2]
 109              		.loc 1 59 1 view .LVU26
 110 0024 7047     		bx	lr
 111              	.L5:
 112 0026 C046     		.align	2
 113              	.L4:
 114 0028 007C0140 		.word	1073839104
 115              		.cfi_endproc
 116              	.LFE46:
 118              		.section	.text.DAC_StructInit,"ax",%progbits
 119              		.align	1
 120              		.p2align 2,,3
 121              		.global	DAC_StructInit
 122              		.syntax unified
 123              		.code	16
 124              		.thumb_func
 126              	DAC_StructInit:
 127              	.LVL5:
 128              	.LFB47:
  60:Library/src/lcm32f06x_dac.c **** 
  61:Library/src/lcm32f06x_dac.c **** /**
  62:Library/src/lcm32f06x_dac.c ****   * @name   DAC_StructInit
  63:Library/src/lcm32f06x_dac.c ****   * @brief  EN: Fills each DAC_InitStruct member with its default value.
  64:Library/src/lcm32f06x_dac.c ****   *         CN: 用默认值填充每个 DAC_InitStruct 成员。
  65:Library/src/lcm32f06x_dac.c ****   * @param  DAC_InitStruct: 
  66:Library/src/lcm32f06x_dac.c ****   *         EN: pointer to a DAC_InitTypeDef structure that contains the 
  67:Library/src/lcm32f06x_dac.c ****   *             configuration information for the specified DAC peripheral.
  68:Library/src/lcm32f06x_dac.c ****   *         CN: 指向 DAC_InitTypeDef 结构的指针，该结构包含指定 DAC 外设的配置信息。
  69:Library/src/lcm32f06x_dac.c ****   * @retval None
  70:Library/src/lcm32f06x_dac.c ****   */
  71:Library/src/lcm32f06x_dac.c **** void DAC_StructInit(DAC_InitTypeDef *DAC_InitStruct)
  72:Library/src/lcm32f06x_dac.c **** {
 129              		.loc 1 72 1 is_stmt 1 view -0
 130              		.cfi_startproc
 131              		@ args = 0, pretend = 0, frame = 0
 132              		@ frame_needed = 0, uses_anonymous_args = 0
 133              		@ link register save eliminated.
  73:Library/src/lcm32f06x_dac.c ****   /*--------------- Reset DAC init structure parameters values -----------------*/
  74:Library/src/lcm32f06x_dac.c **** 
  75:Library/src/lcm32f06x_dac.c ****   DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
 134              		.loc 1 75 3 view .LVU28
 135              		.loc 1 75 38 is_stmt 0 view .LVU29
 136 0000 0023     		movs	r3, #0
  76:Library/src/lcm32f06x_dac.c **** 
  77:Library/src/lcm32f06x_dac.c ****   DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
  78:Library/src/lcm32f06x_dac.c **** 
  79:Library/src/lcm32f06x_dac.c ****   DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Disable;
  80:Library/src/lcm32f06x_dac.c **** 
ARM GAS  /tmp/ccMDRKnu.s 			page 5


  81:Library/src/lcm32f06x_dac.c ****   DAC_InitStruct->DAC_Vref_Select = DAC_Vref_ADCref;
  82:Library/src/lcm32f06x_dac.c **** 
  83:Library/src/lcm32f06x_dac.c ****   DAC_InitStruct->DAC_DmaMode = DISABLE;
  84:Library/src/lcm32f06x_dac.c **** 
  85:Library/src/lcm32f06x_dac.c ****   DAC_InitStruct->DAC_DMAUDR_IE = DISABLE;
  86:Library/src/lcm32f06x_dac.c **** }
 137              		.loc 1 86 1 view .LVU30
 138              		@ sp needed
  75:Library/src/lcm32f06x_dac.c **** 
 139              		.loc 1 75 38 view .LVU31
 140 0002 0360     		str	r3, [r0]
  77:Library/src/lcm32f06x_dac.c **** 
 141              		.loc 1 77 3 is_stmt 1 view .LVU32
  77:Library/src/lcm32f06x_dac.c **** 
 142              		.loc 1 77 52 is_stmt 0 view .LVU33
 143 0004 4360     		str	r3, [r0, #4]
  79:Library/src/lcm32f06x_dac.c **** 
 144              		.loc 1 79 3 is_stmt 1 view .LVU34
  79:Library/src/lcm32f06x_dac.c **** 
 145              		.loc 1 79 36 is_stmt 0 view .LVU35
 146 0006 8360     		str	r3, [r0, #8]
  81:Library/src/lcm32f06x_dac.c **** 
 147              		.loc 1 81 3 is_stmt 1 view .LVU36
  81:Library/src/lcm32f06x_dac.c **** 
 148              		.loc 1 81 35 is_stmt 0 view .LVU37
 149 0008 C360     		str	r3, [r0, #12]
  83:Library/src/lcm32f06x_dac.c **** 
 150              		.loc 1 83 3 is_stmt 1 view .LVU38
  85:Library/src/lcm32f06x_dac.c **** }
 151              		.loc 1 85 3 view .LVU39
  83:Library/src/lcm32f06x_dac.c **** 
 152              		.loc 1 83 31 is_stmt 0 view .LVU40
 153 000a 0382     		strh	r3, [r0, #16]
 154              		.loc 1 86 1 view .LVU41
 155 000c 7047     		bx	lr
 156              		.cfi_endproc
 157              	.LFE47:
 159 000e C046     		.section	.text.DAC_Cmd,"ax",%progbits
 160              		.align	1
 161              		.p2align 2,,3
 162              		.global	DAC_Cmd
 163              		.syntax unified
 164              		.code	16
 165              		.thumb_func
 167              	DAC_Cmd:
 168              	.LVL6:
 169              	.LFB48:
  87:Library/src/lcm32f06x_dac.c **** 
  88:Library/src/lcm32f06x_dac.c **** /**
  89:Library/src/lcm32f06x_dac.c ****   * @name   DAC_Cmd
  90:Library/src/lcm32f06x_dac.c ****   * @brief  EN: Enables or disables the specified DAC peripheral.
  91:Library/src/lcm32f06x_dac.c ****   *         CN: 启用或禁用指定的 DAC 外设。
  92:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
  93:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
  94:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
  95:Library/src/lcm32f06x_dac.c ****   * @param  NewState: 
  96:Library/src/lcm32f06x_dac.c ****   *         EN: New state of the DACx peripheral.
ARM GAS  /tmp/ccMDRKnu.s 			page 6


  97:Library/src/lcm32f06x_dac.c ****   *         CN: DACx 外设的新状态。
  98:Library/src/lcm32f06x_dac.c ****   *             @arg ENABLE
  99:Library/src/lcm32f06x_dac.c ****   *             @arg DISABLE
 100:Library/src/lcm32f06x_dac.c ****   * @retval None
 101:Library/src/lcm32f06x_dac.c ****   */
 102:Library/src/lcm32f06x_dac.c **** void DAC_Cmd(DAC_TypeDef *DACx, FunctionalState NewState)
 103:Library/src/lcm32f06x_dac.c **** {
 170              		.loc 1 103 1 is_stmt 1 view -0
 171              		.cfi_startproc
 172              		@ args = 0, pretend = 0, frame = 0
 173              		@ frame_needed = 0, uses_anonymous_args = 0
 174              		@ link register save eliminated.
 104:Library/src/lcm32f06x_dac.c **** 
 105:Library/src/lcm32f06x_dac.c ****   if (NewState != DISABLE)
 175              		.loc 1 105 3 view .LVU43
 106:Library/src/lcm32f06x_dac.c ****   {
 107:Library/src/lcm32f06x_dac.c ****     /* Enable the selected DAC channel */
 108:Library/src/lcm32f06x_dac.c **** 
 109:Library/src/lcm32f06x_dac.c ****     DACx->DAC_CR |= ANACTRL_DACX_CR_EN_Msk;
 176              		.loc 1 109 18 is_stmt 0 view .LVU44
 177 0000 0122     		movs	r2, #1
 178              		.loc 1 109 9 view .LVU45
 179 0002 036C     		ldr	r3, [r0, #64]
 105:Library/src/lcm32f06x_dac.c ****   {
 180              		.loc 1 105 6 view .LVU46
 181 0004 0029     		cmp	r1, #0
 182 0006 02D0     		beq	.L8
 183              		.loc 1 109 5 is_stmt 1 view .LVU47
 184              		.loc 1 109 18 is_stmt 0 view .LVU48
 185 0008 1343     		orrs	r3, r2
 186 000a 0364     		str	r3, [r0, #64]
 187              	.L7:
 110:Library/src/lcm32f06x_dac.c ****   }
 111:Library/src/lcm32f06x_dac.c ****   else
 112:Library/src/lcm32f06x_dac.c ****   {
 113:Library/src/lcm32f06x_dac.c ****     /* Disable the selected DAC channel */
 114:Library/src/lcm32f06x_dac.c **** 
 115:Library/src/lcm32f06x_dac.c ****     DACx->DAC_CR &= ~(ANACTRL_DACX_CR_EN_Msk);
 116:Library/src/lcm32f06x_dac.c ****   }
 117:Library/src/lcm32f06x_dac.c **** }
 188              		.loc 1 117 1 view .LVU49
 189              		@ sp needed
 190 000c 7047     		bx	lr
 191              	.L8:
 115:Library/src/lcm32f06x_dac.c ****   }
 192              		.loc 1 115 5 is_stmt 1 view .LVU50
 115:Library/src/lcm32f06x_dac.c ****   }
 193              		.loc 1 115 18 is_stmt 0 view .LVU51
 194 000e 9343     		bics	r3, r2
 195 0010 0364     		str	r3, [r0, #64]
 196              		.loc 1 117 1 view .LVU52
 197 0012 FBE7     		b	.L7
 198              		.cfi_endproc
 199              	.LFE48:
 201              		.section	.text.DAC_SoftwareTriggerCmd,"ax",%progbits
 202              		.align	1
 203              		.p2align 2,,3
ARM GAS  /tmp/ccMDRKnu.s 			page 7


 204              		.global	DAC_SoftwareTriggerCmd
 205              		.syntax unified
 206              		.code	16
 207              		.thumb_func
 209              	DAC_SoftwareTriggerCmd:
 210              	.LVL7:
 211              	.LFB49:
 118:Library/src/lcm32f06x_dac.c **** 
 119:Library/src/lcm32f06x_dac.c **** /**
 120:Library/src/lcm32f06x_dac.c ****   * @name   DAC_SoftwareTriggerCmd
 121:Library/src/lcm32f06x_dac.c ****   * @brief  EN: DAC Software triggered command.
 122:Library/src/lcm32f06x_dac.c ****   *         CN: DAC软件触发命令。
 123:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
 124:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
 125:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
 126:Library/src/lcm32f06x_dac.c ****   * @param  NewState: 
 127:Library/src/lcm32f06x_dac.c ****   *         EN: New state of the DAC Software Trigger.
 128:Library/src/lcm32f06x_dac.c ****   *         CN: DACx 软件触发的新状态。
 129:Library/src/lcm32f06x_dac.c ****   *             @arg ENABLE
 130:Library/src/lcm32f06x_dac.c ****   *             @arg DISABLE
 131:Library/src/lcm32f06x_dac.c ****   * @retval None
 132:Library/src/lcm32f06x_dac.c ****   */
 133:Library/src/lcm32f06x_dac.c **** void DAC_SoftwareTriggerCmd(DAC_TypeDef *DACx, FunctionalState NewState)
 134:Library/src/lcm32f06x_dac.c **** {
 212              		.loc 1 134 1 is_stmt 1 view -0
 213              		.cfi_startproc
 214              		@ args = 0, pretend = 0, frame = 0
 215              		@ frame_needed = 0, uses_anonymous_args = 0
 216              		@ link register save eliminated.
 135:Library/src/lcm32f06x_dac.c **** 
 136:Library/src/lcm32f06x_dac.c ****   if (NewState != DISABLE)
 217              		.loc 1 136 3 view .LVU54
 137:Library/src/lcm32f06x_dac.c ****   {
 138:Library/src/lcm32f06x_dac.c ****     /* Enable software trigger for the selected DAC channel */
 139:Library/src/lcm32f06x_dac.c **** 
 140:Library/src/lcm32f06x_dac.c ****     DACx->DAC_SR |= (ANACTRL_DACX_SR_SWTRIG_Msk);
 218              		.loc 1 140 18 is_stmt 0 view .LVU55
 219 0000 0122     		movs	r2, #1
 220              		.loc 1 140 9 view .LVU56
 221 0002 436C     		ldr	r3, [r0, #68]
 136:Library/src/lcm32f06x_dac.c ****   {
 222              		.loc 1 136 6 view .LVU57
 223 0004 0029     		cmp	r1, #0
 224 0006 02D0     		beq	.L11
 225              		.loc 1 140 5 is_stmt 1 view .LVU58
 226              		.loc 1 140 18 is_stmt 0 view .LVU59
 227 0008 1343     		orrs	r3, r2
 228 000a 4364     		str	r3, [r0, #68]
 229              	.L10:
 141:Library/src/lcm32f06x_dac.c ****   }
 142:Library/src/lcm32f06x_dac.c ****   else
 143:Library/src/lcm32f06x_dac.c ****   {
 144:Library/src/lcm32f06x_dac.c ****     /* Disable software trigger for the selected DAC channel */
 145:Library/src/lcm32f06x_dac.c **** 
 146:Library/src/lcm32f06x_dac.c ****     DACx->DAC_SR &= ~(ANACTRL_DACX_SR_SWTRIG_Msk);
 147:Library/src/lcm32f06x_dac.c ****   }
 148:Library/src/lcm32f06x_dac.c **** }
ARM GAS  /tmp/ccMDRKnu.s 			page 8


 230              		.loc 1 148 1 view .LVU60
 231              		@ sp needed
 232 000c 7047     		bx	lr
 233              	.L11:
 146:Library/src/lcm32f06x_dac.c ****   }
 234              		.loc 1 146 5 is_stmt 1 view .LVU61
 146:Library/src/lcm32f06x_dac.c ****   }
 235              		.loc 1 146 18 is_stmt 0 view .LVU62
 236 000e 9343     		bics	r3, r2
 237 0010 4364     		str	r3, [r0, #68]
 238              		.loc 1 148 1 view .LVU63
 239 0012 FBE7     		b	.L10
 240              		.cfi_endproc
 241              	.LFE49:
 243              		.section	.text.DAC_WaveGenerationCmd,"ax",%progbits
 244              		.align	1
 245              		.p2align 2,,3
 246              		.global	DAC_WaveGenerationCmd
 247              		.syntax unified
 248              		.code	16
 249              		.thumb_func
 251              	DAC_WaveGenerationCmd:
 252              	.LVL8:
 253              	.LFB50:
 149:Library/src/lcm32f06x_dac.c **** 
 150:Library/src/lcm32f06x_dac.c **** /**
 151:Library/src/lcm32f06x_dac.c ****   * @name   DAC_WaveGenerationCmd
 152:Library/src/lcm32f06x_dac.c ****   * @brief  EN: DAC waveform setting: noise triangle.
 153:Library/src/lcm32f06x_dac.c ****   *         CN: DAC波形设置：噪声 三角。
 154:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
 155:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
 156:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
 157:Library/src/lcm32f06x_dac.c ****   * @param  DAC_Wave: 
 158:Library/src/lcm32f06x_dac.c ****   *         EN: waveform selection.
 159:Library/src/lcm32f06x_dac.c ****   *         CN: 波形选择。
 160:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_WaveGeneration_None
 161:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_WaveGeneration_Noise
 162:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_WaveGeneration_Triangle
 163:Library/src/lcm32f06x_dac.c ****   * @param  NewState: 
 164:Library/src/lcm32f06x_dac.c ****   *         EN: New state of the DAC wave.
 165:Library/src/lcm32f06x_dac.c ****   *         CN: DACx 波形的新状态。
 166:Library/src/lcm32f06x_dac.c ****   *             @arg ENABLE
 167:Library/src/lcm32f06x_dac.c ****   *             @arg DISABLE
 168:Library/src/lcm32f06x_dac.c ****   * @retval None
 169:Library/src/lcm32f06x_dac.c ****   */
 170:Library/src/lcm32f06x_dac.c **** void DAC_WaveGenerationCmd(DAC_TypeDef *DACx, uint32_t DAC_Wave, FunctionalState NewState)
 171:Library/src/lcm32f06x_dac.c **** {
 254              		.loc 1 171 1 is_stmt 1 view -0
 255              		.cfi_startproc
 256              		@ args = 0, pretend = 0, frame = 0
 257              		@ frame_needed = 0, uses_anonymous_args = 0
 172:Library/src/lcm32f06x_dac.c ****   uint32_t temp;
 258              		.loc 1 172 3 view .LVU65
 173:Library/src/lcm32f06x_dac.c ****   assert_param(IS_DAC_WaveGeneration(DAC_Wave));
 259              		.loc 1 173 3 view .LVU66
 174:Library/src/lcm32f06x_dac.c ****   
 175:Library/src/lcm32f06x_dac.c ****   temp = DACx->DAC_CR & (~ANACTRL_DACX_CR_WAVE_Msk);
ARM GAS  /tmp/ccMDRKnu.s 			page 9


 260              		.loc 1 175 3 view .LVU67
 171:Library/src/lcm32f06x_dac.c ****   uint32_t temp;
 261              		.loc 1 171 1 is_stmt 0 view .LVU68
 262 0000 10B5     		push	{r4, lr}
 263              	.LCFI1:
 264              		.cfi_def_cfa_offset 8
 265              		.cfi_offset 4, -8
 266              		.cfi_offset 14, -4
 267              		.loc 1 175 8 view .LVU69
 268 0002 C024     		movs	r4, #192
 269              		.loc 1 175 14 view .LVU70
 270 0004 036C     		ldr	r3, [r0, #64]
 271              		.loc 1 175 8 view .LVU71
 272 0006 A343     		bics	r3, r4
 273              	.LVL9:
 176:Library/src/lcm32f06x_dac.c **** 
 177:Library/src/lcm32f06x_dac.c ****   if (NewState != DISABLE)
 274              		.loc 1 177 3 is_stmt 1 view .LVU72
 275              		.loc 1 177 6 is_stmt 0 view .LVU73
 276 0008 002A     		cmp	r2, #0
 277 000a 00D0     		beq	.L14
 178:Library/src/lcm32f06x_dac.c ****   {
 179:Library/src/lcm32f06x_dac.c ****     /* Enable the selected DAC Wave */
 180:Library/src/lcm32f06x_dac.c ****     temp |= DAC_Wave;
 278              		.loc 1 180 5 is_stmt 1 view .LVU74
 279              		.loc 1 180 10 is_stmt 0 view .LVU75
 280 000c 0B43     		orrs	r3, r1
 281              	.LVL10:
 282              	.L14:
 181:Library/src/lcm32f06x_dac.c ****   }
 182:Library/src/lcm32f06x_dac.c ****   else
 183:Library/src/lcm32f06x_dac.c ****   {
 184:Library/src/lcm32f06x_dac.c ****     /* Disable the selected DAC Wave */
 185:Library/src/lcm32f06x_dac.c ****     temp &= (uint32_t)(~ANACTRL_DACX_CR_WAVE_Msk);
 186:Library/src/lcm32f06x_dac.c ****   }
 187:Library/src/lcm32f06x_dac.c ****   DACx->DAC_CR = temp;
 283              		.loc 1 187 3 is_stmt 1 view .LVU76
 284              		.loc 1 187 16 is_stmt 0 view .LVU77
 285 000e 0364     		str	r3, [r0, #64]
 188:Library/src/lcm32f06x_dac.c **** }
 286              		.loc 1 188 1 view .LVU78
 287              		@ sp needed
 288 0010 10BD     		pop	{r4, pc}
 289              		.cfi_endproc
 290              	.LFE50:
 292 0012 C046     		.section	.text.DAC_SetDac_10B_Data,"ax",%progbits
 293              		.align	1
 294              		.p2align 2,,3
 295              		.global	DAC_SetDac_10B_Data
 296              		.syntax unified
 297              		.code	16
 298              		.thumb_func
 300              	DAC_SetDac_10B_Data:
 301              	.LVL11:
 302              	.LFB51:
 189:Library/src/lcm32f06x_dac.c **** 
 190:Library/src/lcm32f06x_dac.c **** /**
ARM GAS  /tmp/ccMDRKnu.s 			page 10


 191:Library/src/lcm32f06x_dac.c ****   * @name   DAC_SetDac_10B_Data
 192:Library/src/lcm32f06x_dac.c ****   * @brief  EN: Set the DAC data conversion.
 193:Library/src/lcm32f06x_dac.c ****   *         CN: 设置dac数据转换。
 194:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
 195:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
 196:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设.
 197:Library/src/lcm32f06x_dac.c ****   * @param  DAC_Align: 
 198:Library/src/lcm32f06x_dac.c ****   *         EN: Data alignment mode left and right
 199:Library/src/lcm32f06x_dac.c ****   *         CN: 数据对齐模式。
 200:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_Align_10B_R
 201:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_Align_10B_L
 202:Library/src/lcm32f06x_dac.c ****   * @param  Data: 
 203:Library/src/lcm32f06x_dac.c ****   *         EN: DAC Data.
 204:Library/src/lcm32f06x_dac.c ****   *         CN: DAC 数据。
 205:Library/src/lcm32f06x_dac.c ****   * @retval None
 206:Library/src/lcm32f06x_dac.c ****   */
 207:Library/src/lcm32f06x_dac.c **** void DAC_SetDac_10B_Data(DAC_TypeDef *DACx, uint32_t DAC_Align, uint16_t Data)
 208:Library/src/lcm32f06x_dac.c **** {
 303              		.loc 1 208 1 is_stmt 1 view -0
 304              		.cfi_startproc
 305              		@ args = 0, pretend = 0, frame = 0
 306              		@ frame_needed = 0, uses_anonymous_args = 0
 209:Library/src/lcm32f06x_dac.c ****   uint32_t Rdata = 0;
 307              		.loc 1 209 3 view .LVU80
 210:Library/src/lcm32f06x_dac.c **** 
 211:Library/src/lcm32f06x_dac.c ****   assert_param(IS_DAC_Align(DAC_Align));
 308              		.loc 1 211 3 view .LVU81
 212:Library/src/lcm32f06x_dac.c **** 
 213:Library/src/lcm32f06x_dac.c ****   DACx->DAC_CR &= ~(ANACTRL_DACX_CR_ALIGN_Msk);
 309              		.loc 1 213 3 view .LVU82
 310              		.loc 1 213 7 is_stmt 0 view .LVU83
 311 0000 036C     		ldr	r3, [r0, #64]
 208:Library/src/lcm32f06x_dac.c ****   uint32_t Rdata = 0;
 312              		.loc 1 208 1 view .LVU84
 313 0002 10B5     		push	{r4, lr}
 314              	.LCFI2:
 315              		.cfi_def_cfa_offset 8
 316              		.cfi_offset 4, -8
 317              		.cfi_offset 14, -4
 318              		.loc 1 213 16 view .LVU85
 319 0004 064C     		ldr	r4, .L21
 320 0006 2340     		ands	r3, r4
 321 0008 0364     		str	r3, [r0, #64]
 214:Library/src/lcm32f06x_dac.c ****   DACx->DAC_CR |= DAC_Align;
 322              		.loc 1 214 3 is_stmt 1 view .LVU86
 323              		.loc 1 214 7 is_stmt 0 view .LVU87
 324 000a 036C     		ldr	r3, [r0, #64]
 325              		.loc 1 214 16 view .LVU88
 326 000c 0B43     		orrs	r3, r1
 327 000e 0364     		str	r3, [r0, #64]
 215:Library/src/lcm32f06x_dac.c ****   Rdata = ((DACx->DAC_CR) >> 15) & 0x01;
 328              		.loc 1 215 3 is_stmt 1 view .LVU89
 329              		.loc 1 215 17 is_stmt 0 view .LVU90
 330 0010 036C     		ldr	r3, [r0, #64]
 331              	.LVL12:
 216:Library/src/lcm32f06x_dac.c ****   if (Rdata == 1)
 332              		.loc 1 216 3 is_stmt 1 view .LVU91
ARM GAS  /tmp/ccMDRKnu.s 			page 11


 333              		.loc 1 216 6 is_stmt 0 view .LVU92
 334 0012 1B04     		lsls	r3, r3, #16
 335 0014 02D5     		bpl	.L19
 336              	.LVL13:
 217:Library/src/lcm32f06x_dac.c ****   {
 218:Library/src/lcm32f06x_dac.c ****     DACx->DAC_DHR = (Data << 6);
 337              		.loc 1 218 5 is_stmt 1 view .LVU93
 338              		.loc 1 218 27 is_stmt 0 view .LVU94
 339 0016 9201     		lsls	r2, r2, #6
 340              	.LVL14:
 341              		.loc 1 218 19 view .LVU95
 342 0018 8264     		str	r2, [r0, #72]
 343              	.L18:
 219:Library/src/lcm32f06x_dac.c ****   }
 220:Library/src/lcm32f06x_dac.c ****   else
 221:Library/src/lcm32f06x_dac.c ****   {
 222:Library/src/lcm32f06x_dac.c ****     DACx->DAC_DHR = Data;
 223:Library/src/lcm32f06x_dac.c ****   }
 224:Library/src/lcm32f06x_dac.c **** }
 344              		.loc 1 224 1 view .LVU96
 345              		@ sp needed
 346 001a 10BD     		pop	{r4, pc}
 347              	.LVL15:
 348              	.L19:
 222:Library/src/lcm32f06x_dac.c ****   }
 349              		.loc 1 222 5 is_stmt 1 view .LVU97
 222:Library/src/lcm32f06x_dac.c ****   }
 350              		.loc 1 222 19 is_stmt 0 view .LVU98
 351 001c 8264     		str	r2, [r0, #72]
 352              		.loc 1 224 1 view .LVU99
 353 001e FCE7     		b	.L18
 354              	.L22:
 355              		.align	2
 356              	.L21:
 357 0020 FF7FFFFF 		.word	-32769
 358              		.cfi_endproc
 359              	.LFE51:
 361              		.section	.text.DAC_GetDataOutputValue_10bit,"ax",%progbits
 362              		.align	1
 363              		.p2align 2,,3
 364              		.global	DAC_GetDataOutputValue_10bit
 365              		.syntax unified
 366              		.code	16
 367              		.thumb_func
 369              	DAC_GetDataOutputValue_10bit:
 370              	.LVL16:
 371              	.LFB52:
 225:Library/src/lcm32f06x_dac.c **** 
 226:Library/src/lcm32f06x_dac.c **** /**
 227:Library/src/lcm32f06x_dac.c ****   * @name   DAC_WaveGenerationCmd
 228:Library/src/lcm32f06x_dac.c ****   * @brief  EN: Get data register.
 229:Library/src/lcm32f06x_dac.c ****   *         CN: 获取数据寄存器。
 230:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
 231:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
 232:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
 233:Library/src/lcm32f06x_dac.c ****   * @retval uint16_t
 234:Library/src/lcm32f06x_dac.c ****   *         EN: DAC Data.
ARM GAS  /tmp/ccMDRKnu.s 			page 12


 235:Library/src/lcm32f06x_dac.c ****   *         CN: DAC 数据。
 236:Library/src/lcm32f06x_dac.c ****   */
 237:Library/src/lcm32f06x_dac.c **** uint16_t DAC_GetDataOutputValue_10bit(DAC_TypeDef *DACx)
 238:Library/src/lcm32f06x_dac.c **** {
 372              		.loc 1 238 1 is_stmt 1 view -0
 373              		.cfi_startproc
 374              		@ args = 0, pretend = 0, frame = 0
 375              		@ frame_needed = 0, uses_anonymous_args = 0
 376              		@ link register save eliminated.
 239:Library/src/lcm32f06x_dac.c ****   uint32_t data = 0;
 377              		.loc 1 239 3 view .LVU101
 240:Library/src/lcm32f06x_dac.c ****   uint32_t tmp = 0;
 378              		.loc 1 240 3 view .LVU102
 241:Library/src/lcm32f06x_dac.c ****   data = ((DACx->DAC_CR) >> 15) & 0x01;
 379              		.loc 1 241 3 view .LVU103
 380              		.loc 1 241 16 is_stmt 0 view .LVU104
 381 0000 036C     		ldr	r3, [r0, #64]
 382              	.LVL17:
 242:Library/src/lcm32f06x_dac.c **** 
 243:Library/src/lcm32f06x_dac.c ****   if (data == 1)
 383              		.loc 1 243 3 is_stmt 1 view .LVU105
 244:Library/src/lcm32f06x_dac.c ****   {
 245:Library/src/lcm32f06x_dac.c ****     tmp = ((DACx->DAC_DOR) >> 6) & 0xfff;
 384              		.loc 1 245 17 is_stmt 0 view .LVU106
 385 0002 C06C     		ldr	r0, [r0, #76]
 386              	.LVL18:
 243:Library/src/lcm32f06x_dac.c ****   {
 387              		.loc 1 243 6 view .LVU107
 388 0004 1B04     		lsls	r3, r3, #16
 389 0006 03D5     		bpl	.L24
 390              	.LVL19:
 391              		.loc 1 245 5 is_stmt 1 view .LVU108
 392              		.loc 1 245 9 is_stmt 0 view .LVU109
 393 0008 8003     		lsls	r0, r0, #14
 394 000a 000D     		lsrs	r0, r0, #20
 395              	.LVL20:
 396              	.L25:
 246:Library/src/lcm32f06x_dac.c ****   }
 247:Library/src/lcm32f06x_dac.c ****   else
 248:Library/src/lcm32f06x_dac.c ****   {
 249:Library/src/lcm32f06x_dac.c ****     tmp = (DACx->DAC_DOR) & 0xfff;
 250:Library/src/lcm32f06x_dac.c ****   }
 251:Library/src/lcm32f06x_dac.c ****   return tmp;
 397              		.loc 1 251 3 is_stmt 1 view .LVU110
 398              		.loc 1 251 10 is_stmt 0 discriminator 1 view .LVU111
 399 000c 80B2     		uxth	r0, r0
 400              	.LVL21:
 252:Library/src/lcm32f06x_dac.c **** }
 401              		.loc 1 252 1 view .LVU112
 402              		@ sp needed
 403 000e 7047     		bx	lr
 404              	.LVL22:
 405              	.L24:
 249:Library/src/lcm32f06x_dac.c ****   }
 406              		.loc 1 249 5 is_stmt 1 view .LVU113
 249:Library/src/lcm32f06x_dac.c ****   }
 407              		.loc 1 249 9 is_stmt 0 view .LVU114
ARM GAS  /tmp/ccMDRKnu.s 			page 13


 408 0010 0005     		lsls	r0, r0, #20
 409 0012 000D     		lsrs	r0, r0, #20
 410 0014 FAE7     		b	.L25
 411              		.cfi_endproc
 412              	.LFE52:
 414 0016 C046     		.section	.text.DAC_ITConfig,"ax",%progbits
 415              		.align	1
 416              		.p2align 2,,3
 417              		.global	DAC_ITConfig
 418              		.syntax unified
 419              		.code	16
 420              		.thumb_func
 422              	DAC_ITConfig:
 423              	.LVL23:
 424              	.LFB53:
 253:Library/src/lcm32f06x_dac.c **** 
 254:Library/src/lcm32f06x_dac.c **** /**
 255:Library/src/lcm32f06x_dac.c ****   * @name   DAC_ITConfig
 256:Library/src/lcm32f06x_dac.c ****   * @brief  EN: Enables or disables the specified DAC interrupts.
 257:Library/src/lcm32f06x_dac.c ****   *         CN: 启用或禁用指定的DAC中断。
 258:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
 259:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
 260:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
 261:Library/src/lcm32f06x_dac.c ****   * @param  DAC_IT: 
 262:Library/src/lcm32f06x_dac.c ****   *         EN: Specifies the DAC rupt sources to be enabled or disabled.
 263:Library/src/lcm32f06x_dac.c ****   *         CN: 指定要启用或禁用的 DAC 中断源。
 264:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_IT_DMAUDR
 265:Library/src/lcm32f06x_dac.c ****   * @param  NewState: 
 266:Library/src/lcm32f06x_dac.c ****   *         EN: new state of the specified DAC interrupts.
 267:Library/src/lcm32f06x_dac.c ****   *         CN: 指定DAC中断的新状态。
 268:Library/src/lcm32f06x_dac.c ****   *             @arg ENABLE
 269:Library/src/lcm32f06x_dac.c ****   *             @arg DISABLE
 270:Library/src/lcm32f06x_dac.c ****   * @retval None
 271:Library/src/lcm32f06x_dac.c ****   */
 272:Library/src/lcm32f06x_dac.c **** void DAC_ITConfig(DAC_TypeDef *DACx, uint32_t DAC_IT, FunctionalState NewState)
 273:Library/src/lcm32f06x_dac.c **** {
 425              		.loc 1 273 1 is_stmt 1 view -0
 426              		.cfi_startproc
 427              		@ args = 0, pretend = 0, frame = 0
 428              		@ frame_needed = 0, uses_anonymous_args = 0
 429              		@ link register save eliminated.
 274:Library/src/lcm32f06x_dac.c ****   assert_param(IS_DAC_IT_CONFIG(DAC_IT));
 430              		.loc 1 274 3 view .LVU116
 275:Library/src/lcm32f06x_dac.c **** 
 276:Library/src/lcm32f06x_dac.c ****   if (NewState != DISABLE)
 431              		.loc 1 276 3 view .LVU117
 277:Library/src/lcm32f06x_dac.c ****   {
 278:Library/src/lcm32f06x_dac.c ****     /* Enable the selected DAC interrupts */
 279:Library/src/lcm32f06x_dac.c **** 
 280:Library/src/lcm32f06x_dac.c ****     DACx->DAC_CR |= DAC_IT;
 432              		.loc 1 280 9 is_stmt 0 view .LVU118
 433 0000 036C     		ldr	r3, [r0, #64]
 276:Library/src/lcm32f06x_dac.c ****   {
 434              		.loc 1 276 6 view .LVU119
 435 0002 002A     		cmp	r2, #0
 436 0004 02D0     		beq	.L27
 437              		.loc 1 280 5 is_stmt 1 view .LVU120
ARM GAS  /tmp/ccMDRKnu.s 			page 14


 438              		.loc 1 280 18 is_stmt 0 view .LVU121
 439 0006 0B43     		orrs	r3, r1
 440 0008 0364     		str	r3, [r0, #64]
 441              	.L26:
 281:Library/src/lcm32f06x_dac.c ****   }
 282:Library/src/lcm32f06x_dac.c ****   else
 283:Library/src/lcm32f06x_dac.c ****   {
 284:Library/src/lcm32f06x_dac.c ****     /* Disable the selected DAC interrupts */
 285:Library/src/lcm32f06x_dac.c **** 
 286:Library/src/lcm32f06x_dac.c ****     DACx->DAC_CR &= (~(uint32_t)DAC_IT);
 287:Library/src/lcm32f06x_dac.c ****   }
 288:Library/src/lcm32f06x_dac.c **** }
 442              		.loc 1 288 1 view .LVU122
 443              		@ sp needed
 444 000a 7047     		bx	lr
 445              	.L27:
 286:Library/src/lcm32f06x_dac.c ****   }
 446              		.loc 1 286 5 is_stmt 1 view .LVU123
 286:Library/src/lcm32f06x_dac.c ****   }
 447              		.loc 1 286 18 is_stmt 0 view .LVU124
 448 000c 8B43     		bics	r3, r1
 449 000e 0364     		str	r3, [r0, #64]
 450              		.loc 1 288 1 view .LVU125
 451 0010 FBE7     		b	.L26
 452              		.cfi_endproc
 453              	.LFE53:
 455 0012 C046     		.section	.text.DAC_GetFlagStatus,"ax",%progbits
 456              		.align	1
 457              		.p2align 2,,3
 458              		.global	DAC_GetFlagStatus
 459              		.syntax unified
 460              		.code	16
 461              		.thumb_func
 463              	DAC_GetFlagStatus:
 464              	.LVL24:
 465              	.LFB54:
 289:Library/src/lcm32f06x_dac.c **** 
 290:Library/src/lcm32f06x_dac.c **** /**
 291:Library/src/lcm32f06x_dac.c ****   * @name   DAC_GetFlagStatus
 292:Library/src/lcm32f06x_dac.c ****   * @brief  EN: Read DAC status flags.
 293:Library/src/lcm32f06x_dac.c ****   *         CN: 读取 DAC 状态标志。
 294:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
 295:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
 296:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
 297:Library/src/lcm32f06x_dac.c ****   * @param  DAC_FLAG: 
 298:Library/src/lcm32f06x_dac.c ****   *         EN: Specify the DAC flag to be read.
 299:Library/src/lcm32f06x_dac.c ****   *         CN: 指定DAC要读取的标志。
 300:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_FLAG_DMAUDR
 301:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_FLAG_DACSOFT
 302:Library/src/lcm32f06x_dac.c ****   * @retval FlagStatus
 303:Library/src/lcm32f06x_dac.c ****   */
 304:Library/src/lcm32f06x_dac.c **** FlagStatus DAC_GetFlagStatus(DAC_TypeDef *DACx, uint32_t DAC_FLAG)
 305:Library/src/lcm32f06x_dac.c **** {
 466              		.loc 1 305 1 is_stmt 1 view -0
 467              		.cfi_startproc
 468              		@ args = 0, pretend = 0, frame = 0
 469              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  /tmp/ccMDRKnu.s 			page 15


 470              		@ link register save eliminated.
 306:Library/src/lcm32f06x_dac.c ****   FlagStatus bitstatus = RESET;
 471              		.loc 1 306 3 view .LVU127
 307:Library/src/lcm32f06x_dac.c ****   uint32_t tmpreg = 0;
 472              		.loc 1 307 3 view .LVU128
 308:Library/src/lcm32f06x_dac.c **** 
 309:Library/src/lcm32f06x_dac.c ****   /* Check the parameters */
 310:Library/src/lcm32f06x_dac.c ****   assert_param(IS_DAC_FLAG_CONFIG(DAC_FLAG));
 473              		.loc 1 310 3 view .LVU129
 311:Library/src/lcm32f06x_dac.c **** 
 312:Library/src/lcm32f06x_dac.c ****   tmpreg = DACx->DAC_SR;
 474              		.loc 1 312 3 view .LVU130
 475              		.loc 1 312 10 is_stmt 0 view .LVU131
 476 0000 436C     		ldr	r3, [r0, #68]
 477              	.LVL25:
 313:Library/src/lcm32f06x_dac.c **** 
 314:Library/src/lcm32f06x_dac.c ****   /* Check the status of the specified ADC flag */
 315:Library/src/lcm32f06x_dac.c ****   if ((tmpreg & DAC_FLAG) != (uint32_t)RESET)
 478              		.loc 1 315 3 is_stmt 1 view .LVU132
 316:Library/src/lcm32f06x_dac.c ****   {
 317:Library/src/lcm32f06x_dac.c ****     /* ADC_FLAG is set */
 318:Library/src/lcm32f06x_dac.c ****     bitstatus = SET;
 319:Library/src/lcm32f06x_dac.c ****   }
 320:Library/src/lcm32f06x_dac.c ****   else
 321:Library/src/lcm32f06x_dac.c ****   {
 322:Library/src/lcm32f06x_dac.c ****     /* ADC_FLAG is reset */
 323:Library/src/lcm32f06x_dac.c ****     bitstatus = RESET;
 324:Library/src/lcm32f06x_dac.c ****   }
 325:Library/src/lcm32f06x_dac.c ****   /* Return the ADC_FLAG status */
 326:Library/src/lcm32f06x_dac.c ****   return bitstatus;
 479              		.loc 1 326 3 view .LVU133
 327:Library/src/lcm32f06x_dac.c **** }
 480              		.loc 1 327 1 is_stmt 0 view .LVU134
 481              		@ sp needed
 315:Library/src/lcm32f06x_dac.c ****   {
 482              		.loc 1 315 15 view .LVU135
 483 0002 1940     		ands	r1, r3
 484              	.LVL26:
 315:Library/src/lcm32f06x_dac.c ****   {
 485              		.loc 1 315 15 view .LVU136
 486 0004 0800     		movs	r0, r1
 487              	.LVL27:
 315:Library/src/lcm32f06x_dac.c ****   {
 488              		.loc 1 315 6 view .LVU137
 489 0006 431E     		subs	r3, r0, #1
 490 0008 9841     		sbcs	r0, r0, r3
 491              	.LVL28:
 326:Library/src/lcm32f06x_dac.c **** }
 492              		.loc 1 326 10 discriminator 1 view .LVU138
 493 000a C0B2     		uxtb	r0, r0
 494              		.loc 1 327 1 view .LVU139
 495 000c 7047     		bx	lr
 496              		.cfi_endproc
 497              	.LFE54:
 499 000e C046     		.section	.text.DAC_ClearFlag,"ax",%progbits
 500              		.align	1
 501              		.p2align 2,,3
ARM GAS  /tmp/ccMDRKnu.s 			page 16


 502              		.global	DAC_ClearFlag
 503              		.syntax unified
 504              		.code	16
 505              		.thumb_func
 507              	DAC_ClearFlag:
 508              	.LFB60:
 509              		.cfi_startproc
 328:Library/src/lcm32f06x_dac.c **** 
 329:Library/src/lcm32f06x_dac.c **** /**
 330:Library/src/lcm32f06x_dac.c ****   * @name   DAC_ClearFlag
 331:Library/src/lcm32f06x_dac.c ****   * @brief  EN: The DAC clears the flags.
 332:Library/src/lcm32f06x_dac.c ****   *         CN: DAC清除标志位。
 333:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
 334:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
 335:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
 336:Library/src/lcm32f06x_dac.c ****   * @param  DAC_FLAG: 
 337:Library/src/lcm32f06x_dac.c ****   *         EN: Specifies the DAC flag to be enabled or disabled.
 338:Library/src/lcm32f06x_dac.c ****   *         CN: 指定要启用或禁用的DAC 标志。
 339:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_FLAG_DMAUDR
 340:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_FLAG_DACSOFT
 341:Library/src/lcm32f06x_dac.c ****   * @retval None
 342:Library/src/lcm32f06x_dac.c ****   */
 343:Library/src/lcm32f06x_dac.c **** void DAC_ClearFlag(DAC_TypeDef *DACx, uint32_t DAC_FLAG)
 510              		.loc 1 343 6 is_stmt 1 view -0
 511              		@ args = 0, pretend = 0, frame = 0
 512              		@ frame_needed = 0, uses_anonymous_args = 0
 513              		@ link register save eliminated.
 514 0000 4164     		str	r1, [r0, #68]
 515              		@ sp needed
 516 0002 7047     		bx	lr
 517              		.cfi_endproc
 518              	.LFE60:
 520              		.section	.text.DAC_ClearITPendingBit,"ax",%progbits
 521              		.align	1
 522              		.p2align 2,,3
 523              		.global	DAC_ClearITPendingBit
 524              		.syntax unified
 525              		.code	16
 526              		.thumb_func
 528              	DAC_ClearITPendingBit:
 529              	.LVL29:
 530              	.LFB56:
 344:Library/src/lcm32f06x_dac.c **** {
 345:Library/src/lcm32f06x_dac.c ****   assert_param(IS_DAC_FLAG_CONFIG(DAC_FLAG));
 346:Library/src/lcm32f06x_dac.c **** 
 347:Library/src/lcm32f06x_dac.c ****   /* Clear the selected DAC flags */
 348:Library/src/lcm32f06x_dac.c **** 
 349:Library/src/lcm32f06x_dac.c ****   DACx->DAC_SR = DAC_FLAG;
 350:Library/src/lcm32f06x_dac.c **** }
 351:Library/src/lcm32f06x_dac.c **** 
 352:Library/src/lcm32f06x_dac.c **** /**
 353:Library/src/lcm32f06x_dac.c ****   * @name   DAC_ClearITPendingBit
 354:Library/src/lcm32f06x_dac.c ****   * @brief  EN: The DAC clears the interrupt flags.
 355:Library/src/lcm32f06x_dac.c ****   *         CN: DAC清中断标志位。
 356:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
 357:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
 358:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
ARM GAS  /tmp/ccMDRKnu.s 			page 17


 359:Library/src/lcm32f06x_dac.c ****   * @param  DAC_IT: 
 360:Library/src/lcm32f06x_dac.c ****   *         EN:Specifies the DAC interrupt sources to be enabled or disabled.
 361:Library/src/lcm32f06x_dac.c ****   *         CN:指定要启用或禁用的DAC中断源。
 362:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_IT_DMAUDR
 363:Library/src/lcm32f06x_dac.c ****   * @retval None
 364:Library/src/lcm32f06x_dac.c ****   */
 365:Library/src/lcm32f06x_dac.c **** void DAC_ClearITPendingBit(DAC_TypeDef *DACx, uint32_t DAC_IT)
 366:Library/src/lcm32f06x_dac.c **** {
 531              		.loc 1 366 1 view -0
 532              		.cfi_startproc
 533              		@ args = 0, pretend = 0, frame = 0
 534              		@ frame_needed = 0, uses_anonymous_args = 0
 535              		@ link register save eliminated.
 367:Library/src/lcm32f06x_dac.c ****   assert_param(IS_DAC_GET_IT_CONFIG(DAC_IT));
 536              		.loc 1 367 3 view .LVU142
 368:Library/src/lcm32f06x_dac.c ****   /* Clear the selected DAC interrupt pending bits */
 369:Library/src/lcm32f06x_dac.c **** 
 370:Library/src/lcm32f06x_dac.c ****   DACx->DAC_SR = DAC_IT;
 537              		.loc 1 370 3 view .LVU143
 538              		.loc 1 370 16 is_stmt 0 view .LVU144
 539 0000 4164     		str	r1, [r0, #68]
 371:Library/src/lcm32f06x_dac.c **** }
 540              		.loc 1 371 1 view .LVU145
 541              		@ sp needed
 542 0002 7047     		bx	lr
 543              		.cfi_endproc
 544              	.LFE56:
 546              		.section	.text.DAC_TriggerSourceConfig,"ax",%progbits
 547              		.align	1
 548              		.p2align 2,,3
 549              		.global	DAC_TriggerSourceConfig
 550              		.syntax unified
 551              		.code	16
 552              		.thumb_func
 554              	DAC_TriggerSourceConfig:
 555              	.LVL30:
 556              	.LFB57:
 372:Library/src/lcm32f06x_dac.c **** 
 373:Library/src/lcm32f06x_dac.c **** /**
 374:Library/src/lcm32f06x_dac.c ****   * @name   DAC_TriggerSourceConfig
 375:Library/src/lcm32f06x_dac.c ****   * @brief  EN: DAC triggered Souce config.
 376:Library/src/lcm32f06x_dac.c ****   *         CN: DAC触发源选择配置。
 377:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
 378:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
 379:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
 380:Library/src/lcm32f06x_dac.c ****   * @param  DAC_TriggerSource: 
 381:Library/src/lcm32f06x_dac.c ****   *         EN: DAC trigger source selection.
 382:Library/src/lcm32f06x_dac.c ****   *         CN: DAC 触发源选择。
 383:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerSource_EXTI9
 384:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerSource_EXTI1
 385:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerSource_TIM14_TRIG_OC1
 386:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerSource_TIM16_TRIG_OC1
 387:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerSource_TIM15_TRGO
 388:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerSource_TIM3_TRGO
 389:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerSource_TIM1_TRGO
 390:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerSource_SOFTWARE
 391:Library/src/lcm32f06x_dac.c ****   * @param  DAC_TriggerMode: 
ARM GAS  /tmp/ccMDRKnu.s 			page 18


 392:Library/src/lcm32f06x_dac.c ****   *         EN: DAC trigger source mode selection.
 393:Library/src/lcm32f06x_dac.c ****   *         CN: DAC触发源模式选择。
 394:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerMode_Externnal_RiseEdge
 395:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerMode_Externnal_FallEdge
 396:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerMode_Externnal_DoubleEdge
 397:Library/src/lcm32f06x_dac.c ****   *             @arg DAC_TiggerMode_NoExternalTrigger
 398:Library/src/lcm32f06x_dac.c ****   * @retval None
 399:Library/src/lcm32f06x_dac.c ****   */
 400:Library/src/lcm32f06x_dac.c **** void DAC_TriggerSourceConfig(DAC_TypeDef *DACx, uint32_t DAC_TriggerSource, uint32_t DAC_TriggerMod
 401:Library/src/lcm32f06x_dac.c **** {
 557              		.loc 1 401 1 is_stmt 1 view -0
 558              		.cfi_startproc
 559              		@ args = 0, pretend = 0, frame = 0
 560              		@ frame_needed = 0, uses_anonymous_args = 0
 402:Library/src/lcm32f06x_dac.c ****   uint32_t temp = 0;
 561              		.loc 1 402 3 view .LVU147
 403:Library/src/lcm32f06x_dac.c ****   if( DACx == DAC)
 562              		.loc 1 403 3 view .LVU148
 563              		.loc 1 403 5 is_stmt 0 view .LVU149
 564 0000 0B4B     		ldr	r3, .L35
 401:Library/src/lcm32f06x_dac.c ****   uint32_t temp = 0;
 565              		.loc 1 401 1 view .LVU150
 566 0002 30B5     		push	{r4, r5, lr}
 567              	.LCFI3:
 568              		.cfi_def_cfa_offset 12
 569              		.cfi_offset 4, -12
 570              		.cfi_offset 5, -8
 571              		.cfi_offset 14, -4
 401:Library/src/lcm32f06x_dac.c ****   uint32_t temp = 0;
 572              		.loc 1 401 1 view .LVU151
 573 0004 0C00     		movs	r4, r1
 574              		.loc 1 403 5 view .LVU152
 575 0006 9842     		cmp	r0, r3
 576 0008 00D0     		beq	.L34
 577              	.LVL31:
 578              	.L32:
 404:Library/src/lcm32f06x_dac.c ****   {
 405:Library/src/lcm32f06x_dac.c ****         temp = SYSCTRL->EDU_CFG17 & 0xFFFFFF8C;
 406:Library/src/lcm32f06x_dac.c ****         sysctrl_access();
 407:Library/src/lcm32f06x_dac.c ****         SYSCTRL->EDU_CFG17 = temp | (DAC_TriggerSource | DAC_TriggerMode);
 408:Library/src/lcm32f06x_dac.c ****         __dekey();
 409:Library/src/lcm32f06x_dac.c ****   }
 410:Library/src/lcm32f06x_dac.c **** }
 579              		.loc 1 410 1 view .LVU153
 580              		@ sp needed
 581              	.LVL32:
 582              		.loc 1 410 1 view .LVU154
 583 000a 30BD     		pop	{r4, r5, pc}
 584              	.LVL33:
 585              	.L34:
 405:Library/src/lcm32f06x_dac.c ****         sysctrl_access();
 586              		.loc 1 405 9 is_stmt 1 view .LVU155
 405:Library/src/lcm32f06x_dac.c ****         sysctrl_access();
 587              		.loc 1 405 23 is_stmt 0 view .LVU156
 588 000c 094B     		ldr	r3, .L35+4
 589 000e 596E     		ldr	r1, [r3, #100]
 590              	.LVL34:
ARM GAS  /tmp/ccMDRKnu.s 			page 19


 406:Library/src/lcm32f06x_dac.c ****         SYSCTRL->EDU_CFG17 = temp | (DAC_TriggerSource | DAC_TriggerMode);
 591              		.loc 1 406 9 is_stmt 1 view .LVU157
 592              	.LBB10:
 593              	.LBI10:
 594              		.file 2 "Core/cmsis_gcc.h"
   1:Core/cmsis_gcc.h **** /**************************************************************************//**
   2:Core/cmsis_gcc.h ****  * @file     cmsis_gcc.h
   3:Core/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
   4:Core/cmsis_gcc.h ****  * @version  V5.4.1
   5:Core/cmsis_gcc.h ****  * @date     27. May 2021
   6:Core/cmsis_gcc.h ****  ******************************************************************************/
   7:Core/cmsis_gcc.h **** /*
   8:Core/cmsis_gcc.h ****  * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
   9:Core/cmsis_gcc.h ****  *
  10:Core/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
  11:Core/cmsis_gcc.h ****  *
  12:Core/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  13:Core/cmsis_gcc.h ****  * not use this file except in compliance with the License.
  14:Core/cmsis_gcc.h ****  * You may obtain a copy of the License at
  15:Core/cmsis_gcc.h ****  *
  16:Core/cmsis_gcc.h ****  * www.apache.org/licenses/LICENSE-2.0
  17:Core/cmsis_gcc.h ****  *
  18:Core/cmsis_gcc.h ****  * Unless required by applicable law or agreed to in writing, software
  19:Core/cmsis_gcc.h ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  20:Core/cmsis_gcc.h ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  21:Core/cmsis_gcc.h ****  * See the License for the specific language governing permissions and
  22:Core/cmsis_gcc.h ****  * limitations under the License.
  23:Core/cmsis_gcc.h ****  */
  24:Core/cmsis_gcc.h **** 
  25:Core/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
  26:Core/cmsis_gcc.h **** #define __CMSIS_GCC_H
  27:Core/cmsis_gcc.h **** 
  28:Core/cmsis_gcc.h **** /* ignore some GCC warnings */
  29:Core/cmsis_gcc.h **** #pragma GCC diagnostic push
  30:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
  31:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
  32:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
  33:Core/cmsis_gcc.h **** 
  34:Core/cmsis_gcc.h **** /* Fallback for __has_builtin */
  35:Core/cmsis_gcc.h **** #ifndef __has_builtin
  36:Core/cmsis_gcc.h ****   #define __has_builtin(x) (0)
  37:Core/cmsis_gcc.h **** #endif
  38:Core/cmsis_gcc.h **** 
  39:Core/cmsis_gcc.h **** /* CMSIS compiler specific defines */
  40:Core/cmsis_gcc.h **** #ifndef   __ASM
  41:Core/cmsis_gcc.h ****   #define __ASM                                  __asm
  42:Core/cmsis_gcc.h **** #endif
  43:Core/cmsis_gcc.h **** #ifndef   __INLINE
  44:Core/cmsis_gcc.h ****   #define __INLINE                               inline
  45:Core/cmsis_gcc.h **** #endif
  46:Core/cmsis_gcc.h **** #ifndef   __STATIC_INLINE
  47:Core/cmsis_gcc.h ****   #define __STATIC_INLINE                        static inline
  48:Core/cmsis_gcc.h **** #endif
  49:Core/cmsis_gcc.h **** #ifndef   __STATIC_FORCEINLINE
  50:Core/cmsis_gcc.h ****   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
  51:Core/cmsis_gcc.h **** #endif
  52:Core/cmsis_gcc.h **** #ifndef   __NO_RETURN
ARM GAS  /tmp/ccMDRKnu.s 			page 20


  53:Core/cmsis_gcc.h ****   #define __NO_RETURN                            __attribute__((__noreturn__))
  54:Core/cmsis_gcc.h **** #endif
  55:Core/cmsis_gcc.h **** #ifndef   __USED
  56:Core/cmsis_gcc.h ****   #define __USED                                 __attribute__((used))
  57:Core/cmsis_gcc.h **** #endif
  58:Core/cmsis_gcc.h **** #ifndef   __WEAK
  59:Core/cmsis_gcc.h ****   #define __WEAK                                 __attribute__((weak))
  60:Core/cmsis_gcc.h **** #endif
  61:Core/cmsis_gcc.h **** #ifndef   __PACKED
  62:Core/cmsis_gcc.h ****   #define __PACKED                               __attribute__((packed, aligned(1)))
  63:Core/cmsis_gcc.h **** #endif
  64:Core/cmsis_gcc.h **** #ifndef   __PACKED_STRUCT
  65:Core/cmsis_gcc.h ****   #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
  66:Core/cmsis_gcc.h **** #endif
  67:Core/cmsis_gcc.h **** #ifndef   __PACKED_UNION
  68:Core/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
  69:Core/cmsis_gcc.h **** #endif
  70:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32        /* deprecated */
  71:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  72:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  73:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  74:Core/cmsis_gcc.h ****   struct __attribute__((packed)) T_UINT32 { uint32_t v; };
  75:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  76:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
  77:Core/cmsis_gcc.h **** #endif
  78:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_WRITE
  79:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  80:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  81:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  82:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
  83:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  84:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
  85:Core/cmsis_gcc.h **** #endif
  86:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_READ
  87:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  88:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  89:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  90:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
  91:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  92:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(add
  93:Core/cmsis_gcc.h **** #endif
  94:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_WRITE
  95:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  96:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  97:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  98:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
  99:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 100:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
 101:Core/cmsis_gcc.h **** #endif
 102:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_READ
 103:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
 104:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
 105:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
 106:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
 107:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 108:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(add
 109:Core/cmsis_gcc.h **** #endif
ARM GAS  /tmp/ccMDRKnu.s 			page 21


 110:Core/cmsis_gcc.h **** #ifndef   __ALIGNED
 111:Core/cmsis_gcc.h ****   #define __ALIGNED(x)                           __attribute__((aligned(x)))
 112:Core/cmsis_gcc.h **** #endif
 113:Core/cmsis_gcc.h **** #ifndef   __RESTRICT
 114:Core/cmsis_gcc.h ****   #define __RESTRICT                             __restrict
 115:Core/cmsis_gcc.h **** #endif
 116:Core/cmsis_gcc.h **** #ifndef   __COMPILER_BARRIER
 117:Core/cmsis_gcc.h ****   #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
 118:Core/cmsis_gcc.h **** #endif
 119:Core/cmsis_gcc.h **** 
 120:Core/cmsis_gcc.h **** /* #########################  Startup and Lowlevel Init  ######################## */
 121:Core/cmsis_gcc.h **** 
 122:Core/cmsis_gcc.h **** #ifndef __PROGRAM_START
 123:Core/cmsis_gcc.h **** 
 124:Core/cmsis_gcc.h **** /**
 125:Core/cmsis_gcc.h ****   \brief   Initializes data and bss sections
 126:Core/cmsis_gcc.h ****   \details This default implementations initialized all data and additional bss
 127:Core/cmsis_gcc.h ****            sections relying on .copy.table and .zero.table specified properly
 128:Core/cmsis_gcc.h ****            in the used linker script.
 129:Core/cmsis_gcc.h **** 
 130:Core/cmsis_gcc.h ****  */
 131:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
 132:Core/cmsis_gcc.h **** {
 133:Core/cmsis_gcc.h ****   extern void _start(void) __NO_RETURN;
 134:Core/cmsis_gcc.h **** 
 135:Core/cmsis_gcc.h ****   typedef struct {
 136:Core/cmsis_gcc.h ****     uint32_t const* src;
 137:Core/cmsis_gcc.h ****     uint32_t* dest;
 138:Core/cmsis_gcc.h ****     uint32_t  wlen;
 139:Core/cmsis_gcc.h ****   } __copy_table_t;
 140:Core/cmsis_gcc.h **** 
 141:Core/cmsis_gcc.h ****   typedef struct {
 142:Core/cmsis_gcc.h ****     uint32_t* dest;
 143:Core/cmsis_gcc.h ****     uint32_t  wlen;
 144:Core/cmsis_gcc.h ****   } __zero_table_t;
 145:Core/cmsis_gcc.h **** 
 146:Core/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_start__;
 147:Core/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_end__;
 148:Core/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_start__;
 149:Core/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_end__;
 150:Core/cmsis_gcc.h **** 
 151:Core/cmsis_gcc.h ****   for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
 152:Core/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 153:Core/cmsis_gcc.h ****       pTable->dest[i] = pTable->src[i];
 154:Core/cmsis_gcc.h ****     }
 155:Core/cmsis_gcc.h ****   }
 156:Core/cmsis_gcc.h **** 
 157:Core/cmsis_gcc.h ****   for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
 158:Core/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 159:Core/cmsis_gcc.h ****       pTable->dest[i] = 0u;
 160:Core/cmsis_gcc.h ****     }
 161:Core/cmsis_gcc.h ****   }
 162:Core/cmsis_gcc.h **** 
 163:Core/cmsis_gcc.h ****   _start();
 164:Core/cmsis_gcc.h **** }
 165:Core/cmsis_gcc.h **** 
 166:Core/cmsis_gcc.h **** #define __PROGRAM_START           __cmsis_start
ARM GAS  /tmp/ccMDRKnu.s 			page 22


 167:Core/cmsis_gcc.h **** #endif
 168:Core/cmsis_gcc.h **** 
 169:Core/cmsis_gcc.h **** #ifndef __INITIAL_SP
 170:Core/cmsis_gcc.h **** #define __INITIAL_SP              __StackTop
 171:Core/cmsis_gcc.h **** #endif
 172:Core/cmsis_gcc.h **** 
 173:Core/cmsis_gcc.h **** #ifndef __STACK_LIMIT
 174:Core/cmsis_gcc.h **** #define __STACK_LIMIT             __StackLimit
 175:Core/cmsis_gcc.h **** #endif
 176:Core/cmsis_gcc.h **** 
 177:Core/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
 178:Core/cmsis_gcc.h **** #define __VECTOR_TABLE            __Vectors
 179:Core/cmsis_gcc.h **** #endif
 180:Core/cmsis_gcc.h **** 
 181:Core/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
 182:Core/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section(".vectors")))
 183:Core/cmsis_gcc.h **** #endif
 184:Core/cmsis_gcc.h **** 
 185:Core/cmsis_gcc.h **** #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 186:Core/cmsis_gcc.h **** #ifndef __STACK_SEAL
 187:Core/cmsis_gcc.h **** #define __STACK_SEAL              __StackSeal
 188:Core/cmsis_gcc.h **** #endif
 189:Core/cmsis_gcc.h **** 
 190:Core/cmsis_gcc.h **** #ifndef __TZ_STACK_SEAL_SIZE
 191:Core/cmsis_gcc.h **** #define __TZ_STACK_SEAL_SIZE      8U
 192:Core/cmsis_gcc.h **** #endif
 193:Core/cmsis_gcc.h **** 
 194:Core/cmsis_gcc.h **** #ifndef __TZ_STACK_SEAL_VALUE
 195:Core/cmsis_gcc.h **** #define __TZ_STACK_SEAL_VALUE     0xFEF5EDA5FEF5EDA5ULL
 196:Core/cmsis_gcc.h **** #endif
 197:Core/cmsis_gcc.h **** 
 198:Core/cmsis_gcc.h **** 
 199:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
 200:Core/cmsis_gcc.h ****   *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE;
 201:Core/cmsis_gcc.h **** }
 202:Core/cmsis_gcc.h **** #endif
 203:Core/cmsis_gcc.h **** 
 204:Core/cmsis_gcc.h **** 
 205:Core/cmsis_gcc.h **** /* ##########################  Core Instruction Access  ######################### */
 206:Core/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
 207:Core/cmsis_gcc.h ****   Access to dedicated instructions
 208:Core/cmsis_gcc.h ****   @{
 209:Core/cmsis_gcc.h **** */
 210:Core/cmsis_gcc.h **** 
 211:Core/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
 212:Core/cmsis_gcc.h ****  * For thumb1, use low register (r0-r7), specified by constraint "l"
 213:Core/cmsis_gcc.h ****  * Otherwise, use general registers, specified by constraint "r" */
 214:Core/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
 215:Core/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
 216:Core/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
 217:Core/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
 218:Core/cmsis_gcc.h **** #else
 219:Core/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
 220:Core/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
 221:Core/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
 222:Core/cmsis_gcc.h **** #endif
 223:Core/cmsis_gcc.h **** 
ARM GAS  /tmp/ccMDRKnu.s 			page 23


 224:Core/cmsis_gcc.h **** /**
 225:Core/cmsis_gcc.h ****   \brief   No Operation
 226:Core/cmsis_gcc.h ****   \details No Operation does nothing. This instruction can be used for code alignment purposes.
 227:Core/cmsis_gcc.h ****  */
 228:Core/cmsis_gcc.h **** #define __NOP()                             __ASM volatile ("nop")
 229:Core/cmsis_gcc.h **** 
 230:Core/cmsis_gcc.h **** /**
 231:Core/cmsis_gcc.h ****   \brief   Wait For Interrupt
 232:Core/cmsis_gcc.h ****   \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
 233:Core/cmsis_gcc.h ****  */
 234:Core/cmsis_gcc.h **** #define __WFI()                             __ASM volatile ("wfi":::"memory")
 235:Core/cmsis_gcc.h **** 
 236:Core/cmsis_gcc.h **** 
 237:Core/cmsis_gcc.h **** /**
 238:Core/cmsis_gcc.h ****   \brief   Wait For Event
 239:Core/cmsis_gcc.h ****   \details Wait For Event is a hint instruction that permits the processor to enter
 240:Core/cmsis_gcc.h ****            a low-power state until one of a number of events occurs.
 241:Core/cmsis_gcc.h ****  */
 242:Core/cmsis_gcc.h **** #define __WFE()                             __ASM volatile ("wfe":::"memory")
 243:Core/cmsis_gcc.h **** 
 244:Core/cmsis_gcc.h **** 
 245:Core/cmsis_gcc.h **** /**
 246:Core/cmsis_gcc.h ****   \brief   Send Event
 247:Core/cmsis_gcc.h ****   \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
 248:Core/cmsis_gcc.h ****  */
 249:Core/cmsis_gcc.h **** #define __SEV()                             __ASM volatile ("sev")
 250:Core/cmsis_gcc.h **** 
 251:Core/cmsis_gcc.h **** 
 252:Core/cmsis_gcc.h **** /**
 253:Core/cmsis_gcc.h ****   \brief   Instruction Synchronization Barrier
 254:Core/cmsis_gcc.h ****   \details Instruction Synchronization Barrier flushes the pipeline in the processor,
 255:Core/cmsis_gcc.h ****            so that all instructions following the ISB are fetched from cache or memory,
 256:Core/cmsis_gcc.h ****            after the instruction has been completed.
 257:Core/cmsis_gcc.h ****  */
 258:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
 595              		.loc 2 258 27 view .LVU158
 596              	.LBB11:
 259:Core/cmsis_gcc.h **** {
 260:Core/cmsis_gcc.h ****   __ASM volatile ("isb 0xF":::"memory");
 597              		.loc 2 260 3 view .LVU159
 598              		.syntax divided
 599              	@ 260 "Core/cmsis_gcc.h" 1
 600 0010 BFF36F8F 		isb 0xF
 601              	@ 0 "" 2
 602              		.thumb
 603              		.syntax unified
 604              	.LBE11:
 605              	.LBE10:
 406:Library/src/lcm32f06x_dac.c ****         SYSCTRL->EDU_CFG17 = temp | (DAC_TriggerSource | DAC_TriggerMode);
 606              		.loc 1 406 9 discriminator 1 view .LVU160
 607              	.LBB12:
 608              	.LBI12:
 261:Core/cmsis_gcc.h **** }
 262:Core/cmsis_gcc.h **** 
 263:Core/cmsis_gcc.h **** 
 264:Core/cmsis_gcc.h **** /**
 265:Core/cmsis_gcc.h ****   \brief   Data Synchronization Barrier
ARM GAS  /tmp/ccMDRKnu.s 			page 24


 266:Core/cmsis_gcc.h ****   \details Acts as a special kind of Data Memory Barrier.
 267:Core/cmsis_gcc.h ****            It completes when all explicit memory accesses before this instruction complete.
 268:Core/cmsis_gcc.h ****  */
 269:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
 270:Core/cmsis_gcc.h **** {
 271:Core/cmsis_gcc.h ****   __ASM volatile ("dsb 0xF":::"memory");
 272:Core/cmsis_gcc.h **** }
 273:Core/cmsis_gcc.h **** 
 274:Core/cmsis_gcc.h **** 
 275:Core/cmsis_gcc.h **** /**
 276:Core/cmsis_gcc.h ****   \brief   Data Memory Barrier
 277:Core/cmsis_gcc.h ****   \details Ensures the apparent order of the explicit memory operations before
 278:Core/cmsis_gcc.h ****            and after the instruction, without ensuring their completion.
 279:Core/cmsis_gcc.h ****  */
 280:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
 281:Core/cmsis_gcc.h **** {
 282:Core/cmsis_gcc.h ****   __ASM volatile ("dmb 0xF":::"memory");
 283:Core/cmsis_gcc.h **** }
 284:Core/cmsis_gcc.h **** 
 285:Core/cmsis_gcc.h **** 
 286:Core/cmsis_gcc.h **** /**
 287:Core/cmsis_gcc.h ****   \brief   Reverse byte order (32 bit)
 288:Core/cmsis_gcc.h ****   \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
 289:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 290:Core/cmsis_gcc.h ****   \return               Reversed value
 291:Core/cmsis_gcc.h ****  */
 292:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
 293:Core/cmsis_gcc.h **** {
 294:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
 295:Core/cmsis_gcc.h ****   return __builtin_bswap32(value);
 296:Core/cmsis_gcc.h **** #else
 297:Core/cmsis_gcc.h ****   uint32_t result;
 298:Core/cmsis_gcc.h **** 
 299:Core/cmsis_gcc.h ****   __ASM ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 300:Core/cmsis_gcc.h ****   return result;
 301:Core/cmsis_gcc.h **** #endif
 302:Core/cmsis_gcc.h **** }
 303:Core/cmsis_gcc.h **** 
 304:Core/cmsis_gcc.h **** 
 305:Core/cmsis_gcc.h **** /**
 306:Core/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 307:Core/cmsis_gcc.h ****   \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 
 308:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 309:Core/cmsis_gcc.h ****   \return               Reversed value
 310:Core/cmsis_gcc.h ****  */
 311:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
 312:Core/cmsis_gcc.h **** {
 313:Core/cmsis_gcc.h ****   uint32_t result;
 314:Core/cmsis_gcc.h **** 
 315:Core/cmsis_gcc.h ****   __ASM ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 316:Core/cmsis_gcc.h ****   return result;
 317:Core/cmsis_gcc.h **** }
 318:Core/cmsis_gcc.h **** 
 319:Core/cmsis_gcc.h **** 
 320:Core/cmsis_gcc.h **** /**
 321:Core/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 322:Core/cmsis_gcc.h ****   \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
ARM GAS  /tmp/ccMDRKnu.s 			page 25


 323:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 324:Core/cmsis_gcc.h ****   \return               Reversed value
 325:Core/cmsis_gcc.h ****  */
 326:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
 327:Core/cmsis_gcc.h **** {
 328:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 329:Core/cmsis_gcc.h ****   return (int16_t)__builtin_bswap16(value);
 330:Core/cmsis_gcc.h **** #else
 331:Core/cmsis_gcc.h ****   int16_t result;
 332:Core/cmsis_gcc.h **** 
 333:Core/cmsis_gcc.h ****   __ASM ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 334:Core/cmsis_gcc.h ****   return result;
 335:Core/cmsis_gcc.h **** #endif
 336:Core/cmsis_gcc.h **** }
 337:Core/cmsis_gcc.h **** 
 338:Core/cmsis_gcc.h **** 
 339:Core/cmsis_gcc.h **** /**
 340:Core/cmsis_gcc.h ****   \brief   Rotate Right in unsigned value (32 bit)
 341:Core/cmsis_gcc.h ****   \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
 342:Core/cmsis_gcc.h ****   \param [in]    op1  Value to rotate
 343:Core/cmsis_gcc.h ****   \param [in]    op2  Number of Bits to rotate
 344:Core/cmsis_gcc.h ****   \return               Rotated value
 345:Core/cmsis_gcc.h ****  */
 346:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
 347:Core/cmsis_gcc.h **** {
 348:Core/cmsis_gcc.h ****   op2 %= 32U;
 349:Core/cmsis_gcc.h ****   if (op2 == 0U)
 350:Core/cmsis_gcc.h ****   {
 351:Core/cmsis_gcc.h ****     return op1;
 352:Core/cmsis_gcc.h ****   }
 353:Core/cmsis_gcc.h ****   return (op1 >> op2) | (op1 << (32U - op2));
 354:Core/cmsis_gcc.h **** }
 355:Core/cmsis_gcc.h **** 
 356:Core/cmsis_gcc.h **** 
 357:Core/cmsis_gcc.h **** /**
 358:Core/cmsis_gcc.h ****   \brief   Breakpoint
 359:Core/cmsis_gcc.h ****   \details Causes the processor to enter Debug state.
 360:Core/cmsis_gcc.h ****            Debug tools can use this to investigate system state when the instruction at a particula
 361:Core/cmsis_gcc.h ****   \param [in]    value  is ignored by the processor.
 362:Core/cmsis_gcc.h ****                  If required, a debugger can use it to store additional information about the break
 363:Core/cmsis_gcc.h ****  */
 364:Core/cmsis_gcc.h **** #define __BKPT(value)                       __ASM volatile ("bkpt "#value)
 365:Core/cmsis_gcc.h **** 
 366:Core/cmsis_gcc.h **** 
 367:Core/cmsis_gcc.h **** /**
 368:Core/cmsis_gcc.h ****   \brief   Reverse bit order of value
 369:Core/cmsis_gcc.h ****   \details Reverses the bit order of the given value.
 370:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 371:Core/cmsis_gcc.h ****   \return               Reversed value
 372:Core/cmsis_gcc.h ****  */
 373:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
 374:Core/cmsis_gcc.h **** {
 375:Core/cmsis_gcc.h ****   uint32_t result;
 376:Core/cmsis_gcc.h **** 
 377:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 378:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 379:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
ARM GAS  /tmp/ccMDRKnu.s 			page 26


 380:Core/cmsis_gcc.h ****    __ASM ("rbit %0, %1" : "=r" (result) : "r" (value) );
 381:Core/cmsis_gcc.h **** #else
 382:Core/cmsis_gcc.h ****   uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
 383:Core/cmsis_gcc.h **** 
 384:Core/cmsis_gcc.h ****   result = value;                      /* r will be reversed bits of v; first get LSB of v */
 385:Core/cmsis_gcc.h ****   for (value >>= 1U; value != 0U; value >>= 1U)
 386:Core/cmsis_gcc.h ****   {
 387:Core/cmsis_gcc.h ****     result <<= 1U;
 388:Core/cmsis_gcc.h ****     result |= value & 1U;
 389:Core/cmsis_gcc.h ****     s--;
 390:Core/cmsis_gcc.h ****   }
 391:Core/cmsis_gcc.h ****   result <<= s;                        /* shift when v's highest bits are zero */
 392:Core/cmsis_gcc.h **** #endif
 393:Core/cmsis_gcc.h ****   return result;
 394:Core/cmsis_gcc.h **** }
 395:Core/cmsis_gcc.h **** 
 396:Core/cmsis_gcc.h **** 
 397:Core/cmsis_gcc.h **** /**
 398:Core/cmsis_gcc.h ****   \brief   Count leading zeros
 399:Core/cmsis_gcc.h ****   \details Counts the number of leading zeros of a data value.
 400:Core/cmsis_gcc.h ****   \param [in]  value  Value to count the leading zeros
 401:Core/cmsis_gcc.h ****   \return             number of leading zeros in value
 402:Core/cmsis_gcc.h ****  */
 403:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
 404:Core/cmsis_gcc.h **** {
 405:Core/cmsis_gcc.h ****   /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
 406:Core/cmsis_gcc.h ****      __builtin_clz(0) is undefined behaviour, so handle this case specially.
 407:Core/cmsis_gcc.h ****      This guarantees ARM-compatible results if happening to compile on a non-ARM
 408:Core/cmsis_gcc.h ****      target, and ensures the compiler doesn't decide to activate any
 409:Core/cmsis_gcc.h ****      optimisations using the logic "value was passed to __builtin_clz, so it
 410:Core/cmsis_gcc.h ****      is non-zero".
 411:Core/cmsis_gcc.h ****      ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
 412:Core/cmsis_gcc.h ****      single CLZ instruction.
 413:Core/cmsis_gcc.h ****    */
 414:Core/cmsis_gcc.h ****   if (value == 0U)
 415:Core/cmsis_gcc.h ****   {
 416:Core/cmsis_gcc.h ****     return 32U;
 417:Core/cmsis_gcc.h ****   }
 418:Core/cmsis_gcc.h ****   return __builtin_clz(value);
 419:Core/cmsis_gcc.h **** }
 420:Core/cmsis_gcc.h **** 
 421:Core/cmsis_gcc.h **** 
 422:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 423:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 424:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 425:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
 426:Core/cmsis_gcc.h **** /**
 427:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (8 bit)
 428:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 8 bit value.
 429:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 430:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 431:Core/cmsis_gcc.h ****  */
 432:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
 433:Core/cmsis_gcc.h **** {
 434:Core/cmsis_gcc.h ****     uint32_t result;
 435:Core/cmsis_gcc.h **** 
 436:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
ARM GAS  /tmp/ccMDRKnu.s 			page 27


 437:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
 438:Core/cmsis_gcc.h **** #else
 439:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 440:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 441:Core/cmsis_gcc.h ****     */
 442:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
 443:Core/cmsis_gcc.h **** #endif
 444:Core/cmsis_gcc.h ****    return ((uint8_t) result);    /* Add explicit type cast here */
 445:Core/cmsis_gcc.h **** }
 446:Core/cmsis_gcc.h **** 
 447:Core/cmsis_gcc.h **** 
 448:Core/cmsis_gcc.h **** /**
 449:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (16 bit)
 450:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 16 bit values.
 451:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 452:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 453:Core/cmsis_gcc.h ****  */
 454:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
 455:Core/cmsis_gcc.h **** {
 456:Core/cmsis_gcc.h ****     uint32_t result;
 457:Core/cmsis_gcc.h **** 
 458:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 459:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
 460:Core/cmsis_gcc.h **** #else
 461:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 462:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 463:Core/cmsis_gcc.h ****     */
 464:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
 465:Core/cmsis_gcc.h **** #endif
 466:Core/cmsis_gcc.h ****    return ((uint16_t) result);    /* Add explicit type cast here */
 467:Core/cmsis_gcc.h **** }
 468:Core/cmsis_gcc.h **** 
 469:Core/cmsis_gcc.h **** 
 470:Core/cmsis_gcc.h **** /**
 471:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (32 bit)
 472:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 32 bit values.
 473:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 474:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 475:Core/cmsis_gcc.h ****  */
 476:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
 477:Core/cmsis_gcc.h **** {
 478:Core/cmsis_gcc.h ****     uint32_t result;
 479:Core/cmsis_gcc.h **** 
 480:Core/cmsis_gcc.h ****    __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 481:Core/cmsis_gcc.h ****    return(result);
 482:Core/cmsis_gcc.h **** }
 483:Core/cmsis_gcc.h **** 
 484:Core/cmsis_gcc.h **** 
 485:Core/cmsis_gcc.h **** /**
 486:Core/cmsis_gcc.h ****   \brief   STR Exclusive (8 bit)
 487:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 8 bit values.
 488:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 489:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 490:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 491:Core/cmsis_gcc.h ****   \return          1  Function failed
 492:Core/cmsis_gcc.h ****  */
 493:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
ARM GAS  /tmp/ccMDRKnu.s 			page 28


 494:Core/cmsis_gcc.h **** {
 495:Core/cmsis_gcc.h ****    uint32_t result;
 496:Core/cmsis_gcc.h **** 
 497:Core/cmsis_gcc.h ****    __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
 498:Core/cmsis_gcc.h ****    return(result);
 499:Core/cmsis_gcc.h **** }
 500:Core/cmsis_gcc.h **** 
 501:Core/cmsis_gcc.h **** 
 502:Core/cmsis_gcc.h **** /**
 503:Core/cmsis_gcc.h ****   \brief   STR Exclusive (16 bit)
 504:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 16 bit values.
 505:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 506:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 507:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 508:Core/cmsis_gcc.h ****   \return          1  Function failed
 509:Core/cmsis_gcc.h ****  */
 510:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
 511:Core/cmsis_gcc.h **** {
 512:Core/cmsis_gcc.h ****    uint32_t result;
 513:Core/cmsis_gcc.h **** 
 514:Core/cmsis_gcc.h ****    __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
 515:Core/cmsis_gcc.h ****    return(result);
 516:Core/cmsis_gcc.h **** }
 517:Core/cmsis_gcc.h **** 
 518:Core/cmsis_gcc.h **** 
 519:Core/cmsis_gcc.h **** /**
 520:Core/cmsis_gcc.h ****   \brief   STR Exclusive (32 bit)
 521:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 32 bit values.
 522:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 523:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 524:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 525:Core/cmsis_gcc.h ****   \return          1  Function failed
 526:Core/cmsis_gcc.h ****  */
 527:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
 528:Core/cmsis_gcc.h **** {
 529:Core/cmsis_gcc.h ****    uint32_t result;
 530:Core/cmsis_gcc.h **** 
 531:Core/cmsis_gcc.h ****    __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 532:Core/cmsis_gcc.h ****    return(result);
 533:Core/cmsis_gcc.h **** }
 534:Core/cmsis_gcc.h **** 
 535:Core/cmsis_gcc.h **** 
 536:Core/cmsis_gcc.h **** /**
 537:Core/cmsis_gcc.h ****   \brief   Remove the exclusive lock
 538:Core/cmsis_gcc.h ****   \details Removes the exclusive lock which is created by LDREX.
 539:Core/cmsis_gcc.h ****  */
 540:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void)
 541:Core/cmsis_gcc.h **** {
 542:Core/cmsis_gcc.h ****   __ASM volatile ("clrex" ::: "memory");
 543:Core/cmsis_gcc.h **** }
 544:Core/cmsis_gcc.h **** 
 545:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 546:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 547:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 548:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 549:Core/cmsis_gcc.h **** 
 550:Core/cmsis_gcc.h **** 
ARM GAS  /tmp/ccMDRKnu.s 			page 29


 551:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 552:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 553:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
 554:Core/cmsis_gcc.h **** /**
 555:Core/cmsis_gcc.h ****   \brief   Signed Saturate
 556:Core/cmsis_gcc.h ****   \details Saturates a signed value.
 557:Core/cmsis_gcc.h ****   \param [in]  ARG1  Value to be saturated
 558:Core/cmsis_gcc.h ****   \param [in]  ARG2  Bit position to saturate to (1..32)
 559:Core/cmsis_gcc.h ****   \return             Saturated value
 560:Core/cmsis_gcc.h ****  */
 561:Core/cmsis_gcc.h **** #define __SSAT(ARG1, ARG2) \
 562:Core/cmsis_gcc.h **** __extension__ \
 563:Core/cmsis_gcc.h **** ({                          \
 564:Core/cmsis_gcc.h ****   int32_t __RES, __ARG1 = (ARG1); \
 565:Core/cmsis_gcc.h ****   __ASM volatile ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
 566:Core/cmsis_gcc.h ****   __RES; \
 567:Core/cmsis_gcc.h ****  })
 568:Core/cmsis_gcc.h **** 
 569:Core/cmsis_gcc.h **** 
 570:Core/cmsis_gcc.h **** /**
 571:Core/cmsis_gcc.h ****   \brief   Unsigned Saturate
 572:Core/cmsis_gcc.h ****   \details Saturates an unsigned value.
 573:Core/cmsis_gcc.h ****   \param [in]  ARG1  Value to be saturated
 574:Core/cmsis_gcc.h ****   \param [in]  ARG2  Bit position to saturate to (0..31)
 575:Core/cmsis_gcc.h ****   \return             Saturated value
 576:Core/cmsis_gcc.h ****  */
 577:Core/cmsis_gcc.h **** #define __USAT(ARG1, ARG2) \
 578:Core/cmsis_gcc.h **** __extension__ \
 579:Core/cmsis_gcc.h **** ({                          \
 580:Core/cmsis_gcc.h ****   uint32_t __RES, __ARG1 = (ARG1); \
 581:Core/cmsis_gcc.h ****   __ASM volatile ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
 582:Core/cmsis_gcc.h ****   __RES; \
 583:Core/cmsis_gcc.h ****  })
 584:Core/cmsis_gcc.h **** 
 585:Core/cmsis_gcc.h **** 
 586:Core/cmsis_gcc.h **** /**
 587:Core/cmsis_gcc.h ****   \brief   Rotate Right with Extend (32 bit)
 588:Core/cmsis_gcc.h ****   \details Moves each bit of a bitstring right by one bit.
 589:Core/cmsis_gcc.h ****            The carry input is shifted in at the left end of the bitstring.
 590:Core/cmsis_gcc.h ****   \param [in]    value  Value to rotate
 591:Core/cmsis_gcc.h ****   \return               Rotated value
 592:Core/cmsis_gcc.h ****  */
 593:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
 594:Core/cmsis_gcc.h **** {
 595:Core/cmsis_gcc.h ****   uint32_t result;
 596:Core/cmsis_gcc.h **** 
 597:Core/cmsis_gcc.h ****   __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 598:Core/cmsis_gcc.h ****   return(result);
 599:Core/cmsis_gcc.h **** }
 600:Core/cmsis_gcc.h **** 
 601:Core/cmsis_gcc.h **** 
 602:Core/cmsis_gcc.h **** /**
 603:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (8 bit)
 604:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 8 bit value.
 605:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 606:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 607:Core/cmsis_gcc.h ****  */
ARM GAS  /tmp/ccMDRKnu.s 			page 30


 608:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
 609:Core/cmsis_gcc.h **** {
 610:Core/cmsis_gcc.h ****     uint32_t result;
 611:Core/cmsis_gcc.h **** 
 612:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 613:Core/cmsis_gcc.h ****    __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
 614:Core/cmsis_gcc.h **** #else
 615:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 616:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 617:Core/cmsis_gcc.h ****     */
 618:Core/cmsis_gcc.h ****    __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
 619:Core/cmsis_gcc.h **** #endif
 620:Core/cmsis_gcc.h ****    return ((uint8_t) result);    /* Add explicit type cast here */
 621:Core/cmsis_gcc.h **** }
 622:Core/cmsis_gcc.h **** 
 623:Core/cmsis_gcc.h **** 
 624:Core/cmsis_gcc.h **** /**
 625:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (16 bit)
 626:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 16 bit values.
 627:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 628:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 629:Core/cmsis_gcc.h ****  */
 630:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
 631:Core/cmsis_gcc.h **** {
 632:Core/cmsis_gcc.h ****     uint32_t result;
 633:Core/cmsis_gcc.h **** 
 634:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 635:Core/cmsis_gcc.h ****    __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
 636:Core/cmsis_gcc.h **** #else
 637:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 638:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 639:Core/cmsis_gcc.h ****     */
 640:Core/cmsis_gcc.h ****    __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
 641:Core/cmsis_gcc.h **** #endif
 642:Core/cmsis_gcc.h ****    return ((uint16_t) result);    /* Add explicit type cast here */
 643:Core/cmsis_gcc.h **** }
 644:Core/cmsis_gcc.h **** 
 645:Core/cmsis_gcc.h **** 
 646:Core/cmsis_gcc.h **** /**
 647:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (32 bit)
 648:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 32 bit values.
 649:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 650:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 651:Core/cmsis_gcc.h ****  */
 652:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
 653:Core/cmsis_gcc.h **** {
 654:Core/cmsis_gcc.h ****     uint32_t result;
 655:Core/cmsis_gcc.h **** 
 656:Core/cmsis_gcc.h ****    __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
 657:Core/cmsis_gcc.h ****    return(result);
 658:Core/cmsis_gcc.h **** }
 659:Core/cmsis_gcc.h **** 
 660:Core/cmsis_gcc.h **** 
 661:Core/cmsis_gcc.h **** /**
 662:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (8 bit)
 663:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 8 bit values.
 664:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
ARM GAS  /tmp/ccMDRKnu.s 			page 31


 665:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 666:Core/cmsis_gcc.h ****  */
 667:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
 668:Core/cmsis_gcc.h **** {
 669:Core/cmsis_gcc.h ****    __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
 670:Core/cmsis_gcc.h **** }
 671:Core/cmsis_gcc.h **** 
 672:Core/cmsis_gcc.h **** 
 673:Core/cmsis_gcc.h **** /**
 674:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (16 bit)
 675:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 16 bit values.
 676:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 677:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 678:Core/cmsis_gcc.h ****  */
 679:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
 680:Core/cmsis_gcc.h **** {
 681:Core/cmsis_gcc.h ****    __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
 682:Core/cmsis_gcc.h **** }
 683:Core/cmsis_gcc.h **** 
 684:Core/cmsis_gcc.h **** 
 685:Core/cmsis_gcc.h **** /**
 686:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (32 bit)
 687:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 32 bit values.
 688:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 689:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 690:Core/cmsis_gcc.h ****  */
 691:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
 692:Core/cmsis_gcc.h **** {
 693:Core/cmsis_gcc.h ****    __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
 694:Core/cmsis_gcc.h **** }
 695:Core/cmsis_gcc.h **** 
 696:Core/cmsis_gcc.h **** #else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 697:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 698:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 699:Core/cmsis_gcc.h **** 
 700:Core/cmsis_gcc.h **** /**
 701:Core/cmsis_gcc.h ****   \brief   Signed Saturate
 702:Core/cmsis_gcc.h ****   \details Saturates a signed value.
 703:Core/cmsis_gcc.h ****   \param [in]  value  Value to be saturated
 704:Core/cmsis_gcc.h ****   \param [in]    sat  Bit position to saturate to (1..32)
 705:Core/cmsis_gcc.h ****   \return             Saturated value
 706:Core/cmsis_gcc.h ****  */
 707:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
 708:Core/cmsis_gcc.h **** {
 709:Core/cmsis_gcc.h ****   if ((sat >= 1U) && (sat <= 32U))
 710:Core/cmsis_gcc.h ****   {
 711:Core/cmsis_gcc.h ****     const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
 712:Core/cmsis_gcc.h ****     const int32_t min = -1 - max ;
 713:Core/cmsis_gcc.h ****     if (val > max)
 714:Core/cmsis_gcc.h ****     {
 715:Core/cmsis_gcc.h ****       return max;
 716:Core/cmsis_gcc.h ****     }
 717:Core/cmsis_gcc.h ****     else if (val < min)
 718:Core/cmsis_gcc.h ****     {
 719:Core/cmsis_gcc.h ****       return min;
 720:Core/cmsis_gcc.h ****     }
 721:Core/cmsis_gcc.h ****   }
ARM GAS  /tmp/ccMDRKnu.s 			page 32


 722:Core/cmsis_gcc.h ****   return val;
 723:Core/cmsis_gcc.h **** }
 724:Core/cmsis_gcc.h **** 
 725:Core/cmsis_gcc.h **** /**
 726:Core/cmsis_gcc.h ****   \brief   Unsigned Saturate
 727:Core/cmsis_gcc.h ****   \details Saturates an unsigned value.
 728:Core/cmsis_gcc.h ****   \param [in]  value  Value to be saturated
 729:Core/cmsis_gcc.h ****   \param [in]    sat  Bit position to saturate to (0..31)
 730:Core/cmsis_gcc.h ****   \return             Saturated value
 731:Core/cmsis_gcc.h ****  */
 732:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
 733:Core/cmsis_gcc.h **** {
 734:Core/cmsis_gcc.h ****   if (sat <= 31U)
 735:Core/cmsis_gcc.h ****   {
 736:Core/cmsis_gcc.h ****     const uint32_t max = ((1U << sat) - 1U);
 737:Core/cmsis_gcc.h ****     if (val > (int32_t)max)
 738:Core/cmsis_gcc.h ****     {
 739:Core/cmsis_gcc.h ****       return max;
 740:Core/cmsis_gcc.h ****     }
 741:Core/cmsis_gcc.h ****     else if (val < 0)
 742:Core/cmsis_gcc.h ****     {
 743:Core/cmsis_gcc.h ****       return 0U;
 744:Core/cmsis_gcc.h ****     }
 745:Core/cmsis_gcc.h ****   }
 746:Core/cmsis_gcc.h ****   return (uint32_t)val;
 747:Core/cmsis_gcc.h **** }
 748:Core/cmsis_gcc.h **** 
 749:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 750:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 751:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 752:Core/cmsis_gcc.h **** 
 753:Core/cmsis_gcc.h **** 
 754:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 755:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
 756:Core/cmsis_gcc.h **** /**
 757:Core/cmsis_gcc.h ****   \brief   Load-Acquire (8 bit)
 758:Core/cmsis_gcc.h ****   \details Executes a LDAB instruction for 8 bit value.
 759:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 760:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 761:Core/cmsis_gcc.h ****  */
 762:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
 763:Core/cmsis_gcc.h **** {
 764:Core/cmsis_gcc.h ****     uint32_t result;
 765:Core/cmsis_gcc.h **** 
 766:Core/cmsis_gcc.h ****    __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 767:Core/cmsis_gcc.h ****    return ((uint8_t) result);
 768:Core/cmsis_gcc.h **** }
 769:Core/cmsis_gcc.h **** 
 770:Core/cmsis_gcc.h **** 
 771:Core/cmsis_gcc.h **** /**
 772:Core/cmsis_gcc.h ****   \brief   Load-Acquire (16 bit)
 773:Core/cmsis_gcc.h ****   \details Executes a LDAH instruction for 16 bit values.
 774:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 775:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 776:Core/cmsis_gcc.h ****  */
 777:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
 778:Core/cmsis_gcc.h **** {
ARM GAS  /tmp/ccMDRKnu.s 			page 33


 779:Core/cmsis_gcc.h ****     uint32_t result;
 780:Core/cmsis_gcc.h **** 
 781:Core/cmsis_gcc.h ****    __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 782:Core/cmsis_gcc.h ****    return ((uint16_t) result);
 783:Core/cmsis_gcc.h **** }
 784:Core/cmsis_gcc.h **** 
 785:Core/cmsis_gcc.h **** 
 786:Core/cmsis_gcc.h **** /**
 787:Core/cmsis_gcc.h ****   \brief   Load-Acquire (32 bit)
 788:Core/cmsis_gcc.h ****   \details Executes a LDA instruction for 32 bit values.
 789:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 790:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 791:Core/cmsis_gcc.h ****  */
 792:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
 793:Core/cmsis_gcc.h **** {
 794:Core/cmsis_gcc.h ****     uint32_t result;
 795:Core/cmsis_gcc.h **** 
 796:Core/cmsis_gcc.h ****    __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 797:Core/cmsis_gcc.h ****    return(result);
 798:Core/cmsis_gcc.h **** }
 799:Core/cmsis_gcc.h **** 
 800:Core/cmsis_gcc.h **** 
 801:Core/cmsis_gcc.h **** /**
 802:Core/cmsis_gcc.h ****   \brief   Store-Release (8 bit)
 803:Core/cmsis_gcc.h ****   \details Executes a STLB instruction for 8 bit values.
 804:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 805:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 806:Core/cmsis_gcc.h ****  */
 807:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
 808:Core/cmsis_gcc.h **** {
 809:Core/cmsis_gcc.h ****    __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 810:Core/cmsis_gcc.h **** }
 811:Core/cmsis_gcc.h **** 
 812:Core/cmsis_gcc.h **** 
 813:Core/cmsis_gcc.h **** /**
 814:Core/cmsis_gcc.h ****   \brief   Store-Release (16 bit)
 815:Core/cmsis_gcc.h ****   \details Executes a STLH instruction for 16 bit values.
 816:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 817:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 818:Core/cmsis_gcc.h ****  */
 819:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
 820:Core/cmsis_gcc.h **** {
 821:Core/cmsis_gcc.h ****    __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 822:Core/cmsis_gcc.h **** }
 823:Core/cmsis_gcc.h **** 
 824:Core/cmsis_gcc.h **** 
 825:Core/cmsis_gcc.h **** /**
 826:Core/cmsis_gcc.h ****   \brief   Store-Release (32 bit)
 827:Core/cmsis_gcc.h ****   \details Executes a STL instruction for 32 bit values.
 828:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 829:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 830:Core/cmsis_gcc.h ****  */
 831:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
 832:Core/cmsis_gcc.h **** {
 833:Core/cmsis_gcc.h ****    __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 834:Core/cmsis_gcc.h **** }
 835:Core/cmsis_gcc.h **** 
ARM GAS  /tmp/ccMDRKnu.s 			page 34


 836:Core/cmsis_gcc.h **** 
 837:Core/cmsis_gcc.h **** /**
 838:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (8 bit)
 839:Core/cmsis_gcc.h ****   \details Executes a LDAB exclusive instruction for 8 bit value.
 840:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 841:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 842:Core/cmsis_gcc.h ****  */
 843:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
 844:Core/cmsis_gcc.h **** {
 845:Core/cmsis_gcc.h ****     uint32_t result;
 846:Core/cmsis_gcc.h **** 
 847:Core/cmsis_gcc.h ****    __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 848:Core/cmsis_gcc.h ****    return ((uint8_t) result);
 849:Core/cmsis_gcc.h **** }
 850:Core/cmsis_gcc.h **** 
 851:Core/cmsis_gcc.h **** 
 852:Core/cmsis_gcc.h **** /**
 853:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (16 bit)
 854:Core/cmsis_gcc.h ****   \details Executes a LDAH exclusive instruction for 16 bit values.
 855:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 856:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 857:Core/cmsis_gcc.h ****  */
 858:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
 859:Core/cmsis_gcc.h **** {
 860:Core/cmsis_gcc.h ****     uint32_t result;
 861:Core/cmsis_gcc.h **** 
 862:Core/cmsis_gcc.h ****    __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 863:Core/cmsis_gcc.h ****    return ((uint16_t) result);
 864:Core/cmsis_gcc.h **** }
 865:Core/cmsis_gcc.h **** 
 866:Core/cmsis_gcc.h **** 
 867:Core/cmsis_gcc.h **** /**
 868:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (32 bit)
 869:Core/cmsis_gcc.h ****   \details Executes a LDA exclusive instruction for 32 bit values.
 870:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 871:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 872:Core/cmsis_gcc.h ****  */
 873:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
 874:Core/cmsis_gcc.h **** {
 875:Core/cmsis_gcc.h ****     uint32_t result;
 876:Core/cmsis_gcc.h **** 
 877:Core/cmsis_gcc.h ****    __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 878:Core/cmsis_gcc.h ****    return(result);
 879:Core/cmsis_gcc.h **** }
 880:Core/cmsis_gcc.h **** 
 881:Core/cmsis_gcc.h **** 
 882:Core/cmsis_gcc.h **** /**
 883:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (8 bit)
 884:Core/cmsis_gcc.h ****   \details Executes a STLB exclusive instruction for 8 bit values.
 885:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 886:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 887:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 888:Core/cmsis_gcc.h ****   \return          1  Function failed
 889:Core/cmsis_gcc.h ****  */
 890:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
 891:Core/cmsis_gcc.h **** {
 892:Core/cmsis_gcc.h ****    uint32_t result;
ARM GAS  /tmp/ccMDRKnu.s 			page 35


 893:Core/cmsis_gcc.h **** 
 894:Core/cmsis_gcc.h ****    __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "mem
 895:Core/cmsis_gcc.h ****    return(result);
 896:Core/cmsis_gcc.h **** }
 897:Core/cmsis_gcc.h **** 
 898:Core/cmsis_gcc.h **** 
 899:Core/cmsis_gcc.h **** /**
 900:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (16 bit)
 901:Core/cmsis_gcc.h ****   \details Executes a STLH exclusive instruction for 16 bit values.
 902:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 903:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 904:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 905:Core/cmsis_gcc.h ****   \return          1  Function failed
 906:Core/cmsis_gcc.h ****  */
 907:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
 908:Core/cmsis_gcc.h **** {
 909:Core/cmsis_gcc.h ****    uint32_t result;
 910:Core/cmsis_gcc.h **** 
 911:Core/cmsis_gcc.h ****    __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "mem
 912:Core/cmsis_gcc.h ****    return(result);
 913:Core/cmsis_gcc.h **** }
 914:Core/cmsis_gcc.h **** 
 915:Core/cmsis_gcc.h **** 
 916:Core/cmsis_gcc.h **** /**
 917:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (32 bit)
 918:Core/cmsis_gcc.h ****   \details Executes a STL exclusive instruction for 32 bit values.
 919:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 920:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 921:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 922:Core/cmsis_gcc.h ****   \return          1  Function failed
 923:Core/cmsis_gcc.h ****  */
 924:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
 925:Core/cmsis_gcc.h **** {
 926:Core/cmsis_gcc.h ****    uint32_t result;
 927:Core/cmsis_gcc.h **** 
 928:Core/cmsis_gcc.h ****    __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memo
 929:Core/cmsis_gcc.h ****    return(result);
 930:Core/cmsis_gcc.h **** }
 931:Core/cmsis_gcc.h **** 
 932:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 933:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 934:Core/cmsis_gcc.h **** 
 935:Core/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
 936:Core/cmsis_gcc.h **** 
 937:Core/cmsis_gcc.h **** 
 938:Core/cmsis_gcc.h **** /* ###########################  Core Function Access  ########################### */
 939:Core/cmsis_gcc.h **** /** \ingroup  CMSIS_Core_FunctionInterface
 940:Core/cmsis_gcc.h ****     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
 941:Core/cmsis_gcc.h ****   @{
 942:Core/cmsis_gcc.h ****  */
 943:Core/cmsis_gcc.h **** 
 944:Core/cmsis_gcc.h **** /**
 945:Core/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
 946:Core/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing special-purpose register PRIMASK.
 947:Core/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 948:Core/cmsis_gcc.h ****  */
 949:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
ARM GAS  /tmp/ccMDRKnu.s 			page 36


 950:Core/cmsis_gcc.h **** {
 951:Core/cmsis_gcc.h ****   __ASM volatile ("cpsie i" : : : "memory");
 952:Core/cmsis_gcc.h **** }
 953:Core/cmsis_gcc.h **** 
 954:Core/cmsis_gcc.h **** 
 955:Core/cmsis_gcc.h **** /**
 956:Core/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
 957:Core/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting special-purpose register PRIMASK.
 958:Core/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 959:Core/cmsis_gcc.h ****  */
 960:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
 961:Core/cmsis_gcc.h **** {
 962:Core/cmsis_gcc.h ****   __ASM volatile ("cpsid i" : : : "memory");
 963:Core/cmsis_gcc.h **** }
 964:Core/cmsis_gcc.h **** 
 965:Core/cmsis_gcc.h **** 
 966:Core/cmsis_gcc.h **** /**
 967:Core/cmsis_gcc.h ****   \brief   Get Control Register
 968:Core/cmsis_gcc.h ****   \details Returns the content of the Control Register.
 969:Core/cmsis_gcc.h ****   \return               Control Register value
 970:Core/cmsis_gcc.h ****  */
 971:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
 972:Core/cmsis_gcc.h **** {
 973:Core/cmsis_gcc.h ****   uint32_t result;
 974:Core/cmsis_gcc.h **** 
 975:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control" : "=r" (result) );
 976:Core/cmsis_gcc.h ****   return(result);
 977:Core/cmsis_gcc.h **** }
 978:Core/cmsis_gcc.h **** 
 979:Core/cmsis_gcc.h **** 
 980:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 981:Core/cmsis_gcc.h **** /**
 982:Core/cmsis_gcc.h ****   \brief   Get Control Register (non-secure)
 983:Core/cmsis_gcc.h ****   \details Returns the content of the non-secure Control Register when in secure mode.
 984:Core/cmsis_gcc.h ****   \return               non-secure Control Register value
 985:Core/cmsis_gcc.h ****  */
 986:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
 987:Core/cmsis_gcc.h **** {
 988:Core/cmsis_gcc.h ****   uint32_t result;
 989:Core/cmsis_gcc.h **** 
 990:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
 991:Core/cmsis_gcc.h ****   return(result);
 992:Core/cmsis_gcc.h **** }
 993:Core/cmsis_gcc.h **** #endif
 994:Core/cmsis_gcc.h **** 
 995:Core/cmsis_gcc.h **** 
 996:Core/cmsis_gcc.h **** /**
 997:Core/cmsis_gcc.h ****   \brief   Set Control Register
 998:Core/cmsis_gcc.h ****   \details Writes the given value to the Control Register.
 999:Core/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
1000:Core/cmsis_gcc.h ****  */
1001:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
1002:Core/cmsis_gcc.h **** {
1003:Core/cmsis_gcc.h ****   __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
1004:Core/cmsis_gcc.h ****   __ISB();
1005:Core/cmsis_gcc.h **** }
1006:Core/cmsis_gcc.h **** 
ARM GAS  /tmp/ccMDRKnu.s 			page 37


1007:Core/cmsis_gcc.h **** 
1008:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1009:Core/cmsis_gcc.h **** /**
1010:Core/cmsis_gcc.h ****   \brief   Set Control Register (non-secure)
1011:Core/cmsis_gcc.h ****   \details Writes the given value to the non-secure Control Register when in secure state.
1012:Core/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
1013:Core/cmsis_gcc.h ****  */
1014:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
1015:Core/cmsis_gcc.h **** {
1016:Core/cmsis_gcc.h ****   __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
1017:Core/cmsis_gcc.h ****   __ISB();
1018:Core/cmsis_gcc.h **** }
1019:Core/cmsis_gcc.h **** #endif
1020:Core/cmsis_gcc.h **** 
1021:Core/cmsis_gcc.h **** 
1022:Core/cmsis_gcc.h **** /**
1023:Core/cmsis_gcc.h ****   \brief   Get IPSR Register
1024:Core/cmsis_gcc.h ****   \details Returns the content of the IPSR Register.
1025:Core/cmsis_gcc.h ****   \return               IPSR Register value
1026:Core/cmsis_gcc.h ****  */
1027:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
1028:Core/cmsis_gcc.h **** {
1029:Core/cmsis_gcc.h ****   uint32_t result;
1030:Core/cmsis_gcc.h **** 
1031:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
1032:Core/cmsis_gcc.h ****   return(result);
1033:Core/cmsis_gcc.h **** }
1034:Core/cmsis_gcc.h **** 
1035:Core/cmsis_gcc.h **** 
1036:Core/cmsis_gcc.h **** /**
1037:Core/cmsis_gcc.h ****   \brief   Get APSR Register
1038:Core/cmsis_gcc.h ****   \details Returns the content of the APSR Register.
1039:Core/cmsis_gcc.h ****   \return               APSR Register value
1040:Core/cmsis_gcc.h ****  */
1041:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
1042:Core/cmsis_gcc.h **** {
1043:Core/cmsis_gcc.h ****   uint32_t result;
1044:Core/cmsis_gcc.h **** 
1045:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, apsr" : "=r" (result) );
1046:Core/cmsis_gcc.h ****   return(result);
1047:Core/cmsis_gcc.h **** }
1048:Core/cmsis_gcc.h **** 
1049:Core/cmsis_gcc.h **** 
1050:Core/cmsis_gcc.h **** /**
1051:Core/cmsis_gcc.h ****   \brief   Get xPSR Register
1052:Core/cmsis_gcc.h ****   \details Returns the content of the xPSR Register.
1053:Core/cmsis_gcc.h ****   \return               xPSR Register value
1054:Core/cmsis_gcc.h ****  */
1055:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
1056:Core/cmsis_gcc.h **** {
1057:Core/cmsis_gcc.h ****   uint32_t result;
1058:Core/cmsis_gcc.h **** 
1059:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
1060:Core/cmsis_gcc.h ****   return(result);
1061:Core/cmsis_gcc.h **** }
1062:Core/cmsis_gcc.h **** 
1063:Core/cmsis_gcc.h **** 
ARM GAS  /tmp/ccMDRKnu.s 			page 38


1064:Core/cmsis_gcc.h **** /**
1065:Core/cmsis_gcc.h ****   \brief   Get Process Stack Pointer
1066:Core/cmsis_gcc.h ****   \details Returns the current value of the Process Stack Pointer (PSP).
1067:Core/cmsis_gcc.h ****   \return               PSP Register value
1068:Core/cmsis_gcc.h ****  */
1069:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
1070:Core/cmsis_gcc.h **** {
1071:Core/cmsis_gcc.h ****   uint32_t result;
1072:Core/cmsis_gcc.h **** 
1073:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp"  : "=r" (result) );
1074:Core/cmsis_gcc.h ****   return(result);
1075:Core/cmsis_gcc.h **** }
1076:Core/cmsis_gcc.h **** 
1077:Core/cmsis_gcc.h **** 
1078:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1079:Core/cmsis_gcc.h **** /**
1080:Core/cmsis_gcc.h ****   \brief   Get Process Stack Pointer (non-secure)
1081:Core/cmsis_gcc.h ****   \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
1082:Core/cmsis_gcc.h ****   \return               PSP Register value
1083:Core/cmsis_gcc.h ****  */
1084:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
1085:Core/cmsis_gcc.h **** {
1086:Core/cmsis_gcc.h ****   uint32_t result;
1087:Core/cmsis_gcc.h **** 
1088:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
1089:Core/cmsis_gcc.h ****   return(result);
1090:Core/cmsis_gcc.h **** }
1091:Core/cmsis_gcc.h **** #endif
1092:Core/cmsis_gcc.h **** 
1093:Core/cmsis_gcc.h **** 
1094:Core/cmsis_gcc.h **** /**
1095:Core/cmsis_gcc.h ****   \brief   Set Process Stack Pointer
1096:Core/cmsis_gcc.h ****   \details Assigns the given value to the Process Stack Pointer (PSP).
1097:Core/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
1098:Core/cmsis_gcc.h ****  */
1099:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
1100:Core/cmsis_gcc.h **** {
1101:Core/cmsis_gcc.h ****   __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
1102:Core/cmsis_gcc.h **** }
1103:Core/cmsis_gcc.h **** 
1104:Core/cmsis_gcc.h **** 
1105:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1106:Core/cmsis_gcc.h **** /**
1107:Core/cmsis_gcc.h ****   \brief   Set Process Stack Pointer (non-secure)
1108:Core/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
1109:Core/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
1110:Core/cmsis_gcc.h ****  */
1111:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
1112:Core/cmsis_gcc.h **** {
1113:Core/cmsis_gcc.h ****   __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
1114:Core/cmsis_gcc.h **** }
1115:Core/cmsis_gcc.h **** #endif
1116:Core/cmsis_gcc.h **** 
1117:Core/cmsis_gcc.h **** 
1118:Core/cmsis_gcc.h **** /**
1119:Core/cmsis_gcc.h ****   \brief   Get Main Stack Pointer
1120:Core/cmsis_gcc.h ****   \details Returns the current value of the Main Stack Pointer (MSP).
ARM GAS  /tmp/ccMDRKnu.s 			page 39


1121:Core/cmsis_gcc.h ****   \return               MSP Register value
1122:Core/cmsis_gcc.h ****  */
1123:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
1124:Core/cmsis_gcc.h **** {
1125:Core/cmsis_gcc.h ****   uint32_t result;
1126:Core/cmsis_gcc.h **** 
1127:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp" : "=r" (result) );
1128:Core/cmsis_gcc.h ****   return(result);
1129:Core/cmsis_gcc.h **** }
1130:Core/cmsis_gcc.h **** 
1131:Core/cmsis_gcc.h **** 
1132:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1133:Core/cmsis_gcc.h **** /**
1134:Core/cmsis_gcc.h ****   \brief   Get Main Stack Pointer (non-secure)
1135:Core/cmsis_gcc.h ****   \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
1136:Core/cmsis_gcc.h ****   \return               MSP Register value
1137:Core/cmsis_gcc.h ****  */
1138:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
1139:Core/cmsis_gcc.h **** {
1140:Core/cmsis_gcc.h ****   uint32_t result;
1141:Core/cmsis_gcc.h **** 
1142:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
1143:Core/cmsis_gcc.h ****   return(result);
1144:Core/cmsis_gcc.h **** }
1145:Core/cmsis_gcc.h **** #endif
1146:Core/cmsis_gcc.h **** 
1147:Core/cmsis_gcc.h **** 
1148:Core/cmsis_gcc.h **** /**
1149:Core/cmsis_gcc.h ****   \brief   Set Main Stack Pointer
1150:Core/cmsis_gcc.h ****   \details Assigns the given value to the Main Stack Pointer (MSP).
1151:Core/cmsis_gcc.h ****   \param [in]    topOfMainStack  Main Stack Pointer value to set
1152:Core/cmsis_gcc.h ****  */
1153:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
1154:Core/cmsis_gcc.h **** {
1155:Core/cmsis_gcc.h ****   __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
1156:Core/cmsis_gcc.h **** }
1157:Core/cmsis_gcc.h **** 
1158:Core/cmsis_gcc.h **** 
1159:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1160:Core/cmsis_gcc.h **** /**
1161:Core/cmsis_gcc.h ****   \brief   Set Main Stack Pointer (non-secure)
1162:Core/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
1163:Core/cmsis_gcc.h ****   \param [in]    topOfMainStack  Main Stack Pointer value to set
1164:Core/cmsis_gcc.h ****  */
1165:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
1166:Core/cmsis_gcc.h **** {
1167:Core/cmsis_gcc.h ****   __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
1168:Core/cmsis_gcc.h **** }
1169:Core/cmsis_gcc.h **** #endif
1170:Core/cmsis_gcc.h **** 
1171:Core/cmsis_gcc.h **** 
1172:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1173:Core/cmsis_gcc.h **** /**
1174:Core/cmsis_gcc.h ****   \brief   Get Stack Pointer (non-secure)
1175:Core/cmsis_gcc.h ****   \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
1176:Core/cmsis_gcc.h ****   \return               SP Register value
1177:Core/cmsis_gcc.h ****  */
ARM GAS  /tmp/ccMDRKnu.s 			page 40


1178:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
1179:Core/cmsis_gcc.h **** {
1180:Core/cmsis_gcc.h ****   uint32_t result;
1181:Core/cmsis_gcc.h **** 
1182:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
1183:Core/cmsis_gcc.h ****   return(result);
1184:Core/cmsis_gcc.h **** }
1185:Core/cmsis_gcc.h **** 
1186:Core/cmsis_gcc.h **** 
1187:Core/cmsis_gcc.h **** /**
1188:Core/cmsis_gcc.h ****   \brief   Set Stack Pointer (non-secure)
1189:Core/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
1190:Core/cmsis_gcc.h ****   \param [in]    topOfStack  Stack Pointer value to set
1191:Core/cmsis_gcc.h ****  */
1192:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
1193:Core/cmsis_gcc.h **** {
1194:Core/cmsis_gcc.h ****   __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
1195:Core/cmsis_gcc.h **** }
1196:Core/cmsis_gcc.h **** #endif
1197:Core/cmsis_gcc.h **** 
1198:Core/cmsis_gcc.h **** 
1199:Core/cmsis_gcc.h **** /**
1200:Core/cmsis_gcc.h ****   \brief   Get Priority Mask
1201:Core/cmsis_gcc.h ****   \details Returns the current state of the priority mask bit from the Priority Mask Register.
1202:Core/cmsis_gcc.h ****   \return               Priority Mask value
1203:Core/cmsis_gcc.h ****  */
1204:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
 609              		.loc 2 1204 31 view .LVU161
 610              	.LBB13:
1205:Core/cmsis_gcc.h **** {
1206:Core/cmsis_gcc.h ****   uint32_t result;
 611              		.loc 2 1206 3 view .LVU162
1207:Core/cmsis_gcc.h **** 
1208:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, primask" : "=r" (result) );
 612              		.loc 2 1208 3 view .LVU163
 613              		.syntax divided
 614              	@ 1208 "Core/cmsis_gcc.h" 1
 615 0014 EFF31080 		MRS r0, primask
 616              	@ 0 "" 2
 617              	.LVL35:
1209:Core/cmsis_gcc.h ****   return(result);
 618              		.loc 2 1209 3 view .LVU164
 619              		.loc 2 1209 3 is_stmt 0 view .LVU165
 620              		.thumb
 621              		.syntax unified
 622              	.LBE13:
 623              	.LBE12:
 406:Library/src/lcm32f06x_dac.c ****         SYSCTRL->EDU_CFG17 = temp | (DAC_TriggerSource | DAC_TriggerMode);
 624              		.loc 1 406 9 is_stmt 1 discriminator 2 view .LVU166
 625              	.LBB14:
 626              	.LBI14:
 960:Core/cmsis_gcc.h **** {
 627              		.loc 2 960 27 view .LVU167
 628              	.LBB15:
 962:Core/cmsis_gcc.h **** }
 629              		.loc 2 962 3 view .LVU168
 630              		.syntax divided
ARM GAS  /tmp/ccMDRKnu.s 			page 41


 631              	@ 962 "Core/cmsis_gcc.h" 1
 632 0018 72B6     		cpsid i
 633              	@ 0 "" 2
 634              		.thumb
 635              		.syntax unified
 636              	.LBE15:
 637              	.LBE14:
 406:Library/src/lcm32f06x_dac.c ****         SYSCTRL->EDU_CFG17 = temp | (DAC_TriggerSource | DAC_TriggerMode);
 638              		.loc 1 406 9 discriminator 3 view .LVU169
 639 001a 0748     		ldr	r0, .L35+8
 640 001c 074D     		ldr	r5, .L35+12
 641 001e 0560     		str	r5, [r0]
 406:Library/src/lcm32f06x_dac.c ****         SYSCTRL->EDU_CFG17 = temp | (DAC_TriggerSource | DAC_TriggerMode);
 642              		.loc 1 406 25 discriminator 3 view .LVU170
 407:Library/src/lcm32f06x_dac.c ****         __dekey();
 643              		.loc 1 407 9 view .LVU171
 405:Library/src/lcm32f06x_dac.c ****         sysctrl_access();
 644              		.loc 1 405 14 is_stmt 0 view .LVU172
 645 0020 7320     		movs	r0, #115
 646 0022 8143     		bics	r1, r0
 647              	.LVL36:
 407:Library/src/lcm32f06x_dac.c ****         __dekey();
 648              		.loc 1 407 35 view .LVU173
 649 0024 1143     		orrs	r1, r2
 650 0026 2143     		orrs	r1, r4
 407:Library/src/lcm32f06x_dac.c ****         __dekey();
 651              		.loc 1 407 28 view .LVU174
 652 0028 5966     		str	r1, [r3, #100]
 408:Library/src/lcm32f06x_dac.c ****   }
 653              		.loc 1 408 9 is_stmt 1 view .LVU175
 654              	.LBB16:
 655              	.LBI16:
 949:Core/cmsis_gcc.h **** {
 656              		.loc 2 949 27 view .LVU176
 657              	.LBB17:
 951:Core/cmsis_gcc.h **** }
 658              		.loc 2 951 3 view .LVU177
 659              		.syntax divided
 660              	@ 951 "Core/cmsis_gcc.h" 1
 661 002a 62B6     		cpsie i
 662              	@ 0 "" 2
 663              		.thumb
 664              		.syntax unified
 665              	.LBE17:
 666              	.LBE16:
 408:Library/src/lcm32f06x_dac.c ****   }
 667              		.loc 1 408 18 view .LVU178
 668              		.loc 1 410 1 is_stmt 0 view .LVU179
 669 002c EDE7     		b	.L32
 670              	.L36:
 671 002e C046     		.align	2
 672              	.L35:
 673 0030 007C0140 		.word	1073839104
 674 0034 00700048 		.word	1207988224
 675 0038 7C700048 		.word	1207988348
 676 003c 9A65FA05 		.word	100296090
 677              		.cfi_endproc
ARM GAS  /tmp/ccMDRKnu.s 			page 42


 678              	.LFE57:
 680              		.section	.text.DAC_OutputBuff,"ax",%progbits
 681              		.align	1
 682              		.p2align 2,,3
 683              		.global	DAC_OutputBuff
 684              		.syntax unified
 685              		.code	16
 686              		.thumb_func
 688              	DAC_OutputBuff:
 689              	.LVL37:
 690              	.LFB58:
 411:Library/src/lcm32f06x_dac.c **** 
 412:Library/src/lcm32f06x_dac.c **** /**
 413:Library/src/lcm32f06x_dac.c ****   * @name   DAC_OutputBuff
 414:Library/src/lcm32f06x_dac.c ****   * @brief  EN: DAC Outpt Buff Enable.
 415:Library/src/lcm32f06x_dac.c ****   *         CN: DAC 输出Buff使能。
 416:Library/src/lcm32f06x_dac.c ****   * @param  DACx: 
 417:Library/src/lcm32f06x_dac.c ****   *         EN: where x can be 0 to select the DAC peripheral.
 418:Library/src/lcm32f06x_dac.c ****   *         CN: x 可以是 0 以选择 DAC 外设。
 419:Library/src/lcm32f06x_dac.c ****   * @param  NewState: 
 420:Library/src/lcm32f06x_dac.c ****   *         EN: new state of the specified DAC Output Buff.
 421:Library/src/lcm32f06x_dac.c ****   *         CN: 指定DAC 输出BUFF的新状态。
 422:Library/src/lcm32f06x_dac.c ****   *             @arg ENABLE
 423:Library/src/lcm32f06x_dac.c ****   *             @arg DISABLE
 424:Library/src/lcm32f06x_dac.c ****   * @retval None
 425:Library/src/lcm32f06x_dac.c ****   */
 426:Library/src/lcm32f06x_dac.c **** void DAC_OutputBuff(DAC_TypeDef *DACx, FunctionalState NewState)
 427:Library/src/lcm32f06x_dac.c **** {
 691              		.loc 1 427 1 is_stmt 1 view -0
 692              		.cfi_startproc
 693              		@ args = 0, pretend = 0, frame = 0
 694              		@ frame_needed = 0, uses_anonymous_args = 0
 695              		@ link register save eliminated.
 428:Library/src/lcm32f06x_dac.c ****     if( DACx == DAC)
 696              		.loc 1 428 5 view .LVU181
 697              		.loc 1 428 7 is_stmt 0 view .LVU182
 698 0000 074B     		ldr	r3, .L41
 699 0002 9842     		cmp	r0, r3
 700 0004 00D0     		beq	.L40
 701              	.LVL38:
 702              	.L37:
 429:Library/src/lcm32f06x_dac.c ****     {
 430:Library/src/lcm32f06x_dac.c ****         if (NewState != DISABLE)
 431:Library/src/lcm32f06x_dac.c ****         {
 432:Library/src/lcm32f06x_dac.c ****             ANACTRL->ANA_CTRL |= ANACTRL_ANA_CTRL_DAC_BUFEN_Msk;
 433:Library/src/lcm32f06x_dac.c ****         }
 434:Library/src/lcm32f06x_dac.c ****         else
 435:Library/src/lcm32f06x_dac.c ****         {
 436:Library/src/lcm32f06x_dac.c ****             ANACTRL->ANA_CTRL &= (~ANACTRL_ANA_CTRL_DAC_BUFEN_Msk);
 437:Library/src/lcm32f06x_dac.c ****         }
 438:Library/src/lcm32f06x_dac.c ****     }
 439:Library/src/lcm32f06x_dac.c **** }
 703              		.loc 1 439 1 view .LVU183
 704              		@ sp needed
 705 0006 7047     		bx	lr
 706              	.LVL39:
 707              	.L40:
ARM GAS  /tmp/ccMDRKnu.s 			page 43


 430:Library/src/lcm32f06x_dac.c ****         {
 708              		.loc 1 430 9 is_stmt 1 view .LVU184
 432:Library/src/lcm32f06x_dac.c ****         }
 709              		.loc 1 432 20 is_stmt 0 view .LVU185
 710 0008 F822     		movs	r2, #248
 711 000a 8358     		ldr	r3, [r0, r2]
 430:Library/src/lcm32f06x_dac.c ****         {
 712              		.loc 1 430 12 view .LVU186
 713 000c 0029     		cmp	r1, #0
 714 000e 03D0     		beq	.L39
 432:Library/src/lcm32f06x_dac.c ****         }
 715              		.loc 1 432 13 is_stmt 1 view .LVU187
 432:Library/src/lcm32f06x_dac.c ****         }
 716              		.loc 1 432 31 is_stmt 0 view .LVU188
 717 0010 1021     		movs	r1, #16
 718              	.LVL40:
 432:Library/src/lcm32f06x_dac.c ****         }
 719              		.loc 1 432 31 view .LVU189
 720 0012 0B43     		orrs	r3, r1
 721 0014 8350     		str	r3, [r0, r2]
 722 0016 F6E7     		b	.L37
 723              	.LVL41:
 724              	.L39:
 436:Library/src/lcm32f06x_dac.c ****         }
 725              		.loc 1 436 13 is_stmt 1 view .LVU190
 436:Library/src/lcm32f06x_dac.c ****         }
 726              		.loc 1 436 31 is_stmt 0 view .LVU191
 727 0018 1021     		movs	r1, #16
 728              	.LVL42:
 436:Library/src/lcm32f06x_dac.c ****         }
 729              		.loc 1 436 31 view .LVU192
 730 001a 8B43     		bics	r3, r1
 731 001c 8350     		str	r3, [r0, r2]
 732              		.loc 1 439 1 view .LVU193
 733 001e F2E7     		b	.L37
 734              	.L42:
 735              		.align	2
 736              	.L41:
 737 0020 007C0140 		.word	1073839104
 738              		.cfi_endproc
 739              	.LFE58:
 741              		.text
 742              	.Letext0:
 743              		.file 3 "Library/inc/lcm32f06x.h"
 744              		.file 4 "/home/ha/toolchain/arm-gnu-toolchain-14.3/arm-none-eabi/include/machine/_default_types.h"
 745              		.file 5 "/home/ha/toolchain/arm-gnu-toolchain-14.3/arm-none-eabi/include/sys/_stdint.h"
 746              		.file 6 "Library/inc/lcm32f06x_dac.h"
 747              		.file 7 "Library/inc/lcm32f06x_rcc.h"
ARM GAS  /tmp/ccMDRKnu.s 			page 44


DEFINED SYMBOLS
                            *ABS*:00000000 lcm32f06x_dac.c
     /tmp/ccMDRKnu.s:17     .text.DAC_DeInit:00000000 $t
     /tmp/ccMDRKnu.s:24     .text.DAC_DeInit:00000000 DAC_DeInit
     /tmp/ccMDRKnu.s:56     .text.DAC_Init:00000000 $t
     /tmp/ccMDRKnu.s:63     .text.DAC_Init:00000000 DAC_Init
     /tmp/ccMDRKnu.s:114    .text.DAC_Init:00000028 $d
     /tmp/ccMDRKnu.s:119    .text.DAC_StructInit:00000000 $t
     /tmp/ccMDRKnu.s:126    .text.DAC_StructInit:00000000 DAC_StructInit
     /tmp/ccMDRKnu.s:160    .text.DAC_Cmd:00000000 $t
     /tmp/ccMDRKnu.s:167    .text.DAC_Cmd:00000000 DAC_Cmd
     /tmp/ccMDRKnu.s:202    .text.DAC_SoftwareTriggerCmd:00000000 $t
     /tmp/ccMDRKnu.s:209    .text.DAC_SoftwareTriggerCmd:00000000 DAC_SoftwareTriggerCmd
     /tmp/ccMDRKnu.s:244    .text.DAC_WaveGenerationCmd:00000000 $t
     /tmp/ccMDRKnu.s:251    .text.DAC_WaveGenerationCmd:00000000 DAC_WaveGenerationCmd
     /tmp/ccMDRKnu.s:293    .text.DAC_SetDac_10B_Data:00000000 $t
     /tmp/ccMDRKnu.s:300    .text.DAC_SetDac_10B_Data:00000000 DAC_SetDac_10B_Data
     /tmp/ccMDRKnu.s:357    .text.DAC_SetDac_10B_Data:00000020 $d
     /tmp/ccMDRKnu.s:362    .text.DAC_GetDataOutputValue_10bit:00000000 $t
     /tmp/ccMDRKnu.s:369    .text.DAC_GetDataOutputValue_10bit:00000000 DAC_GetDataOutputValue_10bit
     /tmp/ccMDRKnu.s:415    .text.DAC_ITConfig:00000000 $t
     /tmp/ccMDRKnu.s:422    .text.DAC_ITConfig:00000000 DAC_ITConfig
     /tmp/ccMDRKnu.s:456    .text.DAC_GetFlagStatus:00000000 $t
     /tmp/ccMDRKnu.s:463    .text.DAC_GetFlagStatus:00000000 DAC_GetFlagStatus
     /tmp/ccMDRKnu.s:500    .text.DAC_ClearFlag:00000000 $t
     /tmp/ccMDRKnu.s:507    .text.DAC_ClearFlag:00000000 DAC_ClearFlag
     /tmp/ccMDRKnu.s:521    .text.DAC_ClearITPendingBit:00000000 $t
     /tmp/ccMDRKnu.s:528    .text.DAC_ClearITPendingBit:00000000 DAC_ClearITPendingBit
     /tmp/ccMDRKnu.s:547    .text.DAC_TriggerSourceConfig:00000000 $t
     /tmp/ccMDRKnu.s:554    .text.DAC_TriggerSourceConfig:00000000 DAC_TriggerSourceConfig
     /tmp/ccMDRKnu.s:673    .text.DAC_TriggerSourceConfig:00000030 $d
     /tmp/ccMDRKnu.s:681    .text.DAC_OutputBuff:00000000 $t
     /tmp/ccMDRKnu.s:688    .text.DAC_OutputBuff:00000000 DAC_OutputBuff
     /tmp/ccMDRKnu.s:737    .text.DAC_OutputBuff:00000020 $d

UNDEFINED SYMBOLS
RCC_APB0PeriphResetCmd
