ARM GAS  /tmp/ccWBHqpW.s 			page 1


   1              		.cpu cortex-m0
   2              		.arch armv6s-m
   3              		.fpu softvfp
   4              		.eabi_attribute 23, 1
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 2
   9              		.eabi_attribute 34, 0
  10              		.eabi_attribute 18, 4
  11              		.file	"lcm32f06x_tim.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.file 1 "Library/src/lcm32f06x_tim.c"
  16              		.section	.text.TIM_DTS_Cfg,"ax",%progbits
  17              		.align	1
  18              		.p2align 2,,3
  19              		.global	TIM_DTS_Cfg
  20              		.syntax unified
  21              		.code	16
  22              		.thumb_func
  24              	TIM_DTS_Cfg:
  25              	.LVL0:
  26              	.LFB45:
   1:Library/src/lcm32f06x_tim.c **** /**
   2:Library/src/lcm32f06x_tim.c ****   ******************************************************************************
   3:Library/src/lcm32f06x_tim.c ****   * @file    lcm32f06x_tim.c
   4:Library/src/lcm32f06x_tim.c ****   * @author  System R&D Team
   5:Library/src/lcm32f06x_tim.c ****   * @version V2.0.2
   6:Library/src/lcm32f06x_tim.c ****   * @date    10-April-2025
   7:Library/src/lcm32f06x_tim.c ****   * @brief   This file provides all the tim firmware functions.
   8:Library/src/lcm32f06x_tim.c ****   ******************************************************************************
   9:Library/src/lcm32f06x_tim.c ****   * @attention
  10:Library/src/lcm32f06x_tim.c ****   *
  11:Library/src/lcm32f06x_tim.c ****   * Copyright (c) Hangzhou Lingxin Microelectronics Co.
  12:Library/src/lcm32f06x_tim.c ****   * All rights reserved.
  13:Library/src/lcm32f06x_tim.c ****   *
  14:Library/src/lcm32f06x_tim.c ****   * This software is licensed under terms that can be found in the LICENSE file
  15:Library/src/lcm32f06x_tim.c ****   * in the root directory of this software component.
  16:Library/src/lcm32f06x_tim.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  17:Library/src/lcm32f06x_tim.c ****   *
  18:Library/src/lcm32f06x_tim.c ****   ******************************************************************************
  19:Library/src/lcm32f06x_tim.c ****   */
  20:Library/src/lcm32f06x_tim.c **** /* Includes ------------------------------------------------------------------*/
  21:Library/src/lcm32f06x_tim.c **** #include "lcm32f06x_tim.h"
  22:Library/src/lcm32f06x_tim.c **** 
  23:Library/src/lcm32f06x_tim.c **** /***************** TIM Function Definition **************/
  24:Library/src/lcm32f06x_tim.c **** 
  25:Library/src/lcm32f06x_tim.c **** static void TI1_Config(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
  26:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter);
  27:Library/src/lcm32f06x_tim.c **** static void TI2_Config(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
  28:Library/src/lcm32f06x_tim.c ****                 uint32_t TIM_ICFilter);
  29:Library/src/lcm32f06x_tim.c **** static void TI3_Config(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
  30:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter);
  31:Library/src/lcm32f06x_tim.c **** static void TI4_Config(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
  32:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter);
ARM GAS  /tmp/ccWBHqpW.s 			page 2


  33:Library/src/lcm32f06x_tim.c **** static void TI5_Config(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
  34:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter);
  35:Library/src/lcm32f06x_tim.c **** 
  36:Library/src/lcm32f06x_tim.c **** /**
  37:Library/src/lcm32f06x_tim.c ****   * @name   TIM_DTS_Cfg
  38:Library/src/lcm32f06x_tim.c ****   * @brief  EN: DTS clock enable for digital filters.
  39:Library/src/lcm32f06x_tim.c ****   *         CN: 数字滤波器的 DTS 时钟使能。
  40:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
  41:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
  42:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
  43:Library/src/lcm32f06x_tim.c ****   * @retval None
  44:Library/src/lcm32f06x_tim.c ****   */
  45:Library/src/lcm32f06x_tim.c **** void TIM_DTS_Cfg(TIM_TypeDef *TIMx)
  46:Library/src/lcm32f06x_tim.c **** {
  27              		.loc 1 46 1 view -0
  28              		.cfi_startproc
  29              		@ args = 0, pretend = 0, frame = 0
  30              		@ frame_needed = 0, uses_anonymous_args = 0
  31              		@ link register save eliminated.
  47:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_FTE_Msk; // 1<<16
  32              		.loc 1 47 3 view .LVU1
  33              		.loc 1 47 13 is_stmt 0 view .LVU2
  34 0000 8023     		movs	r3, #128
  48:Library/src/lcm32f06x_tim.c **** }
  35              		.loc 1 48 1 view .LVU3
  36              		@ sp needed
  47:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_FTE_Msk; // 1<<16
  37              		.loc 1 47 7 view .LVU4
  38 0002 0268     		ldr	r2, [r0]
  47:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_FTE_Msk; // 1<<16
  39              		.loc 1 47 13 view .LVU5
  40 0004 5B02     		lsls	r3, r3, #9
  41 0006 1343     		orrs	r3, r2
  42 0008 0360     		str	r3, [r0]
  43              		.loc 1 48 1 view .LVU6
  44 000a 7047     		bx	lr
  45              		.cfi_endproc
  46              	.LFE45:
  48              		.section	.text.TIM_ETRE_Enable,"ax",%progbits
  49              		.align	1
  50              		.p2align 2,,3
  51              		.global	TIM_ETRE_Enable
  52              		.syntax unified
  53              		.code	16
  54              		.thumb_func
  56              	TIM_ETRE_Enable:
  57              	.LVL1:
  58              	.LFB46:
  49:Library/src/lcm32f06x_tim.c **** 
  50:Library/src/lcm32f06x_tim.c **** /**
  51:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ETRE_Enable
  52:Library/src/lcm32f06x_tim.c ****   * @brief  EN: ETR input detection/filtering enable.
  53:Library/src/lcm32f06x_tim.c ****   *         CN: ETR 输入检测/滤波使能。
  54:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
  55:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
  56:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
  57:Library/src/lcm32f06x_tim.c ****   * @retval None
ARM GAS  /tmp/ccWBHqpW.s 			page 3


  58:Library/src/lcm32f06x_tim.c ****   */
  59:Library/src/lcm32f06x_tim.c **** void TIM_ETRE_Enable(TIM_TypeDef *TIMx)
  60:Library/src/lcm32f06x_tim.c **** {
  59              		.loc 1 60 1 is_stmt 1 view -0
  60              		.cfi_startproc
  61              		@ args = 0, pretend = 0, frame = 0
  62              		@ frame_needed = 0, uses_anonymous_args = 0
  63              		@ link register save eliminated.
  61:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_ETRE_Msk; // 1<<17
  64              		.loc 1 61 3 view .LVU8
  65              		.loc 1 61 13 is_stmt 0 view .LVU9
  66 0000 8023     		movs	r3, #128
  62:Library/src/lcm32f06x_tim.c **** }
  67              		.loc 1 62 1 view .LVU10
  68              		@ sp needed
  61:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_ETRE_Msk; // 1<<17
  69              		.loc 1 61 7 view .LVU11
  70 0002 0268     		ldr	r2, [r0]
  61:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_ETRE_Msk; // 1<<17
  71              		.loc 1 61 13 view .LVU12
  72 0004 9B02     		lsls	r3, r3, #10
  73 0006 1343     		orrs	r3, r2
  74 0008 0360     		str	r3, [r0]
  75              		.loc 1 62 1 view .LVU13
  76 000a 7047     		bx	lr
  77              		.cfi_endproc
  78              	.LFE46:
  80              		.section	.text.TIM_TI1E_Set,"ax",%progbits
  81              		.align	1
  82              		.p2align 2,,3
  83              		.global	TIM_TI1E_Set
  84              		.syntax unified
  85              		.code	16
  86              		.thumb_func
  88              	TIM_TI1E_Set:
  89              	.LVL2:
  90              	.LFB47:
  63:Library/src/lcm32f06x_tim.c **** 
  64:Library/src/lcm32f06x_tim.c **** /**
  65:Library/src/lcm32f06x_tim.c ****   * @name   TIM_TI1E_Set
  66:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TI1 input detection/filtering enable.
  67:Library/src/lcm32f06x_tim.c ****   *         CN: TI1 输入检测/滤波使能。
  68:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
  69:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
  70:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
  71:Library/src/lcm32f06x_tim.c ****   * @retval None
  72:Library/src/lcm32f06x_tim.c ****   */
  73:Library/src/lcm32f06x_tim.c **** void TIM_TI1E_Set(TIM_TypeDef *TIMx)
  74:Library/src/lcm32f06x_tim.c **** {
  91              		.loc 1 74 1 is_stmt 1 view -0
  92              		.cfi_startproc
  93              		@ args = 0, pretend = 0, frame = 0
  94              		@ frame_needed = 0, uses_anonymous_args = 0
  95              		@ link register save eliminated.
  75:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI1E_Msk; // 1<<18
  96              		.loc 1 75 3 view .LVU15
  97              		.loc 1 75 13 is_stmt 0 view .LVU16
ARM GAS  /tmp/ccWBHqpW.s 			page 4


  98 0000 8023     		movs	r3, #128
  76:Library/src/lcm32f06x_tim.c **** }
  99              		.loc 1 76 1 view .LVU17
 100              		@ sp needed
  75:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI1E_Msk; // 1<<18
 101              		.loc 1 75 7 view .LVU18
 102 0002 0268     		ldr	r2, [r0]
  75:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI1E_Msk; // 1<<18
 103              		.loc 1 75 13 view .LVU19
 104 0004 DB02     		lsls	r3, r3, #11
 105 0006 1343     		orrs	r3, r2
 106 0008 0360     		str	r3, [r0]
 107              		.loc 1 76 1 view .LVU20
 108 000a 7047     		bx	lr
 109              		.cfi_endproc
 110              	.LFE47:
 112              		.section	.text.TIM_TI2E_Set,"ax",%progbits
 113              		.align	1
 114              		.p2align 2,,3
 115              		.global	TIM_TI2E_Set
 116              		.syntax unified
 117              		.code	16
 118              		.thumb_func
 120              	TIM_TI2E_Set:
 121              	.LVL3:
 122              	.LFB48:
  77:Library/src/lcm32f06x_tim.c **** 
  78:Library/src/lcm32f06x_tim.c **** /**
  79:Library/src/lcm32f06x_tim.c ****   * @name   TIM_TI2E_Set
  80:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TI2 input detection/filtering enable.
  81:Library/src/lcm32f06x_tim.c ****   *         CN: TI2 输入检测/滤波使能。
  82:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
  83:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 or 16 to select the TIM peripheral.
  84:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
  85:Library/src/lcm32f06x_tim.c ****   * @retval None
  86:Library/src/lcm32f06x_tim.c ****   */
  87:Library/src/lcm32f06x_tim.c **** void TIM_TI2E_Set(TIM_TypeDef *TIMx)
  88:Library/src/lcm32f06x_tim.c **** {
 123              		.loc 1 88 1 is_stmt 1 view -0
 124              		.cfi_startproc
 125              		@ args = 0, pretend = 0, frame = 0
 126              		@ frame_needed = 0, uses_anonymous_args = 0
 127              		@ link register save eliminated.
  89:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI2E_Msk; // 1<<19
 128              		.loc 1 89 3 view .LVU22
 129              		.loc 1 89 13 is_stmt 0 view .LVU23
 130 0000 8023     		movs	r3, #128
  90:Library/src/lcm32f06x_tim.c **** }
 131              		.loc 1 90 1 view .LVU24
 132              		@ sp needed
  89:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI2E_Msk; // 1<<19
 133              		.loc 1 89 7 view .LVU25
 134 0002 0268     		ldr	r2, [r0]
  89:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI2E_Msk; // 1<<19
 135              		.loc 1 89 13 view .LVU26
 136 0004 1B03     		lsls	r3, r3, #12
 137 0006 1343     		orrs	r3, r2
ARM GAS  /tmp/ccWBHqpW.s 			page 5


 138 0008 0360     		str	r3, [r0]
 139              		.loc 1 90 1 view .LVU27
 140 000a 7047     		bx	lr
 141              		.cfi_endproc
 142              	.LFE48:
 144              		.section	.text.TIM_TI3E_Set,"ax",%progbits
 145              		.align	1
 146              		.p2align 2,,3
 147              		.global	TIM_TI3E_Set
 148              		.syntax unified
 149              		.code	16
 150              		.thumb_func
 152              	TIM_TI3E_Set:
 153              	.LVL4:
 154              	.LFB49:
  91:Library/src/lcm32f06x_tim.c **** 
  92:Library/src/lcm32f06x_tim.c **** /**
  93:Library/src/lcm32f06x_tim.c ****   * @name   TIM_TI3E_Set
  94:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TI3 input detection/filtering enable.
  95:Library/src/lcm32f06x_tim.c ****   *         CN: TI3 输入检测/滤波使能。
  96:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
  97:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
  98:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
  99:Library/src/lcm32f06x_tim.c ****   * @retval None
 100:Library/src/lcm32f06x_tim.c ****   */
 101:Library/src/lcm32f06x_tim.c **** void TIM_TI3E_Set(TIM_TypeDef *TIMx)
 102:Library/src/lcm32f06x_tim.c **** {
 155              		.loc 1 102 1 is_stmt 1 view -0
 156              		.cfi_startproc
 157              		@ args = 0, pretend = 0, frame = 0
 158              		@ frame_needed = 0, uses_anonymous_args = 0
 159              		@ link register save eliminated.
 103:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI3E_Msk; // 1<<20
 160              		.loc 1 103 3 view .LVU29
 161              		.loc 1 103 13 is_stmt 0 view .LVU30
 162 0000 8023     		movs	r3, #128
 104:Library/src/lcm32f06x_tim.c **** }
 163              		.loc 1 104 1 view .LVU31
 164              		@ sp needed
 103:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI3E_Msk; // 1<<20
 165              		.loc 1 103 7 view .LVU32
 166 0002 0268     		ldr	r2, [r0]
 103:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI3E_Msk; // 1<<20
 167              		.loc 1 103 13 view .LVU33
 168 0004 5B03     		lsls	r3, r3, #13
 169 0006 1343     		orrs	r3, r2
 170 0008 0360     		str	r3, [r0]
 171              		.loc 1 104 1 view .LVU34
 172 000a 7047     		bx	lr
 173              		.cfi_endproc
 174              	.LFE49:
 176              		.section	.text.TIM_TI4E_Set,"ax",%progbits
 177              		.align	1
 178              		.p2align 2,,3
 179              		.global	TIM_TI4E_Set
 180              		.syntax unified
 181              		.code	16
ARM GAS  /tmp/ccWBHqpW.s 			page 6


 182              		.thumb_func
 184              	TIM_TI4E_Set:
 185              	.LVL5:
 186              	.LFB50:
 105:Library/src/lcm32f06x_tim.c **** 
 106:Library/src/lcm32f06x_tim.c **** /**
 107:Library/src/lcm32f06x_tim.c ****   * @name   TIM_TI4E_Set
 108:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TI4 input detection/filtering enable.
 109:Library/src/lcm32f06x_tim.c ****   *         CN: TI4 输入检测/滤波使能。
 110:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
 111:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
 112:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
 113:Library/src/lcm32f06x_tim.c ****   * @retval None
 114:Library/src/lcm32f06x_tim.c ****   */
 115:Library/src/lcm32f06x_tim.c **** void TIM_TI4E_Set(TIM_TypeDef *TIMx)
 116:Library/src/lcm32f06x_tim.c **** {
 187              		.loc 1 116 1 is_stmt 1 view -0
 188              		.cfi_startproc
 189              		@ args = 0, pretend = 0, frame = 0
 190              		@ frame_needed = 0, uses_anonymous_args = 0
 191              		@ link register save eliminated.
 117:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI4E_Msk; // 1<<21
 192              		.loc 1 117 3 view .LVU36
 193              		.loc 1 117 13 is_stmt 0 view .LVU37
 194 0000 8023     		movs	r3, #128
 118:Library/src/lcm32f06x_tim.c **** }
 195              		.loc 1 118 1 view .LVU38
 196              		@ sp needed
 117:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI4E_Msk; // 1<<21
 197              		.loc 1 117 7 view .LVU39
 198 0002 0268     		ldr	r2, [r0]
 117:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_CR1_TI4E_Msk; // 1<<21
 199              		.loc 1 117 13 view .LVU40
 200 0004 9B03     		lsls	r3, r3, #14
 201 0006 1343     		orrs	r3, r2
 202 0008 0360     		str	r3, [r0]
 203              		.loc 1 118 1 view .LVU41
 204 000a 7047     		bx	lr
 205              		.cfi_endproc
 206              	.LFE50:
 208              		.section	.text.TIM_TimeBaseInit,"ax",%progbits
 209              		.align	1
 210              		.p2align 2,,3
 211              		.global	TIM_TimeBaseInit
 212              		.syntax unified
 213              		.code	16
 214              		.thumb_func
 216              	TIM_TimeBaseInit:
 217              	.LVL6:
 218              	.LFB51:
 119:Library/src/lcm32f06x_tim.c **** 
 120:Library/src/lcm32f06x_tim.c **** /**
 121:Library/src/lcm32f06x_tim.c ****   * @name   TIM_TimeBaseInit
 122:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Initializes the TIM Basic configuration according to the specified
 123:Library/src/lcm32f06x_tim.c ****   *             parameters in the TIM_TimeBaseInitTypeDef.
 124:Library/src/lcm32f06x_tim.c ****   *         CN: 根据TIM_TimeBaseInitTypeDef中指定的参数初始化TIM基本配置。
 125:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
ARM GAS  /tmp/ccWBHqpW.s 			page 7


 126:Library/src/lcm32f06x_tim.c ****   *               CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 127:Library/src/lcm32f06x_tim.c ****   * @param  TIM_TimeBaseInitStruct: 
 128:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_TimeBaseInitTypeDef structure that contains the
 129:Library/src/lcm32f06x_tim.c ****   *             configuration information for the specified TIM peripheral.
 130:Library/src/lcm32f06x_tim.c ****   *         CN:指向TIM_TimeBaseInitTypeDef结构的指针，该结构包含指定TIM外围设备的配置信息。
 131:Library/src/lcm32f06x_tim.c ****   * @retval None
 132:Library/src/lcm32f06x_tim.c ****   */
 133:Library/src/lcm32f06x_tim.c **** void TIM_TimeBaseInit(TIM_TypeDef *TIMx, TIM_TimeBaseInitTypeDef *TIM_TimeBaseInitStruct)
 134:Library/src/lcm32f06x_tim.c **** {
 219              		.loc 1 134 1 is_stmt 1 view -0
 220              		.cfi_startproc
 221              		@ args = 0, pretend = 0, frame = 0
 222              		@ frame_needed = 0, uses_anonymous_args = 0
 223              		@ link register save eliminated.
 135:Library/src/lcm32f06x_tim.c ****   uint32_t tmpcr1 = 0;
 224              		.loc 1 135 3 view .LVU43
 136:Library/src/lcm32f06x_tim.c **** 
 137:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 138:Library/src/lcm32f06x_tim.c **** 
 139:Library/src/lcm32f06x_tim.c ****   tmpcr1 = TIMx->CR1;
 225              		.loc 1 139 3 view .LVU44
 140:Library/src/lcm32f06x_tim.c **** 
 141:Library/src/lcm32f06x_tim.c ****   /* Select the Counter Mode */
 142:Library/src/lcm32f06x_tim.c ****   tmpcr1 &= (uint32_t)(~((uint32_t)(TIM_CR1_DIR_Msk | TIM_CR1_CMS_Msk)));
 226              		.loc 1 142 10 is_stmt 0 view .LVU45
 227 0000 7022     		movs	r2, #112
 139:Library/src/lcm32f06x_tim.c **** 
 228              		.loc 1 139 10 view .LVU46
 229 0002 0368     		ldr	r3, [r0]
 230              	.LVL7:
 231              		.loc 1 142 3 is_stmt 1 view .LVU47
 232              		.loc 1 142 10 is_stmt 0 view .LVU48
 233 0004 9343     		bics	r3, r2
 234              	.LVL8:
 143:Library/src/lcm32f06x_tim.c ****   tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode;
 235              		.loc 1 143 3 is_stmt 1 view .LVU49
 236              		.loc 1 143 10 is_stmt 0 view .LVU50
 237 0006 4A68     		ldr	r2, [r1, #4]
 238 0008 1343     		orrs	r3, r2
 239              	.LVL9:
 144:Library/src/lcm32f06x_tim.c **** 
 145:Library/src/lcm32f06x_tim.c ****   /* Set the clock division */
 146:Library/src/lcm32f06x_tim.c ****   tmpcr1 &= (uint32_t)(~((uint32_t)TIM_CR1_CKD_Msk));
 240              		.loc 1 146 3 is_stmt 1 view .LVU51
 241              		.loc 1 146 10 is_stmt 0 view .LVU52
 242 000a 214A     		ldr	r2, .L25
 243 000c 1340     		ands	r3, r2
 244              	.LVL10:
 147:Library/src/lcm32f06x_tim.c ****   tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision;
 245              		.loc 1 147 3 is_stmt 1 view .LVU53
 246              		.loc 1 147 10 is_stmt 0 view .LVU54
 247 000e CA68     		ldr	r2, [r1, #12]
 248 0010 1343     		orrs	r3, r2
 249              	.LVL11:
 148:Library/src/lcm32f06x_tim.c **** 
 149:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 = tmpcr1;
 250              		.loc 1 149 3 is_stmt 1 view .LVU55
ARM GAS  /tmp/ccWBHqpW.s 			page 8


 251              		.loc 1 149 13 is_stmt 0 view .LVU56
 252 0012 0360     		str	r3, [r0]
 150:Library/src/lcm32f06x_tim.c **** 
 151:Library/src/lcm32f06x_tim.c ****   /* Set the Autoreload value */
 152:Library/src/lcm32f06x_tim.c ****   TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period;
 253              		.loc 1 152 3 is_stmt 1 view .LVU57
 254              		.loc 1 152 37 is_stmt 0 view .LVU58
 255 0014 8B68     		ldr	r3, [r1, #8]
 256              	.LVL12:
 257              		.loc 1 152 13 view .LVU59
 258 0016 C362     		str	r3, [r0, #44]
 259              	.LVL13:
 153:Library/src/lcm32f06x_tim.c **** 
 154:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler value */
 155:Library/src/lcm32f06x_tim.c ****   TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler;
 260              		.loc 1 155 3 is_stmt 1 view .LVU60
 261              		.loc 1 155 37 is_stmt 0 view .LVU61
 262 0018 0B68     		ldr	r3, [r1]
 263              		.loc 1 155 13 view .LVU62
 264 001a 8362     		str	r3, [r0, #40]
 156:Library/src/lcm32f06x_tim.c **** 
 157:Library/src/lcm32f06x_tim.c ****   if ((TIMx == TIM1) || (TIMx == TIM15))
 265              		.loc 1 157 3 is_stmt 1 view .LVU63
 266              		.loc 1 157 6 is_stmt 0 view .LVU64
 267 001c 1D4B     		ldr	r3, .L25+4
 268 001e 9842     		cmp	r0, r3
 269 0020 09D0     		beq	.L9
 270              		.loc 1 157 22 discriminator 1 view .LVU65
 271 0022 1D4B     		ldr	r3, .L25+8
 272 0024 9842     		cmp	r0, r3
 273 0026 06D0     		beq	.L9
 158:Library/src/lcm32f06x_tim.c ****   {
 159:Library/src/lcm32f06x_tim.c ****     /* Set the Repetition Counter value */
 160:Library/src/lcm32f06x_tim.c ****     TIMx->RCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter; // RCR
 161:Library/src/lcm32f06x_tim.c ****   }
 162:Library/src/lcm32f06x_tim.c **** 
 163:Library/src/lcm32f06x_tim.c ****   /* Generate an update event to reload the Prescaler and the Repetition counter
 164:Library/src/lcm32f06x_tim.c ****      values immediately */
 165:Library/src/lcm32f06x_tim.c ****   if (TIMx->CR1 & TIM_CR1_URS_Msk)
 274              		.loc 1 165 3 is_stmt 1 view .LVU66
 275              		.loc 1 165 17 is_stmt 0 view .LVU67
 276 0028 0423     		movs	r3, #4
 277              		.loc 1 165 11 view .LVU68
 278 002a 0268     		ldr	r2, [r0]
 279              		.loc 1 165 6 view .LVU69
 280 002c 1342     		tst	r3, r2
 281 002e 08D0     		beq	.L11
 282              	.L24:
 166:Library/src/lcm32f06x_tim.c ****   {
 167:Library/src/lcm32f06x_tim.c ****     TIMx->EGR = TIM_PSCReloadMode_Immediate;
 283              		.loc 1 167 5 is_stmt 1 view .LVU70
 284              		.loc 1 167 15 is_stmt 0 view .LVU71
 285 0030 033B     		subs	r3, r3, #3
 286 0032 4361     		str	r3, [r0, #20]
 287              	.L8:
 168:Library/src/lcm32f06x_tim.c ****   }
 169:Library/src/lcm32f06x_tim.c ****   else
ARM GAS  /tmp/ccWBHqpW.s 			page 9


 170:Library/src/lcm32f06x_tim.c ****   {
 171:Library/src/lcm32f06x_tim.c ****     TIM_UpdateRequestConfig(TIMx,TIM_UpdateSource_Regular);
 172:Library/src/lcm32f06x_tim.c ****     TIMx->EGR = TIM_PSCReloadMode_Immediate;
 173:Library/src/lcm32f06x_tim.c ****     if ((TIMx->CR1 & TIM_CR1_DIR_Msk) != TIM_CR1_DIR_Msk)
 174:Library/src/lcm32f06x_tim.c ****     {
 175:Library/src/lcm32f06x_tim.c ****       while(TIMx->CNT != 0)
 176:Library/src/lcm32f06x_tim.c ****       {
 177:Library/src/lcm32f06x_tim.c ****         __NOP();__NOP();__NOP();__NOP();__NOP();
 178:Library/src/lcm32f06x_tim.c ****       }
 179:Library/src/lcm32f06x_tim.c ****     }
 180:Library/src/lcm32f06x_tim.c ****     else
 181:Library/src/lcm32f06x_tim.c ****     {
 182:Library/src/lcm32f06x_tim.c ****       while(TIMx->CNT != TIMx->ARR)
 183:Library/src/lcm32f06x_tim.c ****       {
 184:Library/src/lcm32f06x_tim.c ****         __NOP();__NOP();__NOP();__NOP();__NOP();
 185:Library/src/lcm32f06x_tim.c ****       }
 186:Library/src/lcm32f06x_tim.c ****     }
 187:Library/src/lcm32f06x_tim.c ****     TIM_UpdateRequestConfig(TIMx,TIM_UpdateSource_Global);
 188:Library/src/lcm32f06x_tim.c ****   }
 189:Library/src/lcm32f06x_tim.c **** }
 288              		.loc 1 189 1 view .LVU72
 289              		@ sp needed
 290 0034 7047     		bx	lr
 291              	.L9:
 160:Library/src/lcm32f06x_tim.c ****   }
 292              		.loc 1 160 5 is_stmt 1 view .LVU73
 160:Library/src/lcm32f06x_tim.c ****   }
 293              		.loc 1 160 39 is_stmt 0 view .LVU74
 294 0036 0B7C     		ldrb	r3, [r1, #16]
 160:Library/src/lcm32f06x_tim.c ****   }
 295              		.loc 1 160 15 view .LVU75
 296 0038 0363     		str	r3, [r0, #48]
 165:Library/src/lcm32f06x_tim.c ****   {
 297              		.loc 1 165 3 is_stmt 1 view .LVU76
 165:Library/src/lcm32f06x_tim.c ****   {
 298              		.loc 1 165 17 is_stmt 0 view .LVU77
 299 003a 0423     		movs	r3, #4
 165:Library/src/lcm32f06x_tim.c ****   {
 300              		.loc 1 165 11 view .LVU78
 301 003c 0268     		ldr	r2, [r0]
 165:Library/src/lcm32f06x_tim.c ****   {
 302              		.loc 1 165 6 view .LVU79
 303 003e 1342     		tst	r3, r2
 304 0040 F6D1     		bne	.L24
 305              	.L11:
 171:Library/src/lcm32f06x_tim.c ****     TIMx->EGR = TIM_PSCReloadMode_Immediate;
 306              		.loc 1 171 5 is_stmt 1 view .LVU80
 307              	.LVL14:
 308              	.LBB376:
 309              	.LBI376:
 190:Library/src/lcm32f06x_tim.c **** 
 191:Library/src/lcm32f06x_tim.c **** /**
 192:Library/src/lcm32f06x_tim.c ****   * @name   TIM_TimeBaseStructInit
 193:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Fills each TIM_TimeBaseInitStruct member with its default value.
 194:Library/src/lcm32f06x_tim.c ****   *         CN: 用默认值填充每个 TIM_TimeBaseInitStruct 成员
 195:Library/src/lcm32f06x_tim.c ****   * @param  TIM_TimeBaseInitStruct:
 196:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_TimeBaseInitTypeDef structure that contains the 
ARM GAS  /tmp/ccWBHqpW.s 			page 10


 197:Library/src/lcm32f06x_tim.c ****   *             configuration information for the specified TIM Base peripheral.
 198:Library/src/lcm32f06x_tim.c ****   *         CN: 指向 TIM_TimeBaseInitTypeDef 结构的指针，该结构包含指定 TIM 基本的配置信息
 199:Library/src/lcm32f06x_tim.c ****   * @retval None
 200:Library/src/lcm32f06x_tim.c ****   */
 201:Library/src/lcm32f06x_tim.c **** void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef *TIM_TimeBaseInitStruct)
 202:Library/src/lcm32f06x_tim.c **** {
 203:Library/src/lcm32f06x_tim.c ****   /* Set the default configuration */
 204:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_Period = 0xFFFFFFFF;
 205:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000;
 206:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1;
 207:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up;
 208:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000;
 209:Library/src/lcm32f06x_tim.c **** }
 210:Library/src/lcm32f06x_tim.c **** 
 211:Library/src/lcm32f06x_tim.c **** /**
 212:Library/src/lcm32f06x_tim.c ****   * @name   TIM_PrescalerConfig
 213:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Prescaler configuration.
 214:Library/src/lcm32f06x_tim.c ****   *         CN: 预分频器配置。
 215:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 216:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 217:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 218:Library/src/lcm32f06x_tim.c ****   * @param  Prescaler: 
 219:Library/src/lcm32f06x_tim.c ****   *         EN: The value of the prescaler.
 220:Library/src/lcm32f06x_tim.c ****   *         CN: 预分频器的值。
 221:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
 222:Library/src/lcm32f06x_tim.c ****   * @param  TIM_PSCReloadMode: 
 223:Library/src/lcm32f06x_tim.c ****   *         EN: Specify how to generate update events
 224:Library/src/lcm32f06x_tim.c ****   *         CN: 指定产生更新事件方式。
 225:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_PSCReloadMode_Update
 226:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_PSCReloadMode_Immediate
 227:Library/src/lcm32f06x_tim.c ****   * @retval None
 228:Library/src/lcm32f06x_tim.c ****   */
 229:Library/src/lcm32f06x_tim.c **** void TIM_PrescalerConfig(TIM_TypeDef *TIMx, uint32_t Prescaler, uint32_t TIM_PSCReloadMode)
 230:Library/src/lcm32f06x_tim.c **** {
 231:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 232:Library/src/lcm32f06x_tim.c **** 
 233:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler value */
 234:Library/src/lcm32f06x_tim.c ****   TIMx->PSC = Prescaler;
 235:Library/src/lcm32f06x_tim.c ****   /* Set or reset the UG Bit */
 236:Library/src/lcm32f06x_tim.c ****   TIMx->EGR = TIM_PSCReloadMode;
 237:Library/src/lcm32f06x_tim.c **** }
 238:Library/src/lcm32f06x_tim.c **** 
 239:Library/src/lcm32f06x_tim.c **** /**
 240:Library/src/lcm32f06x_tim.c ****   * @name   TIM_CounterModeConfig
 241:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Set counter mode.
 242:Library/src/lcm32f06x_tim.c ****   *         CN: 设置计数器模式。
 243:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 244:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 245:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 246:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CounterMode: 
 247:Library/src/lcm32f06x_tim.c ****   *         EN: Specify counter mode.
 248:Library/src/lcm32f06x_tim.c ****   *         CN: 指定计数器模式。
 249:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CounterMode_Up
 250:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CounterMode_Down
 251:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CounterMode_CenterAligned1
 252:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CounterMode_CenterAligned2
 253:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CounterMode_CenterAligned3
ARM GAS  /tmp/ccWBHqpW.s 			page 11


 254:Library/src/lcm32f06x_tim.c ****   * @retval None
 255:Library/src/lcm32f06x_tim.c ****   */
 256:Library/src/lcm32f06x_tim.c **** void TIM_CounterModeConfig(TIM_TypeDef *TIMx, uint32_t TIM_CounterMode)
 257:Library/src/lcm32f06x_tim.c **** {
 258:Library/src/lcm32f06x_tim.c ****   uint32_t tmpcr1 = 0;
 259:Library/src/lcm32f06x_tim.c **** 
 260:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 261:Library/src/lcm32f06x_tim.c **** 
 262:Library/src/lcm32f06x_tim.c ****   tmpcr1 = TIMx->CR1;
 263:Library/src/lcm32f06x_tim.c ****   /* Reset the CMS and DIR Bits */
 264:Library/src/lcm32f06x_tim.c ****   tmpcr1 &= (uint32_t)(~((uint32_t)(TIM_CR1_DIR_Msk | TIM_CR1_CMS_Msk)));
 265:Library/src/lcm32f06x_tim.c ****   /* Set the Counter Mode */
 266:Library/src/lcm32f06x_tim.c ****   tmpcr1 |= TIM_CounterMode;
 267:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CR1 register */
 268:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 = tmpcr1;
 269:Library/src/lcm32f06x_tim.c **** }
 270:Library/src/lcm32f06x_tim.c **** 
 271:Library/src/lcm32f06x_tim.c **** /**
 272:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCounter
 273:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Set the initial value of the counter.
 274:Library/src/lcm32f06x_tim.c ****   *         CN: 设置计数器初值。
 275:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 276:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 277:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 278:Library/src/lcm32f06x_tim.c ****   * @retval None
 279:Library/src/lcm32f06x_tim.c ****   */
 280:Library/src/lcm32f06x_tim.c **** void TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
 281:Library/src/lcm32f06x_tim.c **** {
 282:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 283:Library/src/lcm32f06x_tim.c **** 
 284:Library/src/lcm32f06x_tim.c ****   /* Set the Counter Register value */
 285:Library/src/lcm32f06x_tim.c ****   TIMx->CNT = Counter;
 286:Library/src/lcm32f06x_tim.c **** }
 287:Library/src/lcm32f06x_tim.c **** 
 288:Library/src/lcm32f06x_tim.c **** /**
 289:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetAutoreload
 290:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Set Automatic reloading value.
 291:Library/src/lcm32f06x_tim.c ****   *         CN: 自动重装载值。
 292:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 293:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 294:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 295:Library/src/lcm32f06x_tim.c ****   * @retval None
 296:Library/src/lcm32f06x_tim.c ****   */
 297:Library/src/lcm32f06x_tim.c **** void TIM_SetAutoreload(TIM_TypeDef *TIMx, uint32_t Autoreload)
 298:Library/src/lcm32f06x_tim.c **** {
 299:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 300:Library/src/lcm32f06x_tim.c **** 
 301:Library/src/lcm32f06x_tim.c ****   /* Set the Autoreload Register value */
 302:Library/src/lcm32f06x_tim.c ****   TIMx->ARR = Autoreload;
 303:Library/src/lcm32f06x_tim.c **** }
 304:Library/src/lcm32f06x_tim.c **** 
 305:Library/src/lcm32f06x_tim.c **** /**
 306:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCounter
 307:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Get the counter value.
 308:Library/src/lcm32f06x_tim.c ****   *         CN: 获取计数器值。
 309:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 310:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
ARM GAS  /tmp/ccWBHqpW.s 			page 12


 311:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 312:Library/src/lcm32f06x_tim.c ****   * @retval EN: Counter Register value.
 313:Library/src/lcm32f06x_tim.c ****   *         CN: 计数器寄存器值。
 314:Library/src/lcm32f06x_tim.c ****   */
 315:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCounter(TIM_TypeDef *TIMx)
 316:Library/src/lcm32f06x_tim.c **** {
 317:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 318:Library/src/lcm32f06x_tim.c **** 
 319:Library/src/lcm32f06x_tim.c ****   /* Get the Counter Register value */
 320:Library/src/lcm32f06x_tim.c ****   return TIMx->CNT;
 321:Library/src/lcm32f06x_tim.c **** }
 322:Library/src/lcm32f06x_tim.c **** 
 323:Library/src/lcm32f06x_tim.c **** /**
 324:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetPrescaler
 325:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Get the predivider value.
 326:Library/src/lcm32f06x_tim.c ****   *         CN: 获取预分频器值。
 327:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 328:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 329:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 330:Library/src/lcm32f06x_tim.c ****   * @retval EN: The value of the prescaler.
 331:Library/src/lcm32f06x_tim.c ****   *         CN: 预分频器的值。
 332:Library/src/lcm32f06x_tim.c ****   */
 333:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetPrescaler(TIM_TypeDef *TIMx)
 334:Library/src/lcm32f06x_tim.c **** {
 335:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 336:Library/src/lcm32f06x_tim.c ****   /* Get the Prescaler Register value */
 337:Library/src/lcm32f06x_tim.c ****   return TIMx->PSC;
 338:Library/src/lcm32f06x_tim.c **** }
 339:Library/src/lcm32f06x_tim.c **** 
 340:Library/src/lcm32f06x_tim.c **** /**
 341:Library/src/lcm32f06x_tim.c ****   * @name   TIM_UpdateDisableConfig
 342:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Disable update.
 343:Library/src/lcm32f06x_tim.c ****   *         CN: 禁止更新使能。
 344:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 345:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 346:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 347:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
 348:Library/src/lcm32f06x_tim.c ****   *         EN: Enable or disable Automatic reload.
 349:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁止更新使能。
 350:Library/src/lcm32f06x_tim.c ****   * @retval None
 351:Library/src/lcm32f06x_tim.c ****   */
 352:Library/src/lcm32f06x_tim.c **** void TIM_UpdateDisableConfig(TIM_TypeDef *TIMx, FunctionalState NewState)
 353:Library/src/lcm32f06x_tim.c **** {
 354:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 355:Library/src/lcm32f06x_tim.c **** 
 356:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 357:Library/src/lcm32f06x_tim.c ****   {
 358:Library/src/lcm32f06x_tim.c ****     /* Set the Update Disable Bit */
 359:Library/src/lcm32f06x_tim.c ****     TIMx->CR1 |= TIM_CR1_UDIS_Msk;
 360:Library/src/lcm32f06x_tim.c ****   }
 361:Library/src/lcm32f06x_tim.c ****   else
 362:Library/src/lcm32f06x_tim.c ****   {
 363:Library/src/lcm32f06x_tim.c ****     /* Reset the Update Disable Bit */
 364:Library/src/lcm32f06x_tim.c ****     TIMx->CR1 &= (uint32_t) ~((uint32_t)TIM_CR1_UDIS_Msk);
 365:Library/src/lcm32f06x_tim.c ****   }
 366:Library/src/lcm32f06x_tim.c **** }
 367:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 13


 368:Library/src/lcm32f06x_tim.c **** /**
 369:Library/src/lcm32f06x_tim.c ****   * @name   TIM_UpdateRequestConfig
 370:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Update Request source.
 371:Library/src/lcm32f06x_tim.c ****   *         CN: 更新请求源。
 372:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 373:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 374:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 375:Library/src/lcm32f06x_tim.c ****   * @param  TIM_UpdateSource: 
 376:Library/src/lcm32f06x_tim.c ****   *         EN: Enable or disable Automatic reload.
 377:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁止自动重装载。
 378:Library/src/lcm32f06x_tim.c ****   * @retval None
 379:Library/src/lcm32f06x_tim.c ****   */
 380:Library/src/lcm32f06x_tim.c **** void TIM_UpdateRequestConfig(TIM_TypeDef *TIMx, uint32_t TIM_UpdateSource)
 310              		.loc 1 380 6 view .LVU81
 381:Library/src/lcm32f06x_tim.c **** {
 382:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 383:Library/src/lcm32f06x_tim.c **** 
 384:Library/src/lcm32f06x_tim.c ****   if (TIM_UpdateSource != TIM_UpdateSource_Global)
 311              		.loc 1 384 3 view .LVU82
 312              	.LBB377:
 313              	.LBI377:
 380:Library/src/lcm32f06x_tim.c **** {
 314              		.loc 1 380 6 view .LVU83
 315              	.LBB378:
 385:Library/src/lcm32f06x_tim.c ****   {
 386:Library/src/lcm32f06x_tim.c ****     /* Set the URS Bit */
 387:Library/src/lcm32f06x_tim.c ****     TIMx->CR1 |= TIM_CR1_URS_Msk;
 316              		.loc 1 387 5 view .LVU84
 317              		.loc 1 387 9 is_stmt 0 view .LVU85
 318 0042 0268     		ldr	r2, [r0]
 319              		.loc 1 387 15 view .LVU86
 320 0044 1343     		orrs	r3, r2
 321 0046 0360     		str	r3, [r0]
 322              	.LVL15:
 323              		.loc 1 387 15 view .LVU87
 324              	.LBE378:
 325              	.LBE377:
 326              	.LBE376:
 172:Library/src/lcm32f06x_tim.c ****     if ((TIMx->CR1 & TIM_CR1_DIR_Msk) != TIM_CR1_DIR_Msk)
 327              		.loc 1 172 5 is_stmt 1 view .LVU88
 172:Library/src/lcm32f06x_tim.c ****     if ((TIMx->CR1 & TIM_CR1_DIR_Msk) != TIM_CR1_DIR_Msk)
 328              		.loc 1 172 15 is_stmt 0 view .LVU89
 329 0048 0123     		movs	r3, #1
 330 004a 4361     		str	r3, [r0, #20]
 173:Library/src/lcm32f06x_tim.c ****     {
 331              		.loc 1 173 5 is_stmt 1 view .LVU90
 173:Library/src/lcm32f06x_tim.c ****     {
 332              		.loc 1 173 14 is_stmt 0 view .LVU91
 333 004c 0368     		ldr	r3, [r0]
 173:Library/src/lcm32f06x_tim.c ****     {
 334              		.loc 1 173 8 view .LVU92
 335 004e DB06     		lsls	r3, r3, #27
 336 0050 14D4     		bmi	.L23
 175:Library/src/lcm32f06x_tim.c ****       {
 337              		.loc 1 175 23 is_stmt 1 view .LVU93
 175:Library/src/lcm32f06x_tim.c ****       {
 338              		.loc 1 175 17 is_stmt 0 view .LVU94
ARM GAS  /tmp/ccWBHqpW.s 			page 14


 339 0052 436A     		ldr	r3, [r0, #36]
 175:Library/src/lcm32f06x_tim.c ****       {
 340              		.loc 1 175 23 view .LVU95
 341 0054 002B     		cmp	r3, #0
 342 0056 07D0     		beq	.L15
 343              	.L16:
 177:Library/src/lcm32f06x_tim.c ****       }
 344              		.loc 1 177 9 is_stmt 1 view .LVU96
 345              		.syntax divided
 346              	@ 177 "Library/src/lcm32f06x_tim.c" 1
 347 0058 C046     		nop
 348              	@ 0 "" 2
 177:Library/src/lcm32f06x_tim.c ****       }
 349              		.loc 1 177 17 view .LVU97
 350              	@ 177 "Library/src/lcm32f06x_tim.c" 1
 351 005a C046     		nop
 352              	@ 0 "" 2
 177:Library/src/lcm32f06x_tim.c ****       }
 353              		.loc 1 177 25 view .LVU98
 354              	@ 177 "Library/src/lcm32f06x_tim.c" 1
 355 005c C046     		nop
 356              	@ 0 "" 2
 177:Library/src/lcm32f06x_tim.c ****       }
 357              		.loc 1 177 33 view .LVU99
 358              	@ 177 "Library/src/lcm32f06x_tim.c" 1
 359 005e C046     		nop
 360              	@ 0 "" 2
 177:Library/src/lcm32f06x_tim.c ****       }
 361              		.loc 1 177 41 view .LVU100
 362              	@ 177 "Library/src/lcm32f06x_tim.c" 1
 363 0060 C046     		nop
 364              	@ 0 "" 2
 175:Library/src/lcm32f06x_tim.c ****       {
 365              		.loc 1 175 23 view .LVU101
 175:Library/src/lcm32f06x_tim.c ****       {
 366              		.loc 1 175 17 is_stmt 0 view .LVU102
 367              		.thumb
 368              		.syntax unified
 369 0062 436A     		ldr	r3, [r0, #36]
 175:Library/src/lcm32f06x_tim.c ****       {
 370              		.loc 1 175 23 view .LVU103
 371 0064 002B     		cmp	r3, #0
 372 0066 F7D1     		bne	.L16
 373              	.L15:
 187:Library/src/lcm32f06x_tim.c ****   }
 374              		.loc 1 187 5 is_stmt 1 view .LVU104
 375              	.LVL16:
 376              	.LBB379:
 377              	.LBI379:
 380:Library/src/lcm32f06x_tim.c **** {
 378              		.loc 1 380 6 view .LVU105
 379              	.LBB380:
 384:Library/src/lcm32f06x_tim.c ****   {
 380              		.loc 1 384 3 view .LVU106
 388:Library/src/lcm32f06x_tim.c ****   }
 389:Library/src/lcm32f06x_tim.c ****   else
 390:Library/src/lcm32f06x_tim.c ****   {
ARM GAS  /tmp/ccWBHqpW.s 			page 15


 391:Library/src/lcm32f06x_tim.c ****     /* Reset the URS Bit */
 392:Library/src/lcm32f06x_tim.c ****     TIMx->CR1 &= (uint32_t) ~((uint32_t)TIM_CR1_URS_Msk);
 381              		.loc 1 392 5 view .LVU107
 382              		.loc 1 392 15 is_stmt 0 view .LVU108
 383 0068 0422     		movs	r2, #4
 384              		.loc 1 392 9 view .LVU109
 385 006a 0368     		ldr	r3, [r0]
 386              		.loc 1 392 15 view .LVU110
 387 006c 9343     		bics	r3, r2
 388 006e 0360     		str	r3, [r0]
 389              	.LVL17:
 390              		.loc 1 392 15 view .LVU111
 391              	.LBE380:
 392              	.LBE379:
 189:Library/src/lcm32f06x_tim.c **** 
 393              		.loc 1 189 1 view .LVU112
 394 0070 E0E7     		b	.L8
 395              	.L14:
 184:Library/src/lcm32f06x_tim.c ****       }
 396              		.loc 1 184 9 is_stmt 1 view .LVU113
 397              		.syntax divided
 398              	@ 184 "Library/src/lcm32f06x_tim.c" 1
 399 0072 C046     		nop
 400              	@ 0 "" 2
 184:Library/src/lcm32f06x_tim.c ****       }
 401              		.loc 1 184 17 view .LVU114
 402              	@ 184 "Library/src/lcm32f06x_tim.c" 1
 403 0074 C046     		nop
 404              	@ 0 "" 2
 184:Library/src/lcm32f06x_tim.c ****       }
 405              		.loc 1 184 25 view .LVU115
 406              	@ 184 "Library/src/lcm32f06x_tim.c" 1
 407 0076 C046     		nop
 408              	@ 0 "" 2
 184:Library/src/lcm32f06x_tim.c ****       }
 409              		.loc 1 184 33 view .LVU116
 410              	@ 184 "Library/src/lcm32f06x_tim.c" 1
 411 0078 C046     		nop
 412              	@ 0 "" 2
 184:Library/src/lcm32f06x_tim.c ****       }
 413              		.loc 1 184 41 view .LVU117
 414              	@ 184 "Library/src/lcm32f06x_tim.c" 1
 415 007a C046     		nop
 416              	@ 0 "" 2
 417              		.thumb
 418              		.syntax unified
 419              	.L23:
 182:Library/src/lcm32f06x_tim.c ****       {
 420              		.loc 1 182 23 view .LVU118
 182:Library/src/lcm32f06x_tim.c ****       {
 421              		.loc 1 182 17 is_stmt 0 view .LVU119
 422 007c 426A     		ldr	r2, [r0, #36]
 182:Library/src/lcm32f06x_tim.c ****       {
 423              		.loc 1 182 30 view .LVU120
 424 007e C36A     		ldr	r3, [r0, #44]
 182:Library/src/lcm32f06x_tim.c ****       {
 425              		.loc 1 182 23 view .LVU121
ARM GAS  /tmp/ccWBHqpW.s 			page 16


 426 0080 9A42     		cmp	r2, r3
 427 0082 F6D1     		bne	.L14
 187:Library/src/lcm32f06x_tim.c ****   }
 428              		.loc 1 187 5 is_stmt 1 view .LVU122
 429              	.LVL18:
 430              	.LBB382:
 380:Library/src/lcm32f06x_tim.c **** {
 431              		.loc 1 380 6 view .LVU123
 432              	.LBB381:
 384:Library/src/lcm32f06x_tim.c ****   {
 433              		.loc 1 384 3 view .LVU124
 434              		.loc 1 392 5 view .LVU125
 435              		.loc 1 392 15 is_stmt 0 view .LVU126
 436 0084 0422     		movs	r2, #4
 437              		.loc 1 392 9 view .LVU127
 438 0086 0368     		ldr	r3, [r0]
 439              		.loc 1 392 15 view .LVU128
 440 0088 9343     		bics	r3, r2
 441 008a 0360     		str	r3, [r0]
 442              	.LVL19:
 443              		.loc 1 392 15 view .LVU129
 444 008c D2E7     		b	.L8
 445              	.L26:
 446 008e C046     		.align	2
 447              	.L25:
 448 0090 FFFCFFFF 		.word	-769
 449 0094 00000140 		.word	1073807360
 450 0098 00B00140 		.word	1073852416
 451              	.LBE381:
 452              	.LBE382:
 453              		.cfi_endproc
 454              	.LFE51:
 456              		.section	.text.TIM_TimeBaseStructInit,"ax",%progbits
 457              		.align	1
 458              		.p2align 2,,3
 459              		.global	TIM_TimeBaseStructInit
 460              		.syntax unified
 461              		.code	16
 462              		.thumb_func
 464              	TIM_TimeBaseStructInit:
 465              	.LVL20:
 466              	.LFB52:
 202:Library/src/lcm32f06x_tim.c ****   /* Set the default configuration */
 467              		.loc 1 202 1 is_stmt 1 view -0
 468              		.cfi_startproc
 469              		@ args = 0, pretend = 0, frame = 0
 470              		@ frame_needed = 0, uses_anonymous_args = 0
 471              		@ link register save eliminated.
 204:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000;
 472              		.loc 1 204 3 view .LVU131
 204:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000;
 473              		.loc 1 204 38 is_stmt 0 view .LVU132
 474 0000 0123     		movs	r3, #1
 209:Library/src/lcm32f06x_tim.c **** 
 475              		.loc 1 209 1 view .LVU133
 476              		@ sp needed
 204:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000;
ARM GAS  /tmp/ccWBHqpW.s 			page 17


 477              		.loc 1 204 38 view .LVU134
 478 0002 5B42     		rsbs	r3, r3, #0
 479 0004 8360     		str	r3, [r0, #8]
 205:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1;
 480              		.loc 1 205 3 is_stmt 1 view .LVU135
 205:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1;
 481              		.loc 1 205 41 is_stmt 0 view .LVU136
 482 0006 0023     		movs	r3, #0
 483 0008 0360     		str	r3, [r0]
 206:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up;
 484              		.loc 1 206 3 is_stmt 1 view .LVU137
 206:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up;
 485              		.loc 1 206 45 is_stmt 0 view .LVU138
 486 000a C360     		str	r3, [r0, #12]
 207:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000;
 487              		.loc 1 207 3 is_stmt 1 view .LVU139
 207:Library/src/lcm32f06x_tim.c ****   TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000;
 488              		.loc 1 207 43 is_stmt 0 view .LVU140
 489 000c 4360     		str	r3, [r0, #4]
 208:Library/src/lcm32f06x_tim.c **** }
 490              		.loc 1 208 3 is_stmt 1 view .LVU141
 208:Library/src/lcm32f06x_tim.c **** }
 491              		.loc 1 208 49 is_stmt 0 view .LVU142
 492 000e 0374     		strb	r3, [r0, #16]
 209:Library/src/lcm32f06x_tim.c **** 
 493              		.loc 1 209 1 view .LVU143
 494 0010 7047     		bx	lr
 495              		.cfi_endproc
 496              	.LFE52:
 498 0012 C046     		.section	.text.TIM_PrescalerConfig,"ax",%progbits
 499              		.align	1
 500              		.p2align 2,,3
 501              		.global	TIM_PrescalerConfig
 502              		.syntax unified
 503              		.code	16
 504              		.thumb_func
 506              	TIM_PrescalerConfig:
 507              	.LVL21:
 508              	.LFB53:
 230:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 509              		.loc 1 230 1 is_stmt 1 view -0
 510              		.cfi_startproc
 511              		@ args = 0, pretend = 0, frame = 0
 512              		@ frame_needed = 0, uses_anonymous_args = 0
 513              		@ link register save eliminated.
 234:Library/src/lcm32f06x_tim.c ****   /* Set or reset the UG Bit */
 514              		.loc 1 234 3 view .LVU145
 234:Library/src/lcm32f06x_tim.c ****   /* Set or reset the UG Bit */
 515              		.loc 1 234 13 is_stmt 0 view .LVU146
 516 0000 8162     		str	r1, [r0, #40]
 236:Library/src/lcm32f06x_tim.c **** }
 517              		.loc 1 236 3 is_stmt 1 view .LVU147
 237:Library/src/lcm32f06x_tim.c **** 
 518              		.loc 1 237 1 is_stmt 0 view .LVU148
 519              		@ sp needed
 236:Library/src/lcm32f06x_tim.c **** }
 520              		.loc 1 236 13 view .LVU149
ARM GAS  /tmp/ccWBHqpW.s 			page 18


 521 0002 4261     		str	r2, [r0, #20]
 237:Library/src/lcm32f06x_tim.c **** 
 522              		.loc 1 237 1 view .LVU150
 523 0004 7047     		bx	lr
 524              		.cfi_endproc
 525              	.LFE53:
 527 0006 C046     		.section	.text.TIM_CounterModeConfig,"ax",%progbits
 528              		.align	1
 529              		.p2align 2,,3
 530              		.global	TIM_CounterModeConfig
 531              		.syntax unified
 532              		.code	16
 533              		.thumb_func
 535              	TIM_CounterModeConfig:
 536              	.LVL22:
 537              	.LFB54:
 257:Library/src/lcm32f06x_tim.c ****   uint32_t tmpcr1 = 0;
 538              		.loc 1 257 1 is_stmt 1 view -0
 539              		.cfi_startproc
 540              		@ args = 0, pretend = 0, frame = 0
 541              		@ frame_needed = 0, uses_anonymous_args = 0
 542              		@ link register save eliminated.
 258:Library/src/lcm32f06x_tim.c **** 
 543              		.loc 1 258 3 view .LVU152
 262:Library/src/lcm32f06x_tim.c ****   /* Reset the CMS and DIR Bits */
 544              		.loc 1 262 3 view .LVU153
 264:Library/src/lcm32f06x_tim.c ****   /* Set the Counter Mode */
 545              		.loc 1 264 10 is_stmt 0 view .LVU154
 546 0000 7022     		movs	r2, #112
 269:Library/src/lcm32f06x_tim.c **** 
 547              		.loc 1 269 1 view .LVU155
 548              		@ sp needed
 262:Library/src/lcm32f06x_tim.c ****   /* Reset the CMS and DIR Bits */
 549              		.loc 1 262 10 view .LVU156
 550 0002 0368     		ldr	r3, [r0]
 551              	.LVL23:
 264:Library/src/lcm32f06x_tim.c ****   /* Set the Counter Mode */
 552              		.loc 1 264 3 is_stmt 1 view .LVU157
 264:Library/src/lcm32f06x_tim.c ****   /* Set the Counter Mode */
 553              		.loc 1 264 10 is_stmt 0 view .LVU158
 554 0004 9343     		bics	r3, r2
 555              	.LVL24:
 266:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CR1 register */
 556              		.loc 1 266 3 is_stmt 1 view .LVU159
 266:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CR1 register */
 557              		.loc 1 266 10 is_stmt 0 view .LVU160
 558 0006 0B43     		orrs	r3, r1
 559              	.LVL25:
 268:Library/src/lcm32f06x_tim.c **** }
 560              		.loc 1 268 3 is_stmt 1 view .LVU161
 268:Library/src/lcm32f06x_tim.c **** }
 561              		.loc 1 268 13 is_stmt 0 view .LVU162
 562 0008 0360     		str	r3, [r0]
 269:Library/src/lcm32f06x_tim.c **** 
 563              		.loc 1 269 1 view .LVU163
 564 000a 7047     		bx	lr
 565              		.cfi_endproc
ARM GAS  /tmp/ccWBHqpW.s 			page 19


 566              	.LFE54:
 568              		.section	.text.TIM_SetCounter,"ax",%progbits
 569              		.align	1
 570              		.p2align 2,,3
 571              		.global	TIM_SetCounter
 572              		.syntax unified
 573              		.code	16
 574              		.thumb_func
 576              	TIM_SetCounter:
 577              	.LVL26:
 578              	.LFB55:
 281:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 579              		.loc 1 281 1 is_stmt 1 view -0
 580              		.cfi_startproc
 581              		@ args = 0, pretend = 0, frame = 0
 582              		@ frame_needed = 0, uses_anonymous_args = 0
 583              		@ link register save eliminated.
 285:Library/src/lcm32f06x_tim.c **** }
 584              		.loc 1 285 3 view .LVU165
 285:Library/src/lcm32f06x_tim.c **** }
 585              		.loc 1 285 13 is_stmt 0 view .LVU166
 586 0000 4162     		str	r1, [r0, #36]
 286:Library/src/lcm32f06x_tim.c **** 
 587              		.loc 1 286 1 view .LVU167
 588              		@ sp needed
 589 0002 7047     		bx	lr
 590              		.cfi_endproc
 591              	.LFE55:
 593              		.section	.text.TIM_SetAutoreload,"ax",%progbits
 594              		.align	1
 595              		.p2align 2,,3
 596              		.global	TIM_SetAutoreload
 597              		.syntax unified
 598              		.code	16
 599              		.thumb_func
 601              	TIM_SetAutoreload:
 602              	.LVL27:
 603              	.LFB56:
 298:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 604              		.loc 1 298 1 is_stmt 1 view -0
 605              		.cfi_startproc
 606              		@ args = 0, pretend = 0, frame = 0
 607              		@ frame_needed = 0, uses_anonymous_args = 0
 608              		@ link register save eliminated.
 302:Library/src/lcm32f06x_tim.c **** }
 609              		.loc 1 302 3 view .LVU169
 302:Library/src/lcm32f06x_tim.c **** }
 610              		.loc 1 302 13 is_stmt 0 view .LVU170
 611 0000 C162     		str	r1, [r0, #44]
 303:Library/src/lcm32f06x_tim.c **** 
 612              		.loc 1 303 1 view .LVU171
 613              		@ sp needed
 614 0002 7047     		bx	lr
 615              		.cfi_endproc
 616              	.LFE56:
 618              		.section	.text.TIM_GetCounter,"ax",%progbits
 619              		.align	1
ARM GAS  /tmp/ccWBHqpW.s 			page 20


 620              		.p2align 2,,3
 621              		.global	TIM_GetCounter
 622              		.syntax unified
 623              		.code	16
 624              		.thumb_func
 626              	TIM_GetCounter:
 627              	.LVL28:
 628              	.LFB57:
 316:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 629              		.loc 1 316 1 is_stmt 1 view -0
 630              		.cfi_startproc
 631              		@ args = 0, pretend = 0, frame = 0
 632              		@ frame_needed = 0, uses_anonymous_args = 0
 633              		@ link register save eliminated.
 320:Library/src/lcm32f06x_tim.c **** }
 634              		.loc 1 320 3 view .LVU173
 320:Library/src/lcm32f06x_tim.c **** }
 635              		.loc 1 320 14 is_stmt 0 view .LVU174
 636 0000 406A     		ldr	r0, [r0, #36]
 637              	.LVL29:
 321:Library/src/lcm32f06x_tim.c **** 
 638              		.loc 1 321 1 view .LVU175
 639              		@ sp needed
 640 0002 7047     		bx	lr
 641              		.cfi_endproc
 642              	.LFE57:
 644              		.section	.text.TIM_GetPrescaler,"ax",%progbits
 645              		.align	1
 646              		.p2align 2,,3
 647              		.global	TIM_GetPrescaler
 648              		.syntax unified
 649              		.code	16
 650              		.thumb_func
 652              	TIM_GetPrescaler:
 653              	.LVL30:
 654              	.LFB58:
 334:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 655              		.loc 1 334 1 is_stmt 1 view -0
 656              		.cfi_startproc
 657              		@ args = 0, pretend = 0, frame = 0
 658              		@ frame_needed = 0, uses_anonymous_args = 0
 659              		@ link register save eliminated.
 337:Library/src/lcm32f06x_tim.c **** }
 660              		.loc 1 337 3 view .LVU177
 337:Library/src/lcm32f06x_tim.c **** }
 661              		.loc 1 337 14 is_stmt 0 view .LVU178
 662 0000 806A     		ldr	r0, [r0, #40]
 663              	.LVL31:
 338:Library/src/lcm32f06x_tim.c **** 
 664              		.loc 1 338 1 view .LVU179
 665              		@ sp needed
 666 0002 7047     		bx	lr
 667              		.cfi_endproc
 668              	.LFE58:
 670              		.section	.text.TIM_UpdateDisableConfig,"ax",%progbits
 671              		.align	1
 672              		.p2align 2,,3
ARM GAS  /tmp/ccWBHqpW.s 			page 21


 673              		.global	TIM_UpdateDisableConfig
 674              		.syntax unified
 675              		.code	16
 676              		.thumb_func
 678              	TIM_UpdateDisableConfig:
 679              	.LVL32:
 680              	.LFB59:
 353:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 681              		.loc 1 353 1 is_stmt 1 view -0
 682              		.cfi_startproc
 683              		@ args = 0, pretend = 0, frame = 0
 684              		@ frame_needed = 0, uses_anonymous_args = 0
 685              		@ link register save eliminated.
 356:Library/src/lcm32f06x_tim.c ****   {
 686              		.loc 1 356 3 view .LVU181
 359:Library/src/lcm32f06x_tim.c ****   }
 687              		.loc 1 359 15 is_stmt 0 view .LVU182
 688 0000 0222     		movs	r2, #2
 359:Library/src/lcm32f06x_tim.c ****   }
 689              		.loc 1 359 9 view .LVU183
 690 0002 0368     		ldr	r3, [r0]
 356:Library/src/lcm32f06x_tim.c ****   {
 691              		.loc 1 356 6 view .LVU184
 692 0004 0029     		cmp	r1, #0
 693 0006 02D0     		beq	.L35
 359:Library/src/lcm32f06x_tim.c ****   }
 694              		.loc 1 359 5 is_stmt 1 view .LVU185
 359:Library/src/lcm32f06x_tim.c ****   }
 695              		.loc 1 359 15 is_stmt 0 view .LVU186
 696 0008 1343     		orrs	r3, r2
 697 000a 0360     		str	r3, [r0]
 698              	.L34:
 366:Library/src/lcm32f06x_tim.c **** 
 699              		.loc 1 366 1 view .LVU187
 700              		@ sp needed
 701 000c 7047     		bx	lr
 702              	.L35:
 364:Library/src/lcm32f06x_tim.c ****   }
 703              		.loc 1 364 5 is_stmt 1 view .LVU188
 364:Library/src/lcm32f06x_tim.c ****   }
 704              		.loc 1 364 15 is_stmt 0 view .LVU189
 705 000e 9343     		bics	r3, r2
 706 0010 0360     		str	r3, [r0]
 366:Library/src/lcm32f06x_tim.c **** 
 707              		.loc 1 366 1 view .LVU190
 708 0012 FBE7     		b	.L34
 709              		.cfi_endproc
 710              	.LFE59:
 712              		.section	.text.TIM_UpdateRequestConfig,"ax",%progbits
 713              		.align	1
 714              		.p2align 2,,3
 715              		.global	TIM_UpdateRequestConfig
 716              		.syntax unified
 717              		.code	16
 718              		.thumb_func
 720              	TIM_UpdateRequestConfig:
 721              	.LVL33:
ARM GAS  /tmp/ccWBHqpW.s 			page 22


 722              	.LFB60:
 381:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 723              		.loc 1 381 1 is_stmt 1 view -0
 724              		.cfi_startproc
 725              		@ args = 0, pretend = 0, frame = 0
 726              		@ frame_needed = 0, uses_anonymous_args = 0
 727              		@ link register save eliminated.
 384:Library/src/lcm32f06x_tim.c ****   {
 728              		.loc 1 384 3 view .LVU192
 729              	.LBB385:
 730              	.LBB386:
 387:Library/src/lcm32f06x_tim.c ****   }
 731              		.loc 1 387 15 is_stmt 0 view .LVU193
 732 0000 0422     		movs	r2, #4
 387:Library/src/lcm32f06x_tim.c ****   }
 733              		.loc 1 387 9 view .LVU194
 734 0002 0368     		ldr	r3, [r0]
 735              	.LBE386:
 736              	.LBE385:
 384:Library/src/lcm32f06x_tim.c ****   {
 737              		.loc 1 384 6 view .LVU195
 738 0004 0029     		cmp	r1, #0
 739 0006 02D0     		beq	.L38
 740              	.LVL34:
 741              	.LBB388:
 742              	.LBI385:
 380:Library/src/lcm32f06x_tim.c **** {
 743              		.loc 1 380 6 is_stmt 1 view .LVU196
 744              	.LBB387:
 387:Library/src/lcm32f06x_tim.c ****   }
 745              		.loc 1 387 5 view .LVU197
 387:Library/src/lcm32f06x_tim.c ****   }
 746              		.loc 1 387 15 is_stmt 0 view .LVU198
 747 0008 1343     		orrs	r3, r2
 748 000a 0360     		str	r3, [r0]
 749              	.LVL35:
 750              	.L37:
 387:Library/src/lcm32f06x_tim.c ****   }
 751              		.loc 1 387 15 view .LVU199
 752              	.LBE387:
 753              	.LBE388:
 393:Library/src/lcm32f06x_tim.c ****   }
 394:Library/src/lcm32f06x_tim.c **** }
 754              		.loc 1 394 1 view .LVU200
 755              		@ sp needed
 756 000c 7047     		bx	lr
 757              	.L38:
 392:Library/src/lcm32f06x_tim.c ****   }
 758              		.loc 1 392 5 is_stmt 1 view .LVU201
 392:Library/src/lcm32f06x_tim.c ****   }
 759              		.loc 1 392 15 is_stmt 0 view .LVU202
 760 000e 9343     		bics	r3, r2
 761 0010 0360     		str	r3, [r0]
 762              		.loc 1 394 1 view .LVU203
 763 0012 FBE7     		b	.L37
 764              		.cfi_endproc
 765              	.LFE60:
ARM GAS  /tmp/ccWBHqpW.s 			page 23


 767              		.section	.text.TIM_ARRPreloadConfig,"ax",%progbits
 768              		.align	1
 769              		.p2align 2,,3
 770              		.global	TIM_ARRPreloadConfig
 771              		.syntax unified
 772              		.code	16
 773              		.thumb_func
 775              	TIM_ARRPreloadConfig:
 776              	.LVL36:
 777              	.LFB61:
 395:Library/src/lcm32f06x_tim.c **** 
 396:Library/src/lcm32f06x_tim.c **** /**
 397:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ARRPreloadConfig
 398:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Automatic reload enables buffering.
 399:Library/src/lcm32f06x_tim.c ****   *         CN: 自动重装载使能。
 400:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 401:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 402:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 403:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
 404:Library/src/lcm32f06x_tim.c ****   *         EN: Enable or disable Automatic reload.
 405:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁止自动重装载。
 406:Library/src/lcm32f06x_tim.c ****   * @retval None
 407:Library/src/lcm32f06x_tim.c ****   */
 408:Library/src/lcm32f06x_tim.c **** void TIM_ARRPreloadConfig(TIM_TypeDef *TIMx, FunctionalState NewState)
 409:Library/src/lcm32f06x_tim.c **** {
 778              		.loc 1 409 1 is_stmt 1 view -0
 779              		.cfi_startproc
 780              		@ args = 0, pretend = 0, frame = 0
 781              		@ frame_needed = 0, uses_anonymous_args = 0
 782              		@ link register save eliminated.
 410:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 411:Library/src/lcm32f06x_tim.c **** 
 412:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 783              		.loc 1 412 3 view .LVU205
 413:Library/src/lcm32f06x_tim.c ****   {
 414:Library/src/lcm32f06x_tim.c ****     /* Set the ARR Preload Bit */
 415:Library/src/lcm32f06x_tim.c ****     TIMx->CR1 |= TIM_CR1_ARPE_Msk;
 784              		.loc 1 415 15 is_stmt 0 view .LVU206
 785 0000 8022     		movs	r2, #128
 786              		.loc 1 415 9 view .LVU207
 787 0002 0368     		ldr	r3, [r0]
 412:Library/src/lcm32f06x_tim.c ****   {
 788              		.loc 1 412 6 view .LVU208
 789 0004 0029     		cmp	r1, #0
 790 0006 02D0     		beq	.L41
 791              		.loc 1 415 5 is_stmt 1 view .LVU209
 792              		.loc 1 415 15 is_stmt 0 view .LVU210
 793 0008 1343     		orrs	r3, r2
 794 000a 0360     		str	r3, [r0]
 795              	.L40:
 416:Library/src/lcm32f06x_tim.c ****   }
 417:Library/src/lcm32f06x_tim.c ****   else
 418:Library/src/lcm32f06x_tim.c ****   {
 419:Library/src/lcm32f06x_tim.c ****     /* Reset the ARR Preload Bit */
 420:Library/src/lcm32f06x_tim.c ****     TIMx->CR1 &= (uint32_t) ~((uint32_t)TIM_CR1_ARPE_Msk);
 421:Library/src/lcm32f06x_tim.c ****   }
 422:Library/src/lcm32f06x_tim.c **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 24


 796              		.loc 1 422 1 view .LVU211
 797              		@ sp needed
 798 000c 7047     		bx	lr
 799              	.L41:
 420:Library/src/lcm32f06x_tim.c ****   }
 800              		.loc 1 420 5 is_stmt 1 view .LVU212
 420:Library/src/lcm32f06x_tim.c ****   }
 801              		.loc 1 420 15 is_stmt 0 view .LVU213
 802 000e 9343     		bics	r3, r2
 803 0010 0360     		str	r3, [r0]
 804              		.loc 1 422 1 view .LVU214
 805 0012 FBE7     		b	.L40
 806              		.cfi_endproc
 807              	.LFE61:
 809              		.section	.text.TIM_SelectOnePulseMode,"ax",%progbits
 810              		.align	1
 811              		.p2align 2,,3
 812              		.global	TIM_SelectOnePulseMode
 813              		.syntax unified
 814              		.code	16
 815              		.thumb_func
 817              	TIM_SelectOnePulseMode:
 818              	.LVL37:
 819              	.LFB62:
 423:Library/src/lcm32f06x_tim.c **** 
 424:Library/src/lcm32f06x_tim.c **** /**
 425:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SelectOnePulseMode
 426:Library/src/lcm32f06x_tim.c ****   * @brief  EN: single pulse mode.
 427:Library/src/lcm32f06x_tim.c ****   *         CN: 单脉冲模式。
 428:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 429:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 430:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 431:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OPMode: 
 432:Library/src/lcm32f06x_tim.c ****   *         EN: Enable or disable single pulse mode.
 433:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁止单脉冲模式。
 434:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OPMode_Single
 435:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OPMode_Repetitive
 436:Library/src/lcm32f06x_tim.c ****   * @retval None
 437:Library/src/lcm32f06x_tim.c ****   */
 438:Library/src/lcm32f06x_tim.c **** void TIM_SelectOnePulseMode(TIM_TypeDef *TIMx, uint32_t TIM_OPMode)
 439:Library/src/lcm32f06x_tim.c **** {
 820              		.loc 1 439 1 is_stmt 1 view -0
 821              		.cfi_startproc
 822              		@ args = 0, pretend = 0, frame = 0
 823              		@ frame_needed = 0, uses_anonymous_args = 0
 824              		@ link register save eliminated.
 440:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 441:Library/src/lcm32f06x_tim.c **** 
 442:Library/src/lcm32f06x_tim.c ****   /* Reset the OPM Bit */
 443:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 &= (uint32_t) ~((uint32_t)TIM_CR1_OPM_Msk);
 825              		.loc 1 443 3 view .LVU216
 826              		.loc 1 443 13 is_stmt 0 view .LVU217
 827 0000 0822     		movs	r2, #8
 444:Library/src/lcm32f06x_tim.c ****   /* Configure the OPM Mode */
 445:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_OPMode;
 446:Library/src/lcm32f06x_tim.c **** }
 828              		.loc 1 446 1 view .LVU218
ARM GAS  /tmp/ccWBHqpW.s 			page 25


 829              		@ sp needed
 443:Library/src/lcm32f06x_tim.c ****   /* Configure the OPM Mode */
 830              		.loc 1 443 7 view .LVU219
 831 0002 0368     		ldr	r3, [r0]
 443:Library/src/lcm32f06x_tim.c ****   /* Configure the OPM Mode */
 832              		.loc 1 443 13 view .LVU220
 833 0004 9343     		bics	r3, r2
 834 0006 0360     		str	r3, [r0]
 445:Library/src/lcm32f06x_tim.c **** }
 835              		.loc 1 445 3 is_stmt 1 view .LVU221
 445:Library/src/lcm32f06x_tim.c **** }
 836              		.loc 1 445 7 is_stmt 0 view .LVU222
 837 0008 0368     		ldr	r3, [r0]
 445:Library/src/lcm32f06x_tim.c **** }
 838              		.loc 1 445 13 view .LVU223
 839 000a 0B43     		orrs	r3, r1
 840 000c 0360     		str	r3, [r0]
 841              		.loc 1 446 1 view .LVU224
 842 000e 7047     		bx	lr
 843              		.cfi_endproc
 844              	.LFE62:
 846              		.section	.text.TIM_SetClockDivision,"ax",%progbits
 847              		.align	1
 848              		.p2align 2,,3
 849              		.global	TIM_SetClockDivision
 850              		.syntax unified
 851              		.code	16
 852              		.thumb_func
 854              	TIM_SetClockDivision:
 855              	.LVL38:
 856              	.LFB63:
 447:Library/src/lcm32f06x_tim.c **** 
 448:Library/src/lcm32f06x_tim.c **** /**
 449:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetClockDivision
 450:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Set the clock frequency.
 451:Library/src/lcm32f06x_tim.c ****   *         CN: 设置时钟分频。
 452:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 453:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 454:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 455:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ClockDivision: 
 456:Library/src/lcm32f06x_tim.c ****   *         EN: The clock division ratio between the timer clock (CK_INT) frequency and the dead-ti
 457:Library/src/lcm32f06x_tim.c ****   *         CN: CK_INT 时钟和死区/采样时钟（CK_DTS）的分频系数。
 458:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CKD_DIV1
 459:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CKD_DIV2
 460:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CKD_DIV4
 461:Library/src/lcm32f06x_tim.c ****   * @retval None
 462:Library/src/lcm32f06x_tim.c ****   */
 463:Library/src/lcm32f06x_tim.c **** void TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t TIM_ClockDivision)
 464:Library/src/lcm32f06x_tim.c **** {
 857              		.loc 1 464 1 is_stmt 1 view -0
 858              		.cfi_startproc
 859              		@ args = 0, pretend = 0, frame = 0
 860              		@ frame_needed = 0, uses_anonymous_args = 0
 861              		@ link register save eliminated.
 465:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 466:Library/src/lcm32f06x_tim.c **** 
 467:Library/src/lcm32f06x_tim.c ****   /* Reset the CKD Bits */
ARM GAS  /tmp/ccWBHqpW.s 			page 26


 468:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 &= (uint32_t) ~((uint32_t)TIM_CR1_CKD_Msk);
 862              		.loc 1 468 3 view .LVU226
 863              		.loc 1 468 7 is_stmt 0 view .LVU227
 864 0000 0368     		ldr	r3, [r0]
 865              		.loc 1 468 13 view .LVU228
 866 0002 034A     		ldr	r2, .L45
 469:Library/src/lcm32f06x_tim.c ****   /* Set the CKD value */
 470:Library/src/lcm32f06x_tim.c ****   TIMx->CR1 |= TIM_ClockDivision;
 471:Library/src/lcm32f06x_tim.c **** }
 867              		.loc 1 471 1 view .LVU229
 868              		@ sp needed
 468:Library/src/lcm32f06x_tim.c ****   /* Set the CKD value */
 869              		.loc 1 468 13 view .LVU230
 870 0004 1340     		ands	r3, r2
 871 0006 0360     		str	r3, [r0]
 470:Library/src/lcm32f06x_tim.c **** }
 872              		.loc 1 470 3 is_stmt 1 view .LVU231
 470:Library/src/lcm32f06x_tim.c **** }
 873              		.loc 1 470 7 is_stmt 0 view .LVU232
 874 0008 0368     		ldr	r3, [r0]
 470:Library/src/lcm32f06x_tim.c **** }
 875              		.loc 1 470 13 view .LVU233
 876 000a 0B43     		orrs	r3, r1
 877 000c 0360     		str	r3, [r0]
 878              		.loc 1 471 1 view .LVU234
 879 000e 7047     		bx	lr
 880              	.L46:
 881              		.align	2
 882              	.L45:
 883 0010 FFFCFFFF 		.word	-769
 884              		.cfi_endproc
 885              	.LFE63:
 887              		.section	.text.TIM_Cmd,"ax",%progbits
 888              		.align	1
 889              		.p2align 2,,3
 890              		.global	TIM_Cmd
 891              		.syntax unified
 892              		.code	16
 893              		.thumb_func
 895              	TIM_Cmd:
 896              	.LVL39:
 897              	.LFB64:
 472:Library/src/lcm32f06x_tim.c **** 
 473:Library/src/lcm32f06x_tim.c **** /**
 474:Library/src/lcm32f06x_tim.c ****   * @name   TIM_Cmd
 475:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the specified TIMx peripheral.
 476:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用指定的 TIMx 外设
 477:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 478:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 479:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 480:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
 481:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx peripheral.
 482:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 外设的新状态
 483:Library/src/lcm32f06x_tim.c ****   * @retval None
 484:Library/src/lcm32f06x_tim.c ****   */
 485:Library/src/lcm32f06x_tim.c **** void TIM_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
 486:Library/src/lcm32f06x_tim.c **** {
ARM GAS  /tmp/ccWBHqpW.s 			page 27


 898              		.loc 1 486 1 is_stmt 1 view -0
 899              		.cfi_startproc
 900              		@ args = 0, pretend = 0, frame = 0
 901              		@ frame_needed = 0, uses_anonymous_args = 0
 902              		@ link register save eliminated.
 487:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 488:Library/src/lcm32f06x_tim.c **** 
 489:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 903              		.loc 1 489 3 view .LVU236
 490:Library/src/lcm32f06x_tim.c ****   {
 491:Library/src/lcm32f06x_tim.c ****     /* Enable the TIM Counter */
 492:Library/src/lcm32f06x_tim.c ****     TIMx->CR1 |= TIM_CR1_CEN_Msk;
 904              		.loc 1 492 15 is_stmt 0 view .LVU237
 905 0000 0122     		movs	r2, #1
 906              		.loc 1 492 9 view .LVU238
 907 0002 0368     		ldr	r3, [r0]
 489:Library/src/lcm32f06x_tim.c ****   {
 908              		.loc 1 489 6 view .LVU239
 909 0004 0029     		cmp	r1, #0
 910 0006 02D0     		beq	.L48
 911              		.loc 1 492 5 is_stmt 1 view .LVU240
 912              		.loc 1 492 15 is_stmt 0 view .LVU241
 913 0008 1343     		orrs	r3, r2
 914 000a 0360     		str	r3, [r0]
 915              	.LVL40:
 916              	.L47:
 493:Library/src/lcm32f06x_tim.c ****   }
 494:Library/src/lcm32f06x_tim.c ****   else
 495:Library/src/lcm32f06x_tim.c ****   {
 496:Library/src/lcm32f06x_tim.c ****     /* Disable the TIM Counter */
 497:Library/src/lcm32f06x_tim.c ****     TIMx->CR1 &= (uint32_t)(~((uint32_t)TIM_CR1_CEN_Msk));
 498:Library/src/lcm32f06x_tim.c ****     if (TIMx->CR1 & TIM_CR1_URS_Msk)
 499:Library/src/lcm32f06x_tim.c ****     {
 500:Library/src/lcm32f06x_tim.c ****       TIMx->EGR = TIM_PSCReloadMode_Immediate;
 501:Library/src/lcm32f06x_tim.c ****     }
 502:Library/src/lcm32f06x_tim.c ****     else
 503:Library/src/lcm32f06x_tim.c ****     {
 504:Library/src/lcm32f06x_tim.c ****       TIM_UpdateRequestConfig(TIMx,TIM_UpdateSource_Regular);
 505:Library/src/lcm32f06x_tim.c ****       TIMx->EGR = TIM_PSCReloadMode_Immediate;
 506:Library/src/lcm32f06x_tim.c ****       if ((TIMx->CR1 & TIM_CR1_DIR_Msk) != TIM_CR1_DIR_Msk)
 507:Library/src/lcm32f06x_tim.c ****       {
 508:Library/src/lcm32f06x_tim.c ****         while(TIMx->CNT != 0)
 509:Library/src/lcm32f06x_tim.c ****         {
 510:Library/src/lcm32f06x_tim.c ****           __NOP();__NOP();__NOP();__NOP();__NOP();
 511:Library/src/lcm32f06x_tim.c ****         }
 512:Library/src/lcm32f06x_tim.c ****       }
 513:Library/src/lcm32f06x_tim.c ****       else
 514:Library/src/lcm32f06x_tim.c ****       {
 515:Library/src/lcm32f06x_tim.c ****         while(TIMx->CNT != TIMx->ARR)
 516:Library/src/lcm32f06x_tim.c ****         {
 517:Library/src/lcm32f06x_tim.c ****           __NOP();__NOP();__NOP();__NOP();__NOP();
 518:Library/src/lcm32f06x_tim.c ****         }
 519:Library/src/lcm32f06x_tim.c ****       }
 520:Library/src/lcm32f06x_tim.c ****       TIM_UpdateRequestConfig(TIMx,TIM_UpdateSource_Global);
 521:Library/src/lcm32f06x_tim.c ****     }
 522:Library/src/lcm32f06x_tim.c ****   }
 523:Library/src/lcm32f06x_tim.c **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 28


 917              		.loc 1 523 1 view .LVU242
 918              		@ sp needed
 919 000c 7047     		bx	lr
 920              	.LVL41:
 921              	.L48:
 497:Library/src/lcm32f06x_tim.c ****     if (TIMx->CR1 & TIM_CR1_URS_Msk)
 922              		.loc 1 497 5 is_stmt 1 view .LVU243
 497:Library/src/lcm32f06x_tim.c ****     if (TIMx->CR1 & TIM_CR1_URS_Msk)
 923              		.loc 1 497 15 is_stmt 0 view .LVU244
 924 000e 9343     		bics	r3, r2
 925 0010 0360     		str	r3, [r0]
 498:Library/src/lcm32f06x_tim.c ****     {
 926              		.loc 1 498 5 is_stmt 1 view .LVU245
 498:Library/src/lcm32f06x_tim.c ****     {
 927              		.loc 1 498 19 is_stmt 0 view .LVU246
 928 0012 0423     		movs	r3, #4
 498:Library/src/lcm32f06x_tim.c ****     {
 929              		.loc 1 498 13 view .LVU247
 930 0014 0168     		ldr	r1, [r0]
 931              	.LVL42:
 498:Library/src/lcm32f06x_tim.c ****     {
 932              		.loc 1 498 8 view .LVU248
 933 0016 0B42     		tst	r3, r1
 934 0018 01D0     		beq	.L50
 500:Library/src/lcm32f06x_tim.c ****     }
 935              		.loc 1 500 7 is_stmt 1 view .LVU249
 500:Library/src/lcm32f06x_tim.c ****     }
 936              		.loc 1 500 17 is_stmt 0 view .LVU250
 937 001a 4261     		str	r2, [r0, #20]
 938 001c F6E7     		b	.L47
 939              	.L50:
 504:Library/src/lcm32f06x_tim.c ****       TIMx->EGR = TIM_PSCReloadMode_Immediate;
 940              		.loc 1 504 7 is_stmt 1 view .LVU251
 941              	.LVL43:
 942              	.LBB395:
 943              	.LBI395:
 380:Library/src/lcm32f06x_tim.c **** {
 944              		.loc 1 380 6 view .LVU252
 384:Library/src/lcm32f06x_tim.c ****   {
 945              		.loc 1 384 3 view .LVU253
 946              	.LBB396:
 947              	.LBI396:
 380:Library/src/lcm32f06x_tim.c **** {
 948              		.loc 1 380 6 view .LVU254
 949              	.LBB397:
 387:Library/src/lcm32f06x_tim.c ****   }
 950              		.loc 1 387 5 view .LVU255
 387:Library/src/lcm32f06x_tim.c ****   }
 951              		.loc 1 387 9 is_stmt 0 view .LVU256
 952 001e 0168     		ldr	r1, [r0]
 387:Library/src/lcm32f06x_tim.c ****   }
 953              		.loc 1 387 15 view .LVU257
 954 0020 0B43     		orrs	r3, r1
 955 0022 0360     		str	r3, [r0]
 956              	.LVL44:
 387:Library/src/lcm32f06x_tim.c ****   }
 957              		.loc 1 387 15 view .LVU258
ARM GAS  /tmp/ccWBHqpW.s 			page 29


 958              	.LBE397:
 959              	.LBE396:
 960              	.LBE395:
 505:Library/src/lcm32f06x_tim.c ****       if ((TIMx->CR1 & TIM_CR1_DIR_Msk) != TIM_CR1_DIR_Msk)
 961              		.loc 1 505 7 is_stmt 1 view .LVU259
 505:Library/src/lcm32f06x_tim.c ****       if ((TIMx->CR1 & TIM_CR1_DIR_Msk) != TIM_CR1_DIR_Msk)
 962              		.loc 1 505 17 is_stmt 0 view .LVU260
 963 0024 4261     		str	r2, [r0, #20]
 506:Library/src/lcm32f06x_tim.c ****       {
 964              		.loc 1 506 7 is_stmt 1 view .LVU261
 506:Library/src/lcm32f06x_tim.c ****       {
 965              		.loc 1 506 16 is_stmt 0 view .LVU262
 966 0026 0368     		ldr	r3, [r0]
 506:Library/src/lcm32f06x_tim.c ****       {
 967              		.loc 1 506 10 view .LVU263
 968 0028 DB06     		lsls	r3, r3, #27
 969 002a 14D4     		bmi	.L61
 508:Library/src/lcm32f06x_tim.c ****         {
 970              		.loc 1 508 25 is_stmt 1 view .LVU264
 508:Library/src/lcm32f06x_tim.c ****         {
 971              		.loc 1 508 19 is_stmt 0 view .LVU265
 972 002c 436A     		ldr	r3, [r0, #36]
 508:Library/src/lcm32f06x_tim.c ****         {
 973              		.loc 1 508 25 view .LVU266
 974 002e 002B     		cmp	r3, #0
 975 0030 07D0     		beq	.L53
 976              	.L54:
 510:Library/src/lcm32f06x_tim.c ****         }
 977              		.loc 1 510 11 is_stmt 1 view .LVU267
 978              		.syntax divided
 979              	@ 510 "Library/src/lcm32f06x_tim.c" 1
 980 0032 C046     		nop
 981              	@ 0 "" 2
 510:Library/src/lcm32f06x_tim.c ****         }
 982              		.loc 1 510 19 view .LVU268
 983              	@ 510 "Library/src/lcm32f06x_tim.c" 1
 984 0034 C046     		nop
 985              	@ 0 "" 2
 510:Library/src/lcm32f06x_tim.c ****         }
 986              		.loc 1 510 27 view .LVU269
 987              	@ 510 "Library/src/lcm32f06x_tim.c" 1
 988 0036 C046     		nop
 989              	@ 0 "" 2
 510:Library/src/lcm32f06x_tim.c ****         }
 990              		.loc 1 510 35 view .LVU270
 991              	@ 510 "Library/src/lcm32f06x_tim.c" 1
 992 0038 C046     		nop
 993              	@ 0 "" 2
 510:Library/src/lcm32f06x_tim.c ****         }
 994              		.loc 1 510 43 view .LVU271
 995              	@ 510 "Library/src/lcm32f06x_tim.c" 1
 996 003a C046     		nop
 997              	@ 0 "" 2
 508:Library/src/lcm32f06x_tim.c ****         {
 998              		.loc 1 508 25 view .LVU272
 508:Library/src/lcm32f06x_tim.c ****         {
 999              		.loc 1 508 19 is_stmt 0 view .LVU273
ARM GAS  /tmp/ccWBHqpW.s 			page 30


 1000              		.thumb
 1001              		.syntax unified
 1002 003c 436A     		ldr	r3, [r0, #36]
 508:Library/src/lcm32f06x_tim.c ****         {
 1003              		.loc 1 508 25 view .LVU274
 1004 003e 002B     		cmp	r3, #0
 1005 0040 F7D1     		bne	.L54
 1006              	.L53:
 520:Library/src/lcm32f06x_tim.c ****     }
 1007              		.loc 1 520 7 is_stmt 1 view .LVU275
 1008              	.LVL45:
 1009              	.LBB398:
 1010              	.LBI398:
 380:Library/src/lcm32f06x_tim.c **** {
 1011              		.loc 1 380 6 view .LVU276
 1012              	.LBB399:
 384:Library/src/lcm32f06x_tim.c ****   {
 1013              		.loc 1 384 3 view .LVU277
 392:Library/src/lcm32f06x_tim.c ****   }
 1014              		.loc 1 392 5 view .LVU278
 392:Library/src/lcm32f06x_tim.c ****   }
 1015              		.loc 1 392 15 is_stmt 0 view .LVU279
 1016 0042 0422     		movs	r2, #4
 392:Library/src/lcm32f06x_tim.c ****   }
 1017              		.loc 1 392 9 view .LVU280
 1018 0044 0368     		ldr	r3, [r0]
 392:Library/src/lcm32f06x_tim.c ****   }
 1019              		.loc 1 392 15 view .LVU281
 1020 0046 9343     		bics	r3, r2
 1021 0048 0360     		str	r3, [r0]
 1022              	.LVL46:
 392:Library/src/lcm32f06x_tim.c ****   }
 1023              		.loc 1 392 15 view .LVU282
 1024              	.LBE399:
 1025              	.LBE398:
 1026              		.loc 1 523 1 view .LVU283
 1027 004a DFE7     		b	.L47
 1028              	.L52:
 517:Library/src/lcm32f06x_tim.c ****         }
 1029              		.loc 1 517 11 is_stmt 1 view .LVU284
 1030              		.syntax divided
 1031              	@ 517 "Library/src/lcm32f06x_tim.c" 1
 1032 004c C046     		nop
 1033              	@ 0 "" 2
 517:Library/src/lcm32f06x_tim.c ****         }
 1034              		.loc 1 517 19 view .LVU285
 1035              	@ 517 "Library/src/lcm32f06x_tim.c" 1
 1036 004e C046     		nop
 1037              	@ 0 "" 2
 517:Library/src/lcm32f06x_tim.c ****         }
 1038              		.loc 1 517 27 view .LVU286
 1039              	@ 517 "Library/src/lcm32f06x_tim.c" 1
 1040 0050 C046     		nop
 1041              	@ 0 "" 2
 517:Library/src/lcm32f06x_tim.c ****         }
 1042              		.loc 1 517 35 view .LVU287
 1043              	@ 517 "Library/src/lcm32f06x_tim.c" 1
ARM GAS  /tmp/ccWBHqpW.s 			page 31


 1044 0052 C046     		nop
 1045              	@ 0 "" 2
 517:Library/src/lcm32f06x_tim.c ****         }
 1046              		.loc 1 517 43 view .LVU288
 1047              	@ 517 "Library/src/lcm32f06x_tim.c" 1
 1048 0054 C046     		nop
 1049              	@ 0 "" 2
 1050              		.thumb
 1051              		.syntax unified
 1052              	.L61:
 515:Library/src/lcm32f06x_tim.c ****         {
 1053              		.loc 1 515 25 view .LVU289
 515:Library/src/lcm32f06x_tim.c ****         {
 1054              		.loc 1 515 19 is_stmt 0 view .LVU290
 1055 0056 426A     		ldr	r2, [r0, #36]
 515:Library/src/lcm32f06x_tim.c ****         {
 1056              		.loc 1 515 32 view .LVU291
 1057 0058 C36A     		ldr	r3, [r0, #44]
 515:Library/src/lcm32f06x_tim.c ****         {
 1058              		.loc 1 515 25 view .LVU292
 1059 005a 9A42     		cmp	r2, r3
 1060 005c F6D1     		bne	.L52
 1061 005e F0E7     		b	.L53
 1062              		.cfi_endproc
 1063              	.LFE64:
 1065              		.section	.text.TIM_BDTRConfig,"ax",%progbits
 1066              		.align	1
 1067              		.p2align 2,,3
 1068              		.global	TIM_BDTRConfig
 1069              		.syntax unified
 1070              		.code	16
 1071              		.thumb_func
 1073              	TIM_BDTRConfig:
 1074              	.LVL47:
 1075              	.LFB65:
 524:Library/src/lcm32f06x_tim.c **** 
 525:Library/src/lcm32f06x_tim.c **** /**
 526:Library/src/lcm32f06x_tim.c ****   * @name   TIM_BDTRConfig
 527:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configure TIM peripheral devices according to the specified parameters
 528:Library/src/lcm32f06x_tim.c ****   *             in TIM-BDTRInitStructure to control brake configuration.
 529:Library/src/lcm32f06x_tim.c ****   *         CN: 根据TIM_BDTRInitStruct中的指定参数配置TIM外围设备，以控制刹车配置。
 530:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 531:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 532:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 533:Library/src/lcm32f06x_tim.c ****   * @param  TIM_BDTRInitStruct: 
 534:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_BDTRInitTypeDef structure
 535:Library/src/lcm32f06x_tim.c ****   *             that contains the configuration information for the specified TIM
 536:Library/src/lcm32f06x_tim.c ****   *         CN:指向TIM_BDTRInitTypeDef结构的指针，该结构包含指定TIM的配置信息。
 537:Library/src/lcm32f06x_tim.c ****   * @retval None
 538:Library/src/lcm32f06x_tim.c ****   */
 539:Library/src/lcm32f06x_tim.c **** void TIM_BDTRConfig(TIM_TypeDef *TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct)
 540:Library/src/lcm32f06x_tim.c **** {
 1076              		.loc 1 540 1 is_stmt 1 view -0
 1077              		.cfi_startproc
 1078              		@ args = 0, pretend = 0, frame = 0
 1079              		@ frame_needed = 0, uses_anonymous_args = 0
 1080              		@ link register save eliminated.
ARM GAS  /tmp/ccWBHqpW.s 			page 32


 541:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 542:Library/src/lcm32f06x_tim.c **** 
 543:Library/src/lcm32f06x_tim.c ****   /* Set the Lock level, the Break enable Bit and the Ploarity, the OSSR State,
 544:Library/src/lcm32f06x_tim.c ****      the OSSI State, the dead time value and the Automatic Output Enable Bit */
 545:Library/src/lcm32f06x_tim.c ****   TIMx->BDTR = (uint32_t)TIM_BDTRInitStruct->TIM_OSSRState | TIM_BDTRInitStruct->TIM_OSSIState |
 1081              		.loc 1 545 3 view .LVU294
 1082              		.loc 1 545 60 is_stmt 0 view .LVU295
 1083 0000 4A68     		ldr	r2, [r1, #4]
 1084 0002 0B68     		ldr	r3, [r1]
 546:Library/src/lcm32f06x_tim.c ****                TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime |
 547:Library/src/lcm32f06x_tim.c ****                TIM_BDTRInitStruct->TIM_BreakPolarity | TIM_BDTRInitStruct->TIM_AutomaticOutput | \
 548:Library/src/lcm32f06x_tim.c ****               (TIM_BDTRInitStruct->TIM_Break2Polarity << 12)  | (TIM_BDTRInitStruct->TIM_AutomaticO
 549:Library/src/lcm32f06x_tim.c ****   TIMx->BDTR |= TIM_BDTRInitStruct->TIM_Break | (TIM_BDTRInitStruct->TIM_Break2 << 12);
 550:Library/src/lcm32f06x_tim.c **** }
 1085              		.loc 1 550 1 view .LVU296
 1086              		@ sp needed
 545:Library/src/lcm32f06x_tim.c ****                TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime |
 1087              		.loc 1 545 60 view .LVU297
 1088 0004 1343     		orrs	r3, r2
 545:Library/src/lcm32f06x_tim.c ****                TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime |
 1089              		.loc 1 545 96 view .LVU298
 1090 0006 8A68     		ldr	r2, [r1, #8]
 1091 0008 1343     		orrs	r3, r2
 546:Library/src/lcm32f06x_tim.c ****                TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime |
 1092              		.loc 1 546 50 view .LVU299
 1093 000a CA68     		ldr	r2, [r1, #12]
 1094 000c 1343     		orrs	r3, r2
 547:Library/src/lcm32f06x_tim.c ****               (TIM_BDTRInitStruct->TIM_Break2Polarity << 12)  | (TIM_BDTRInitStruct->TIM_AutomaticO
 1095              		.loc 1 547 34 view .LVU300
 1096 000e 4A8A     		ldrh	r2, [r1, #18]
 546:Library/src/lcm32f06x_tim.c ****                TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime |
 1097              		.loc 1 546 85 view .LVU301
 1098 0010 1343     		orrs	r3, r2
 547:Library/src/lcm32f06x_tim.c ****               (TIM_BDTRInitStruct->TIM_Break2Polarity << 12)  | (TIM_BDTRInitStruct->TIM_AutomaticO
 1099              		.loc 1 547 74 view .LVU302
 1100 0012 8A8A     		ldrh	r2, [r1, #20]
 547:Library/src/lcm32f06x_tim.c ****               (TIM_BDTRInitStruct->TIM_Break2Polarity << 12)  | (TIM_BDTRInitStruct->TIM_AutomaticO
 1101              		.loc 1 547 54 view .LVU303
 1102 0014 1343     		orrs	r3, r2
 548:Library/src/lcm32f06x_tim.c ****   TIMx->BDTR |= TIM_BDTRInitStruct->TIM_Break | (TIM_BDTRInitStruct->TIM_Break2 << 12);
 1103              		.loc 1 548 55 view .LVU304
 1104 0016 0A8B     		ldrh	r2, [r1, #24]
 1105 0018 1203     		lsls	r2, r2, #12
 547:Library/src/lcm32f06x_tim.c ****               (TIM_BDTRInitStruct->TIM_Break2Polarity << 12)  | (TIM_BDTRInitStruct->TIM_AutomaticO
 1106              		.loc 1 547 96 view .LVU305
 1107 001a 1343     		orrs	r3, r2
 548:Library/src/lcm32f06x_tim.c ****   TIMx->BDTR |= TIM_BDTRInitStruct->TIM_Break | (TIM_BDTRInitStruct->TIM_Break2 << 12);
 1108              		.loc 1 548 107 view .LVU306
 1109 001c 4A8B     		ldrh	r2, [r1, #26]
 1110 001e 1203     		lsls	r2, r2, #12
 548:Library/src/lcm32f06x_tim.c ****   TIMx->BDTR |= TIM_BDTRInitStruct->TIM_Break | (TIM_BDTRInitStruct->TIM_Break2 << 12);
 1111              		.loc 1 548 63 view .LVU307
 1112 0020 1343     		orrs	r3, r2
 545:Library/src/lcm32f06x_tim.c ****                TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime |
 1113              		.loc 1 545 14 view .LVU308
 1114 0022 4364     		str	r3, [r0, #68]
 549:Library/src/lcm32f06x_tim.c **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 33


 1115              		.loc 1 549 3 is_stmt 1 view .LVU309
 549:Library/src/lcm32f06x_tim.c **** }
 1116              		.loc 1 549 68 is_stmt 0 view .LVU310
 1117 0024 CB8A     		ldrh	r3, [r1, #22]
 549:Library/src/lcm32f06x_tim.c **** }
 1118              		.loc 1 549 35 view .LVU311
 1119 0026 098A     		ldrh	r1, [r1, #16]
 1120              	.LVL48:
 549:Library/src/lcm32f06x_tim.c **** }
 1121              		.loc 1 549 7 view .LVU312
 1122 0028 426C     		ldr	r2, [r0, #68]
 549:Library/src/lcm32f06x_tim.c **** }
 1123              		.loc 1 549 81 view .LVU313
 1124 002a 1B03     		lsls	r3, r3, #12
 549:Library/src/lcm32f06x_tim.c **** }
 1125              		.loc 1 549 47 view .LVU314
 1126 002c 0B43     		orrs	r3, r1
 549:Library/src/lcm32f06x_tim.c **** }
 1127              		.loc 1 549 14 view .LVU315
 1128 002e 1343     		orrs	r3, r2
 1129 0030 4364     		str	r3, [r0, #68]
 1130              		.loc 1 550 1 view .LVU316
 1131 0032 7047     		bx	lr
 1132              		.cfi_endproc
 1133              	.LFE65:
 1135              		.section	.text.TIM_BDTRStructInit,"ax",%progbits
 1136              		.align	1
 1137              		.p2align 2,,3
 1138              		.global	TIM_BDTRStructInit
 1139              		.syntax unified
 1140              		.code	16
 1141              		.thumb_func
 1143              	TIM_BDTRStructInit:
 1144              	.LVL49:
 1145              	.LFB66:
 551:Library/src/lcm32f06x_tim.c **** 
 552:Library/src/lcm32f06x_tim.c **** /**
 553:Library/src/lcm32f06x_tim.c ****   * @name   TIM_BDTRStructInit
 554:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Fills each TIM_BDTRStructInit member with its default value.
 555:Library/src/lcm32f06x_tim.c ****   *         CN: 用默认值填充每个 TIM_BDTRStructInit 成员
 556:Library/src/lcm32f06x_tim.c ****   * @param  TIM_BDTRInitStruct:
 557:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_BDTRInitTypeDef structure that contains the 
 558:Library/src/lcm32f06x_tim.c ****   *             configuration information for the specified TIM Base peripheral.
 559:Library/src/lcm32f06x_tim.c ****   *         CN: 指向 TIM_BDTRInitTypeDef 结构的指针，该结构包含指定 TIM BDTR的配置信息
 560:Library/src/lcm32f06x_tim.c ****   * @retval None
 561:Library/src/lcm32f06x_tim.c ****   */
 562:Library/src/lcm32f06x_tim.c **** void TIM_BDTRStructInit(TIM_BDTRInitTypeDef *TIM_BDTRInitStruct)
 563:Library/src/lcm32f06x_tim.c **** {
 1146              		.loc 1 563 1 is_stmt 1 view -0
 1147              		.cfi_startproc
 1148              		@ args = 0, pretend = 0, frame = 0
 1149              		@ frame_needed = 0, uses_anonymous_args = 0
 1150              		@ link register save eliminated.
 564:Library/src/lcm32f06x_tim.c ****   /* Set the default configuration */
 565:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_OSSRState = TIM_OSSRState_Disable;
 1151              		.loc 1 565 3 view .LVU318
 1152              		.loc 1 565 37 is_stmt 0 view .LVU319
ARM GAS  /tmp/ccWBHqpW.s 			page 34


 1153 0000 0023     		movs	r3, #0
 566:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable;
 567:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_LOCKLevel = TIM_LOCKLevel_OFF;
 568:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_DeadTime = 0x00;
 569:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_Break = TIM_Break_Disable;
 570:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_BreakPolarity = TIM_BreakPolarity_Low;
 571:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
 572:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_Break2 = TIM_Break_Disable;
 573:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_Break2Polarity = TIM_BreakPolarity_Low;
 574:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_AutomaticOutput2 = TIM_AutomaticOutput_Disable;
 575:Library/src/lcm32f06x_tim.c **** }
 1154              		.loc 1 575 1 view .LVU320
 1155              		@ sp needed
 565:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable;
 1156              		.loc 1 565 37 view .LVU321
 1157 0002 0360     		str	r3, [r0]
 566:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable;
 1158              		.loc 1 566 3 is_stmt 1 view .LVU322
 566:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable;
 1159              		.loc 1 566 37 is_stmt 0 view .LVU323
 1160 0004 4360     		str	r3, [r0, #4]
 567:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_DeadTime = 0x00;
 1161              		.loc 1 567 3 is_stmt 1 view .LVU324
 567:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_DeadTime = 0x00;
 1162              		.loc 1 567 37 is_stmt 0 view .LVU325
 1163 0006 8360     		str	r3, [r0, #8]
 568:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_Break = TIM_Break_Disable;
 1164              		.loc 1 568 3 is_stmt 1 view .LVU326
 568:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_Break = TIM_Break_Disable;
 1165              		.loc 1 568 36 is_stmt 0 view .LVU327
 1166 0008 C360     		str	r3, [r0, #12]
 569:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_BreakPolarity = TIM_BreakPolarity_Low;
 1167              		.loc 1 569 3 is_stmt 1 view .LVU328
 570:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
 1168              		.loc 1 570 3 view .LVU329
 571:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_Break2 = TIM_Break_Disable;
 1169              		.loc 1 571 3 view .LVU330
 572:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_Break2Polarity = TIM_BreakPolarity_Low;
 1170              		.loc 1 572 3 view .LVU331
 573:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_AutomaticOutput2 = TIM_AutomaticOutput_Disable;
 1171              		.loc 1 573 3 view .LVU332
 574:Library/src/lcm32f06x_tim.c **** }
 1172              		.loc 1 574 3 view .LVU333
 569:Library/src/lcm32f06x_tim.c ****   TIM_BDTRInitStruct->TIM_BreakPolarity = TIM_BreakPolarity_Low;
 1173              		.loc 1 569 33 is_stmt 0 view .LVU334
 1174 000a 0361     		str	r3, [r0, #16]
 1175 000c 4361     		str	r3, [r0, #20]
 1176 000e 8361     		str	r3, [r0, #24]
 1177              		.loc 1 575 1 view .LVU335
 1178 0010 7047     		bx	lr
 1179              		.cfi_endproc
 1180              	.LFE66:
 1182 0012 C046     		.section	.text.TIM_CtrlPWMOutputs,"ax",%progbits
 1183              		.align	1
 1184              		.p2align 2,,3
 1185              		.global	TIM_CtrlPWMOutputs
 1186              		.syntax unified
ARM GAS  /tmp/ccWBHqpW.s 			page 35


 1187              		.code	16
 1188              		.thumb_func
 1190              	TIM_CtrlPWMOutputs:
 1191              	.LVL50:
 1192              	.LFB67:
 576:Library/src/lcm32f06x_tim.c **** 
 577:Library/src/lcm32f06x_tim.c **** /**
 578:Library/src/lcm32f06x_tim.c ****   * @name   TIM_CtrlPWMOutputs
 579:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIM peripheral Main Outputs.
 580:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用TIM外围设备主输出。
 581:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 582:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 583:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 584:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
 585:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the TIM peripheral Main Outputs.
 586:Library/src/lcm32f06x_tim.c ****   *         CN: TIM外围设备主输出的新状态。。
 587:Library/src/lcm32f06x_tim.c ****   * @retval None
 588:Library/src/lcm32f06x_tim.c ****   */
 589:Library/src/lcm32f06x_tim.c **** void TIM_CtrlPWMOutputs(TIM_TypeDef *TIMx, FunctionalState NewState)
 590:Library/src/lcm32f06x_tim.c **** {
 1193              		.loc 1 590 1 is_stmt 1 view -0
 1194              		.cfi_startproc
 1195              		@ args = 0, pretend = 0, frame = 0
 1196              		@ frame_needed = 0, uses_anonymous_args = 0
 1197              		@ link register save eliminated.
 591:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 592:Library/src/lcm32f06x_tim.c **** 
 593:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 1198              		.loc 1 593 3 view .LVU337
 1199              		.loc 1 593 6 is_stmt 0 view .LVU338
 1200 0000 0029     		cmp	r1, #0
 1201 0002 05D0     		beq	.L65
 594:Library/src/lcm32f06x_tim.c ****   {
 595:Library/src/lcm32f06x_tim.c ****     /* Enable the TIM Main Output */
 596:Library/src/lcm32f06x_tim.c ****     TIMx->BDTR |= TIM_BDTR_MOE_Msk;
 1202              		.loc 1 596 5 is_stmt 1 view .LVU339
 1203              		.loc 1 596 16 is_stmt 0 view .LVU340
 1204 0004 8023     		movs	r3, #128
 1205              		.loc 1 596 9 view .LVU341
 1206 0006 426C     		ldr	r2, [r0, #68]
 1207              		.loc 1 596 16 view .LVU342
 1208 0008 1B02     		lsls	r3, r3, #8
 1209 000a 1343     		orrs	r3, r2
 1210 000c 4364     		str	r3, [r0, #68]
 1211              	.L64:
 597:Library/src/lcm32f06x_tim.c ****   }
 598:Library/src/lcm32f06x_tim.c ****   else
 599:Library/src/lcm32f06x_tim.c ****   {
 600:Library/src/lcm32f06x_tim.c ****     /* Disable the TIM Main Output */
 601:Library/src/lcm32f06x_tim.c ****     TIMx->BDTR &= (uint32_t)(~((uint32_t)TIM_BDTR_MOE_Msk));
 602:Library/src/lcm32f06x_tim.c ****   }
 603:Library/src/lcm32f06x_tim.c **** }
 1212              		.loc 1 603 1 view .LVU343
 1213              		@ sp needed
 1214 000e 7047     		bx	lr
 1215              	.L65:
 601:Library/src/lcm32f06x_tim.c ****   }
ARM GAS  /tmp/ccWBHqpW.s 			page 36


 1216              		.loc 1 601 5 is_stmt 1 view .LVU344
 601:Library/src/lcm32f06x_tim.c ****   }
 1217              		.loc 1 601 9 is_stmt 0 view .LVU345
 1218 0010 436C     		ldr	r3, [r0, #68]
 601:Library/src/lcm32f06x_tim.c ****   }
 1219              		.loc 1 601 16 view .LVU346
 1220 0012 024A     		ldr	r2, .L67
 1221 0014 1340     		ands	r3, r2
 1222 0016 4364     		str	r3, [r0, #68]
 1223              		.loc 1 603 1 view .LVU347
 1224 0018 F9E7     		b	.L64
 1225              	.L68:
 1226 001a C046     		.align	2
 1227              	.L67:
 1228 001c FF7FFFFF 		.word	-32769
 1229              		.cfi_endproc
 1230              	.LFE67:
 1232              		.section	.text.TIM_OC1Init,"ax",%progbits
 1233              		.align	1
 1234              		.p2align 2,,3
 1235              		.global	TIM_OC1Init
 1236              		.syntax unified
 1237              		.code	16
 1238              		.thumb_func
 1240              	TIM_OC1Init:
 1241              	.LVL51:
 1242              	.LFB68:
 604:Library/src/lcm32f06x_tim.c **** 
 605:Library/src/lcm32f06x_tim.c **** /**
 606:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC1Init
 607:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Initializes the TIMx Channel1 according to the specified
 608:Library/src/lcm32f06x_tim.c ****   *             parameters in the TIM_OCInitStruct.
 609:Library/src/lcm32f06x_tim.c ****   *         CN: 根据TIM_OCInitStruct中指定的参数初始化TIM 通道1。
 610:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 611:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
 612:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
 613:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCInitStruct: 
 614:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_OCInitTypeDef structure
 615:Library/src/lcm32f06x_tim.c ****   *             that contains the configuration information for the specified TIM
 616:Library/src/lcm32f06x_tim.c ****   *         CN:指向TIM_OCInitTypeDef结构的指针，该结构包含指定TIM的配置信息。
 617:Library/src/lcm32f06x_tim.c ****   * @retval None
 618:Library/src/lcm32f06x_tim.c ****   */
 619:Library/src/lcm32f06x_tim.c **** void TIM_OC1Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct)
 620:Library/src/lcm32f06x_tim.c **** {
 1243              		.loc 1 620 1 is_stmt 1 view -0
 1244              		.cfi_startproc
 1245              		@ args = 0, pretend = 0, frame = 0
 1246              		@ frame_needed = 0, uses_anonymous_args = 0
 621:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
 1247              		.loc 1 621 3 view .LVU349
 622:Library/src/lcm32f06x_tim.c **** 
 623:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 624:Library/src/lcm32f06x_tim.c **** 
 625:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 1: Reset the CC1E Bit */
 626:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t)(~(uint32_t)TIM_CCER_CC1E_Msk);
 1248              		.loc 1 626 3 view .LVU350
 1249              		.loc 1 626 14 is_stmt 0 view .LVU351
ARM GAS  /tmp/ccWBHqpW.s 			page 37


 1250 0000 0122     		movs	r2, #1
 1251              		.loc 1 626 7 view .LVU352
 1252 0002 036A     		ldr	r3, [r0, #32]
 620:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
 1253              		.loc 1 620 1 view .LVU353
 1254 0004 70B5     		push	{r4, r5, r6, lr}
 1255              	.LCFI0:
 1256              		.cfi_def_cfa_offset 16
 1257              		.cfi_offset 4, -16
 1258              		.cfi_offset 5, -12
 1259              		.cfi_offset 6, -8
 1260              		.cfi_offset 14, -4
 1261              		.loc 1 626 14 view .LVU354
 1262 0006 9343     		bics	r3, r2
 1263 0008 0362     		str	r3, [r0, #32]
 627:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCER register value */
 628:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 1264              		.loc 1 628 3 is_stmt 1 view .LVU355
 629:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CR2 register value */
 630:Library/src/lcm32f06x_tim.c ****   tmpcr2 = TIMx->CR2;
 631:Library/src/lcm32f06x_tim.c **** 
 632:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR1 register value */
 633:Library/src/lcm32f06x_tim.c ****   tmpccmrx = TIMx->CCMR1;
 634:Library/src/lcm32f06x_tim.c **** 
 635:Library/src/lcm32f06x_tim.c ****   /* Reset the Output Compare Mode Bits */
 636:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR1_Output_OC1M_Msk));
 637:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR1_Output_CC1S_Msk));
 1265              		.loc 1 637 12 is_stmt 0 view .LVU356
 1266 000a 7323     		movs	r3, #115
 628:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CR2 register value */
 1267              		.loc 1 628 11 view .LVU357
 1268 000c 046A     		ldr	r4, [r0, #32]
 1269              	.LVL52:
 630:Library/src/lcm32f06x_tim.c **** 
 1270              		.loc 1 630 3 is_stmt 1 view .LVU358
 630:Library/src/lcm32f06x_tim.c **** 
 1271              		.loc 1 630 10 is_stmt 0 view .LVU359
 1272 000e 4268     		ldr	r2, [r0, #4]
 1273              	.LVL53:
 633:Library/src/lcm32f06x_tim.c **** 
 1274              		.loc 1 633 3 is_stmt 1 view .LVU360
 633:Library/src/lcm32f06x_tim.c **** 
 1275              		.loc 1 633 12 is_stmt 0 view .LVU361
 1276 0010 8569     		ldr	r5, [r0, #24]
 1277              	.LVL54:
 636:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR1_Output_CC1S_Msk));
 1278              		.loc 1 636 3 is_stmt 1 view .LVU362
 1279              		.loc 1 637 3 view .LVU363
 638:Library/src/lcm32f06x_tim.c **** 
 639:Library/src/lcm32f06x_tim.c ****   /* Select the Output Compare Mode */
 640:Library/src/lcm32f06x_tim.c ****   tmpccmrx |= TIM_OCInitStruct->TIM_OCMode;
 641:Library/src/lcm32f06x_tim.c **** 
 642:Library/src/lcm32f06x_tim.c ****   /* Reset the Output Polarity level */
 643:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC1P_Msk));
 644:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 645:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCInitStruct->TIM_OCPolarity;
 646:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 38


 647:Library/src/lcm32f06x_tim.c ****   /* Set the Output State */
 648:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCInitStruct->TIM_OutputState;
 1280              		.loc 1 648 11 is_stmt 0 view .LVU364
 1281 0012 4E68     		ldr	r6, [r1, #4]
 637:Library/src/lcm32f06x_tim.c **** 
 1282              		.loc 1 637 12 view .LVU365
 1283 0014 9D43     		bics	r5, r3
 1284              	.LVL55:
 640:Library/src/lcm32f06x_tim.c **** 
 1285              		.loc 1 640 3 is_stmt 1 view .LVU366
 640:Library/src/lcm32f06x_tim.c **** 
 1286              		.loc 1 640 12 is_stmt 0 view .LVU367
 1287 0016 0B68     		ldr	r3, [r1]
 1288 0018 1D43     		orrs	r5, r3
 1289              	.LVL56:
 643:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 1290              		.loc 1 643 3 is_stmt 1 view .LVU368
 643:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 1291              		.loc 1 643 11 is_stmt 0 view .LVU369
 1292 001a 0223     		movs	r3, #2
 1293 001c 9C43     		bics	r4, r3
 1294              	.LVL57:
 645:Library/src/lcm32f06x_tim.c **** 
 1295              		.loc 1 645 3 is_stmt 1 view .LVU370
 1296              		.loc 1 648 3 view .LVU371
 1297              		.loc 1 648 11 is_stmt 0 view .LVU372
 1298 001e 0B69     		ldr	r3, [r1, #16]
 1299 0020 3343     		orrs	r3, r6
 1300 0022 2343     		orrs	r3, r4
 1301              	.LVL58:
 649:Library/src/lcm32f06x_tim.c **** 
 650:Library/src/lcm32f06x_tim.c ****   /* Reset the Ouput Compare and Output Compare IDLE State */
 651:Library/src/lcm32f06x_tim.c ****   tmpcr2 &= (uint32_t)(~((uint32_t)TIM_CR2_OIS1_Msk));
 1302              		.loc 1 651 3 is_stmt 1 view .LVU373
 1303              		.loc 1 651 10 is_stmt 0 view .LVU374
 1304 0024 104C     		ldr	r4, .L72
 1305 0026 2240     		ands	r2, r4
 1306              	.LVL59:
 652:Library/src/lcm32f06x_tim.c ****   /* Set the Output Idle state */
 653:Library/src/lcm32f06x_tim.c ****   tmpcr2 |= TIM_OCInitStruct->TIM_OCIdleState;
 1307              		.loc 1 653 3 is_stmt 1 view .LVU375
 1308              		.loc 1 653 10 is_stmt 0 view .LVU376
 1309 0028 8C69     		ldr	r4, [r1, #24]
 1310 002a 2243     		orrs	r2, r4
 1311              	.LVL60:
 654:Library/src/lcm32f06x_tim.c **** 
 655:Library/src/lcm32f06x_tim.c ****   if ((TIMx == TIM1) || (TIMx == TIM15) || (TIMx == TIM16) || (TIMx == TIM17))
 1312              		.loc 1 655 3 is_stmt 1 view .LVU377
 1313              		.loc 1 655 6 is_stmt 0 view .LVU378
 1314 002c 0F4C     		ldr	r4, .L72+4
 1315 002e A042     		cmp	r0, r4
 1316 0030 08D0     		beq	.L70
 1317              		.loc 1 655 22 discriminator 1 view .LVU379
 1318 0032 0F4C     		ldr	r4, .L72+8
 1319 0034 A042     		cmp	r0, r4
 1320 0036 05D0     		beq	.L70
 1321              		.loc 1 655 41 discriminator 2 view .LVU380
ARM GAS  /tmp/ccWBHqpW.s 			page 39


 1322 0038 0E4C     		ldr	r4, .L72+12
 1323 003a A042     		cmp	r0, r4
 1324 003c 02D0     		beq	.L70
 1325              		.loc 1 655 60 discriminator 3 view .LVU381
 1326 003e 0E4C     		ldr	r4, .L72+16
 1327 0040 A042     		cmp	r0, r4
 1328 0042 0BD1     		bne	.L71
 1329              	.L70:
 656:Library/src/lcm32f06x_tim.c ****   {
 657:Library/src/lcm32f06x_tim.c **** 
 658:Library/src/lcm32f06x_tim.c ****     /* Reset the Output N Polarity level */
 659:Library/src/lcm32f06x_tim.c ****     tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC1NP_Msk));
 1330              		.loc 1 659 5 is_stmt 1 view .LVU382
 1331              		.loc 1 659 13 is_stmt 0 view .LVU383
 1332 0044 0824     		movs	r4, #8
 1333 0046 A343     		bics	r3, r4
 1334              	.LVL61:
 660:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 661:Library/src/lcm32f06x_tim.c ****     tmpccer |= TIM_OCInitStruct->TIM_OCNPolarity;
 1335              		.loc 1 661 5 is_stmt 1 view .LVU384
 1336              		.loc 1 661 13 is_stmt 0 view .LVU385
 1337 0048 4C69     		ldr	r4, [r1, #20]
 1338 004a 2343     		orrs	r3, r4
 1339              	.LVL62:
 662:Library/src/lcm32f06x_tim.c **** 
 663:Library/src/lcm32f06x_tim.c ****     /* Reset the Output N State */
 664:Library/src/lcm32f06x_tim.c ****     tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC1NE_Msk));
 1340              		.loc 1 664 5 is_stmt 1 view .LVU386
 1341              		.loc 1 664 13 is_stmt 0 view .LVU387
 1342 004c 0424     		movs	r4, #4
 1343 004e A343     		bics	r3, r4
 1344              	.LVL63:
 665:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 666:Library/src/lcm32f06x_tim.c ****     tmpccer |= TIM_OCInitStruct->TIM_OutputNState;
 1345              		.loc 1 666 5 is_stmt 1 view .LVU388
 1346              		.loc 1 666 13 is_stmt 0 view .LVU389
 1347 0050 8C68     		ldr	r4, [r1, #8]
 1348 0052 2343     		orrs	r3, r4
 1349              	.LVL64:
 667:Library/src/lcm32f06x_tim.c **** 
 668:Library/src/lcm32f06x_tim.c ****     /* Reset the Ouput Compare and Output Compare IDLE N State */
 669:Library/src/lcm32f06x_tim.c ****     tmpcr2 &= (uint32_t)(~((uint32_t)TIM_CR2_OIS1N_Msk));
 1350              		.loc 1 669 5 is_stmt 1 view .LVU390
 1351              		.loc 1 669 12 is_stmt 0 view .LVU391
 1352 0054 094C     		ldr	r4, .L72+20
 1353 0056 1440     		ands	r4, r2
 1354              	.LVL65:
 670:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Idle state */
 671:Library/src/lcm32f06x_tim.c ****     tmpcr2 |= TIM_OCInitStruct->TIM_OCNIdleState;
 1355              		.loc 1 671 5 is_stmt 1 view .LVU392
 1356              		.loc 1 671 12 is_stmt 0 view .LVU393
 1357 0058 CA69     		ldr	r2, [r1, #28]
 1358 005a 2243     		orrs	r2, r4
 1359              	.LVL66:
 1360              	.L71:
 672:Library/src/lcm32f06x_tim.c ****   }
 673:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CR2 */
ARM GAS  /tmp/ccWBHqpW.s 			page 40


 674:Library/src/lcm32f06x_tim.c ****   TIMx->CR2 = tmpcr2;
 1361              		.loc 1 674 3 is_stmt 1 view .LVU394
 1362              		.loc 1 674 13 is_stmt 0 view .LVU395
 1363 005c 4260     		str	r2, [r0, #4]
 675:Library/src/lcm32f06x_tim.c **** 
 676:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 */
 677:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmrx;
 1364              		.loc 1 677 3 is_stmt 1 view .LVU396
 678:Library/src/lcm32f06x_tim.c **** 
 679:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare Register value */
 680:Library/src/lcm32f06x_tim.c ****   TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse;
 1365              		.loc 1 680 32 is_stmt 0 view .LVU397
 1366 005e CA68     		ldr	r2, [r1, #12]
 1367              	.LVL67:
 677:Library/src/lcm32f06x_tim.c **** 
 1368              		.loc 1 677 15 view .LVU398
 1369 0060 8561     		str	r5, [r0, #24]
 1370              	.LVL68:
 1371              		.loc 1 680 3 is_stmt 1 view .LVU399
 681:Library/src/lcm32f06x_tim.c **** 
 682:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER */
 683:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 684:Library/src/lcm32f06x_tim.c **** }
 1372              		.loc 1 684 1 is_stmt 0 view .LVU400
 1373              		@ sp needed
 680:Library/src/lcm32f06x_tim.c **** 
 1374              		.loc 1 680 14 view .LVU401
 1375 0062 4263     		str	r2, [r0, #52]
 683:Library/src/lcm32f06x_tim.c **** }
 1376              		.loc 1 683 3 is_stmt 1 view .LVU402
 683:Library/src/lcm32f06x_tim.c **** }
 1377              		.loc 1 683 14 is_stmt 0 view .LVU403
 1378 0064 0362     		str	r3, [r0, #32]
 1379              	.LVL69:
 1380              		.loc 1 684 1 view .LVU404
 1381 0066 70BD     		pop	{r4, r5, r6, pc}
 1382              	.L73:
 1383              		.align	2
 1384              	.L72:
 1385 0068 FFFEFFFF 		.word	-257
 1386 006c 00000140 		.word	1073807360
 1387 0070 00B00140 		.word	1073852416
 1388 0074 00C00140 		.word	1073856512
 1389 0078 00E00140 		.word	1073864704
 1390 007c FFFDFFFF 		.word	-513
 1391              		.cfi_endproc
 1392              	.LFE68:
 1394              		.section	.text.TIM_OC2Init,"ax",%progbits
 1395              		.align	1
 1396              		.p2align 2,,3
 1397              		.global	TIM_OC2Init
 1398              		.syntax unified
 1399              		.code	16
 1400              		.thumb_func
 1402              	TIM_OC2Init:
 1403              	.LVL70:
 1404              	.LFB69:
ARM GAS  /tmp/ccWBHqpW.s 			page 41


 685:Library/src/lcm32f06x_tim.c **** 
 686:Library/src/lcm32f06x_tim.c **** /**
 687:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC2Init
 688:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Initializes the TIMx Channel2 according to the specified
 689:Library/src/lcm32f06x_tim.c ****   *             parameters in the TIM_OCInitStruct.
 690:Library/src/lcm32f06x_tim.c ****   *         CN: 根据TIM_OCInitStruct中指定的参数初始化TIM 通道2。
 691:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 692:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15 or 16 to select the TIM peripheral.
 693:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
 694:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCInitStruct: 
 695:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_OCInitTypeDef structure
 696:Library/src/lcm32f06x_tim.c ****   *             that contains the configuration information for the specified TIM
 697:Library/src/lcm32f06x_tim.c ****   *         CN:指向TIM_OCInitTypeDef结构的指针，该结构包含指定TIM的配置信息。
 698:Library/src/lcm32f06x_tim.c ****   * @retval None
 699:Library/src/lcm32f06x_tim.c ****   */
 700:Library/src/lcm32f06x_tim.c **** void TIM_OC2Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct)
 701:Library/src/lcm32f06x_tim.c **** {
 1405              		.loc 1 701 1 is_stmt 1 view -0
 1406              		.cfi_startproc
 1407              		@ args = 0, pretend = 0, frame = 0
 1408              		@ frame_needed = 0, uses_anonymous_args = 0
 702:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
 1409              		.loc 1 702 3 view .LVU406
 703:Library/src/lcm32f06x_tim.c **** 
 704:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 705:Library/src/lcm32f06x_tim.c **** 
 706:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 2: Reset the CC2E Bit */
 707:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t)(~((uint32_t)TIM_CCER_CC2E_Msk));
 1410              		.loc 1 707 3 view .LVU407
 1411              		.loc 1 707 14 is_stmt 0 view .LVU408
 1412 0000 1022     		movs	r2, #16
 1413              		.loc 1 707 7 view .LVU409
 1414 0002 036A     		ldr	r3, [r0, #32]
 701:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
 1415              		.loc 1 701 1 view .LVU410
 1416 0004 70B5     		push	{r4, r5, r6, lr}
 1417              	.LCFI1:
 1418              		.cfi_def_cfa_offset 16
 1419              		.cfi_offset 4, -16
 1420              		.cfi_offset 5, -12
 1421              		.cfi_offset 6, -8
 1422              		.cfi_offset 14, -4
 1423              		.loc 1 707 14 view .LVU411
 1424 0006 9343     		bics	r3, r2
 1425 0008 0362     		str	r3, [r0, #32]
 708:Library/src/lcm32f06x_tim.c **** 
 709:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCER register value */
 710:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 1426              		.loc 1 710 3 is_stmt 1 view .LVU412
 1427              		.loc 1 710 11 is_stmt 0 view .LVU413
 1428 000a 026A     		ldr	r2, [r0, #32]
 1429              	.LVL71:
 711:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CR2 register value */
 712:Library/src/lcm32f06x_tim.c ****   tmpcr2 = TIMx->CR2;
 1430              		.loc 1 712 3 is_stmt 1 view .LVU414
 713:Library/src/lcm32f06x_tim.c **** 
 714:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR1 register value */
ARM GAS  /tmp/ccWBHqpW.s 			page 42


 715:Library/src/lcm32f06x_tim.c ****   tmpccmrx = TIMx->CCMR1;
 716:Library/src/lcm32f06x_tim.c **** 
 717:Library/src/lcm32f06x_tim.c ****   /* Reset the Output Compare mode and Capture/Compare selection Bits */
 718:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR1_Output_OC2M_Msk));
 719:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR1_Output_CC2S_Msk));
 1431              		.loc 1 719 12 is_stmt 0 view .LVU415
 1432 000c 174C     		ldr	r4, .L77
 712:Library/src/lcm32f06x_tim.c **** 
 1433              		.loc 1 712 10 view .LVU416
 1434 000e 4568     		ldr	r5, [r0, #4]
 1435              	.LVL72:
 715:Library/src/lcm32f06x_tim.c **** 
 1436              		.loc 1 715 3 is_stmt 1 view .LVU417
 715:Library/src/lcm32f06x_tim.c **** 
 1437              		.loc 1 715 12 is_stmt 0 view .LVU418
 1438 0010 8369     		ldr	r3, [r0, #24]
 1439              	.LVL73:
 718:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR1_Output_CC2S_Msk));
 1440              		.loc 1 718 3 is_stmt 1 view .LVU419
 1441              		.loc 1 719 3 view .LVU420
 720:Library/src/lcm32f06x_tim.c **** 
 721:Library/src/lcm32f06x_tim.c ****   /* Select the Output Compare Mode */
 722:Library/src/lcm32f06x_tim.c ****   tmpccmrx |= (uint32_t)(TIM_OCInitStruct->TIM_OCMode << 8);
 723:Library/src/lcm32f06x_tim.c **** 
 724:Library/src/lcm32f06x_tim.c ****   /* Reset the Output Polarity level */
 725:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC2P_Msk));
 726:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 727:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OCPolarity << 4);
 728:Library/src/lcm32f06x_tim.c **** 
 729:Library/src/lcm32f06x_tim.c ****   /* Set the Output State */
 730:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OutputState << 4);
 1442              		.loc 1 730 11 is_stmt 0 view .LVU421
 1443 0012 4E68     		ldr	r6, [r1, #4]
 719:Library/src/lcm32f06x_tim.c **** 
 1444              		.loc 1 719 12 view .LVU422
 1445 0014 2340     		ands	r3, r4
 1446              	.LVL74:
 722:Library/src/lcm32f06x_tim.c **** 
 1447              		.loc 1 722 3 is_stmt 1 view .LVU423
 722:Library/src/lcm32f06x_tim.c **** 
 1448              		.loc 1 722 15 is_stmt 0 view .LVU424
 1449 0016 0C68     		ldr	r4, [r1]
 1450 0018 2402     		lsls	r4, r4, #8
 722:Library/src/lcm32f06x_tim.c **** 
 1451              		.loc 1 722 12 view .LVU425
 1452 001a 1C43     		orrs	r4, r3
 1453              	.LVL75:
 725:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 1454              		.loc 1 725 3 is_stmt 1 view .LVU426
 725:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 1455              		.loc 1 725 11 is_stmt 0 view .LVU427
 1456 001c 2023     		movs	r3, #32
 1457 001e 9A43     		bics	r2, r3
 1458              	.LVL76:
 727:Library/src/lcm32f06x_tim.c **** 
 1459              		.loc 1 727 3 is_stmt 1 view .LVU428
 1460              		.loc 1 730 3 view .LVU429
ARM GAS  /tmp/ccWBHqpW.s 			page 43


 1461              		.loc 1 730 11 is_stmt 0 view .LVU430
 1462 0020 0B69     		ldr	r3, [r1, #16]
 1463 0022 3343     		orrs	r3, r6
 1464 0024 1B01     		lsls	r3, r3, #4
 1465 0026 1343     		orrs	r3, r2
 1466              	.LVL77:
 731:Library/src/lcm32f06x_tim.c ****   /* Reset the Ouput Compare and Output Compare IDLE State */
 732:Library/src/lcm32f06x_tim.c ****   tmpcr2 &= (uint32_t)(~((uint32_t)TIM_CR2_OIS2_Msk));
 1467              		.loc 1 732 3 is_stmt 1 view .LVU431
 1468              		.loc 1 732 10 is_stmt 0 view .LVU432
 1469 0028 114A     		ldr	r2, .L77+4
 1470 002a 1540     		ands	r5, r2
 1471              	.LVL78:
 733:Library/src/lcm32f06x_tim.c **** 
 734:Library/src/lcm32f06x_tim.c ****   /* Set the Output Idle state */
 735:Library/src/lcm32f06x_tim.c ****   tmpcr2 |= (uint32_t)(TIM_OCInitStruct->TIM_OCIdleState << 2);
 1472              		.loc 1 735 3 is_stmt 1 view .LVU433
 1473              		.loc 1 735 13 is_stmt 0 view .LVU434
 1474 002c 8A69     		ldr	r2, [r1, #24]
 1475 002e 9200     		lsls	r2, r2, #2
 1476              		.loc 1 735 10 view .LVU435
 1477 0030 2A43     		orrs	r2, r5
 1478              	.LVL79:
 736:Library/src/lcm32f06x_tim.c **** 
 737:Library/src/lcm32f06x_tim.c ****   if ((TIMx == TIM1) || (TIMx == TIM15))
 1479              		.loc 1 737 3 is_stmt 1 view .LVU436
 1480              		.loc 1 737 6 is_stmt 0 view .LVU437
 1481 0032 104D     		ldr	r5, .L77+8
 1482 0034 A842     		cmp	r0, r5
 1483 0036 08D0     		beq	.L75
 1484              		.loc 1 737 22 discriminator 1 view .LVU438
 1485 0038 0F4D     		ldr	r5, .L77+12
 1486 003a A842     		cmp	r0, r5
 1487 003c 05D0     		beq	.L75
 1488              	.LVL80:
 1489              	.L76:
 738:Library/src/lcm32f06x_tim.c ****   {
 739:Library/src/lcm32f06x_tim.c ****     /* Check the parameters */
 740:Library/src/lcm32f06x_tim.c **** 
 741:Library/src/lcm32f06x_tim.c ****     /* Reset the Output N Polarity level */
 742:Library/src/lcm32f06x_tim.c ****     tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC2NP_Msk));
 743:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 744:Library/src/lcm32f06x_tim.c ****     tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OCNPolarity << 4);
 745:Library/src/lcm32f06x_tim.c **** 
 746:Library/src/lcm32f06x_tim.c ****     /* Reset the Output N State */
 747:Library/src/lcm32f06x_tim.c ****     tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC2NE_Msk));
 748:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 749:Library/src/lcm32f06x_tim.c ****     tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OutputNState << 4);
 750:Library/src/lcm32f06x_tim.c **** 
 751:Library/src/lcm32f06x_tim.c ****     /* Reset the Output Compare N IDLE State */
 752:Library/src/lcm32f06x_tim.c ****     tmpcr2 &= (uint32_t)(~((uint32_t)TIM_CR2_OIS2N_Msk));
 753:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Idle state */
 754:Library/src/lcm32f06x_tim.c ****     tmpcr2 |= (uint32_t)(TIM_OCInitStruct->TIM_OCNIdleState << 2);
 755:Library/src/lcm32f06x_tim.c ****   }
 756:Library/src/lcm32f06x_tim.c **** 
 757:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CR2 */
 758:Library/src/lcm32f06x_tim.c ****   TIMx->CR2 = tmpcr2;
ARM GAS  /tmp/ccWBHqpW.s 			page 44


 1490              		.loc 1 758 3 is_stmt 1 view .LVU439
 759:Library/src/lcm32f06x_tim.c **** 
 760:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 */
 761:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmrx;
 762:Library/src/lcm32f06x_tim.c **** 
 763:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare Register value */
 764:Library/src/lcm32f06x_tim.c ****   TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse;
 765:Library/src/lcm32f06x_tim.c **** 
 766:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER */
 767:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 768:Library/src/lcm32f06x_tim.c **** }
 1491              		.loc 1 768 1 is_stmt 0 view .LVU440
 1492              		@ sp needed
 758:Library/src/lcm32f06x_tim.c **** 
 1493              		.loc 1 758 13 view .LVU441
 1494 003e 4260     		str	r2, [r0, #4]
 761:Library/src/lcm32f06x_tim.c **** 
 1495              		.loc 1 761 3 is_stmt 1 view .LVU442
 764:Library/src/lcm32f06x_tim.c **** 
 1496              		.loc 1 764 32 is_stmt 0 view .LVU443
 1497 0040 CA68     		ldr	r2, [r1, #12]
 1498              	.LVL81:
 761:Library/src/lcm32f06x_tim.c **** 
 1499              		.loc 1 761 15 view .LVU444
 1500 0042 8461     		str	r4, [r0, #24]
 1501              	.LVL82:
 764:Library/src/lcm32f06x_tim.c **** 
 1502              		.loc 1 764 3 is_stmt 1 view .LVU445
 764:Library/src/lcm32f06x_tim.c **** 
 1503              		.loc 1 764 14 is_stmt 0 view .LVU446
 1504 0044 8263     		str	r2, [r0, #56]
 767:Library/src/lcm32f06x_tim.c **** }
 1505              		.loc 1 767 3 is_stmt 1 view .LVU447
 767:Library/src/lcm32f06x_tim.c **** }
 1506              		.loc 1 767 14 is_stmt 0 view .LVU448
 1507 0046 0362     		str	r3, [r0, #32]
 1508              	.LVL83:
 1509              		.loc 1 768 1 view .LVU449
 1510 0048 70BD     		pop	{r4, r5, r6, pc}
 1511              	.LVL84:
 1512              	.L75:
 742:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 1513              		.loc 1 742 5 is_stmt 1 view .LVU450
 742:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 1514              		.loc 1 742 13 is_stmt 0 view .LVU451
 1515 004a 8025     		movs	r5, #128
 1516 004c AB43     		bics	r3, r5
 1517              	.LVL85:
 744:Library/src/lcm32f06x_tim.c **** 
 1518              		.loc 1 744 5 is_stmt 1 view .LVU452
 744:Library/src/lcm32f06x_tim.c **** 
 1519              		.loc 1 744 16 is_stmt 0 view .LVU453
 1520 004e 4D69     		ldr	r5, [r1, #20]
 1521 0050 2D01     		lsls	r5, r5, #4
 744:Library/src/lcm32f06x_tim.c **** 
 1522              		.loc 1 744 13 view .LVU454
 1523 0052 1D43     		orrs	r5, r3
ARM GAS  /tmp/ccWBHqpW.s 			page 45


 1524              	.LVL86:
 747:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 1525              		.loc 1 747 5 is_stmt 1 view .LVU455
 747:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 1526              		.loc 1 747 13 is_stmt 0 view .LVU456
 1527 0054 4023     		movs	r3, #64
 1528 0056 9D43     		bics	r5, r3
 1529              	.LVL87:
 749:Library/src/lcm32f06x_tim.c **** 
 1530              		.loc 1 749 5 is_stmt 1 view .LVU457
 749:Library/src/lcm32f06x_tim.c **** 
 1531              		.loc 1 749 16 is_stmt 0 view .LVU458
 1532 0058 8B68     		ldr	r3, [r1, #8]
 1533 005a 1B01     		lsls	r3, r3, #4
 749:Library/src/lcm32f06x_tim.c **** 
 1534              		.loc 1 749 13 view .LVU459
 1535 005c 2B43     		orrs	r3, r5
 1536              	.LVL88:
 752:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Idle state */
 1537              		.loc 1 752 5 is_stmt 1 view .LVU460
 752:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Idle state */
 1538              		.loc 1 752 12 is_stmt 0 view .LVU461
 1539 005e 074D     		ldr	r5, .L77+16
 1540 0060 1540     		ands	r5, r2
 1541              	.LVL89:
 754:Library/src/lcm32f06x_tim.c ****   }
 1542              		.loc 1 754 5 is_stmt 1 view .LVU462
 754:Library/src/lcm32f06x_tim.c ****   }
 1543              		.loc 1 754 15 is_stmt 0 view .LVU463
 1544 0062 CA69     		ldr	r2, [r1, #28]
 1545 0064 9200     		lsls	r2, r2, #2
 754:Library/src/lcm32f06x_tim.c ****   }
 1546              		.loc 1 754 12 view .LVU464
 1547 0066 2A43     		orrs	r2, r5
 1548 0068 E9E7     		b	.L76
 1549              	.L78:
 1550 006a C046     		.align	2
 1551              	.L77:
 1552 006c FF8CFFFF 		.word	-29441
 1553 0070 FFFBFFFF 		.word	-1025
 1554 0074 00000140 		.word	1073807360
 1555 0078 00B00140 		.word	1073852416
 1556 007c FFF7FFFF 		.word	-2049
 1557              		.cfi_endproc
 1558              	.LFE69:
 1560              		.section	.text.TIM_OC3Init,"ax",%progbits
 1561              		.align	1
 1562              		.p2align 2,,3
 1563              		.global	TIM_OC3Init
 1564              		.syntax unified
 1565              		.code	16
 1566              		.thumb_func
 1568              	TIM_OC3Init:
 1569              	.LVL90:
 1570              	.LFB70:
 769:Library/src/lcm32f06x_tim.c **** 
 770:Library/src/lcm32f06x_tim.c **** /**
ARM GAS  /tmp/ccWBHqpW.s 			page 46


 771:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC3Init
 772:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Initializes the TIMx Channel3 according to the specified
 773:Library/src/lcm32f06x_tim.c ****   *             parameters in the TIM_OCInitStruct.
 774:Library/src/lcm32f06x_tim.c ****   *         CN: 根据TIM_OCInitStruct中指定的参数初始化TIM 通道3。
 775:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
 776:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
 777:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCInitStruct: 
 778:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_OCInitTypeDef structure
 779:Library/src/lcm32f06x_tim.c ****   *             that contains the configuration information for the specified TIM
 780:Library/src/lcm32f06x_tim.c ****   *         CN:指向TIM_OCInitTypeDef结构的指针，该结构包含指定TIM的配置信息。
 781:Library/src/lcm32f06x_tim.c ****   * @retval None
 782:Library/src/lcm32f06x_tim.c ****   */
 783:Library/src/lcm32f06x_tim.c **** void TIM_OC3Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct)
 784:Library/src/lcm32f06x_tim.c **** {
 1571              		.loc 1 784 1 is_stmt 1 view -0
 1572              		.cfi_startproc
 1573              		@ args = 0, pretend = 0, frame = 0
 1574              		@ frame_needed = 0, uses_anonymous_args = 0
 785:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
 1575              		.loc 1 785 3 view .LVU466
 786:Library/src/lcm32f06x_tim.c **** 
 787:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 788:Library/src/lcm32f06x_tim.c **** 
 789:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 2: Reset the CC2E Bit */
 790:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t)(~((uint32_t)TIM_CCER_CC3E_Msk));
 1576              		.loc 1 790 3 view .LVU467
 1577              		.loc 1 790 7 is_stmt 0 view .LVU468
 1578 0000 036A     		ldr	r3, [r0, #32]
 1579              		.loc 1 790 14 view .LVU469
 1580 0002 184A     		ldr	r2, .L82
 784:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
 1581              		.loc 1 784 1 view .LVU470
 1582 0004 70B5     		push	{r4, r5, r6, lr}
 1583              	.LCFI2:
 1584              		.cfi_def_cfa_offset 16
 1585              		.cfi_offset 4, -16
 1586              		.cfi_offset 5, -12
 1587              		.cfi_offset 6, -8
 1588              		.cfi_offset 14, -4
 1589              		.loc 1 790 14 view .LVU471
 1590 0006 1340     		ands	r3, r2
 1591 0008 0362     		str	r3, [r0, #32]
 791:Library/src/lcm32f06x_tim.c **** 
 792:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCER register value */
 793:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 1592              		.loc 1 793 3 is_stmt 1 view .LVU472
 794:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CR2 register value */
 795:Library/src/lcm32f06x_tim.c ****   tmpcr2 = TIMx->CR2;
 796:Library/src/lcm32f06x_tim.c **** 
 797:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR2 register value */
 798:Library/src/lcm32f06x_tim.c ****   tmpccmrx = TIMx->CCMR2;
 799:Library/src/lcm32f06x_tim.c **** 
 800:Library/src/lcm32f06x_tim.c ****   /* Reset the Output Compare mode and Capture/Compare selection Bits */
 801:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR2_Output_OC3M_Msk));
 802:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR2_Output_CC3S_Msk));
 1593              		.loc 1 802 12 is_stmt 0 view .LVU473
 1594 000a 7323     		movs	r3, #115
ARM GAS  /tmp/ccWBHqpW.s 			page 47


 793:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CR2 register value */
 1595              		.loc 1 793 11 view .LVU474
 1596 000c 026A     		ldr	r2, [r0, #32]
 1597              	.LVL91:
 795:Library/src/lcm32f06x_tim.c **** 
 1598              		.loc 1 795 3 is_stmt 1 view .LVU475
 795:Library/src/lcm32f06x_tim.c **** 
 1599              		.loc 1 795 10 is_stmt 0 view .LVU476
 1600 000e 4468     		ldr	r4, [r0, #4]
 1601              	.LVL92:
 798:Library/src/lcm32f06x_tim.c **** 
 1602              		.loc 1 798 3 is_stmt 1 view .LVU477
 798:Library/src/lcm32f06x_tim.c **** 
 1603              		.loc 1 798 12 is_stmt 0 view .LVU478
 1604 0010 C569     		ldr	r5, [r0, #28]
 1605              	.LVL93:
 801:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR2_Output_CC3S_Msk));
 1606              		.loc 1 801 3 is_stmt 1 view .LVU479
 1607              		.loc 1 802 3 view .LVU480
 803:Library/src/lcm32f06x_tim.c ****   /* Select the Output Compare Mode */
 804:Library/src/lcm32f06x_tim.c ****   tmpccmrx |= TIM_OCInitStruct->TIM_OCMode;
 805:Library/src/lcm32f06x_tim.c **** 
 806:Library/src/lcm32f06x_tim.c ****   /* Reset the Output Polarity level */
 807:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC3P_Msk));
 808:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 809:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OCPolarity << 8);
 810:Library/src/lcm32f06x_tim.c **** 
 811:Library/src/lcm32f06x_tim.c ****   /* Set the Output State */
 812:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OutputState << 8);
 1608              		.loc 1 812 11 is_stmt 0 view .LVU481
 1609 0012 4E68     		ldr	r6, [r1, #4]
 802:Library/src/lcm32f06x_tim.c ****   /* Select the Output Compare Mode */
 1610              		.loc 1 802 12 view .LVU482
 1611 0014 9D43     		bics	r5, r3
 1612              	.LVL94:
 804:Library/src/lcm32f06x_tim.c **** 
 1613              		.loc 1 804 3 is_stmt 1 view .LVU483
 804:Library/src/lcm32f06x_tim.c **** 
 1614              		.loc 1 804 12 is_stmt 0 view .LVU484
 1615 0016 0B68     		ldr	r3, [r1]
 1616 0018 1D43     		orrs	r5, r3
 1617              	.LVL95:
 807:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 1618              		.loc 1 807 3 is_stmt 1 view .LVU485
 807:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 1619              		.loc 1 807 11 is_stmt 0 view .LVU486
 1620 001a 134B     		ldr	r3, .L82+4
 1621 001c 1A40     		ands	r2, r3
 1622              	.LVL96:
 809:Library/src/lcm32f06x_tim.c **** 
 1623              		.loc 1 809 3 is_stmt 1 view .LVU487
 1624              		.loc 1 812 3 view .LVU488
 1625              		.loc 1 812 11 is_stmt 0 view .LVU489
 1626 001e 0B69     		ldr	r3, [r1, #16]
 1627 0020 3343     		orrs	r3, r6
 1628 0022 1B02     		lsls	r3, r3, #8
 1629 0024 1343     		orrs	r3, r2
ARM GAS  /tmp/ccWBHqpW.s 			page 48


 1630              	.LVL97:
 813:Library/src/lcm32f06x_tim.c **** 
 814:Library/src/lcm32f06x_tim.c ****   /* Reset the Ouput Compare and Output Compare IDLE State */
 815:Library/src/lcm32f06x_tim.c ****   tmpcr2 &= (uint32_t)(~((uint32_t)TIM_CR2_OIS3_Msk));
 1631              		.loc 1 815 3 is_stmt 1 view .LVU490
 1632              		.loc 1 815 10 is_stmt 0 view .LVU491
 1633 0026 114A     		ldr	r2, .L82+8
 1634 0028 1440     		ands	r4, r2
 1635              	.LVL98:
 816:Library/src/lcm32f06x_tim.c ****   /* Set the Output Idle state */
 817:Library/src/lcm32f06x_tim.c ****   tmpcr2 |= (uint32_t)(TIM_OCInitStruct->TIM_OCIdleState << 4);
 1636              		.loc 1 817 3 is_stmt 1 view .LVU492
 1637              		.loc 1 817 13 is_stmt 0 view .LVU493
 1638 002a 8A69     		ldr	r2, [r1, #24]
 1639 002c 1201     		lsls	r2, r2, #4
 1640              		.loc 1 817 10 view .LVU494
 1641 002e 2243     		orrs	r2, r4
 1642              	.LVL99:
 818:Library/src/lcm32f06x_tim.c **** 
 819:Library/src/lcm32f06x_tim.c ****   if (TIMx == TIM1)
 1643              		.loc 1 819 3 is_stmt 1 view .LVU495
 1644              		.loc 1 819 6 is_stmt 0 view .LVU496
 1645 0030 0F4C     		ldr	r4, .L82+12
 1646 0032 A042     		cmp	r0, r4
 1647 0034 05D0     		beq	.L81
 1648              	.LVL100:
 1649              	.L80:
 820:Library/src/lcm32f06x_tim.c ****   {
 821:Library/src/lcm32f06x_tim.c **** 
 822:Library/src/lcm32f06x_tim.c ****     /* Reset the Output N Polarity level */
 823:Library/src/lcm32f06x_tim.c ****     tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC3NP_Msk));
 824:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 825:Library/src/lcm32f06x_tim.c ****     tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OCNPolarity << 8);
 826:Library/src/lcm32f06x_tim.c ****     
 827:Library/src/lcm32f06x_tim.c ****     /* Reset the Output N State */
 828:Library/src/lcm32f06x_tim.c ****     tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC3NE_Msk));
 829:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 830:Library/src/lcm32f06x_tim.c ****     tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OutputNState << 8);
 831:Library/src/lcm32f06x_tim.c **** 
 832:Library/src/lcm32f06x_tim.c ****     /* Reset the Ouput Compare and Output Compare N IDLE State */
 833:Library/src/lcm32f06x_tim.c ****     tmpcr2 &= (uint32_t)(~((uint32_t)TIM_CR2_OIS3N_Msk));
 834:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Idle state */
 835:Library/src/lcm32f06x_tim.c ****     tmpcr2 |= (uint32_t)(TIM_OCInitStruct->TIM_OCNIdleState << 4);
 836:Library/src/lcm32f06x_tim.c ****   }
 837:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CR2 */
 838:Library/src/lcm32f06x_tim.c ****   TIMx->CR2 = tmpcr2;
 1650              		.loc 1 838 3 is_stmt 1 view .LVU497
 839:Library/src/lcm32f06x_tim.c **** 
 840:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 */
 841:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmrx;
 842:Library/src/lcm32f06x_tim.c **** 
 843:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare Register value */
 844:Library/src/lcm32f06x_tim.c ****   TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse;
 845:Library/src/lcm32f06x_tim.c **** 
 846:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER */
 847:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 848:Library/src/lcm32f06x_tim.c **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 49


 1651              		.loc 1 848 1 is_stmt 0 view .LVU498
 1652              		@ sp needed
 838:Library/src/lcm32f06x_tim.c **** 
 1653              		.loc 1 838 13 view .LVU499
 1654 0036 4260     		str	r2, [r0, #4]
 841:Library/src/lcm32f06x_tim.c **** 
 1655              		.loc 1 841 3 is_stmt 1 view .LVU500
 844:Library/src/lcm32f06x_tim.c **** 
 1656              		.loc 1 844 32 is_stmt 0 view .LVU501
 1657 0038 CA68     		ldr	r2, [r1, #12]
 1658              	.LVL101:
 841:Library/src/lcm32f06x_tim.c **** 
 1659              		.loc 1 841 15 view .LVU502
 1660 003a C561     		str	r5, [r0, #28]
 1661              	.LVL102:
 844:Library/src/lcm32f06x_tim.c **** 
 1662              		.loc 1 844 3 is_stmt 1 view .LVU503
 844:Library/src/lcm32f06x_tim.c **** 
 1663              		.loc 1 844 14 is_stmt 0 view .LVU504
 1664 003c C263     		str	r2, [r0, #60]
 847:Library/src/lcm32f06x_tim.c **** }
 1665              		.loc 1 847 3 is_stmt 1 view .LVU505
 847:Library/src/lcm32f06x_tim.c **** }
 1666              		.loc 1 847 14 is_stmt 0 view .LVU506
 1667 003e 0362     		str	r3, [r0, #32]
 1668              	.LVL103:
 1669              		.loc 1 848 1 view .LVU507
 1670 0040 70BD     		pop	{r4, r5, r6, pc}
 1671              	.LVL104:
 1672              	.L81:
 823:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 1673              		.loc 1 823 5 is_stmt 1 view .LVU508
 823:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 1674              		.loc 1 823 13 is_stmt 0 view .LVU509
 1675 0042 0C4C     		ldr	r4, .L82+16
 1676 0044 2340     		ands	r3, r4
 1677              	.LVL105:
 825:Library/src/lcm32f06x_tim.c ****     
 1678              		.loc 1 825 5 is_stmt 1 view .LVU510
 825:Library/src/lcm32f06x_tim.c ****     
 1679              		.loc 1 825 16 is_stmt 0 view .LVU511
 1680 0046 4C69     		ldr	r4, [r1, #20]
 1681 0048 2402     		lsls	r4, r4, #8
 825:Library/src/lcm32f06x_tim.c ****     
 1682              		.loc 1 825 13 view .LVU512
 1683 004a 1C43     		orrs	r4, r3
 1684              	.LVL106:
 828:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 1685              		.loc 1 828 5 is_stmt 1 view .LVU513
 828:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 1686              		.loc 1 828 13 is_stmt 0 view .LVU514
 1687 004c 0A4B     		ldr	r3, .L82+20
 1688 004e 1C40     		ands	r4, r3
 1689              	.LVL107:
 830:Library/src/lcm32f06x_tim.c **** 
 1690              		.loc 1 830 5 is_stmt 1 view .LVU515
 830:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 50


 1691              		.loc 1 830 16 is_stmt 0 view .LVU516
 1692 0050 8B68     		ldr	r3, [r1, #8]
 1693 0052 1B02     		lsls	r3, r3, #8
 830:Library/src/lcm32f06x_tim.c **** 
 1694              		.loc 1 830 13 view .LVU517
 1695 0054 2343     		orrs	r3, r4
 1696              	.LVL108:
 833:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Idle state */
 1697              		.loc 1 833 5 is_stmt 1 view .LVU518
 833:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Idle state */
 1698              		.loc 1 833 12 is_stmt 0 view .LVU519
 1699 0056 094C     		ldr	r4, .L82+24
 1700 0058 1440     		ands	r4, r2
 1701              	.LVL109:
 835:Library/src/lcm32f06x_tim.c ****   }
 1702              		.loc 1 835 5 is_stmt 1 view .LVU520
 835:Library/src/lcm32f06x_tim.c ****   }
 1703              		.loc 1 835 15 is_stmt 0 view .LVU521
 1704 005a CA69     		ldr	r2, [r1, #28]
 1705 005c 1201     		lsls	r2, r2, #4
 835:Library/src/lcm32f06x_tim.c ****   }
 1706              		.loc 1 835 12 view .LVU522
 1707 005e 2243     		orrs	r2, r4
 1708 0060 E9E7     		b	.L80
 1709              	.L83:
 1710 0062 C046     		.align	2
 1711              	.L82:
 1712 0064 FFFEFFFF 		.word	-257
 1713 0068 FFFDFFFF 		.word	-513
 1714 006c FFEFFFFF 		.word	-4097
 1715 0070 00000140 		.word	1073807360
 1716 0074 FFF7FFFF 		.word	-2049
 1717 0078 FFFBFFFF 		.word	-1025
 1718 007c FFDFFFFF 		.word	-8193
 1719              		.cfi_endproc
 1720              	.LFE70:
 1722              		.section	.text.TIM_OC4Init,"ax",%progbits
 1723              		.align	1
 1724              		.p2align 2,,3
 1725              		.global	TIM_OC4Init
 1726              		.syntax unified
 1727              		.code	16
 1728              		.thumb_func
 1730              	TIM_OC4Init:
 1731              	.LVL110:
 1732              	.LFB71:
 849:Library/src/lcm32f06x_tim.c **** 
 850:Library/src/lcm32f06x_tim.c **** /**
 851:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC4Init
 852:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Initializes the TIMx Channel4 according to the specified
 853:Library/src/lcm32f06x_tim.c ****   *             parameters in the TIM_OCInitStruct.
 854:Library/src/lcm32f06x_tim.c ****   *         CN: 根据TIM_OCInitStruct中指定的参数初始化TIM 通道4。
 855:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 856:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
 857:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
 858:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCInitStruct: 
 859:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_OCInitTypeDef structure
ARM GAS  /tmp/ccWBHqpW.s 			page 51


 860:Library/src/lcm32f06x_tim.c ****   *             that contains the configuration information for the specified TIM
 861:Library/src/lcm32f06x_tim.c ****   *         CN:指向TIM_OCInitTypeDef结构的指针，该结构包含指定TIM的配置信息。
 862:Library/src/lcm32f06x_tim.c ****   * @retval None
 863:Library/src/lcm32f06x_tim.c ****   */
 864:Library/src/lcm32f06x_tim.c **** void TIM_OC4Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct)
 865:Library/src/lcm32f06x_tim.c **** {
 1733              		.loc 1 865 1 is_stmt 1 view -0
 1734              		.cfi_startproc
 1735              		@ args = 0, pretend = 0, frame = 0
 1736              		@ frame_needed = 0, uses_anonymous_args = 0
 866:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
 1737              		.loc 1 866 3 view .LVU524
 867:Library/src/lcm32f06x_tim.c **** 
 868:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 869:Library/src/lcm32f06x_tim.c **** 
 870:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 2: Reset the CC4E Bit */
 871:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t)(~((uint32_t)TIM_CCER_CC4E_Msk));
 1738              		.loc 1 871 3 view .LVU525
 1739              		.loc 1 871 7 is_stmt 0 view .LVU526
 1740 0000 036A     		ldr	r3, [r0, #32]
 1741              		.loc 1 871 14 view .LVU527
 1742 0002 174A     		ldr	r2, .L87
 865:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
 1743              		.loc 1 865 1 view .LVU528
 1744 0004 F0B5     		push	{r4, r5, r6, r7, lr}
 1745              	.LCFI3:
 1746              		.cfi_def_cfa_offset 20
 1747              		.cfi_offset 4, -20
 1748              		.cfi_offset 5, -16
 1749              		.cfi_offset 6, -12
 1750              		.cfi_offset 7, -8
 1751              		.cfi_offset 14, -4
 1752              		.loc 1 871 14 view .LVU529
 1753 0006 1340     		ands	r3, r2
 1754 0008 0362     		str	r3, [r0, #32]
 872:Library/src/lcm32f06x_tim.c **** 
 873:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCER register value */
 874:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 1755              		.loc 1 874 3 is_stmt 1 view .LVU530
 1756              		.loc 1 874 11 is_stmt 0 view .LVU531
 1757 000a 026A     		ldr	r2, [r0, #32]
 1758              	.LVL111:
 875:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CR2 register value */
 876:Library/src/lcm32f06x_tim.c ****   tmpcr2 = TIMx->CR2;
 1759              		.loc 1 876 3 is_stmt 1 view .LVU532
 877:Library/src/lcm32f06x_tim.c **** 
 878:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR2 register value */
 879:Library/src/lcm32f06x_tim.c ****   tmpccmrx = TIMx->CCMR2;
 880:Library/src/lcm32f06x_tim.c **** 
 881:Library/src/lcm32f06x_tim.c ****   /* Reset the Output Compare mode and Capture/Compare selection Bits */
 882:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR2_Output_OC4M_Msk));
 883:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR2_Output_CC4S_Msk));
 1760              		.loc 1 883 12 is_stmt 0 view .LVU533
 1761 000c 154D     		ldr	r5, .L87+4
 876:Library/src/lcm32f06x_tim.c **** 
 1762              		.loc 1 876 10 view .LVU534
 1763 000e 4468     		ldr	r4, [r0, #4]
ARM GAS  /tmp/ccWBHqpW.s 			page 52


 1764              	.LVL112:
 879:Library/src/lcm32f06x_tim.c **** 
 1765              		.loc 1 879 3 is_stmt 1 view .LVU535
 879:Library/src/lcm32f06x_tim.c **** 
 1766              		.loc 1 879 12 is_stmt 0 view .LVU536
 1767 0010 C369     		ldr	r3, [r0, #28]
 1768              	.LVL113:
 882:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR2_Output_CC4S_Msk));
 1769              		.loc 1 882 3 is_stmt 1 view .LVU537
 1770              		.loc 1 883 3 view .LVU538
 884:Library/src/lcm32f06x_tim.c **** 
 885:Library/src/lcm32f06x_tim.c ****   /* Select the Output Compare Mode */
 886:Library/src/lcm32f06x_tim.c ****   tmpccmrx |= (uint32_t)(TIM_OCInitStruct->TIM_OCMode << 8);
 887:Library/src/lcm32f06x_tim.c **** 
 888:Library/src/lcm32f06x_tim.c ****   /* Reset the Output Polarity level */
 889:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC4P_Msk));
 890:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 891:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OCPolarity << 12);
 892:Library/src/lcm32f06x_tim.c **** 
 893:Library/src/lcm32f06x_tim.c ****   /* Set the Output State */
 894:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OutputState << 12);
 1771              		.loc 1 894 11 is_stmt 0 view .LVU539
 1772 0012 4E68     		ldr	r6, [r1, #4]
 883:Library/src/lcm32f06x_tim.c **** 
 1773              		.loc 1 883 12 view .LVU540
 1774 0014 2B40     		ands	r3, r5
 1775              	.LVL114:
 886:Library/src/lcm32f06x_tim.c **** 
 1776              		.loc 1 886 3 is_stmt 1 view .LVU541
 886:Library/src/lcm32f06x_tim.c **** 
 1777              		.loc 1 886 15 is_stmt 0 view .LVU542
 1778 0016 0D68     		ldr	r5, [r1]
 1779 0018 2D02     		lsls	r5, r5, #8
 886:Library/src/lcm32f06x_tim.c **** 
 1780              		.loc 1 886 12 view .LVU543
 1781 001a 1D43     		orrs	r5, r3
 1782              	.LVL115:
 889:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 1783              		.loc 1 889 3 is_stmt 1 view .LVU544
 889:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 1784              		.loc 1 889 11 is_stmt 0 view .LVU545
 1785 001c 124B     		ldr	r3, .L87+8
 1786 001e 1A40     		ands	r2, r3
 1787              	.LVL116:
 891:Library/src/lcm32f06x_tim.c **** 
 1788              		.loc 1 891 3 is_stmt 1 view .LVU546
 1789              		.loc 1 894 3 view .LVU547
 1790              		.loc 1 894 11 is_stmt 0 view .LVU548
 1791 0020 0B69     		ldr	r3, [r1, #16]
 1792 0022 3343     		orrs	r3, r6
 1793 0024 1B03     		lsls	r3, r3, #12
 895:Library/src/lcm32f06x_tim.c ****   
 896:Library/src/lcm32f06x_tim.c ****   /* Reset the Ouput Compare and Output Compare IDLE State */
 897:Library/src/lcm32f06x_tim.c ****   tmpcr2 &= (uint32_t)(~((uint32_t)TIM_CR2_OIS4_Msk));
 1794              		.loc 1 897 10 view .LVU549
 1795 0026 114E     		ldr	r6, .L87+12
 894:Library/src/lcm32f06x_tim.c ****   
ARM GAS  /tmp/ccWBHqpW.s 			page 53


 1796              		.loc 1 894 11 view .LVU550
 1797 0028 1343     		orrs	r3, r2
 1798              	.LVL117:
 1799              		.loc 1 897 3 is_stmt 1 view .LVU551
 898:Library/src/lcm32f06x_tim.c ****   /* Set the Output Idle state */
 899:Library/src/lcm32f06x_tim.c ****   tmpcr2 |= (uint32_t)(TIM_OCInitStruct->TIM_OCIdleState << 6);
 1800              		.loc 1 899 13 is_stmt 0 view .LVU552
 1801 002a 8A69     		ldr	r2, [r1, #24]
 897:Library/src/lcm32f06x_tim.c ****   /* Set the Output Idle state */
 1802              		.loc 1 897 10 view .LVU553
 1803 002c 3440     		ands	r4, r6
 1804              	.LVL118:
 1805              		.loc 1 899 3 is_stmt 1 view .LVU554
 1806              		.loc 1 899 13 is_stmt 0 view .LVU555
 1807 002e 9201     		lsls	r2, r2, #6
 1808              		.loc 1 899 10 view .LVU556
 1809 0030 2243     		orrs	r2, r4
 1810              	.LVL119:
 900:Library/src/lcm32f06x_tim.c **** 
 901:Library/src/lcm32f06x_tim.c ****   if (TIMx == TIM1)
 1811              		.loc 1 901 3 is_stmt 1 view .LVU557
 1812              		.loc 1 901 6 is_stmt 0 view .LVU558
 1813 0032 0F4C     		ldr	r4, .L87+16
 1814 0034 A042     		cmp	r0, r4
 1815 0036 05D0     		beq	.L86
 1816              	.LVL120:
 1817              	.L85:
 902:Library/src/lcm32f06x_tim.c ****   {
 903:Library/src/lcm32f06x_tim.c **** 
 904:Library/src/lcm32f06x_tim.c ****     /* Reset the Output N Polarity level */
 905:Library/src/lcm32f06x_tim.c ****     tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC4NP_Msk));
 906:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 907:Library/src/lcm32f06x_tim.c ****     tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OCNPolarity << 12);
 908:Library/src/lcm32f06x_tim.c **** 
 909:Library/src/lcm32f06x_tim.c ****     /* Reset the Output N State */
 910:Library/src/lcm32f06x_tim.c ****     tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC4NE_Msk));
 911:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 912:Library/src/lcm32f06x_tim.c ****     tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OutputNState << 12);
 913:Library/src/lcm32f06x_tim.c **** 
 914:Library/src/lcm32f06x_tim.c ****     /* Reset the Ouput Compare and Output Compare N IDLE State */
 915:Library/src/lcm32f06x_tim.c ****     tmpcr2 &= (uint32_t)(~((uint32_t)TIM_CR2_OIS4N_Msk));
 916:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Idle state */
 917:Library/src/lcm32f06x_tim.c ****     tmpcr2 |= (uint32_t)(TIM_OCInitStruct->TIM_OCNIdleState << 6);
 918:Library/src/lcm32f06x_tim.c ****   }
 919:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CR2 */
 920:Library/src/lcm32f06x_tim.c ****   TIMx->CR2 = tmpcr2;
 1818              		.loc 1 920 3 is_stmt 1 view .LVU559
 921:Library/src/lcm32f06x_tim.c **** 
 922:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 */
 923:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmrx;
 924:Library/src/lcm32f06x_tim.c **** 
 925:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare Register value */
 926:Library/src/lcm32f06x_tim.c ****   TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse;
 927:Library/src/lcm32f06x_tim.c **** 
 928:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER */
 929:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 930:Library/src/lcm32f06x_tim.c **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 54


 1819              		.loc 1 930 1 is_stmt 0 view .LVU560
 1820              		@ sp needed
 920:Library/src/lcm32f06x_tim.c **** 
 1821              		.loc 1 920 13 view .LVU561
 1822 0038 4260     		str	r2, [r0, #4]
 923:Library/src/lcm32f06x_tim.c **** 
 1823              		.loc 1 923 3 is_stmt 1 view .LVU562
 926:Library/src/lcm32f06x_tim.c **** 
 1824              		.loc 1 926 32 is_stmt 0 view .LVU563
 1825 003a CA68     		ldr	r2, [r1, #12]
 1826              	.LVL121:
 923:Library/src/lcm32f06x_tim.c **** 
 1827              		.loc 1 923 15 view .LVU564
 1828 003c C561     		str	r5, [r0, #28]
 1829              	.LVL122:
 926:Library/src/lcm32f06x_tim.c **** 
 1830              		.loc 1 926 3 is_stmt 1 view .LVU565
 926:Library/src/lcm32f06x_tim.c **** 
 1831              		.loc 1 926 14 is_stmt 0 view .LVU566
 1832 003e 0264     		str	r2, [r0, #64]
 929:Library/src/lcm32f06x_tim.c **** }
 1833              		.loc 1 929 3 is_stmt 1 view .LVU567
 929:Library/src/lcm32f06x_tim.c **** }
 1834              		.loc 1 929 14 is_stmt 0 view .LVU568
 1835 0040 0362     		str	r3, [r0, #32]
 1836              	.LVL123:
 1837              		.loc 1 930 1 view .LVU569
 1838 0042 F0BD     		pop	{r4, r5, r6, r7, pc}
 1839              	.LVL124:
 1840              	.L86:
 905:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 1841              		.loc 1 905 5 is_stmt 1 view .LVU570
 905:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 1842              		.loc 1 905 13 is_stmt 0 view .LVU571
 1843 0044 0B4F     		ldr	r7, .L87+20
 907:Library/src/lcm32f06x_tim.c **** 
 1844              		.loc 1 907 16 view .LVU572
 1845 0046 4C69     		ldr	r4, [r1, #20]
 905:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 1846              		.loc 1 905 13 view .LVU573
 1847 0048 3B40     		ands	r3, r7
 1848              	.LVL125:
 907:Library/src/lcm32f06x_tim.c **** 
 1849              		.loc 1 907 5 is_stmt 1 view .LVU574
 907:Library/src/lcm32f06x_tim.c **** 
 1850              		.loc 1 907 16 is_stmt 0 view .LVU575
 1851 004a 2403     		lsls	r4, r4, #12
 907:Library/src/lcm32f06x_tim.c **** 
 1852              		.loc 1 907 13 view .LVU576
 1853 004c 1C43     		orrs	r4, r3
 1854              	.LVL126:
 910:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 1855              		.loc 1 910 5 is_stmt 1 view .LVU577
 915:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Idle state */
 1856              		.loc 1 915 12 is_stmt 0 view .LVU578
 1857 004e 1740     		ands	r7, r2
 912:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 55


 1858              		.loc 1 912 16 view .LVU579
 1859 0050 8B68     		ldr	r3, [r1, #8]
 917:Library/src/lcm32f06x_tim.c ****   }
 1860              		.loc 1 917 15 view .LVU580
 1861 0052 CA69     		ldr	r2, [r1, #28]
 1862              	.LVL127:
 910:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 1863              		.loc 1 910 13 view .LVU581
 1864 0054 3440     		ands	r4, r6
 1865              	.LVL128:
 912:Library/src/lcm32f06x_tim.c **** 
 1866              		.loc 1 912 5 is_stmt 1 view .LVU582
 912:Library/src/lcm32f06x_tim.c **** 
 1867              		.loc 1 912 16 is_stmt 0 view .LVU583
 1868 0056 1B03     		lsls	r3, r3, #12
 917:Library/src/lcm32f06x_tim.c ****   }
 1869              		.loc 1 917 15 view .LVU584
 1870 0058 9201     		lsls	r2, r2, #6
 912:Library/src/lcm32f06x_tim.c **** 
 1871              		.loc 1 912 13 view .LVU585
 1872 005a 2343     		orrs	r3, r4
 1873              	.LVL129:
 915:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Idle state */
 1874              		.loc 1 915 5 is_stmt 1 view .LVU586
 917:Library/src/lcm32f06x_tim.c ****   }
 1875              		.loc 1 917 5 view .LVU587
 917:Library/src/lcm32f06x_tim.c ****   }
 1876              		.loc 1 917 12 is_stmt 0 view .LVU588
 1877 005c 3A43     		orrs	r2, r7
 1878 005e EBE7     		b	.L85
 1879              	.L88:
 1880              		.align	2
 1881              	.L87:
 1882 0060 FFEFFFFF 		.word	-4097
 1883 0064 FF8CFFFF 		.word	-29441
 1884 0068 FFDFFFFF 		.word	-8193
 1885 006c FFBFFFFF 		.word	-16385
 1886 0070 00000140 		.word	1073807360
 1887 0074 FF7FFFFF 		.word	-32769
 1888              		.cfi_endproc
 1889              	.LFE71:
 1891              		.section	.text.TIM_OC5Init,"ax",%progbits
 1892              		.align	1
 1893              		.p2align 2,,3
 1894              		.global	TIM_OC5Init
 1895              		.syntax unified
 1896              		.code	16
 1897              		.thumb_func
 1899              	TIM_OC5Init:
 1900              	.LVL130:
 1901              	.LFB72:
 931:Library/src/lcm32f06x_tim.c **** 
 932:Library/src/lcm32f06x_tim.c **** /**
 933:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC5Init
 934:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Initializes the TIMx Channel5 according to the specified
 935:Library/src/lcm32f06x_tim.c ****   *             parameters in the TIM_OCInitStruct.
 936:Library/src/lcm32f06x_tim.c ****   *         CN: 根据TIM_OCInitStruct中指定的参数初始化TIM 通道5。
ARM GAS  /tmp/ccWBHqpW.s 			page 56


 937:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
 938:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
 939:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
 940:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCInitStruct: 
 941:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_OCInitTypeDef structure
 942:Library/src/lcm32f06x_tim.c ****   *             that contains the configuration information for the specified TIM
 943:Library/src/lcm32f06x_tim.c ****   *         CN:指向TIM_OCInitTypeDef结构的指针，该结构包含指定TIM的配置信息。
 944:Library/src/lcm32f06x_tim.c ****   * @retval None
 945:Library/src/lcm32f06x_tim.c ****   */
 946:Library/src/lcm32f06x_tim.c **** void TIM_OC5Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct)
 947:Library/src/lcm32f06x_tim.c **** {
 1902              		.loc 1 947 1 is_stmt 1 view -0
 1903              		.cfi_startproc
 1904              		@ args = 0, pretend = 0, frame = 0
 1905              		@ frame_needed = 0, uses_anonymous_args = 0
 948:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
 1906              		.loc 1 948 3 view .LVU590
 949:Library/src/lcm32f06x_tim.c **** 
 950:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 951:Library/src/lcm32f06x_tim.c **** 
 952:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 5: Reset the CC5E Bit */
 953:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t)(~(uint32_t)TIM_CCER_CC5E_Msk);
 1907              		.loc 1 953 3 view .LVU591
 1908              		.loc 1 953 7 is_stmt 0 view .LVU592
 1909 0000 036A     		ldr	r3, [r0, #32]
 1910              		.loc 1 953 14 view .LVU593
 1911 0002 134A     		ldr	r2, .L92
 947:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
 1912              		.loc 1 947 1 view .LVU594
 1913 0004 70B5     		push	{r4, r5, r6, lr}
 1914              	.LCFI4:
 1915              		.cfi_def_cfa_offset 16
 1916              		.cfi_offset 4, -16
 1917              		.cfi_offset 5, -12
 1918              		.cfi_offset 6, -8
 1919              		.cfi_offset 14, -4
 1920              		.loc 1 953 14 view .LVU595
 1921 0006 1340     		ands	r3, r2
 1922 0008 0362     		str	r3, [r0, #32]
 954:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCER register value */
 955:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 1923              		.loc 1 955 3 is_stmt 1 view .LVU596
 956:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CR2 register value */
 957:Library/src/lcm32f06x_tim.c ****   tmpcr2 = TIMx->CR2;
 958:Library/src/lcm32f06x_tim.c **** 
 959:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR3 register value */
 960:Library/src/lcm32f06x_tim.c ****   tmpccmrx = TIMx->CCMR3;
 961:Library/src/lcm32f06x_tim.c **** 
 962:Library/src/lcm32f06x_tim.c ****   /* Reset the Output Compare Mode Bits */
 963:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR3_Output_OC5M_Msk));
 964:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR3_Output_CC5S_Msk));
 1924              		.loc 1 964 12 is_stmt 0 view .LVU597
 1925 000a 7323     		movs	r3, #115
 955:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CR2 register value */
 1926              		.loc 1 955 11 view .LVU598
 1927 000c 046A     		ldr	r4, [r0, #32]
 1928              	.LVL131:
ARM GAS  /tmp/ccWBHqpW.s 			page 57


 957:Library/src/lcm32f06x_tim.c **** 
 1929              		.loc 1 957 3 is_stmt 1 view .LVU599
 957:Library/src/lcm32f06x_tim.c **** 
 1930              		.loc 1 957 10 is_stmt 0 view .LVU600
 1931 000e 4568     		ldr	r5, [r0, #4]
 1932              	.LVL132:
 960:Library/src/lcm32f06x_tim.c **** 
 1933              		.loc 1 960 3 is_stmt 1 view .LVU601
 960:Library/src/lcm32f06x_tim.c **** 
 1934              		.loc 1 960 12 is_stmt 0 view .LVU602
 1935 0010 426D     		ldr	r2, [r0, #84]
 1936              	.LVL133:
 963:Library/src/lcm32f06x_tim.c ****   tmpccmrx &= (uint32_t)(~((uint32_t)TIM_CCMR3_Output_CC5S_Msk));
 1937              		.loc 1 963 3 is_stmt 1 view .LVU603
 1938              		.loc 1 964 3 view .LVU604
 965:Library/src/lcm32f06x_tim.c **** 
 966:Library/src/lcm32f06x_tim.c ****   /* Select the Output Compare Mode */
 967:Library/src/lcm32f06x_tim.c ****   tmpccmrx |= TIM_OCInitStruct->TIM_OCMode;
 968:Library/src/lcm32f06x_tim.c **** 
 969:Library/src/lcm32f06x_tim.c ****   /* Reset the Output Polarity level */
 970:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC5P_Msk));
 971:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 972:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OCPolarity << 16);
 973:Library/src/lcm32f06x_tim.c **** 
 974:Library/src/lcm32f06x_tim.c ****   /* Set the Output State */
 975:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OutputState << 16);
 1939              		.loc 1 975 11 is_stmt 0 view .LVU605
 1940 0012 4E68     		ldr	r6, [r1, #4]
 964:Library/src/lcm32f06x_tim.c **** 
 1941              		.loc 1 964 12 view .LVU606
 1942 0014 9A43     		bics	r2, r3
 1943              	.LVL134:
 967:Library/src/lcm32f06x_tim.c **** 
 1944              		.loc 1 967 3 is_stmt 1 view .LVU607
 967:Library/src/lcm32f06x_tim.c **** 
 1945              		.loc 1 967 12 is_stmt 0 view .LVU608
 1946 0016 0B68     		ldr	r3, [r1]
 1947 0018 1A43     		orrs	r2, r3
 1948              	.LVL135:
 970:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 1949              		.loc 1 970 3 is_stmt 1 view .LVU609
 970:Library/src/lcm32f06x_tim.c ****   /* Set the Output Compare Polarity */
 1950              		.loc 1 970 11 is_stmt 0 view .LVU610
 1951 001a 0E4B     		ldr	r3, .L92+4
 1952 001c 1C40     		ands	r4, r3
 1953              	.LVL136:
 972:Library/src/lcm32f06x_tim.c **** 
 1954              		.loc 1 972 3 is_stmt 1 view .LVU611
 1955              		.loc 1 975 3 view .LVU612
 1956              		.loc 1 975 11 is_stmt 0 view .LVU613
 1957 001e 0B69     		ldr	r3, [r1, #16]
 1958 0020 3343     		orrs	r3, r6
 1959 0022 1B04     		lsls	r3, r3, #16
 1960 0024 2343     		orrs	r3, r4
 1961              	.LVL137:
 976:Library/src/lcm32f06x_tim.c **** 
 977:Library/src/lcm32f06x_tim.c ****   if (TIMx == TIM1)
ARM GAS  /tmp/ccWBHqpW.s 			page 58


 1962              		.loc 1 977 3 is_stmt 1 view .LVU614
 1963              		.loc 1 977 6 is_stmt 0 view .LVU615
 1964 0026 0C4C     		ldr	r4, .L92+8
 1965 0028 A042     		cmp	r0, r4
 1966 002a 05D0     		beq	.L91
 1967              	.LVL138:
 1968              	.L90:
 978:Library/src/lcm32f06x_tim.c ****   {
 979:Library/src/lcm32f06x_tim.c **** 
 980:Library/src/lcm32f06x_tim.c ****     /* Reset the Output N Polarity level */
 981:Library/src/lcm32f06x_tim.c ****     tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC5NP_Msk));
 982:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 983:Library/src/lcm32f06x_tim.c ****     tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OCNPolarity << 16);
 984:Library/src/lcm32f06x_tim.c **** 
 985:Library/src/lcm32f06x_tim.c ****     /* Reset the Output N State */
 986:Library/src/lcm32f06x_tim.c ****     tmpccer &= (uint32_t)(~((uint32_t)TIM_CCER_CC5NE_Msk));
 987:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 988:Library/src/lcm32f06x_tim.c ****     tmpccer |= (uint32_t)(TIM_OCInitStruct->TIM_OutputNState << 16);
 989:Library/src/lcm32f06x_tim.c **** 
 990:Library/src/lcm32f06x_tim.c ****   }
 991:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CR2 */
 992:Library/src/lcm32f06x_tim.c ****   TIMx->CR2 = tmpcr2;
 1969              		.loc 1 992 3 is_stmt 1 view .LVU616
 993:Library/src/lcm32f06x_tim.c **** 
 994:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 */
 995:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR3 = tmpccmrx;
 996:Library/src/lcm32f06x_tim.c **** 
 997:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare Register value */
 998:Library/src/lcm32f06x_tim.c ****   TIMx->CCR5 = TIM_OCInitStruct->TIM_Pulse;
 999:Library/src/lcm32f06x_tim.c **** 
1000:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER */
1001:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
1002:Library/src/lcm32f06x_tim.c **** }
 1970              		.loc 1 1002 1 is_stmt 0 view .LVU617
 1971              		@ sp needed
 992:Library/src/lcm32f06x_tim.c **** 
 1972              		.loc 1 992 13 view .LVU618
 1973 002c 4560     		str	r5, [r0, #4]
 995:Library/src/lcm32f06x_tim.c **** 
 1974              		.loc 1 995 3 is_stmt 1 view .LVU619
 995:Library/src/lcm32f06x_tim.c **** 
 1975              		.loc 1 995 15 is_stmt 0 view .LVU620
 1976 002e 4265     		str	r2, [r0, #84]
 998:Library/src/lcm32f06x_tim.c **** 
 1977              		.loc 1 998 3 is_stmt 1 view .LVU621
 998:Library/src/lcm32f06x_tim.c **** 
 1978              		.loc 1 998 32 is_stmt 0 view .LVU622
 1979 0030 CA68     		ldr	r2, [r1, #12]
 1980              	.LVL139:
 998:Library/src/lcm32f06x_tim.c **** 
 1981              		.loc 1 998 14 view .LVU623
 1982 0032 8265     		str	r2, [r0, #88]
 1983              	.LVL140:
1001:Library/src/lcm32f06x_tim.c **** }
 1984              		.loc 1 1001 3 is_stmt 1 view .LVU624
1001:Library/src/lcm32f06x_tim.c **** }
 1985              		.loc 1 1001 14 is_stmt 0 view .LVU625
ARM GAS  /tmp/ccWBHqpW.s 			page 59


 1986 0034 0362     		str	r3, [r0, #32]
 1987              	.LVL141:
 1988              		.loc 1 1002 1 view .LVU626
 1989 0036 70BD     		pop	{r4, r5, r6, pc}
 1990              	.LVL142:
 1991              	.L91:
 981:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 1992              		.loc 1 981 5 is_stmt 1 view .LVU627
 981:Library/src/lcm32f06x_tim.c ****     /* Set the Output N Polarity */
 1993              		.loc 1 981 13 is_stmt 0 view .LVU628
 1994 0038 084C     		ldr	r4, .L92+12
 1995 003a 2340     		ands	r3, r4
 1996              	.LVL143:
 983:Library/src/lcm32f06x_tim.c **** 
 1997              		.loc 1 983 5 is_stmt 1 view .LVU629
 983:Library/src/lcm32f06x_tim.c **** 
 1998              		.loc 1 983 16 is_stmt 0 view .LVU630
 1999 003c 4C69     		ldr	r4, [r1, #20]
 2000 003e 2404     		lsls	r4, r4, #16
 983:Library/src/lcm32f06x_tim.c **** 
 2001              		.loc 1 983 13 view .LVU631
 2002 0040 1C43     		orrs	r4, r3
 2003              	.LVL144:
 986:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 2004              		.loc 1 986 5 is_stmt 1 view .LVU632
 986:Library/src/lcm32f06x_tim.c ****     /* Set the Output N State */
 2005              		.loc 1 986 13 is_stmt 0 view .LVU633
 2006 0042 074B     		ldr	r3, .L92+16
 2007 0044 1C40     		ands	r4, r3
 2008              	.LVL145:
 988:Library/src/lcm32f06x_tim.c **** 
 2009              		.loc 1 988 5 is_stmt 1 view .LVU634
 988:Library/src/lcm32f06x_tim.c **** 
 2010              		.loc 1 988 16 is_stmt 0 view .LVU635
 2011 0046 8B68     		ldr	r3, [r1, #8]
 2012 0048 1B04     		lsls	r3, r3, #16
 988:Library/src/lcm32f06x_tim.c **** 
 2013              		.loc 1 988 13 view .LVU636
 2014 004a 2343     		orrs	r3, r4
 2015 004c EEE7     		b	.L90
 2016              	.L93:
 2017 004e C046     		.align	2
 2018              	.L92:
 2019 0050 FFFFFEFF 		.word	-65537
 2020 0054 FFFFFDFF 		.word	-131073
 2021 0058 00000140 		.word	1073807360
 2022 005c FFFFF7FF 		.word	-524289
 2023 0060 FFFFFBFF 		.word	-262145
 2024              		.cfi_endproc
 2025              	.LFE72:
 2027              		.section	.text.TIM_OCStructInit,"ax",%progbits
 2028              		.align	1
 2029              		.p2align 2,,3
 2030              		.global	TIM_OCStructInit
 2031              		.syntax unified
 2032              		.code	16
 2033              		.thumb_func
ARM GAS  /tmp/ccWBHqpW.s 			page 60


 2035              	TIM_OCStructInit:
 2036              	.LVL146:
 2037              	.LFB73:
1003:Library/src/lcm32f06x_tim.c **** /**
1004:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCStructInit
1005:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Fills each TIM_OCInitStruct member with its default value.
1006:Library/src/lcm32f06x_tim.c ****   *         CN: 用默认值填充每个 TIM_OCInitStruct 成员
1007:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICInitStruct:
1008:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_OCInitTypeDef structure that contains the 
1009:Library/src/lcm32f06x_tim.c ****   *             configuration information for the specified TIM Base peripheral.
1010:Library/src/lcm32f06x_tim.c ****   *         CN: 指向 TIM_OCInitTypeDef 结构的指针，该结构包含指定 TIM OC的配置信息
1011:Library/src/lcm32f06x_tim.c ****   * @retval None
1012:Library/src/lcm32f06x_tim.c ****   */
1013:Library/src/lcm32f06x_tim.c **** void TIM_OCStructInit(TIM_OCInitTypeDef *TIM_OCInitStruct)
1014:Library/src/lcm32f06x_tim.c **** {
 2038              		.loc 1 1014 1 is_stmt 1 view -0
 2039              		.cfi_startproc
 2040              		@ args = 0, pretend = 0, frame = 0
 2041              		@ frame_needed = 0, uses_anonymous_args = 0
 2042              		@ link register save eliminated.
1015:Library/src/lcm32f06x_tim.c ****   /* Set the default configuration */
1016:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing;
 2043              		.loc 1 1016 3 view .LVU638
 2044              		.loc 1 1016 32 is_stmt 0 view .LVU639
 2045 0000 0023     		movs	r3, #0
1017:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable;
1018:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OutputNState = TIM_OutputNState_Disable;
1019:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_Pulse = 0x0000000;
1020:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High;
1021:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCNPolarity = TIM_OCPolarity_High;
1022:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCIdleState = TIM_OCIdleState_Reset;
1023:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCNIdleState = TIM_OCNIdleState_Reset;
1024:Library/src/lcm32f06x_tim.c **** }
 2046              		.loc 1 1024 1 view .LVU640
 2047              		@ sp needed
1016:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable;
 2048              		.loc 1 1016 32 view .LVU641
 2049 0002 0360     		str	r3, [r0]
1017:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable;
 2050              		.loc 1 1017 3 is_stmt 1 view .LVU642
1017:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable;
 2051              		.loc 1 1017 37 is_stmt 0 view .LVU643
 2052 0004 4360     		str	r3, [r0, #4]
1018:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_Pulse = 0x0000000;
 2053              		.loc 1 1018 3 is_stmt 1 view .LVU644
1018:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_Pulse = 0x0000000;
 2054              		.loc 1 1018 38 is_stmt 0 view .LVU645
 2055 0006 8360     		str	r3, [r0, #8]
1019:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High;
 2056              		.loc 1 1019 3 is_stmt 1 view .LVU646
1019:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High;
 2057              		.loc 1 1019 31 is_stmt 0 view .LVU647
 2058 0008 C360     		str	r3, [r0, #12]
1020:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCNPolarity = TIM_OCPolarity_High;
 2059              		.loc 1 1020 3 is_stmt 1 view .LVU648
1020:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCNPolarity = TIM_OCPolarity_High;
 2060              		.loc 1 1020 36 is_stmt 0 view .LVU649
ARM GAS  /tmp/ccWBHqpW.s 			page 61


 2061 000a 0361     		str	r3, [r0, #16]
1021:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCIdleState = TIM_OCIdleState_Reset;
 2062              		.loc 1 1021 3 is_stmt 1 view .LVU650
1021:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCIdleState = TIM_OCIdleState_Reset;
 2063              		.loc 1 1021 37 is_stmt 0 view .LVU651
 2064 000c 4361     		str	r3, [r0, #20]
1022:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCNIdleState = TIM_OCNIdleState_Reset;
 2065              		.loc 1 1022 3 is_stmt 1 view .LVU652
1022:Library/src/lcm32f06x_tim.c ****   TIM_OCInitStruct->TIM_OCNIdleState = TIM_OCNIdleState_Reset;
 2066              		.loc 1 1022 37 is_stmt 0 view .LVU653
 2067 000e 8361     		str	r3, [r0, #24]
1023:Library/src/lcm32f06x_tim.c **** }
 2068              		.loc 1 1023 3 is_stmt 1 view .LVU654
1023:Library/src/lcm32f06x_tim.c **** }
 2069              		.loc 1 1023 38 is_stmt 0 view .LVU655
 2070 0010 C361     		str	r3, [r0, #28]
 2071              		.loc 1 1024 1 view .LVU656
 2072 0012 7047     		bx	lr
 2073              		.cfi_endproc
 2074              	.LFE73:
 2076              		.section	.text.TIM_SelectOCxM,"ax",%progbits
 2077              		.align	1
 2078              		.p2align 2,,3
 2079              		.global	TIM_SelectOCxM
 2080              		.syntax unified
 2081              		.code	16
 2082              		.thumb_func
 2084              	TIM_SelectOCxM:
 2085              	.LVL147:
 2086              	.LFB74:
1025:Library/src/lcm32f06x_tim.c **** 
1026:Library/src/lcm32f06x_tim.c **** /**
1027:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SelectOCxM
1028:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Selects the TIM Output Compare Mode.
1029:Library/src/lcm32f06x_tim.c ****   *         CN: 选择TIM输出比较模式。
1030:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
1031:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
1032:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
1033:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Channel: 
1034:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the TIM Channel
1035:Library/src/lcm32f06x_tim.c ****   *         CN: 指定TIM通道
1036:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_1
1037:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_2
1038:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_3
1039:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_4
1040:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_5
1041:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCx: 
1042:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the TIM Output Compare Mode.
1043:Library/src/lcm32f06x_tim.c ****   *         CN: 指定TIM输出比较模式。
1044:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCMode_Timing
1045:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCMode_Active
1046:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCMode_Toggle
1047:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCMode_PWM1
1048:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCMode_PWM2
1049:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_Active
1050:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_InActive
1051:Library/src/lcm32f06x_tim.c ****   * @retval None
ARM GAS  /tmp/ccWBHqpW.s 			page 62


1052:Library/src/lcm32f06x_tim.c ****   */
1053:Library/src/lcm32f06x_tim.c **** void TIM_SelectOCxM(TIM_TypeDef *TIMx, uint32_t TIM_Channel, uint32_t TIM_OCMode)
1054:Library/src/lcm32f06x_tim.c **** {
 2087              		.loc 1 1054 1 is_stmt 1 view -0
 2088              		.cfi_startproc
 2089              		@ args = 0, pretend = 0, frame = 0
 2090              		@ frame_needed = 0, uses_anonymous_args = 0
1055:Library/src/lcm32f06x_tim.c ****   uint32_t tmp = 0;
 2091              		.loc 1 1055 3 view .LVU658
1056:Library/src/lcm32f06x_tim.c ****   uint32_t tmp1 = 0;
 2092              		.loc 1 1056 3 view .LVU659
1057:Library/src/lcm32f06x_tim.c **** 
1058:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1059:Library/src/lcm32f06x_tim.c **** 
1060:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)TIMx;
 2093              		.loc 1 1060 3 view .LVU660
1061:Library/src/lcm32f06x_tim.c ****   tmp += 0x00000018;
 2094              		.loc 1 1061 3 view .LVU661
1054:Library/src/lcm32f06x_tim.c ****   uint32_t tmp = 0;
 2095              		.loc 1 1054 1 is_stmt 0 view .LVU662
 2096 0000 30B5     		push	{r4, r5, lr}
 2097              	.LCFI5:
 2098              		.cfi_def_cfa_offset 12
 2099              		.cfi_offset 4, -12
 2100              		.cfi_offset 5, -8
 2101              		.cfi_offset 14, -4
1062:Library/src/lcm32f06x_tim.c **** 
1063:Library/src/lcm32f06x_tim.c ****   tmp1 = TIM_CCER_CC1E_Msk << (uint32_t)TIM_Channel;
 2102              		.loc 1 1063 8 view .LVU663
 2103 0002 0124     		movs	r4, #1
 2104 0004 8C40     		lsls	r4, r4, r1
1064:Library/src/lcm32f06x_tim.c **** 
1065:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel: Reset the CCxE Bit */
1066:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t)~tmp1;
 2105              		.loc 1 1066 7 view .LVU664
 2106 0006 036A     		ldr	r3, [r0, #32]
1061:Library/src/lcm32f06x_tim.c **** 
 2107              		.loc 1 1061 7 view .LVU665
 2108 0008 0500     		movs	r5, r0
 2109              		.loc 1 1066 14 view .LVU666
 2110 000a A343     		bics	r3, r4
 2111 000c 0362     		str	r3, [r0, #32]
1067:Library/src/lcm32f06x_tim.c **** 
1068:Library/src/lcm32f06x_tim.c ****   if ((TIM_Channel == TIM_Channel_1) || (TIM_Channel == TIM_Channel_3))
 2112              		.loc 1 1068 6 view .LVU667
 2113 000e 0823     		movs	r3, #8
 2114 0010 0800     		movs	r0, r1
 2115              	.LVL148:
1061:Library/src/lcm32f06x_tim.c **** 
 2116              		.loc 1 1061 7 view .LVU668
 2117 0012 1835     		adds	r5, r5, #24
 2118              	.LVL149:
1063:Library/src/lcm32f06x_tim.c **** 
 2119              		.loc 1 1063 3 is_stmt 1 view .LVU669
1066:Library/src/lcm32f06x_tim.c **** 
 2120              		.loc 1 1066 3 view .LVU670
 2121              		.loc 1 1068 3 view .LVU671
ARM GAS  /tmp/ccWBHqpW.s 			page 63


 2122              		.loc 1 1068 6 is_stmt 0 view .LVU672
 2123 0014 9843     		bics	r0, r3
 2124 0016 0BD0     		beq	.L98
1069:Library/src/lcm32f06x_tim.c ****   {
1070:Library/src/lcm32f06x_tim.c ****     tmp += (TIM_Channel >> 1);
1071:Library/src/lcm32f06x_tim.c **** 
1072:Library/src/lcm32f06x_tim.c ****     /* Reset the OCxM bits in the CCMRx register */
1073:Library/src/lcm32f06x_tim.c ****     *(__IO uint32_t *)tmp &= (uint32_t) ~((uint32_t)TIM_CCMR1_Output_OC1M_Msk);
1074:Library/src/lcm32f06x_tim.c **** 
1075:Library/src/lcm32f06x_tim.c ****     /* Configure the OCxM bits in the CCMRx register */
1076:Library/src/lcm32f06x_tim.c ****     *(__IO uint32_t *)tmp |= TIM_OCMode;
1077:Library/src/lcm32f06x_tim.c ****   }
1078:Library/src/lcm32f06x_tim.c ****   else
1079:Library/src/lcm32f06x_tim.c ****   {
1080:Library/src/lcm32f06x_tim.c ****     tmp += (uint32_t)(TIM_Channel - (uint32_t)4) >> (uint32_t)1;
 2125              		.loc 1 1080 5 is_stmt 1 view .LVU673
 2126              	.LVL150:
1081:Library/src/lcm32f06x_tim.c **** 
1082:Library/src/lcm32f06x_tim.c ****     /* Reset the OCxM bits in the CCMRx register */
1083:Library/src/lcm32f06x_tim.c ****     *(__IO uint32_t *)tmp &= (uint32_t) ~((uint32_t)TIM_CCMR1_Output_OC2M_Msk);
 2127              		.loc 1 1083 5 view .LVU674
1080:Library/src/lcm32f06x_tim.c **** 
 2128              		.loc 1 1080 12 is_stmt 0 view .LVU675
 2129 0018 0439     		subs	r1, r1, #4
 2130              	.LVL151:
1080:Library/src/lcm32f06x_tim.c **** 
 2131              		.loc 1 1080 50 view .LVU676
 2132 001a 4908     		lsrs	r1, r1, #1
 2133              	.LVL152:
1080:Library/src/lcm32f06x_tim.c **** 
 2134              		.loc 1 1080 9 view .LVU677
 2135 001c 4919     		adds	r1, r1, r5
 2136              	.LVL153:
 2137              		.loc 1 1083 5 view .LVU678
 2138 001e 0B68     		ldr	r3, [r1]
 2139              		.loc 1 1083 27 view .LVU679
 2140 0020 0848     		ldr	r0, .L99
1084:Library/src/lcm32f06x_tim.c **** 
1085:Library/src/lcm32f06x_tim.c ****     /* Configure the OCxM bits in the CCMRx register */
1086:Library/src/lcm32f06x_tim.c ****     *(__IO uint32_t *)tmp |= (uint32_t)(TIM_OCMode << 8);
 2141              		.loc 1 1086 30 view .LVU680
 2142 0022 1202     		lsls	r2, r2, #8
 2143              	.LVL154:
1083:Library/src/lcm32f06x_tim.c **** 
 2144              		.loc 1 1083 27 view .LVU681
 2145 0024 0340     		ands	r3, r0
 2146 0026 0B60     		str	r3, [r1]
 2147              		.loc 1 1086 5 is_stmt 1 view .LVU682
 2148 0028 0B68     		ldr	r3, [r1]
 2149              		.loc 1 1086 27 is_stmt 0 view .LVU683
 2150 002a 1A43     		orrs	r2, r3
 2151 002c 0A60     		str	r2, [r1]
 2152              	.L95:
1087:Library/src/lcm32f06x_tim.c ****   }
1088:Library/src/lcm32f06x_tim.c **** }
 2153              		.loc 1 1088 1 view .LVU684
 2154              		@ sp needed
ARM GAS  /tmp/ccWBHqpW.s 			page 64


 2155              	.LVL155:
 2156              	.LVL156:
 2157              		.loc 1 1088 1 view .LVU685
 2158 002e 30BD     		pop	{r4, r5, pc}
 2159              	.LVL157:
 2160              	.L98:
1070:Library/src/lcm32f06x_tim.c **** 
 2161              		.loc 1 1070 5 is_stmt 1 view .LVU686
1073:Library/src/lcm32f06x_tim.c **** 
 2162              		.loc 1 1073 5 view .LVU687
1073:Library/src/lcm32f06x_tim.c **** 
 2163              		.loc 1 1073 27 is_stmt 0 view .LVU688
 2164 0030 7020     		movs	r0, #112
1070:Library/src/lcm32f06x_tim.c **** 
 2165              		.loc 1 1070 25 view .LVU689
 2166 0032 4908     		lsrs	r1, r1, #1
 2167              	.LVL158:
1070:Library/src/lcm32f06x_tim.c **** 
 2168              		.loc 1 1070 9 view .LVU690
 2169 0034 4919     		adds	r1, r1, r5
 2170              	.LVL159:
1073:Library/src/lcm32f06x_tim.c **** 
 2171              		.loc 1 1073 5 view .LVU691
 2172 0036 0B68     		ldr	r3, [r1]
1073:Library/src/lcm32f06x_tim.c **** 
 2173              		.loc 1 1073 27 view .LVU692
 2174 0038 8343     		bics	r3, r0
 2175 003a 0B60     		str	r3, [r1]
1076:Library/src/lcm32f06x_tim.c ****   }
 2176              		.loc 1 1076 5 is_stmt 1 view .LVU693
 2177 003c 0B68     		ldr	r3, [r1]
1076:Library/src/lcm32f06x_tim.c ****   }
 2178              		.loc 1 1076 27 is_stmt 0 view .LVU694
 2179 003e 1343     		orrs	r3, r2
 2180 0040 0B60     		str	r3, [r1]
 2181 0042 F4E7     		b	.L95
 2182              	.L100:
 2183              		.align	2
 2184              	.L99:
 2185 0044 FF8FFFFF 		.word	-28673
 2186              		.cfi_endproc
 2187              	.LFE74:
 2189              		.section	.text.TIM_SetCompare1,"ax",%progbits
 2190              		.align	1
 2191              		.p2align 2,,3
 2192              		.global	TIM_SetCompare1
 2193              		.syntax unified
 2194              		.code	16
 2195              		.thumb_func
 2197              	TIM_SetCompare1:
 2198              	.LVL160:
 2199              	.LFB75:
1089:Library/src/lcm32f06x_tim.c **** 
1090:Library/src/lcm32f06x_tim.c **** /**
1091:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCompare1
1092:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Capture Compare1 Register value.
1093:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx Capture Compare1寄存器值。
ARM GAS  /tmp/ccWBHqpW.s 			page 65


1094:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1095:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
1096:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
1097:Library/src/lcm32f06x_tim.c ****   * @param  Compare1: 
1098:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture Compare1 register new value.
1099:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Capture Compare1寄存器的新值。
1100:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
1101:Library/src/lcm32f06x_tim.c ****   * @retval None
1102:Library/src/lcm32f06x_tim.c ****   */
1103:Library/src/lcm32f06x_tim.c **** void TIM_SetCompare1(TIM_TypeDef *TIMx, uint32_t Compare1)
1104:Library/src/lcm32f06x_tim.c **** {
 2200              		.loc 1 1104 1 is_stmt 1 view -0
 2201              		.cfi_startproc
 2202              		@ args = 0, pretend = 0, frame = 0
 2203              		@ frame_needed = 0, uses_anonymous_args = 0
 2204              		@ link register save eliminated.
1105:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1106:Library/src/lcm32f06x_tim.c **** 
1107:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare1 Register value */
1108:Library/src/lcm32f06x_tim.c ****   TIMx->CCR1 = Compare1;
 2205              		.loc 1 1108 3 view .LVU696
 2206              		.loc 1 1108 14 is_stmt 0 view .LVU697
 2207 0000 4163     		str	r1, [r0, #52]
1109:Library/src/lcm32f06x_tim.c **** }
 2208              		.loc 1 1109 1 view .LVU698
 2209              		@ sp needed
 2210 0002 7047     		bx	lr
 2211              		.cfi_endproc
 2212              	.LFE75:
 2214              		.section	.text.TIM_SetCompare2,"ax",%progbits
 2215              		.align	1
 2216              		.p2align 2,,3
 2217              		.global	TIM_SetCompare2
 2218              		.syntax unified
 2219              		.code	16
 2220              		.thumb_func
 2222              	TIM_SetCompare2:
 2223              	.LVL161:
 2224              	.LFB76:
1110:Library/src/lcm32f06x_tim.c **** 
1111:Library/src/lcm32f06x_tim.c **** /**
1112:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCompare2
1113:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Capture Compare2 Register value.
1114:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx Capture Compare2寄存器值。
1115:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1116:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15 or 16 to select the TIM peripheral.
1117:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
1118:Library/src/lcm32f06x_tim.c ****   * @param  Compare2: 
1119:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture Compare2 register new value.
1120:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Capture Compare2寄存器的新值。
1121:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
1122:Library/src/lcm32f06x_tim.c ****   * @retval None
1123:Library/src/lcm32f06x_tim.c ****   */
1124:Library/src/lcm32f06x_tim.c **** void TIM_SetCompare2(TIM_TypeDef *TIMx, uint32_t Compare2)
1125:Library/src/lcm32f06x_tim.c **** {
 2225              		.loc 1 1125 1 is_stmt 1 view -0
 2226              		.cfi_startproc
ARM GAS  /tmp/ccWBHqpW.s 			page 66


 2227              		@ args = 0, pretend = 0, frame = 0
 2228              		@ frame_needed = 0, uses_anonymous_args = 0
 2229              		@ link register save eliminated.
1126:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1127:Library/src/lcm32f06x_tim.c **** 
1128:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare2 Register value */
1129:Library/src/lcm32f06x_tim.c ****   TIMx->CCR2 = Compare2;
 2230              		.loc 1 1129 3 view .LVU700
 2231              		.loc 1 1129 14 is_stmt 0 view .LVU701
 2232 0000 8163     		str	r1, [r0, #56]
1130:Library/src/lcm32f06x_tim.c **** }
 2233              		.loc 1 1130 1 view .LVU702
 2234              		@ sp needed
 2235 0002 7047     		bx	lr
 2236              		.cfi_endproc
 2237              	.LFE76:
 2239              		.section	.text.TIM_SetCompare3,"ax",%progbits
 2240              		.align	1
 2241              		.p2align 2,,3
 2242              		.global	TIM_SetCompare3
 2243              		.syntax unified
 2244              		.code	16
 2245              		.thumb_func
 2247              	TIM_SetCompare3:
 2248              	.LVL162:
 2249              	.LFB77:
1131:Library/src/lcm32f06x_tim.c **** 
1132:Library/src/lcm32f06x_tim.c **** /**
1133:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCompare3
1134:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Capture Compare3 Register value.
1135:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx Capture Compare3寄存器值。
1136:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1137:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1138:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1139:Library/src/lcm32f06x_tim.c ****   * @param  Compare3: 
1140:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture Compare3 register new value.
1141:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Capture Compare3寄存器的新值。
1142:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
1143:Library/src/lcm32f06x_tim.c ****   * @retval None
1144:Library/src/lcm32f06x_tim.c ****   */
1145:Library/src/lcm32f06x_tim.c **** void TIM_SetCompare3(TIM_TypeDef *TIMx, uint32_t Compare3)
1146:Library/src/lcm32f06x_tim.c **** {
 2250              		.loc 1 1146 1 is_stmt 1 view -0
 2251              		.cfi_startproc
 2252              		@ args = 0, pretend = 0, frame = 0
 2253              		@ frame_needed = 0, uses_anonymous_args = 0
 2254              		@ link register save eliminated.
1147:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1148:Library/src/lcm32f06x_tim.c **** 
1149:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare3 Register value */
1150:Library/src/lcm32f06x_tim.c ****   TIMx->CCR3 = Compare3;
 2255              		.loc 1 1150 3 view .LVU704
 2256              		.loc 1 1150 14 is_stmt 0 view .LVU705
 2257 0000 C163     		str	r1, [r0, #60]
1151:Library/src/lcm32f06x_tim.c **** }
 2258              		.loc 1 1151 1 view .LVU706
 2259              		@ sp needed
ARM GAS  /tmp/ccWBHqpW.s 			page 67


 2260 0002 7047     		bx	lr
 2261              		.cfi_endproc
 2262              	.LFE77:
 2264              		.section	.text.TIM_SetCompare4,"ax",%progbits
 2265              		.align	1
 2266              		.p2align 2,,3
 2267              		.global	TIM_SetCompare4
 2268              		.syntax unified
 2269              		.code	16
 2270              		.thumb_func
 2272              	TIM_SetCompare4:
 2273              	.LVL163:
 2274              	.LFB78:
1152:Library/src/lcm32f06x_tim.c **** 
1153:Library/src/lcm32f06x_tim.c **** /**
1154:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCompare4
1155:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Capture Compare4 Register value.
1156:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx Capture Compare4寄存器值。
1157:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1158:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1159:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1160:Library/src/lcm32f06x_tim.c ****   * @param  Compare4: 
1161:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture Compare4 register new value.
1162:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Capture Compare4寄存器的新值。
1163:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
1164:Library/src/lcm32f06x_tim.c ****   * @retval None
1165:Library/src/lcm32f06x_tim.c ****   */
1166:Library/src/lcm32f06x_tim.c **** void TIM_SetCompare4(TIM_TypeDef *TIMx, uint32_t Compare4)
1167:Library/src/lcm32f06x_tim.c **** {
 2275              		.loc 1 1167 1 is_stmt 1 view -0
 2276              		.cfi_startproc
 2277              		@ args = 0, pretend = 0, frame = 0
 2278              		@ frame_needed = 0, uses_anonymous_args = 0
 2279              		@ link register save eliminated.
1168:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1169:Library/src/lcm32f06x_tim.c **** 
1170:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare4 Register value */
1171:Library/src/lcm32f06x_tim.c ****   TIMx->CCR4 = Compare4;
 2280              		.loc 1 1171 3 view .LVU708
 2281              		.loc 1 1171 14 is_stmt 0 view .LVU709
 2282 0000 0164     		str	r1, [r0, #64]
1172:Library/src/lcm32f06x_tim.c **** }
 2283              		.loc 1 1172 1 view .LVU710
 2284              		@ sp needed
 2285 0002 7047     		bx	lr
 2286              		.cfi_endproc
 2287              	.LFE78:
 2289              		.section	.text.TIM_SetCompare5,"ax",%progbits
 2290              		.align	1
 2291              		.p2align 2,,3
 2292              		.global	TIM_SetCompare5
 2293              		.syntax unified
 2294              		.code	16
 2295              		.thumb_func
 2297              	TIM_SetCompare5:
 2298              	.LVL164:
 2299              	.LFB79:
ARM GAS  /tmp/ccWBHqpW.s 			page 68


1173:Library/src/lcm32f06x_tim.c **** 
1174:Library/src/lcm32f06x_tim.c **** /**
1175:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCompare4
1176:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Capture Compare4 Register value.
1177:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx Capture Compare4寄存器值。
1178:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1179:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
1180:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
1181:Library/src/lcm32f06x_tim.c ****   * @param  Compare5: 
1182:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture Compare5 register new value.
1183:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Capture Compare5寄存器的新值。
1184:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
1185:Library/src/lcm32f06x_tim.c ****   * @retval None
1186:Library/src/lcm32f06x_tim.c ****   */
1187:Library/src/lcm32f06x_tim.c **** void TIM_SetCompare5(TIM_TypeDef *TIMx, uint32_t Compare5)
1188:Library/src/lcm32f06x_tim.c **** {
 2300              		.loc 1 1188 1 is_stmt 1 view -0
 2301              		.cfi_startproc
 2302              		@ args = 0, pretend = 0, frame = 0
 2303              		@ frame_needed = 0, uses_anonymous_args = 0
 2304              		@ link register save eliminated.
1189:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1190:Library/src/lcm32f06x_tim.c **** 
1191:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare4 Register value */
1192:Library/src/lcm32f06x_tim.c ****   TIMx->CCR5 = Compare5;
 2305              		.loc 1 1192 3 view .LVU712
 2306              		.loc 1 1192 14 is_stmt 0 view .LVU713
 2307 0000 8165     		str	r1, [r0, #88]
1193:Library/src/lcm32f06x_tim.c **** }
 2308              		.loc 1 1193 1 view .LVU714
 2309              		@ sp needed
 2310 0002 7047     		bx	lr
 2311              		.cfi_endproc
 2312              	.LFE79:
 2314              		.section	.text.TIM_ForcedOC1Config,"ax",%progbits
 2315              		.align	1
 2316              		.p2align 2,,3
 2317              		.global	TIM_ForcedOC1Config
 2318              		.syntax unified
 2319              		.code	16
 2320              		.thumb_func
 2322              	TIM_ForcedOC1Config:
 2323              	.LVL165:
 2324              	.LFB80:
1194:Library/src/lcm32f06x_tim.c **** 
1195:Library/src/lcm32f06x_tim.c **** /**
1196:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ForcedOC1Config
1197:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Forces the TIMx output 1 waveform to active or inactive level.
1198:Library/src/lcm32f06x_tim.c ****   *         CN: 强制TIMx输出1波形为激活或非激活电平。
1199:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1200:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
1201:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
1202:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ForcedAction: 
1203:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the forced Action to be set to the output waveform.
1204:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要设置为输出波形的强制动作。
1205:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_Active
1206:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_InActive
ARM GAS  /tmp/ccWBHqpW.s 			page 69


1207:Library/src/lcm32f06x_tim.c ****   * @retval None
1208:Library/src/lcm32f06x_tim.c ****   */
1209:Library/src/lcm32f06x_tim.c **** void TIM_ForcedOC1Config(TIM_TypeDef *TIMx, uint32_t TIM_ForcedAction)
1210:Library/src/lcm32f06x_tim.c **** {
 2325              		.loc 1 1210 1 is_stmt 1 view -0
 2326              		.cfi_startproc
 2327              		@ args = 0, pretend = 0, frame = 0
 2328              		@ frame_needed = 0, uses_anonymous_args = 0
 2329              		@ link register save eliminated.
1211:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0;
 2330              		.loc 1 1211 3 view .LVU716
1212:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1213:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 2331              		.loc 1 1213 3 view .LVU717
1214:Library/src/lcm32f06x_tim.c ****   /* Reset the OC1M Bits */
1215:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t) ~((uint32_t)TIM_CCMR1_Output_OC1M_Msk);
 2332              		.loc 1 1215 12 is_stmt 0 view .LVU718
 2333 0000 7022     		movs	r2, #112
1216:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
1217:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= TIM_ForcedAction;
1218:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
1219:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
1220:Library/src/lcm32f06x_tim.c **** }
 2334              		.loc 1 1220 1 view .LVU719
 2335              		@ sp needed
1213:Library/src/lcm32f06x_tim.c ****   /* Reset the OC1M Bits */
 2336              		.loc 1 1213 12 view .LVU720
 2337 0002 8369     		ldr	r3, [r0, #24]
 2338              	.LVL166:
1215:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
 2339              		.loc 1 1215 3 is_stmt 1 view .LVU721
1215:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
 2340              		.loc 1 1215 12 is_stmt 0 view .LVU722
 2341 0004 9343     		bics	r3, r2
 2342              	.LVL167:
1217:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
 2343              		.loc 1 1217 3 is_stmt 1 view .LVU723
1217:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
 2344              		.loc 1 1217 12 is_stmt 0 view .LVU724
 2345 0006 0B43     		orrs	r3, r1
 2346              	.LVL168:
1219:Library/src/lcm32f06x_tim.c **** }
 2347              		.loc 1 1219 3 is_stmt 1 view .LVU725
1219:Library/src/lcm32f06x_tim.c **** }
 2348              		.loc 1 1219 15 is_stmt 0 view .LVU726
 2349 0008 8361     		str	r3, [r0, #24]
 2350              		.loc 1 1220 1 view .LVU727
 2351 000a 7047     		bx	lr
 2352              		.cfi_endproc
 2353              	.LFE80:
 2355              		.section	.text.TIM_ForcedOC2Config,"ax",%progbits
 2356              		.align	1
 2357              		.p2align 2,,3
 2358              		.global	TIM_ForcedOC2Config
 2359              		.syntax unified
 2360              		.code	16
 2361              		.thumb_func
ARM GAS  /tmp/ccWBHqpW.s 			page 70


 2363              	TIM_ForcedOC2Config:
 2364              	.LVL169:
 2365              	.LFB81:
1221:Library/src/lcm32f06x_tim.c **** 
1222:Library/src/lcm32f06x_tim.c **** /**
1223:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ForcedOC2Config
1224:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Forces the TIMx output 2 waveform to active or inactive level.
1225:Library/src/lcm32f06x_tim.c ****   *         CN: 强制TIMx输出2波形为激活或非激活电平。
1226:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1227:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15 or 16 to select the TIM peripheral.
1228:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
1229:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ForcedAction: 
1230:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the forced Action to be set to the output waveform.
1231:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要设置为输出波形的强制动作。
1232:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_Active
1233:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_InActive
1234:Library/src/lcm32f06x_tim.c ****   * @retval None
1235:Library/src/lcm32f06x_tim.c ****   */
1236:Library/src/lcm32f06x_tim.c **** void TIM_ForcedOC2Config(TIM_TypeDef *TIMx, uint32_t TIM_ForcedAction)
1237:Library/src/lcm32f06x_tim.c **** {
 2366              		.loc 1 1237 1 is_stmt 1 view -0
 2367              		.cfi_startproc
 2368              		@ args = 0, pretend = 0, frame = 0
 2369              		@ frame_needed = 0, uses_anonymous_args = 0
 2370              		@ link register save eliminated.
1238:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0;
 2371              		.loc 1 1238 3 view .LVU729
1239:Library/src/lcm32f06x_tim.c **** 
1240:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1241:Library/src/lcm32f06x_tim.c **** 
1242:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 2372              		.loc 1 1242 3 view .LVU730
 2373              		.loc 1 1242 12 is_stmt 0 view .LVU731
 2374 0000 8369     		ldr	r3, [r0, #24]
 2375              	.LVL170:
1243:Library/src/lcm32f06x_tim.c ****   /* Reset the OC2M Bits */
1244:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t) ~((uint32_t)TIM_CCMR1_Output_OC2M_Msk);
 2376              		.loc 1 1244 3 is_stmt 1 view .LVU732
 2377              		.loc 1 1244 12 is_stmt 0 view .LVU733
 2378 0002 034A     		ldr	r2, .L108
1245:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
1246:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ForcedAction << 8);
 2379              		.loc 1 1246 15 view .LVU734
 2380 0004 0902     		lsls	r1, r1, #8
 2381              	.LVL171:
1244:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
 2382              		.loc 1 1244 12 view .LVU735
 2383 0006 1340     		ands	r3, r2
 2384              	.LVL172:
 2385              		.loc 1 1246 3 is_stmt 1 view .LVU736
 2386              		.loc 1 1246 12 is_stmt 0 view .LVU737
 2387 0008 1943     		orrs	r1, r3
 2388              	.LVL173:
1247:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
1248:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
 2389              		.loc 1 1248 3 is_stmt 1 view .LVU738
 2390              		.loc 1 1248 15 is_stmt 0 view .LVU739
ARM GAS  /tmp/ccWBHqpW.s 			page 71


 2391 000a 8161     		str	r1, [r0, #24]
1249:Library/src/lcm32f06x_tim.c **** }
 2392              		.loc 1 1249 1 view .LVU740
 2393              		@ sp needed
 2394 000c 7047     		bx	lr
 2395              	.L109:
 2396 000e C046     		.align	2
 2397              	.L108:
 2398 0010 FF8FFFFF 		.word	-28673
 2399              		.cfi_endproc
 2400              	.LFE81:
 2402              		.section	.text.TIM_ForcedOC3Config,"ax",%progbits
 2403              		.align	1
 2404              		.p2align 2,,3
 2405              		.global	TIM_ForcedOC3Config
 2406              		.syntax unified
 2407              		.code	16
 2408              		.thumb_func
 2410              	TIM_ForcedOC3Config:
 2411              	.LVL174:
 2412              	.LFB82:
1250:Library/src/lcm32f06x_tim.c **** 
1251:Library/src/lcm32f06x_tim.c **** /**
1252:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ForcedOC3Config
1253:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Forces the TIMx output 3 waveform to active or inactive level.
1254:Library/src/lcm32f06x_tim.c ****   *         CN: 强制TIMx输出3波形为激活或非激活电平。
1255:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1256:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1257:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1258:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ForcedAction: 
1259:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the forced Action to be set to the output waveform.
1260:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要设置为输出波形的强制动作。
1261:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_Active
1262:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_InActive
1263:Library/src/lcm32f06x_tim.c ****   * @retval None
1264:Library/src/lcm32f06x_tim.c ****   */
1265:Library/src/lcm32f06x_tim.c **** void TIM_ForcedOC3Config(TIM_TypeDef *TIMx, uint32_t TIM_ForcedAction)
1266:Library/src/lcm32f06x_tim.c **** {
 2413              		.loc 1 1266 1 is_stmt 1 view -0
 2414              		.cfi_startproc
 2415              		@ args = 0, pretend = 0, frame = 0
 2416              		@ frame_needed = 0, uses_anonymous_args = 0
 2417              		@ link register save eliminated.
1267:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0;
 2418              		.loc 1 1267 3 view .LVU742
1268:Library/src/lcm32f06x_tim.c **** 
1269:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1270:Library/src/lcm32f06x_tim.c **** 
1271:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 2419              		.loc 1 1271 3 view .LVU743
1272:Library/src/lcm32f06x_tim.c ****   /* Reset the OC1M Bits */
1273:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t) ~((uint32_t)TIM_CCMR2_Output_OC3M_Msk);
 2420              		.loc 1 1273 12 is_stmt 0 view .LVU744
 2421 0000 7022     		movs	r2, #112
1274:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
1275:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= TIM_ForcedAction;
1276:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
ARM GAS  /tmp/ccWBHqpW.s 			page 72


1277:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmr2;
1278:Library/src/lcm32f06x_tim.c **** }
 2422              		.loc 1 1278 1 view .LVU745
 2423              		@ sp needed
1271:Library/src/lcm32f06x_tim.c ****   /* Reset the OC1M Bits */
 2424              		.loc 1 1271 12 view .LVU746
 2425 0002 C369     		ldr	r3, [r0, #28]
 2426              	.LVL175:
1273:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
 2427              		.loc 1 1273 3 is_stmt 1 view .LVU747
1273:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
 2428              		.loc 1 1273 12 is_stmt 0 view .LVU748
 2429 0004 9343     		bics	r3, r2
 2430              	.LVL176:
1275:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
 2431              		.loc 1 1275 3 is_stmt 1 view .LVU749
1275:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
 2432              		.loc 1 1275 12 is_stmt 0 view .LVU750
 2433 0006 0B43     		orrs	r3, r1
 2434              	.LVL177:
1277:Library/src/lcm32f06x_tim.c **** }
 2435              		.loc 1 1277 3 is_stmt 1 view .LVU751
1277:Library/src/lcm32f06x_tim.c **** }
 2436              		.loc 1 1277 15 is_stmt 0 view .LVU752
 2437 0008 C361     		str	r3, [r0, #28]
 2438              		.loc 1 1278 1 view .LVU753
 2439 000a 7047     		bx	lr
 2440              		.cfi_endproc
 2441              	.LFE82:
 2443              		.section	.text.TIM_ForcedOC4Config,"ax",%progbits
 2444              		.align	1
 2445              		.p2align 2,,3
 2446              		.global	TIM_ForcedOC4Config
 2447              		.syntax unified
 2448              		.code	16
 2449              		.thumb_func
 2451              	TIM_ForcedOC4Config:
 2452              	.LVL178:
 2453              	.LFB83:
1279:Library/src/lcm32f06x_tim.c **** 
1280:Library/src/lcm32f06x_tim.c **** /**
1281:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ForcedOC4Config
1282:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Forces the TIMx output 4 waveform to active or inactive level.
1283:Library/src/lcm32f06x_tim.c ****   *         CN: 强制TIMx输出4波形为激活或非激活电平。
1284:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1285:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1286:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1287:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ForcedAction: 
1288:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the forced Action to be set to the output waveform.
1289:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要设置为输出波形的强制动作。
1290:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_Active
1291:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_InActive
1292:Library/src/lcm32f06x_tim.c ****   * @retval None
1293:Library/src/lcm32f06x_tim.c ****   */
1294:Library/src/lcm32f06x_tim.c **** void TIM_ForcedOC4Config(TIM_TypeDef *TIMx, uint32_t TIM_ForcedAction)
1295:Library/src/lcm32f06x_tim.c **** {
 2454              		.loc 1 1295 1 is_stmt 1 view -0
ARM GAS  /tmp/ccWBHqpW.s 			page 73


 2455              		.cfi_startproc
 2456              		@ args = 0, pretend = 0, frame = 0
 2457              		@ frame_needed = 0, uses_anonymous_args = 0
 2458              		@ link register save eliminated.
1296:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0;
 2459              		.loc 1 1296 3 view .LVU755
1297:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1298:Library/src/lcm32f06x_tim.c **** 
1299:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 2460              		.loc 1 1299 3 view .LVU756
 2461              		.loc 1 1299 12 is_stmt 0 view .LVU757
 2462 0000 C369     		ldr	r3, [r0, #28]
 2463              	.LVL179:
1300:Library/src/lcm32f06x_tim.c ****   /* Reset the OC2M Bits */
1301:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t) ~((uint32_t)TIM_CCMR2_Output_OC4M_Msk);
 2464              		.loc 1 1301 3 is_stmt 1 view .LVU758
 2465              		.loc 1 1301 12 is_stmt 0 view .LVU759
 2466 0002 034A     		ldr	r2, .L112
1302:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
1303:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ForcedAction << 8);
 2467              		.loc 1 1303 15 view .LVU760
 2468 0004 0902     		lsls	r1, r1, #8
 2469              	.LVL180:
1301:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
 2470              		.loc 1 1301 12 view .LVU761
 2471 0006 1340     		ands	r3, r2
 2472              	.LVL181:
 2473              		.loc 1 1303 3 is_stmt 1 view .LVU762
 2474              		.loc 1 1303 12 is_stmt 0 view .LVU763
 2475 0008 1943     		orrs	r1, r3
 2476              	.LVL182:
1304:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
1305:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmr2;
 2477              		.loc 1 1305 3 is_stmt 1 view .LVU764
 2478              		.loc 1 1305 15 is_stmt 0 view .LVU765
 2479 000a C161     		str	r1, [r0, #28]
1306:Library/src/lcm32f06x_tim.c **** }
 2480              		.loc 1 1306 1 view .LVU766
 2481              		@ sp needed
 2482 000c 7047     		bx	lr
 2483              	.L113:
 2484 000e C046     		.align	2
 2485              	.L112:
 2486 0010 FF8FFFFF 		.word	-28673
 2487              		.cfi_endproc
 2488              	.LFE83:
 2490              		.section	.text.TIM_ForcedOC5Config,"ax",%progbits
 2491              		.align	1
 2492              		.p2align 2,,3
 2493              		.global	TIM_ForcedOC5Config
 2494              		.syntax unified
 2495              		.code	16
 2496              		.thumb_func
 2498              	TIM_ForcedOC5Config:
 2499              	.LVL183:
 2500              	.LFB84:
1307:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 74


1308:Library/src/lcm32f06x_tim.c **** /**
1309:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ForcedOC5Config
1310:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Forces the TIMx output 5 waveform to active or inactive level.
1311:Library/src/lcm32f06x_tim.c ****   *         CN: 强制TIMx输出5波形为激活或非激活电平。
1312:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1313:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
1314:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
1315:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ForcedAction: 
1316:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the forced Action to be set to the output waveform.
1317:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要设置为输出波形的强制动作。
1318:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_Active
1319:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ForcedAction_InActive
1320:Library/src/lcm32f06x_tim.c ****   * @retval None
1321:Library/src/lcm32f06x_tim.c ****   */
1322:Library/src/lcm32f06x_tim.c **** void TIM_ForcedOC5Config(TIM_TypeDef *TIMx, uint32_t TIM_ForcedAction)
1323:Library/src/lcm32f06x_tim.c **** {
 2501              		.loc 1 1323 1 is_stmt 1 view -0
 2502              		.cfi_startproc
 2503              		@ args = 0, pretend = 0, frame = 0
 2504              		@ frame_needed = 0, uses_anonymous_args = 0
 2505              		@ link register save eliminated.
1324:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr3 = 0;
 2506              		.loc 1 1324 3 view .LVU768
1325:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1326:Library/src/lcm32f06x_tim.c **** 
1327:Library/src/lcm32f06x_tim.c ****   tmpccmr3 = TIMx->CCMR3;
 2507              		.loc 1 1327 3 view .LVU769
1328:Library/src/lcm32f06x_tim.c ****   /* Reset the OC3M Bits */
1329:Library/src/lcm32f06x_tim.c ****   tmpccmr3 &= (uint32_t) ~((uint32_t)TIM_CCMR3_Output_OC5M_Msk);
 2508              		.loc 1 1329 12 is_stmt 0 view .LVU770
 2509 0000 7022     		movs	r2, #112
1330:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
1331:Library/src/lcm32f06x_tim.c ****   tmpccmr3 |= (uint32_t)TIM_ForcedAction;
1332:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 register */
1333:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR3 = tmpccmr3;
1334:Library/src/lcm32f06x_tim.c **** }
 2510              		.loc 1 1334 1 view .LVU771
 2511              		@ sp needed
1327:Library/src/lcm32f06x_tim.c ****   /* Reset the OC3M Bits */
 2512              		.loc 1 1327 12 view .LVU772
 2513 0002 436D     		ldr	r3, [r0, #84]
 2514              	.LVL184:
1329:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
 2515              		.loc 1 1329 3 is_stmt 1 view .LVU773
1329:Library/src/lcm32f06x_tim.c ****   /* Configure The Forced output Mode */
 2516              		.loc 1 1329 12 is_stmt 0 view .LVU774
 2517 0004 9343     		bics	r3, r2
 2518              	.LVL185:
1331:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 register */
 2519              		.loc 1 1331 3 is_stmt 1 view .LVU775
1331:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 register */
 2520              		.loc 1 1331 12 is_stmt 0 view .LVU776
 2521 0006 0B43     		orrs	r3, r1
 2522              	.LVL186:
1333:Library/src/lcm32f06x_tim.c **** }
 2523              		.loc 1 1333 3 is_stmt 1 view .LVU777
1333:Library/src/lcm32f06x_tim.c **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 75


 2524              		.loc 1 1333 15 is_stmt 0 view .LVU778
 2525 0008 4365     		str	r3, [r0, #84]
 2526              		.loc 1 1334 1 view .LVU779
 2527 000a 7047     		bx	lr
 2528              		.cfi_endproc
 2529              	.LFE84:
 2531              		.section	.text.TIM_CCPreloadControl,"ax",%progbits
 2532              		.align	1
 2533              		.p2align 2,,3
 2534              		.global	TIM_CCPreloadControl
 2535              		.syntax unified
 2536              		.code	16
 2537              		.thumb_func
 2539              	TIM_CCPreloadControl:
 2540              	.LVL187:
 2541              	.LFB85:
1335:Library/src/lcm32f06x_tim.c **** 
1336:Library/src/lcm32f06x_tim.c **** /**
1337:Library/src/lcm32f06x_tim.c ****   * @name   TIM_CCPreloadControl
1338:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets or Resets the TIM peripheral Capture Compare Preload Control bit.
1339:Library/src/lcm32f06x_tim.c ****   *         CN: 设置或重置TIM外围设备捕获比较预加载控制位。
1340:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1341:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
1342:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
1343:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
1344:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Capture Compare Preload Control bit.
1345:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较预加载控制位的新状态。
1346:Library/src/lcm32f06x_tim.c ****   * @retval None
1347:Library/src/lcm32f06x_tim.c ****   */
1348:Library/src/lcm32f06x_tim.c **** void TIM_CCPreloadControl(TIM_TypeDef *TIMx, FunctionalState NewState)
1349:Library/src/lcm32f06x_tim.c **** {
 2542              		.loc 1 1349 1 is_stmt 1 view -0
 2543              		.cfi_startproc
 2544              		@ args = 0, pretend = 0, frame = 0
 2545              		@ frame_needed = 0, uses_anonymous_args = 0
 2546              		@ link register save eliminated.
1350:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1351:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 2547              		.loc 1 1351 3 view .LVU781
1352:Library/src/lcm32f06x_tim.c ****   {
1353:Library/src/lcm32f06x_tim.c ****     /* Set the CCPC Bit */
1354:Library/src/lcm32f06x_tim.c ****     TIMx->CR2 |= TIM_CR2_CCPC_Msk;
 2548              		.loc 1 1354 15 is_stmt 0 view .LVU782
 2549 0000 0122     		movs	r2, #1
 2550              		.loc 1 1354 9 view .LVU783
 2551 0002 4368     		ldr	r3, [r0, #4]
1351:Library/src/lcm32f06x_tim.c ****   {
 2552              		.loc 1 1351 6 view .LVU784
 2553 0004 0029     		cmp	r1, #0
 2554 0006 02D0     		beq	.L116
 2555              		.loc 1 1354 5 is_stmt 1 view .LVU785
 2556              		.loc 1 1354 15 is_stmt 0 view .LVU786
 2557 0008 1343     		orrs	r3, r2
 2558 000a 4360     		str	r3, [r0, #4]
 2559              	.L115:
1355:Library/src/lcm32f06x_tim.c ****   }
1356:Library/src/lcm32f06x_tim.c ****   else
ARM GAS  /tmp/ccWBHqpW.s 			page 76


1357:Library/src/lcm32f06x_tim.c ****   {
1358:Library/src/lcm32f06x_tim.c ****     /* Reset the CCPC Bit */
1359:Library/src/lcm32f06x_tim.c ****     TIMx->CR2 &= (uint32_t) ~((uint32_t)TIM_CR2_CCPC_Msk);
1360:Library/src/lcm32f06x_tim.c ****   }
1361:Library/src/lcm32f06x_tim.c **** }
 2560              		.loc 1 1361 1 view .LVU787
 2561              		@ sp needed
 2562 000c 7047     		bx	lr
 2563              	.L116:
1359:Library/src/lcm32f06x_tim.c ****   }
 2564              		.loc 1 1359 5 is_stmt 1 view .LVU788
1359:Library/src/lcm32f06x_tim.c ****   }
 2565              		.loc 1 1359 15 is_stmt 0 view .LVU789
 2566 000e 9343     		bics	r3, r2
 2567 0010 4360     		str	r3, [r0, #4]
 2568              		.loc 1 1361 1 view .LVU790
 2569 0012 FBE7     		b	.L115
 2570              		.cfi_endproc
 2571              	.LFE85:
 2573              		.section	.text.TIM_OC1PreloadConfig,"ax",%progbits
 2574              		.align	1
 2575              		.p2align 2,,3
 2576              		.global	TIM_OC1PreloadConfig
 2577              		.syntax unified
 2578              		.code	16
 2579              		.thumb_func
 2581              	TIM_OC1PreloadConfig:
 2582              	.LVL188:
 2583              	.LFB86:
1362:Library/src/lcm32f06x_tim.c **** 
1363:Library/src/lcm32f06x_tim.c **** /**
1364:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC1PreloadConfig
1365:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIMx peripheral Preload register on CCR1.
1366:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用CCR1上的TIMx外设预加载寄存器。
1367:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1368:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
1369:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
1370:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCPreload: 
1371:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the TIMx peripheral Preload register.
1372:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx外设预加载寄存器的新状态。
1373:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPreload_Enable
1374:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPreload_Disable
1375:Library/src/lcm32f06x_tim.c ****   * @retval None
1376:Library/src/lcm32f06x_tim.c ****   */
1377:Library/src/lcm32f06x_tim.c **** void TIM_OC1PreloadConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCPreload)
1378:Library/src/lcm32f06x_tim.c **** {
 2584              		.loc 1 1378 1 is_stmt 1 view -0
 2585              		.cfi_startproc
 2586              		@ args = 0, pretend = 0, frame = 0
 2587              		@ frame_needed = 0, uses_anonymous_args = 0
 2588              		@ link register save eliminated.
1379:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0;
 2589              		.loc 1 1379 3 view .LVU792
1380:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1381:Library/src/lcm32f06x_tim.c **** 
1382:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 2590              		.loc 1 1382 3 view .LVU793
ARM GAS  /tmp/ccWBHqpW.s 			page 77


1383:Library/src/lcm32f06x_tim.c ****   /* Reset the OC1PE Bit */
1384:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t) ~((uint32_t)TIM_CCMR1_Output_OC1PE_Msk);
 2591              		.loc 1 1384 12 is_stmt 0 view .LVU794
 2592 0000 0822     		movs	r2, #8
1385:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
1386:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= TIM_OCPreload;
1387:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
1388:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
1389:Library/src/lcm32f06x_tim.c **** }
 2593              		.loc 1 1389 1 view .LVU795
 2594              		@ sp needed
1382:Library/src/lcm32f06x_tim.c ****   /* Reset the OC1PE Bit */
 2595              		.loc 1 1382 12 view .LVU796
 2596 0002 8369     		ldr	r3, [r0, #24]
 2597              	.LVL189:
1384:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
 2598              		.loc 1 1384 3 is_stmt 1 view .LVU797
1384:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
 2599              		.loc 1 1384 12 is_stmt 0 view .LVU798
 2600 0004 9343     		bics	r3, r2
 2601              	.LVL190:
1386:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
 2602              		.loc 1 1386 3 is_stmt 1 view .LVU799
1386:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
 2603              		.loc 1 1386 12 is_stmt 0 view .LVU800
 2604 0006 0B43     		orrs	r3, r1
 2605              	.LVL191:
1388:Library/src/lcm32f06x_tim.c **** }
 2606              		.loc 1 1388 3 is_stmt 1 view .LVU801
1388:Library/src/lcm32f06x_tim.c **** }
 2607              		.loc 1 1388 15 is_stmt 0 view .LVU802
 2608 0008 8361     		str	r3, [r0, #24]
 2609              		.loc 1 1389 1 view .LVU803
 2610 000a 7047     		bx	lr
 2611              		.cfi_endproc
 2612              	.LFE86:
 2614              		.section	.text.TIM_OC2PreloadConfig,"ax",%progbits
 2615              		.align	1
 2616              		.p2align 2,,3
 2617              		.global	TIM_OC2PreloadConfig
 2618              		.syntax unified
 2619              		.code	16
 2620              		.thumb_func
 2622              	TIM_OC2PreloadConfig:
 2623              	.LVL192:
 2624              	.LFB87:
1390:Library/src/lcm32f06x_tim.c **** 
1391:Library/src/lcm32f06x_tim.c **** /**
1392:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC2PreloadConfig
1393:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIMx peripheral Preload register on CCR2.
1394:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用CCR2上的TIMx外设预加载寄存器。
1395:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1396:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15 or 16 to select the TIM peripheral.
1397:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
1398:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCPreload: 
1399:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the TIMx peripheral Preload register.
1400:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx外设预加载寄存器的新状态。
ARM GAS  /tmp/ccWBHqpW.s 			page 78


1401:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPreload_Enable
1402:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPreload_Disable
1403:Library/src/lcm32f06x_tim.c ****   * @retval None
1404:Library/src/lcm32f06x_tim.c ****   */
1405:Library/src/lcm32f06x_tim.c **** void TIM_OC2PreloadConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCPreload)
1406:Library/src/lcm32f06x_tim.c **** {
 2625              		.loc 1 1406 1 is_stmt 1 view -0
 2626              		.cfi_startproc
 2627              		@ args = 0, pretend = 0, frame = 0
 2628              		@ frame_needed = 0, uses_anonymous_args = 0
 2629              		@ link register save eliminated.
1407:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0;
 2630              		.loc 1 1407 3 view .LVU805
1408:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1409:Library/src/lcm32f06x_tim.c **** 
1410:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 2631              		.loc 1 1410 3 view .LVU806
 2632              		.loc 1 1410 12 is_stmt 0 view .LVU807
 2633 0000 8369     		ldr	r3, [r0, #24]
 2634              	.LVL193:
1411:Library/src/lcm32f06x_tim.c ****   /* Reset the OC2PE Bit */
1412:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t) ~((uint32_t)TIM_CCMR1_Output_OC2PE_Msk);
 2635              		.loc 1 1412 3 is_stmt 1 view .LVU808
 2636              		.loc 1 1412 12 is_stmt 0 view .LVU809
 2637 0002 034A     		ldr	r2, .L120
1413:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
1414:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_OCPreload << 8);
 2638              		.loc 1 1414 15 view .LVU810
 2639 0004 0902     		lsls	r1, r1, #8
 2640              	.LVL194:
1412:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
 2641              		.loc 1 1412 12 view .LVU811
 2642 0006 1340     		ands	r3, r2
 2643              	.LVL195:
 2644              		.loc 1 1414 3 is_stmt 1 view .LVU812
 2645              		.loc 1 1414 12 is_stmt 0 view .LVU813
 2646 0008 1943     		orrs	r1, r3
 2647              	.LVL196:
1415:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
1416:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
 2648              		.loc 1 1416 3 is_stmt 1 view .LVU814
 2649              		.loc 1 1416 15 is_stmt 0 view .LVU815
 2650 000a 8161     		str	r1, [r0, #24]
1417:Library/src/lcm32f06x_tim.c **** }
 2651              		.loc 1 1417 1 view .LVU816
 2652              		@ sp needed
 2653 000c 7047     		bx	lr
 2654              	.L121:
 2655 000e C046     		.align	2
 2656              	.L120:
 2657 0010 FFF7FFFF 		.word	-2049
 2658              		.cfi_endproc
 2659              	.LFE87:
 2661              		.section	.text.TIM_OC3PreloadConfig,"ax",%progbits
 2662              		.align	1
 2663              		.p2align 2,,3
 2664              		.global	TIM_OC3PreloadConfig
ARM GAS  /tmp/ccWBHqpW.s 			page 79


 2665              		.syntax unified
 2666              		.code	16
 2667              		.thumb_func
 2669              	TIM_OC3PreloadConfig:
 2670              	.LVL197:
 2671              	.LFB88:
1418:Library/src/lcm32f06x_tim.c **** 
1419:Library/src/lcm32f06x_tim.c **** /**
1420:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC3PreloadConfig
1421:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIMx peripheral Preload register on CCR3.
1422:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用CCR3上的TIMx外设预加载寄存器。
1423:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1424:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1425:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1426:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCPreload: 
1427:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the TIMx peripheral Preload register.
1428:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx外设预加载寄存器的新状态。
1429:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPreload_Enable
1430:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPreload_Disable
1431:Library/src/lcm32f06x_tim.c ****   * @retval None
1432:Library/src/lcm32f06x_tim.c ****   */
1433:Library/src/lcm32f06x_tim.c **** void TIM_OC3PreloadConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCPreload)
1434:Library/src/lcm32f06x_tim.c **** {
 2672              		.loc 1 1434 1 is_stmt 1 view -0
 2673              		.cfi_startproc
 2674              		@ args = 0, pretend = 0, frame = 0
 2675              		@ frame_needed = 0, uses_anonymous_args = 0
 2676              		@ link register save eliminated.
1435:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0;
 2677              		.loc 1 1435 3 view .LVU818
1436:Library/src/lcm32f06x_tim.c **** 
1437:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1438:Library/src/lcm32f06x_tim.c **** 
1439:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 2678              		.loc 1 1439 3 view .LVU819
1440:Library/src/lcm32f06x_tim.c ****   /* Reset the OC3PE Bit */
1441:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t) ~((uint32_t)TIM_CCMR2_Output_OC3PE_Msk);
 2679              		.loc 1 1441 12 is_stmt 0 view .LVU820
 2680 0000 0822     		movs	r2, #8
1442:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
1443:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= TIM_OCPreload;
1444:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
1445:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmr2;
1446:Library/src/lcm32f06x_tim.c **** }
 2681              		.loc 1 1446 1 view .LVU821
 2682              		@ sp needed
1439:Library/src/lcm32f06x_tim.c ****   /* Reset the OC3PE Bit */
 2683              		.loc 1 1439 12 view .LVU822
 2684 0002 C369     		ldr	r3, [r0, #28]
 2685              	.LVL198:
1441:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
 2686              		.loc 1 1441 3 is_stmt 1 view .LVU823
1441:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
 2687              		.loc 1 1441 12 is_stmt 0 view .LVU824
 2688 0004 9343     		bics	r3, r2
 2689              	.LVL199:
1443:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
ARM GAS  /tmp/ccWBHqpW.s 			page 80


 2690              		.loc 1 1443 3 is_stmt 1 view .LVU825
1443:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
 2691              		.loc 1 1443 12 is_stmt 0 view .LVU826
 2692 0006 0B43     		orrs	r3, r1
 2693              	.LVL200:
1445:Library/src/lcm32f06x_tim.c **** }
 2694              		.loc 1 1445 3 is_stmt 1 view .LVU827
1445:Library/src/lcm32f06x_tim.c **** }
 2695              		.loc 1 1445 15 is_stmt 0 view .LVU828
 2696 0008 C361     		str	r3, [r0, #28]
 2697              		.loc 1 1446 1 view .LVU829
 2698 000a 7047     		bx	lr
 2699              		.cfi_endproc
 2700              	.LFE88:
 2702              		.section	.text.TIM_OC4PreloadConfig,"ax",%progbits
 2703              		.align	1
 2704              		.p2align 2,,3
 2705              		.global	TIM_OC4PreloadConfig
 2706              		.syntax unified
 2707              		.code	16
 2708              		.thumb_func
 2710              	TIM_OC4PreloadConfig:
 2711              	.LVL201:
 2712              	.LFB89:
1447:Library/src/lcm32f06x_tim.c **** 
1448:Library/src/lcm32f06x_tim.c **** /**
1449:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC4PreloadConfig
1450:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIMx peripheral Preload register on CCR4.
1451:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用CCR4上的TIMx外设预加载寄存器。
1452:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1453:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1454:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1455:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCPreload: 
1456:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the TIMx peripheral Preload register.
1457:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx外设预加载寄存器的新状态。
1458:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPreload_Enable
1459:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPreload_Disable
1460:Library/src/lcm32f06x_tim.c ****   * @retval None
1461:Library/src/lcm32f06x_tim.c ****   */
1462:Library/src/lcm32f06x_tim.c **** void TIM_OC4PreloadConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCPreload)
1463:Library/src/lcm32f06x_tim.c **** {
 2713              		.loc 1 1463 1 is_stmt 1 view -0
 2714              		.cfi_startproc
 2715              		@ args = 0, pretend = 0, frame = 0
 2716              		@ frame_needed = 0, uses_anonymous_args = 0
 2717              		@ link register save eliminated.
1464:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0;
 2718              		.loc 1 1464 3 view .LVU831
1465:Library/src/lcm32f06x_tim.c **** 
1466:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1467:Library/src/lcm32f06x_tim.c **** 
1468:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 2719              		.loc 1 1468 3 view .LVU832
 2720              		.loc 1 1468 12 is_stmt 0 view .LVU833
 2721 0000 C369     		ldr	r3, [r0, #28]
 2722              	.LVL202:
1469:Library/src/lcm32f06x_tim.c ****   /* Reset the OC4PE Bit */
ARM GAS  /tmp/ccWBHqpW.s 			page 81


1470:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t) ~((uint32_t)TIM_CCMR2_Output_OC4PE_Msk);
 2723              		.loc 1 1470 3 is_stmt 1 view .LVU834
 2724              		.loc 1 1470 12 is_stmt 0 view .LVU835
 2725 0002 034A     		ldr	r2, .L124
1471:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
1472:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_OCPreload << 8);
 2726              		.loc 1 1472 15 view .LVU836
 2727 0004 0902     		lsls	r1, r1, #8
 2728              	.LVL203:
1470:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
 2729              		.loc 1 1470 12 view .LVU837
 2730 0006 1340     		ands	r3, r2
 2731              	.LVL204:
 2732              		.loc 1 1472 3 is_stmt 1 view .LVU838
 2733              		.loc 1 1472 12 is_stmt 0 view .LVU839
 2734 0008 1943     		orrs	r1, r3
 2735              	.LVL205:
1473:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
1474:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmr2;
 2736              		.loc 1 1474 3 is_stmt 1 view .LVU840
 2737              		.loc 1 1474 15 is_stmt 0 view .LVU841
 2738 000a C161     		str	r1, [r0, #28]
1475:Library/src/lcm32f06x_tim.c **** }
 2739              		.loc 1 1475 1 view .LVU842
 2740              		@ sp needed
 2741 000c 7047     		bx	lr
 2742              	.L125:
 2743 000e C046     		.align	2
 2744              	.L124:
 2745 0010 FFF7FFFF 		.word	-2049
 2746              		.cfi_endproc
 2747              	.LFE89:
 2749              		.section	.text.TIM_OC5PreloadConfig,"ax",%progbits
 2750              		.align	1
 2751              		.p2align 2,,3
 2752              		.global	TIM_OC5PreloadConfig
 2753              		.syntax unified
 2754              		.code	16
 2755              		.thumb_func
 2757              	TIM_OC5PreloadConfig:
 2758              	.LVL206:
 2759              	.LFB90:
1476:Library/src/lcm32f06x_tim.c **** 
1477:Library/src/lcm32f06x_tim.c **** /**
1478:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC5PreloadConfig
1479:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIMx peripheral Preload register on CCR5.
1480:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用CCR5上的TIMx外设预加载寄存器。
1481:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1482:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
1483:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
1484:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCPreload: 
1485:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the TIMx peripheral Preload register.
1486:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx外设预加载寄存器的新状态。
1487:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPreload_Enable
1488:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPreload_Disable
1489:Library/src/lcm32f06x_tim.c ****   * @retval None
1490:Library/src/lcm32f06x_tim.c ****   */
ARM GAS  /tmp/ccWBHqpW.s 			page 82


1491:Library/src/lcm32f06x_tim.c **** void TIM_OC5PreloadConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCPreload)
1492:Library/src/lcm32f06x_tim.c **** {
 2760              		.loc 1 1492 1 is_stmt 1 view -0
 2761              		.cfi_startproc
 2762              		@ args = 0, pretend = 0, frame = 0
 2763              		@ frame_needed = 0, uses_anonymous_args = 0
 2764              		@ link register save eliminated.
1493:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr3 = 0;
 2765              		.loc 1 1493 3 view .LVU844
1494:Library/src/lcm32f06x_tim.c **** 
1495:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1496:Library/src/lcm32f06x_tim.c **** 
1497:Library/src/lcm32f06x_tim.c ****   tmpccmr3 = TIMx->CCMR3;
 2766              		.loc 1 1497 3 view .LVU845
1498:Library/src/lcm32f06x_tim.c ****   /* Reset the OC5PE Bit */
1499:Library/src/lcm32f06x_tim.c ****   tmpccmr3 &= (uint32_t) ~((uint32_t)TIM_CCMR3_Output_OC5PE_Msk);
 2767              		.loc 1 1499 12 is_stmt 0 view .LVU846
 2768 0000 0822     		movs	r2, #8
1500:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
1501:Library/src/lcm32f06x_tim.c ****   tmpccmr3 |= (uint32_t)TIM_OCPreload;
1502:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 register */
1503:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR3 = tmpccmr3;
1504:Library/src/lcm32f06x_tim.c **** }
 2769              		.loc 1 1504 1 view .LVU847
 2770              		@ sp needed
1497:Library/src/lcm32f06x_tim.c ****   /* Reset the OC5PE Bit */
 2771              		.loc 1 1497 12 view .LVU848
 2772 0002 436D     		ldr	r3, [r0, #84]
 2773              	.LVL207:
1499:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
 2774              		.loc 1 1499 3 is_stmt 1 view .LVU849
1499:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Preload feature */
 2775              		.loc 1 1499 12 is_stmt 0 view .LVU850
 2776 0004 9343     		bics	r3, r2
 2777              	.LVL208:
1501:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 register */
 2778              		.loc 1 1501 3 is_stmt 1 view .LVU851
1501:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 register */
 2779              		.loc 1 1501 12 is_stmt 0 view .LVU852
 2780 0006 0B43     		orrs	r3, r1
 2781              	.LVL209:
1503:Library/src/lcm32f06x_tim.c **** }
 2782              		.loc 1 1503 3 is_stmt 1 view .LVU853
1503:Library/src/lcm32f06x_tim.c **** }
 2783              		.loc 1 1503 15 is_stmt 0 view .LVU854
 2784 0008 4365     		str	r3, [r0, #84]
 2785              		.loc 1 1504 1 view .LVU855
 2786 000a 7047     		bx	lr
 2787              		.cfi_endproc
 2788              	.LFE90:
 2790              		.section	.text.TIM_OC1FastConfig,"ax",%progbits
 2791              		.align	1
 2792              		.p2align 2,,3
 2793              		.global	TIM_OC1FastConfig
 2794              		.syntax unified
 2795              		.code	16
 2796              		.thumb_func
ARM GAS  /tmp/ccWBHqpW.s 			page 83


 2798              	TIM_OC1FastConfig:
 2799              	.LVL210:
 2800              	.LFB91:
1505:Library/src/lcm32f06x_tim.c **** 
1506:Library/src/lcm32f06x_tim.c **** /**
1507:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC1FastConfig
1508:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Output Compare 1 Fast feature.
1509:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx输出比较1快速功能。
1510:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1511:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
1512:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
1513:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCFast: 
1514:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Output Compare Fast Enable Bit.
1515:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较快速使能位的新状态。
1516:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCFast_Enable
1517:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCFast_Disable
1518:Library/src/lcm32f06x_tim.c ****   * @retval None
1519:Library/src/lcm32f06x_tim.c ****   */
1520:Library/src/lcm32f06x_tim.c **** void TIM_OC1FastConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCFast)
1521:Library/src/lcm32f06x_tim.c **** {
 2801              		.loc 1 1521 1 is_stmt 1 view -0
 2802              		.cfi_startproc
 2803              		@ args = 0, pretend = 0, frame = 0
 2804              		@ frame_needed = 0, uses_anonymous_args = 0
 2805              		@ link register save eliminated.
1522:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0;
 2806              		.loc 1 1522 3 view .LVU857
1523:Library/src/lcm32f06x_tim.c **** 
1524:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1525:Library/src/lcm32f06x_tim.c **** 
1526:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR1 register value */
1527:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 2807              		.loc 1 1527 3 view .LVU858
1528:Library/src/lcm32f06x_tim.c ****   /* Reset the OC1FE Bit */
1529:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t) ~((uint32_t)TIM_CCMR1_Output_OC1FE_Msk);
 2808              		.loc 1 1529 12 is_stmt 0 view .LVU859
 2809 0000 0422     		movs	r2, #4
1530:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
1531:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= TIM_OCFast;
1532:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 */
1533:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
1534:Library/src/lcm32f06x_tim.c **** }
 2810              		.loc 1 1534 1 view .LVU860
 2811              		@ sp needed
1527:Library/src/lcm32f06x_tim.c ****   /* Reset the OC1FE Bit */
 2812              		.loc 1 1527 12 view .LVU861
 2813 0002 8369     		ldr	r3, [r0, #24]
 2814              	.LVL211:
1529:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
 2815              		.loc 1 1529 3 is_stmt 1 view .LVU862
1529:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
 2816              		.loc 1 1529 12 is_stmt 0 view .LVU863
 2817 0004 9343     		bics	r3, r2
 2818              	.LVL212:
1531:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 */
 2819              		.loc 1 1531 3 is_stmt 1 view .LVU864
1531:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 */
ARM GAS  /tmp/ccWBHqpW.s 			page 84


 2820              		.loc 1 1531 12 is_stmt 0 view .LVU865
 2821 0006 0B43     		orrs	r3, r1
 2822              	.LVL213:
1533:Library/src/lcm32f06x_tim.c **** }
 2823              		.loc 1 1533 3 is_stmt 1 view .LVU866
1533:Library/src/lcm32f06x_tim.c **** }
 2824              		.loc 1 1533 15 is_stmt 0 view .LVU867
 2825 0008 8361     		str	r3, [r0, #24]
 2826              		.loc 1 1534 1 view .LVU868
 2827 000a 7047     		bx	lr
 2828              		.cfi_endproc
 2829              	.LFE91:
 2831              		.section	.text.TIM_OC2FastConfig,"ax",%progbits
 2832              		.align	1
 2833              		.p2align 2,,3
 2834              		.global	TIM_OC2FastConfig
 2835              		.syntax unified
 2836              		.code	16
 2837              		.thumb_func
 2839              	TIM_OC2FastConfig:
 2840              	.LVL214:
 2841              	.LFB92:
1535:Library/src/lcm32f06x_tim.c **** 
1536:Library/src/lcm32f06x_tim.c **** /**
1537:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC2FastConfig
1538:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Output Compare 2 Fast feature.
1539:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx输出比较2快速功能。
1540:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1541:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15 or 16 to select the TIM peripheral.
1542:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
1543:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCFast: 
1544:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Output Compare Fast Enable Bit.
1545:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较快速使能位的新状态。
1546:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCFast_Enable
1547:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCFast_Disable
1548:Library/src/lcm32f06x_tim.c ****   * @retval None
1549:Library/src/lcm32f06x_tim.c ****   */
1550:Library/src/lcm32f06x_tim.c **** void TIM_OC2FastConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCFast)
1551:Library/src/lcm32f06x_tim.c **** {
 2842              		.loc 1 1551 1 is_stmt 1 view -0
 2843              		.cfi_startproc
 2844              		@ args = 0, pretend = 0, frame = 0
 2845              		@ frame_needed = 0, uses_anonymous_args = 0
 2846              		@ link register save eliminated.
1552:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0;
 2847              		.loc 1 1552 3 view .LVU870
1553:Library/src/lcm32f06x_tim.c **** 
1554:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1555:Library/src/lcm32f06x_tim.c **** 
1556:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR1 register value */
1557:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 2848              		.loc 1 1557 3 view .LVU871
 2849              		.loc 1 1557 12 is_stmt 0 view .LVU872
 2850 0000 8369     		ldr	r3, [r0, #24]
 2851              	.LVL215:
1558:Library/src/lcm32f06x_tim.c ****   /* Reset the OC2FE Bit */
1559:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t) ~((uint32_t)TIM_CCMR1_Output_OC2FE_Msk);
ARM GAS  /tmp/ccWBHqpW.s 			page 85


 2852              		.loc 1 1559 3 is_stmt 1 view .LVU873
 2853              		.loc 1 1559 12 is_stmt 0 view .LVU874
 2854 0002 034A     		ldr	r2, .L129
1560:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
1561:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_OCFast << 8);
 2855              		.loc 1 1561 15 view .LVU875
 2856 0004 0902     		lsls	r1, r1, #8
 2857              	.LVL216:
1559:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
 2858              		.loc 1 1559 12 view .LVU876
 2859 0006 1340     		ands	r3, r2
 2860              	.LVL217:
 2861              		.loc 1 1561 3 is_stmt 1 view .LVU877
 2862              		.loc 1 1561 12 is_stmt 0 view .LVU878
 2863 0008 1943     		orrs	r1, r3
 2864              	.LVL218:
1562:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 */
1563:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
 2865              		.loc 1 1563 3 is_stmt 1 view .LVU879
 2866              		.loc 1 1563 15 is_stmt 0 view .LVU880
 2867 000a 8161     		str	r1, [r0, #24]
1564:Library/src/lcm32f06x_tim.c **** }
 2868              		.loc 1 1564 1 view .LVU881
 2869              		@ sp needed
 2870 000c 7047     		bx	lr
 2871              	.L130:
 2872 000e C046     		.align	2
 2873              	.L129:
 2874 0010 FFFBFFFF 		.word	-1025
 2875              		.cfi_endproc
 2876              	.LFE92:
 2878              		.section	.text.TIM_OC3FastConfig,"ax",%progbits
 2879              		.align	1
 2880              		.p2align 2,,3
 2881              		.global	TIM_OC3FastConfig
 2882              		.syntax unified
 2883              		.code	16
 2884              		.thumb_func
 2886              	TIM_OC3FastConfig:
 2887              	.LVL219:
 2888              	.LFB93:
1565:Library/src/lcm32f06x_tim.c **** 
1566:Library/src/lcm32f06x_tim.c **** /**
1567:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC3FastConfig
1568:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Output Compare 3 Fast feature.
1569:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx输出比较3快速功能。
1570:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1571:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1572:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1573:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCFast: 
1574:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Output Compare Fast Enable Bit.
1575:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较快速使能位的新状态。
1576:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCFast_Enable
1577:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCFast_Disable
1578:Library/src/lcm32f06x_tim.c ****   * @retval None
1579:Library/src/lcm32f06x_tim.c ****   */
1580:Library/src/lcm32f06x_tim.c **** void TIM_OC3FastConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCFast)
ARM GAS  /tmp/ccWBHqpW.s 			page 86


1581:Library/src/lcm32f06x_tim.c **** {
 2889              		.loc 1 1581 1 is_stmt 1 view -0
 2890              		.cfi_startproc
 2891              		@ args = 0, pretend = 0, frame = 0
 2892              		@ frame_needed = 0, uses_anonymous_args = 0
 2893              		@ link register save eliminated.
1582:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0;
 2894              		.loc 1 1582 3 view .LVU883
1583:Library/src/lcm32f06x_tim.c **** 
1584:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1585:Library/src/lcm32f06x_tim.c **** 
1586:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR2 register value */
1587:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 2895              		.loc 1 1587 3 view .LVU884
1588:Library/src/lcm32f06x_tim.c ****   /* Reset the OC3FE Bit */
1589:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t) ~((uint32_t)TIM_CCMR2_Output_OC3FE_Msk);
 2896              		.loc 1 1589 12 is_stmt 0 view .LVU885
 2897 0000 0422     		movs	r2, #4
1590:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
1591:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= TIM_OCFast;
1592:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 */
1593:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmr2;
1594:Library/src/lcm32f06x_tim.c **** }
 2898              		.loc 1 1594 1 view .LVU886
 2899              		@ sp needed
1587:Library/src/lcm32f06x_tim.c ****   /* Reset the OC3FE Bit */
 2900              		.loc 1 1587 12 view .LVU887
 2901 0002 C369     		ldr	r3, [r0, #28]
 2902              	.LVL220:
1589:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
 2903              		.loc 1 1589 3 is_stmt 1 view .LVU888
1589:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
 2904              		.loc 1 1589 12 is_stmt 0 view .LVU889
 2905 0004 9343     		bics	r3, r2
 2906              	.LVL221:
1591:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 */
 2907              		.loc 1 1591 3 is_stmt 1 view .LVU890
1591:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 */
 2908              		.loc 1 1591 12 is_stmt 0 view .LVU891
 2909 0006 0B43     		orrs	r3, r1
 2910              	.LVL222:
1593:Library/src/lcm32f06x_tim.c **** }
 2911              		.loc 1 1593 3 is_stmt 1 view .LVU892
1593:Library/src/lcm32f06x_tim.c **** }
 2912              		.loc 1 1593 15 is_stmt 0 view .LVU893
 2913 0008 C361     		str	r3, [r0, #28]
 2914              		.loc 1 1594 1 view .LVU894
 2915 000a 7047     		bx	lr
 2916              		.cfi_endproc
 2917              	.LFE93:
 2919              		.section	.text.TIM_OC4FastConfig,"ax",%progbits
 2920              		.align	1
 2921              		.p2align 2,,3
 2922              		.global	TIM_OC4FastConfig
 2923              		.syntax unified
 2924              		.code	16
 2925              		.thumb_func
ARM GAS  /tmp/ccWBHqpW.s 			page 87


 2927              	TIM_OC4FastConfig:
 2928              	.LVL223:
 2929              	.LFB94:
1595:Library/src/lcm32f06x_tim.c **** 
1596:Library/src/lcm32f06x_tim.c **** /**
1597:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC4FastConfig
1598:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Output Compare 4 Fast feature.
1599:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx输出比较4快速功能。
1600:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1601:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1602:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1603:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCFast: 
1604:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Output Compare Fast Enable Bit.
1605:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较快速使能位的新状态。
1606:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCFast_Enable
1607:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCFast_Disable
1608:Library/src/lcm32f06x_tim.c ****   * @retval None
1609:Library/src/lcm32f06x_tim.c ****   */
1610:Library/src/lcm32f06x_tim.c **** void TIM_OC4FastConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCFast)
1611:Library/src/lcm32f06x_tim.c **** {
 2930              		.loc 1 1611 1 is_stmt 1 view -0
 2931              		.cfi_startproc
 2932              		@ args = 0, pretend = 0, frame = 0
 2933              		@ frame_needed = 0, uses_anonymous_args = 0
 2934              		@ link register save eliminated.
1612:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0;
 2935              		.loc 1 1612 3 view .LVU896
1613:Library/src/lcm32f06x_tim.c **** 
1614:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1615:Library/src/lcm32f06x_tim.c **** 
1616:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR2 register value */
1617:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 2936              		.loc 1 1617 3 view .LVU897
 2937              		.loc 1 1617 12 is_stmt 0 view .LVU898
 2938 0000 C369     		ldr	r3, [r0, #28]
 2939              	.LVL224:
1618:Library/src/lcm32f06x_tim.c ****   /* Reset the OC4FE Bit */
1619:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t) ~((uint32_t)TIM_CCMR2_Output_OC4FE_Msk);
 2940              		.loc 1 1619 3 is_stmt 1 view .LVU899
 2941              		.loc 1 1619 12 is_stmt 0 view .LVU900
 2942 0002 034A     		ldr	r2, .L133
1620:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
1621:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_OCFast << 8);
 2943              		.loc 1 1621 15 view .LVU901
 2944 0004 0902     		lsls	r1, r1, #8
 2945              	.LVL225:
1619:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
 2946              		.loc 1 1619 12 view .LVU902
 2947 0006 1340     		ands	r3, r2
 2948              	.LVL226:
 2949              		.loc 1 1621 3 is_stmt 1 view .LVU903
 2950              		.loc 1 1621 12 is_stmt 0 view .LVU904
 2951 0008 1943     		orrs	r1, r3
 2952              	.LVL227:
1622:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 */
1623:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmr2;
 2953              		.loc 1 1623 3 is_stmt 1 view .LVU905
ARM GAS  /tmp/ccWBHqpW.s 			page 88


 2954              		.loc 1 1623 15 is_stmt 0 view .LVU906
 2955 000a C161     		str	r1, [r0, #28]
1624:Library/src/lcm32f06x_tim.c **** }
 2956              		.loc 1 1624 1 view .LVU907
 2957              		@ sp needed
 2958 000c 7047     		bx	lr
 2959              	.L134:
 2960 000e C046     		.align	2
 2961              	.L133:
 2962 0010 FFFBFFFF 		.word	-1025
 2963              		.cfi_endproc
 2964              	.LFE94:
 2966              		.section	.text.TIM_OC5FastConfig,"ax",%progbits
 2967              		.align	1
 2968              		.p2align 2,,3
 2969              		.global	TIM_OC5FastConfig
 2970              		.syntax unified
 2971              		.code	16
 2972              		.thumb_func
 2974              	TIM_OC5FastConfig:
 2975              	.LVL228:
 2976              	.LFB95:
1625:Library/src/lcm32f06x_tim.c **** 
1626:Library/src/lcm32f06x_tim.c **** /**
1627:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC5FastConfig
1628:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Output Compare 5 Fast feature.
1629:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx输出比较5快速功能。
1630:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1631:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1632:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1633:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCFast: 
1634:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Output Compare Fast Enable Bit.
1635:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较快速使能位的新状态。
1636:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCFast_Enable
1637:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCFast_Disable
1638:Library/src/lcm32f06x_tim.c ****   * @retval None
1639:Library/src/lcm32f06x_tim.c ****   */
1640:Library/src/lcm32f06x_tim.c **** void TIM_OC5FastConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCFast)
1641:Library/src/lcm32f06x_tim.c **** {
 2977              		.loc 1 1641 1 is_stmt 1 view -0
 2978              		.cfi_startproc
 2979              		@ args = 0, pretend = 0, frame = 0
 2980              		@ frame_needed = 0, uses_anonymous_args = 0
 2981              		@ link register save eliminated.
1642:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr3 = 0;
 2982              		.loc 1 1642 3 view .LVU909
1643:Library/src/lcm32f06x_tim.c **** 
1644:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1645:Library/src/lcm32f06x_tim.c **** 
1646:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR2 register value */
1647:Library/src/lcm32f06x_tim.c ****   tmpccmr3 = TIMx->CCMR3;
 2983              		.loc 1 1647 3 view .LVU910
1648:Library/src/lcm32f06x_tim.c ****   /* Reset the OC3FE Bit */
1649:Library/src/lcm32f06x_tim.c ****   tmpccmr3 &= (uint32_t) ~((uint32_t)TIM_CCMR3_Output_OC5FE_Msk);
 2984              		.loc 1 1649 12 is_stmt 0 view .LVU911
 2985 0000 0422     		movs	r2, #4
1650:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
ARM GAS  /tmp/ccWBHqpW.s 			page 89


1651:Library/src/lcm32f06x_tim.c ****   tmpccmr3 |= (uint32_t)TIM_OCFast;
1652:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 */
1653:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR3 = tmpccmr3;
1654:Library/src/lcm32f06x_tim.c **** }
 2986              		.loc 1 1654 1 view .LVU912
 2987              		@ sp needed
1647:Library/src/lcm32f06x_tim.c ****   /* Reset the OC3FE Bit */
 2988              		.loc 1 1647 12 view .LVU913
 2989 0002 436D     		ldr	r3, [r0, #84]
 2990              	.LVL229:
1649:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
 2991              		.loc 1 1649 3 is_stmt 1 view .LVU914
1649:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Fast Bit */
 2992              		.loc 1 1649 12 is_stmt 0 view .LVU915
 2993 0004 9343     		bics	r3, r2
 2994              	.LVL230:
1651:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 */
 2995              		.loc 1 1651 3 is_stmt 1 view .LVU916
1651:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 */
 2996              		.loc 1 1651 12 is_stmt 0 view .LVU917
 2997 0006 0B43     		orrs	r3, r1
 2998              	.LVL231:
1653:Library/src/lcm32f06x_tim.c **** }
 2999              		.loc 1 1653 3 is_stmt 1 view .LVU918
1653:Library/src/lcm32f06x_tim.c **** }
 3000              		.loc 1 1653 15 is_stmt 0 view .LVU919
 3001 0008 4365     		str	r3, [r0, #84]
 3002              		.loc 1 1654 1 view .LVU920
 3003 000a 7047     		bx	lr
 3004              		.cfi_endproc
 3005              	.LFE95:
 3007              		.section	.text.TIM_ClearOC1Ref,"ax",%progbits
 3008              		.align	1
 3009              		.p2align 2,,3
 3010              		.global	TIM_ClearOC1Ref
 3011              		.syntax unified
 3012              		.code	16
 3013              		.thumb_func
 3015              	TIM_ClearOC1Ref:
 3016              	.LVL232:
 3017              	.LFB96:
1655:Library/src/lcm32f06x_tim.c **** 
1656:Library/src/lcm32f06x_tim.c **** /**
1657:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ClearOC1Ref
1658:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Clears or safeguards the OCREF1 signal on an external event.
1659:Library/src/lcm32f06x_tim.c ****   *         CN: 清除或保护外部事件的OCREF1信号。
1660:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1661:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
1662:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
1663:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCClear: 
1664:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Output Compare Clear Enable Bit.
1665:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较清除启用位的新状态。
1666:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCClear_Enable
1667:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCClear_Disable
1668:Library/src/lcm32f06x_tim.c ****   * @retval None
1669:Library/src/lcm32f06x_tim.c ****   */
1670:Library/src/lcm32f06x_tim.c **** void TIM_ClearOC1Ref(TIM_TypeDef *TIMx, uint32_t TIM_OCClear)
ARM GAS  /tmp/ccWBHqpW.s 			page 90


1671:Library/src/lcm32f06x_tim.c **** {
 3018              		.loc 1 1671 1 is_stmt 1 view -0
 3019              		.cfi_startproc
 3020              		@ args = 0, pretend = 0, frame = 0
 3021              		@ frame_needed = 0, uses_anonymous_args = 0
 3022              		@ link register save eliminated.
1672:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0;
 3023              		.loc 1 1672 3 view .LVU922
1673:Library/src/lcm32f06x_tim.c **** 
1674:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1675:Library/src/lcm32f06x_tim.c **** 
1676:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 3024              		.loc 1 1676 3 view .LVU923
1677:Library/src/lcm32f06x_tim.c ****   /* Reset the OC1CE Bit */
1678:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t) ~((uint32_t)TIM_CCMR1_Output_OC1CE_Msk);
 3025              		.loc 1 1678 12 is_stmt 0 view .LVU924
 3026 0000 8022     		movs	r2, #128
1679:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
1680:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= TIM_OCClear;
1681:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
1682:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
1683:Library/src/lcm32f06x_tim.c **** }
 3027              		.loc 1 1683 1 view .LVU925
 3028              		@ sp needed
1676:Library/src/lcm32f06x_tim.c ****   /* Reset the OC1CE Bit */
 3029              		.loc 1 1676 12 view .LVU926
 3030 0002 8369     		ldr	r3, [r0, #24]
 3031              	.LVL233:
1678:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
 3032              		.loc 1 1678 3 is_stmt 1 view .LVU927
1678:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
 3033              		.loc 1 1678 12 is_stmt 0 view .LVU928
 3034 0004 9343     		bics	r3, r2
 3035              	.LVL234:
1680:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
 3036              		.loc 1 1680 3 is_stmt 1 view .LVU929
1680:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
 3037              		.loc 1 1680 12 is_stmt 0 view .LVU930
 3038 0006 0B43     		orrs	r3, r1
 3039              	.LVL235:
1682:Library/src/lcm32f06x_tim.c **** }
 3040              		.loc 1 1682 3 is_stmt 1 view .LVU931
1682:Library/src/lcm32f06x_tim.c **** }
 3041              		.loc 1 1682 15 is_stmt 0 view .LVU932
 3042 0008 8361     		str	r3, [r0, #24]
 3043              		.loc 1 1683 1 view .LVU933
 3044 000a 7047     		bx	lr
 3045              		.cfi_endproc
 3046              	.LFE96:
 3048              		.section	.text.TIM_ClearOC2Ref,"ax",%progbits
 3049              		.align	1
 3050              		.p2align 2,,3
 3051              		.global	TIM_ClearOC2Ref
 3052              		.syntax unified
 3053              		.code	16
 3054              		.thumb_func
 3056              	TIM_ClearOC2Ref:
ARM GAS  /tmp/ccWBHqpW.s 			page 91


 3057              	.LVL236:
 3058              	.LFB97:
1684:Library/src/lcm32f06x_tim.c **** 
1685:Library/src/lcm32f06x_tim.c **** /**
1686:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ClearOC2Ref
1687:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Clears or safeguards the OCREF2 signal on an external event.
1688:Library/src/lcm32f06x_tim.c ****   *         CN: 清除或保护外部事件的OCREF2信号。
1689:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1690:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15 or 16 to select the TIM peripheral.
1691:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
1692:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCClear: 
1693:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Output Compare Clear Enable Bit.
1694:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较清除启用位的新状态。
1695:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCClear_Enable
1696:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCClear_Disable
1697:Library/src/lcm32f06x_tim.c ****   * @retval None
1698:Library/src/lcm32f06x_tim.c ****   */
1699:Library/src/lcm32f06x_tim.c **** void TIM_ClearOC2Ref(TIM_TypeDef *TIMx, uint32_t TIM_OCClear)
1700:Library/src/lcm32f06x_tim.c **** {
 3059              		.loc 1 1700 1 is_stmt 1 view -0
 3060              		.cfi_startproc
 3061              		@ args = 0, pretend = 0, frame = 0
 3062              		@ frame_needed = 0, uses_anonymous_args = 0
 3063              		@ link register save eliminated.
1701:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0;
 3064              		.loc 1 1701 3 view .LVU935
1702:Library/src/lcm32f06x_tim.c **** 
1703:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1704:Library/src/lcm32f06x_tim.c **** 
1705:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 3065              		.loc 1 1705 3 view .LVU936
 3066              		.loc 1 1705 12 is_stmt 0 view .LVU937
 3067 0000 8369     		ldr	r3, [r0, #24]
 3068              	.LVL237:
1706:Library/src/lcm32f06x_tim.c ****   /* Reset the OC2CE Bit */
1707:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t) ~((uint32_t)TIM_CCMR1_Output_OC2CE_Msk);
 3069              		.loc 1 1707 3 is_stmt 1 view .LVU938
 3070              		.loc 1 1707 12 is_stmt 0 view .LVU939
 3071 0002 034A     		ldr	r2, .L138
1708:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
1709:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_OCClear << 8);
 3072              		.loc 1 1709 15 view .LVU940
 3073 0004 0902     		lsls	r1, r1, #8
 3074              	.LVL238:
1707:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
 3075              		.loc 1 1707 12 view .LVU941
 3076 0006 1340     		ands	r3, r2
 3077              	.LVL239:
 3078              		.loc 1 1709 3 is_stmt 1 view .LVU942
 3079              		.loc 1 1709 12 is_stmt 0 view .LVU943
 3080 0008 1943     		orrs	r1, r3
 3081              	.LVL240:
1710:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 register */
1711:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
 3082              		.loc 1 1711 3 is_stmt 1 view .LVU944
 3083              		.loc 1 1711 15 is_stmt 0 view .LVU945
 3084 000a 8161     		str	r1, [r0, #24]
ARM GAS  /tmp/ccWBHqpW.s 			page 92


1712:Library/src/lcm32f06x_tim.c **** }
 3085              		.loc 1 1712 1 view .LVU946
 3086              		@ sp needed
 3087 000c 7047     		bx	lr
 3088              	.L139:
 3089 000e C046     		.align	2
 3090              	.L138:
 3091 0010 FF7FFFFF 		.word	-32769
 3092              		.cfi_endproc
 3093              	.LFE97:
 3095              		.section	.text.TIM_ClearOC3Ref,"ax",%progbits
 3096              		.align	1
 3097              		.p2align 2,,3
 3098              		.global	TIM_ClearOC3Ref
 3099              		.syntax unified
 3100              		.code	16
 3101              		.thumb_func
 3103              	TIM_ClearOC3Ref:
 3104              	.LVL241:
 3105              	.LFB98:
1713:Library/src/lcm32f06x_tim.c **** 
1714:Library/src/lcm32f06x_tim.c **** /**
1715:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ClearOC3Ref
1716:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Clears or safeguards the OCREF3 signal on an external event.
1717:Library/src/lcm32f06x_tim.c ****   *         CN: 清除或保护外部事件的OCREF3信号。
1718:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1719:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1720:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1721:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCClear: 
1722:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Output Compare Clear Enable Bit.
1723:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较清除启用位的新状态。
1724:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCClear_Enable
1725:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCClear_Disable
1726:Library/src/lcm32f06x_tim.c ****   * @retval None
1727:Library/src/lcm32f06x_tim.c ****   */
1728:Library/src/lcm32f06x_tim.c **** void TIM_ClearOC3Ref(TIM_TypeDef *TIMx, uint32_t TIM_OCClear)
1729:Library/src/lcm32f06x_tim.c **** {
 3106              		.loc 1 1729 1 is_stmt 1 view -0
 3107              		.cfi_startproc
 3108              		@ args = 0, pretend = 0, frame = 0
 3109              		@ frame_needed = 0, uses_anonymous_args = 0
 3110              		@ link register save eliminated.
1730:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0;
 3111              		.loc 1 1730 3 view .LVU948
1731:Library/src/lcm32f06x_tim.c **** 
1732:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1733:Library/src/lcm32f06x_tim.c **** 
1734:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 3112              		.loc 1 1734 3 view .LVU949
1735:Library/src/lcm32f06x_tim.c ****   /* Reset the OC3CE Bit */
1736:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t) ~((uint32_t)TIM_CCMR2_Output_OC3CE_Msk);
 3113              		.loc 1 1736 12 is_stmt 0 view .LVU950
 3114 0000 8022     		movs	r2, #128
1737:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
1738:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= TIM_OCClear;
1739:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
1740:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmr2;
ARM GAS  /tmp/ccWBHqpW.s 			page 93


1741:Library/src/lcm32f06x_tim.c **** }
 3115              		.loc 1 1741 1 view .LVU951
 3116              		@ sp needed
1734:Library/src/lcm32f06x_tim.c ****   /* Reset the OC3CE Bit */
 3117              		.loc 1 1734 12 view .LVU952
 3118 0002 C369     		ldr	r3, [r0, #28]
 3119              	.LVL242:
1736:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
 3120              		.loc 1 1736 3 is_stmt 1 view .LVU953
1736:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
 3121              		.loc 1 1736 12 is_stmt 0 view .LVU954
 3122 0004 9343     		bics	r3, r2
 3123              	.LVL243:
1738:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
 3124              		.loc 1 1738 3 is_stmt 1 view .LVU955
1738:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
 3125              		.loc 1 1738 12 is_stmt 0 view .LVU956
 3126 0006 0B43     		orrs	r3, r1
 3127              	.LVL244:
1740:Library/src/lcm32f06x_tim.c **** }
 3128              		.loc 1 1740 3 is_stmt 1 view .LVU957
1740:Library/src/lcm32f06x_tim.c **** }
 3129              		.loc 1 1740 15 is_stmt 0 view .LVU958
 3130 0008 C361     		str	r3, [r0, #28]
 3131              		.loc 1 1741 1 view .LVU959
 3132 000a 7047     		bx	lr
 3133              		.cfi_endproc
 3134              	.LFE98:
 3136              		.section	.text.TIM_ClearOC4Ref,"ax",%progbits
 3137              		.align	1
 3138              		.p2align 2,,3
 3139              		.global	TIM_ClearOC4Ref
 3140              		.syntax unified
 3141              		.code	16
 3142              		.thumb_func
 3144              	TIM_ClearOC4Ref:
 3145              	.LVL245:
 3146              	.LFB99:
1742:Library/src/lcm32f06x_tim.c **** 
1743:Library/src/lcm32f06x_tim.c **** /**
1744:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ClearOC4Ref
1745:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Clears or safeguards the OCREF4 signal on an external event.
1746:Library/src/lcm32f06x_tim.c ****   *         CN: 清除或保护外部事件的OCREF4信号。
1747:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1748:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1749:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1750:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCClear: 
1751:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Output Compare Clear Enable Bit.
1752:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较清除启用位的新状态。
1753:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCClear_Enable
1754:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCClear_Disable
1755:Library/src/lcm32f06x_tim.c ****   * @retval None
1756:Library/src/lcm32f06x_tim.c ****   */
1757:Library/src/lcm32f06x_tim.c **** void TIM_ClearOC4Ref(TIM_TypeDef *TIMx, uint32_t TIM_OCClear)
1758:Library/src/lcm32f06x_tim.c **** {
 3147              		.loc 1 1758 1 is_stmt 1 view -0
 3148              		.cfi_startproc
ARM GAS  /tmp/ccWBHqpW.s 			page 94


 3149              		@ args = 0, pretend = 0, frame = 0
 3150              		@ frame_needed = 0, uses_anonymous_args = 0
 3151              		@ link register save eliminated.
1759:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0;
 3152              		.loc 1 1759 3 view .LVU961
1760:Library/src/lcm32f06x_tim.c **** 
1761:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1762:Library/src/lcm32f06x_tim.c **** 
1763:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 3153              		.loc 1 1763 3 view .LVU962
 3154              		.loc 1 1763 12 is_stmt 0 view .LVU963
 3155 0000 C369     		ldr	r3, [r0, #28]
 3156              	.LVL246:
1764:Library/src/lcm32f06x_tim.c ****   /* Reset the OC4CE Bit */
1765:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t) ~((uint32_t)TIM_CCMR2_Output_OC4CE_Msk);
 3157              		.loc 1 1765 3 is_stmt 1 view .LVU964
 3158              		.loc 1 1765 12 is_stmt 0 view .LVU965
 3159 0002 034A     		ldr	r2, .L142
1766:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
1767:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_OCClear << 8);
 3160              		.loc 1 1767 15 view .LVU966
 3161 0004 0902     		lsls	r1, r1, #8
 3162              	.LVL247:
1765:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
 3163              		.loc 1 1765 12 view .LVU967
 3164 0006 1340     		ands	r3, r2
 3165              	.LVL248:
 3166              		.loc 1 1767 3 is_stmt 1 view .LVU968
 3167              		.loc 1 1767 12 is_stmt 0 view .LVU969
 3168 0008 1943     		orrs	r1, r3
 3169              	.LVL249:
1768:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 register */
1769:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmr2;
 3170              		.loc 1 1769 3 is_stmt 1 view .LVU970
 3171              		.loc 1 1769 15 is_stmt 0 view .LVU971
 3172 000a C161     		str	r1, [r0, #28]
1770:Library/src/lcm32f06x_tim.c **** }
 3173              		.loc 1 1770 1 view .LVU972
 3174              		@ sp needed
 3175 000c 7047     		bx	lr
 3176              	.L143:
 3177 000e C046     		.align	2
 3178              	.L142:
 3179 0010 FF7FFFFF 		.word	-32769
 3180              		.cfi_endproc
 3181              	.LFE99:
 3183              		.section	.text.TIM_ClearOC5Ref,"ax",%progbits
 3184              		.align	1
 3185              		.p2align 2,,3
 3186              		.global	TIM_ClearOC5Ref
 3187              		.syntax unified
 3188              		.code	16
 3189              		.thumb_func
 3191              	TIM_ClearOC5Ref:
 3192              	.LVL250:
 3193              	.LFB100:
1771:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 95


1772:Library/src/lcm32f06x_tim.c **** /**
1773:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ClearOC5Ref
1774:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Clears or safeguards the OCREF5 signal on an external event.
1775:Library/src/lcm32f06x_tim.c ****   *         CN: 清除或保护外部事件的OCREF5信号。
1776:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1777:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
1778:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
1779:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCClear: 
1780:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Output Compare Clear Enable Bit.
1781:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较清除启用位的新状态。
1782:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCClear_Enable
1783:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCClear_Disable
1784:Library/src/lcm32f06x_tim.c ****   * @retval None
1785:Library/src/lcm32f06x_tim.c ****   */
1786:Library/src/lcm32f06x_tim.c **** void TIM_ClearOC5Ref(TIM_TypeDef *TIMx, uint32_t TIM_OCClear)
1787:Library/src/lcm32f06x_tim.c **** {
 3194              		.loc 1 1787 1 is_stmt 1 view -0
 3195              		.cfi_startproc
 3196              		@ args = 0, pretend = 0, frame = 0
 3197              		@ frame_needed = 0, uses_anonymous_args = 0
 3198              		@ link register save eliminated.
1788:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr3 = 0;
 3199              		.loc 1 1788 3 view .LVU974
1789:Library/src/lcm32f06x_tim.c **** 
1790:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1791:Library/src/lcm32f06x_tim.c **** 
1792:Library/src/lcm32f06x_tim.c ****   tmpccmr3 = TIMx->CCMR3;
 3200              		.loc 1 1792 3 view .LVU975
1793:Library/src/lcm32f06x_tim.c ****   /* Reset the OC5CE Bit */
1794:Library/src/lcm32f06x_tim.c ****   tmpccmr3 &= (uint32_t) ~((uint32_t)TIM_CCMR3_Output_OC5CE_Msk);
 3201              		.loc 1 1794 12 is_stmt 0 view .LVU976
 3202 0000 8022     		movs	r2, #128
1795:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
1796:Library/src/lcm32f06x_tim.c ****   tmpccmr3 |= (uint32_t)TIM_OCClear;
1797:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 register */
1798:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR3 = tmpccmr3;
1799:Library/src/lcm32f06x_tim.c **** }
 3203              		.loc 1 1799 1 view .LVU977
 3204              		@ sp needed
1792:Library/src/lcm32f06x_tim.c ****   /* Reset the OC5CE Bit */
 3205              		.loc 1 1792 12 view .LVU978
 3206 0002 436D     		ldr	r3, [r0, #84]
 3207              	.LVL251:
1794:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
 3208              		.loc 1 1794 3 is_stmt 1 view .LVU979
1794:Library/src/lcm32f06x_tim.c ****   /* Enable or Disable the Output Compare Clear Bit */
 3209              		.loc 1 1794 12 is_stmt 0 view .LVU980
 3210 0004 9343     		bics	r3, r2
 3211              	.LVL252:
1796:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 register */
 3212              		.loc 1 1796 3 is_stmt 1 view .LVU981
1796:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 register */
 3213              		.loc 1 1796 12 is_stmt 0 view .LVU982
 3214 0006 0B43     		orrs	r3, r1
 3215              	.LVL253:
1798:Library/src/lcm32f06x_tim.c **** }
 3216              		.loc 1 1798 3 is_stmt 1 view .LVU983
ARM GAS  /tmp/ccWBHqpW.s 			page 96


1798:Library/src/lcm32f06x_tim.c **** }
 3217              		.loc 1 1798 15 is_stmt 0 view .LVU984
 3218 0008 4365     		str	r3, [r0, #84]
 3219              		.loc 1 1799 1 view .LVU985
 3220 000a 7047     		bx	lr
 3221              		.cfi_endproc
 3222              	.LFE100:
 3224              		.section	.text.TIM_OC1PolarityConfig,"ax",%progbits
 3225              		.align	1
 3226              		.p2align 2,,3
 3227              		.global	TIM_OC1PolarityConfig
 3228              		.syntax unified
 3229              		.code	16
 3230              		.thumb_func
 3232              	TIM_OC1PolarityConfig:
 3233              	.LVL254:
 3234              	.LFB101:
1800:Library/src/lcm32f06x_tim.c **** 
1801:Library/src/lcm32f06x_tim.c **** /**
1802:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC1PolarityConfig
1803:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Channel 1 polarity.
1804:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx通道1极性。
1805:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1806:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
1807:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
1808:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCPolarity: 
1809:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OC1 Polarity.
1810:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OC1极性。
1811:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPolarity_High
1812:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPolarity_Low
1813:Library/src/lcm32f06x_tim.c ****   * @retval None
1814:Library/src/lcm32f06x_tim.c ****   */
1815:Library/src/lcm32f06x_tim.c **** void TIM_OC1PolarityConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCPolarity)
1816:Library/src/lcm32f06x_tim.c **** {
 3235              		.loc 1 1816 1 is_stmt 1 view -0
 3236              		.cfi_startproc
 3237              		@ args = 0, pretend = 0, frame = 0
 3238              		@ frame_needed = 0, uses_anonymous_args = 0
 3239              		@ link register save eliminated.
1817:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
 3240              		.loc 1 1817 3 view .LVU987
1818:Library/src/lcm32f06x_tim.c **** 
1819:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1820:Library/src/lcm32f06x_tim.c **** 
1821:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3241              		.loc 1 1821 3 view .LVU988
1822:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC1P Bit */
1823:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)TIM_CCER_CC1P_Msk);
 3242              		.loc 1 1823 11 is_stmt 0 view .LVU989
 3243 0000 0222     		movs	r2, #2
1824:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCPolarity;
1825:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER register */
1826:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
1827:Library/src/lcm32f06x_tim.c **** }
 3244              		.loc 1 1827 1 view .LVU990
 3245              		@ sp needed
1821:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC1P Bit */
ARM GAS  /tmp/ccWBHqpW.s 			page 97


 3246              		.loc 1 1821 11 view .LVU991
 3247 0002 036A     		ldr	r3, [r0, #32]
 3248              	.LVL255:
1823:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCPolarity;
 3249              		.loc 1 1823 3 is_stmt 1 view .LVU992
1823:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCPolarity;
 3250              		.loc 1 1823 11 is_stmt 0 view .LVU993
 3251 0004 9343     		bics	r3, r2
 3252              	.LVL256:
1824:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCPolarity;
 3253              		.loc 1 1824 3 is_stmt 1 view .LVU994
1824:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCPolarity;
 3254              		.loc 1 1824 11 is_stmt 0 view .LVU995
 3255 0006 0B43     		orrs	r3, r1
 3256              	.LVL257:
1826:Library/src/lcm32f06x_tim.c **** }
 3257              		.loc 1 1826 3 is_stmt 1 view .LVU996
1826:Library/src/lcm32f06x_tim.c **** }
 3258              		.loc 1 1826 14 is_stmt 0 view .LVU997
 3259 0008 0362     		str	r3, [r0, #32]
 3260              		.loc 1 1827 1 view .LVU998
 3261 000a 7047     		bx	lr
 3262              		.cfi_endproc
 3263              	.LFE101:
 3265              		.section	.text.TIM_OC1NPolarityConfig,"ax",%progbits
 3266              		.align	1
 3267              		.p2align 2,,3
 3268              		.global	TIM_OC1NPolarityConfig
 3269              		.syntax unified
 3270              		.code	16
 3271              		.thumb_func
 3273              	TIM_OC1NPolarityConfig:
 3274              	.LVL258:
 3275              	.LFB102:
1828:Library/src/lcm32f06x_tim.c **** 
1829:Library/src/lcm32f06x_tim.c **** /**
1830:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC1NPolarityConfig
1831:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Channel 1N polarity.
1832:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx通道1N极性。
1833:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
1834:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
1835:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
1836:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN: 
1837:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OC1N Polarity.
1838:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OC1N极性。
1839:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCNPolarity_High
1840:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCNPolarity_Low
1841:Library/src/lcm32f06x_tim.c ****   * @retval None
1842:Library/src/lcm32f06x_tim.c ****   */
1843:Library/src/lcm32f06x_tim.c **** void TIM_OC1NPolarityConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCNPolarity)
1844:Library/src/lcm32f06x_tim.c **** {
 3276              		.loc 1 1844 1 is_stmt 1 view -0
 3277              		.cfi_startproc
 3278              		@ args = 0, pretend = 0, frame = 0
 3279              		@ frame_needed = 0, uses_anonymous_args = 0
 3280              		@ link register save eliminated.
1845:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
ARM GAS  /tmp/ccWBHqpW.s 			page 98


 3281              		.loc 1 1845 3 view .LVU1000
1846:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1847:Library/src/lcm32f06x_tim.c **** 
1848:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3282              		.loc 1 1848 3 view .LVU1001
1849:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC1NP Bit */
1850:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)TIM_CCER_CC1NP_Msk);
 3283              		.loc 1 1850 11 is_stmt 0 view .LVU1002
 3284 0000 0822     		movs	r2, #8
1851:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCNPolarity;
1852:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER register */
1853:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
1854:Library/src/lcm32f06x_tim.c **** }
 3285              		.loc 1 1854 1 view .LVU1003
 3286              		@ sp needed
1848:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC1NP Bit */
 3287              		.loc 1 1848 11 view .LVU1004
 3288 0002 036A     		ldr	r3, [r0, #32]
 3289              	.LVL259:
1850:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCNPolarity;
 3290              		.loc 1 1850 3 is_stmt 1 view .LVU1005
1850:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCNPolarity;
 3291              		.loc 1 1850 11 is_stmt 0 view .LVU1006
 3292 0004 9343     		bics	r3, r2
 3293              	.LVL260:
1851:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCNPolarity;
 3294              		.loc 1 1851 3 is_stmt 1 view .LVU1007
1851:Library/src/lcm32f06x_tim.c ****   tmpccer |= TIM_OCNPolarity;
 3295              		.loc 1 1851 11 is_stmt 0 view .LVU1008
 3296 0006 0B43     		orrs	r3, r1
 3297              	.LVL261:
1853:Library/src/lcm32f06x_tim.c **** }
 3298              		.loc 1 1853 3 is_stmt 1 view .LVU1009
1853:Library/src/lcm32f06x_tim.c **** }
 3299              		.loc 1 1853 14 is_stmt 0 view .LVU1010
 3300 0008 0362     		str	r3, [r0, #32]
 3301              		.loc 1 1854 1 view .LVU1011
 3302 000a 7047     		bx	lr
 3303              		.cfi_endproc
 3304              	.LFE102:
 3306              		.section	.text.TIM_OC2PolarityConfig,"ax",%progbits
 3307              		.align	1
 3308              		.p2align 2,,3
 3309              		.global	TIM_OC2PolarityConfig
 3310              		.syntax unified
 3311              		.code	16
 3312              		.thumb_func
 3314              	TIM_OC2PolarityConfig:
 3315              	.LVL262:
 3316              	.LFB103:
1855:Library/src/lcm32f06x_tim.c **** 
1856:Library/src/lcm32f06x_tim.c **** /**
1857:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC2PolarityConfig
1858:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Channel 2 polarity.
1859:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx通道3极性。
1860:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1861:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15 or 16 to select the TIM peripheral.
ARM GAS  /tmp/ccWBHqpW.s 			page 99


1862:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
1863:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN: 
1864:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OC2 Polarity.
1865:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OC2极性。
1866:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPolarity_High
1867:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPolarity_Low
1868:Library/src/lcm32f06x_tim.c ****   * @retval None
1869:Library/src/lcm32f06x_tim.c ****   */
1870:Library/src/lcm32f06x_tim.c **** void TIM_OC2PolarityConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCPolarity)
1871:Library/src/lcm32f06x_tim.c **** {
 3317              		.loc 1 1871 1 is_stmt 1 view -0
 3318              		.cfi_startproc
 3319              		@ args = 0, pretend = 0, frame = 0
 3320              		@ frame_needed = 0, uses_anonymous_args = 0
 3321              		@ link register save eliminated.
1872:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
 3322              		.loc 1 1872 3 view .LVU1013
1873:Library/src/lcm32f06x_tim.c **** 
1874:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1875:Library/src/lcm32f06x_tim.c **** 
1876:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3323              		.loc 1 1876 3 view .LVU1014
1877:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC2P Bit */
1878:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)TIM_CCER_CC2P_Msk);
 3324              		.loc 1 1878 11 is_stmt 0 view .LVU1015
 3325 0000 2022     		movs	r2, #32
1879:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC2E_Pos);
1880:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER register */
1881:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
1882:Library/src/lcm32f06x_tim.c **** }
 3326              		.loc 1 1882 1 view .LVU1016
 3327              		@ sp needed
1876:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC2P Bit */
 3328              		.loc 1 1876 11 view .LVU1017
 3329 0002 036A     		ldr	r3, [r0, #32]
 3330              	.LVL263:
1878:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC2E_Pos);
 3331              		.loc 1 1878 3 is_stmt 1 view .LVU1018
1879:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC2E_Pos);
 3332              		.loc 1 1879 14 is_stmt 0 view .LVU1019
 3333 0004 0901     		lsls	r1, r1, #4
 3334              	.LVL264:
1878:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC2E_Pos);
 3335              		.loc 1 1878 11 view .LVU1020
 3336 0006 9343     		bics	r3, r2
 3337              	.LVL265:
1879:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC2E_Pos);
 3338              		.loc 1 1879 3 is_stmt 1 view .LVU1021
1879:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC2E_Pos);
 3339              		.loc 1 1879 11 is_stmt 0 view .LVU1022
 3340 0008 1943     		orrs	r1, r3
 3341              	.LVL266:
1881:Library/src/lcm32f06x_tim.c **** }
 3342              		.loc 1 1881 3 is_stmt 1 view .LVU1023
1881:Library/src/lcm32f06x_tim.c **** }
 3343              		.loc 1 1881 14 is_stmt 0 view .LVU1024
 3344 000a 0162     		str	r1, [r0, #32]
ARM GAS  /tmp/ccWBHqpW.s 			page 100


 3345              		.loc 1 1882 1 view .LVU1025
 3346 000c 7047     		bx	lr
 3347              		.cfi_endproc
 3348              	.LFE103:
 3350 000e C046     		.section	.text.TIM_OC2NPolarityConfig,"ax",%progbits
 3351              		.align	1
 3352              		.p2align 2,,3
 3353              		.global	TIM_OC2NPolarityConfig
 3354              		.syntax unified
 3355              		.code	16
 3356              		.thumb_func
 3358              	TIM_OC2NPolarityConfig:
 3359              	.LVL267:
 3360              	.LFB104:
1883:Library/src/lcm32f06x_tim.c **** 
1884:Library/src/lcm32f06x_tim.c **** /**
1885:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC2NPolarityConfig
1886:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Channel 2N polarity.
1887:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx通道2N极性。
1888:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1889:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15 or 16 to select the TIM peripheral.
1890:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
1891:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN:
1892:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OC2N Polarity.
1893:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OC2N极性。
1894:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCNPolarity_High
1895:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCNPolarity_Low
1896:Library/src/lcm32f06x_tim.c ****   * @retval None
1897:Library/src/lcm32f06x_tim.c ****   */
1898:Library/src/lcm32f06x_tim.c **** void TIM_OC2NPolarityConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCNPolarity)
1899:Library/src/lcm32f06x_tim.c **** {
 3361              		.loc 1 1899 1 is_stmt 1 view -0
 3362              		.cfi_startproc
 3363              		@ args = 0, pretend = 0, frame = 0
 3364              		@ frame_needed = 0, uses_anonymous_args = 0
 3365              		@ link register save eliminated.
1900:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
 3366              		.loc 1 1900 3 view .LVU1027
1901:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1902:Library/src/lcm32f06x_tim.c **** 
1903:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3367              		.loc 1 1903 3 view .LVU1028
1904:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC2NP Bit */
1905:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)TIM_CCER_CC2NP_Msk);
 3368              		.loc 1 1905 11 is_stmt 0 view .LVU1029
 3369 0000 8022     		movs	r2, #128
1906:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC2E_Pos);
1907:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER register */
1908:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
1909:Library/src/lcm32f06x_tim.c **** }
 3370              		.loc 1 1909 1 view .LVU1030
 3371              		@ sp needed
1903:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC2NP Bit */
 3372              		.loc 1 1903 11 view .LVU1031
 3373 0002 036A     		ldr	r3, [r0, #32]
 3374              	.LVL268:
1905:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC2E_Pos);
ARM GAS  /tmp/ccWBHqpW.s 			page 101


 3375              		.loc 1 1905 3 is_stmt 1 view .LVU1032
1906:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC2E_Pos);
 3376              		.loc 1 1906 14 is_stmt 0 view .LVU1033
 3377 0004 0901     		lsls	r1, r1, #4
 3378              	.LVL269:
1905:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC2E_Pos);
 3379              		.loc 1 1905 11 view .LVU1034
 3380 0006 9343     		bics	r3, r2
 3381              	.LVL270:
1906:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC2E_Pos);
 3382              		.loc 1 1906 3 is_stmt 1 view .LVU1035
1906:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC2E_Pos);
 3383              		.loc 1 1906 11 is_stmt 0 view .LVU1036
 3384 0008 1943     		orrs	r1, r3
 3385              	.LVL271:
1908:Library/src/lcm32f06x_tim.c **** }
 3386              		.loc 1 1908 3 is_stmt 1 view .LVU1037
1908:Library/src/lcm32f06x_tim.c **** }
 3387              		.loc 1 1908 14 is_stmt 0 view .LVU1038
 3388 000a 0162     		str	r1, [r0, #32]
 3389              		.loc 1 1909 1 view .LVU1039
 3390 000c 7047     		bx	lr
 3391              		.cfi_endproc
 3392              	.LFE104:
 3394 000e C046     		.section	.text.TIM_OC3PolarityConfig,"ax",%progbits
 3395              		.align	1
 3396              		.p2align 2,,3
 3397              		.global	TIM_OC3PolarityConfig
 3398              		.syntax unified
 3399              		.code	16
 3400              		.thumb_func
 3402              	TIM_OC3PolarityConfig:
 3403              	.LVL272:
 3404              	.LFB105:
1910:Library/src/lcm32f06x_tim.c **** 
1911:Library/src/lcm32f06x_tim.c **** /**
1912:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC3PolarityConfig
1913:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Channel 3 polarity.
1914:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx通道3极性。
1915:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1916:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1917:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1918:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN:
1919:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OC3 Polarity.
1920:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OC3极性。
1921:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPolarity_High
1922:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPolarity_Low
1923:Library/src/lcm32f06x_tim.c ****   * @retval None
1924:Library/src/lcm32f06x_tim.c ****   */
1925:Library/src/lcm32f06x_tim.c **** void TIM_OC3PolarityConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCPolarity)
1926:Library/src/lcm32f06x_tim.c **** {
 3405              		.loc 1 1926 1 is_stmt 1 view -0
 3406              		.cfi_startproc
 3407              		@ args = 0, pretend = 0, frame = 0
 3408              		@ frame_needed = 0, uses_anonymous_args = 0
 3409              		@ link register save eliminated.
1927:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
ARM GAS  /tmp/ccWBHqpW.s 			page 102


 3410              		.loc 1 1927 3 view .LVU1041
1928:Library/src/lcm32f06x_tim.c **** 
1929:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1930:Library/src/lcm32f06x_tim.c **** 
1931:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3411              		.loc 1 1931 3 view .LVU1042
 3412              		.loc 1 1931 11 is_stmt 0 view .LVU1043
 3413 0000 036A     		ldr	r3, [r0, #32]
 3414              	.LVL273:
1932:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC3P Bit */
1933:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)TIM_CCER_CC3P_Msk);
 3415              		.loc 1 1933 3 is_stmt 1 view .LVU1044
 3416              		.loc 1 1933 11 is_stmt 0 view .LVU1045
 3417 0002 034A     		ldr	r2, .L150
1934:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC3E_Pos);
 3418              		.loc 1 1934 14 view .LVU1046
 3419 0004 0902     		lsls	r1, r1, #8
 3420              	.LVL274:
1933:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC3E_Pos);
 3421              		.loc 1 1933 11 view .LVU1047
 3422 0006 1340     		ands	r3, r2
 3423              	.LVL275:
 3424              		.loc 1 1934 3 is_stmt 1 view .LVU1048
 3425              		.loc 1 1934 11 is_stmt 0 view .LVU1049
 3426 0008 1943     		orrs	r1, r3
 3427              	.LVL276:
1935:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER register */
1936:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 3428              		.loc 1 1936 3 is_stmt 1 view .LVU1050
 3429              		.loc 1 1936 14 is_stmt 0 view .LVU1051
 3430 000a 0162     		str	r1, [r0, #32]
1937:Library/src/lcm32f06x_tim.c **** }
 3431              		.loc 1 1937 1 view .LVU1052
 3432              		@ sp needed
 3433 000c 7047     		bx	lr
 3434              	.L151:
 3435 000e C046     		.align	2
 3436              	.L150:
 3437 0010 FFFDFFFF 		.word	-513
 3438              		.cfi_endproc
 3439              	.LFE105:
 3441              		.section	.text.TIM_OC3NPolarityConfig,"ax",%progbits
 3442              		.align	1
 3443              		.p2align 2,,3
 3444              		.global	TIM_OC3NPolarityConfig
 3445              		.syntax unified
 3446              		.code	16
 3447              		.thumb_func
 3449              	TIM_OC3NPolarityConfig:
 3450              	.LVL277:
 3451              	.LFB106:
1938:Library/src/lcm32f06x_tim.c **** 
1939:Library/src/lcm32f06x_tim.c **** /**
1940:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC3NPolarityConfig
1941:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Channel 3N polarity.
1942:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx通道3N极性。
1943:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
ARM GAS  /tmp/ccWBHqpW.s 			page 103


1944:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1945:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1946:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN:
1947:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OC3N Polarity.
1948:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OC3N极性。
1949:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCNPolarity_High
1950:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCNPolarity_Low
1951:Library/src/lcm32f06x_tim.c ****   * @retval None
1952:Library/src/lcm32f06x_tim.c ****   */
1953:Library/src/lcm32f06x_tim.c **** void TIM_OC3NPolarityConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCNPolarity)
1954:Library/src/lcm32f06x_tim.c **** {
 3452              		.loc 1 1954 1 is_stmt 1 view -0
 3453              		.cfi_startproc
 3454              		@ args = 0, pretend = 0, frame = 0
 3455              		@ frame_needed = 0, uses_anonymous_args = 0
 3456              		@ link register save eliminated.
1955:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
 3457              		.loc 1 1955 3 view .LVU1054
1956:Library/src/lcm32f06x_tim.c **** 
1957:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1958:Library/src/lcm32f06x_tim.c **** 
1959:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3458              		.loc 1 1959 3 view .LVU1055
 3459              		.loc 1 1959 11 is_stmt 0 view .LVU1056
 3460 0000 036A     		ldr	r3, [r0, #32]
 3461              	.LVL278:
1960:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC3NP Bit */
1961:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)TIM_CCER_CC3NP_Msk);
 3462              		.loc 1 1961 3 is_stmt 1 view .LVU1057
 3463              		.loc 1 1961 11 is_stmt 0 view .LVU1058
 3464 0002 034A     		ldr	r2, .L153
1962:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC3E_Pos);
 3465              		.loc 1 1962 14 view .LVU1059
 3466 0004 0902     		lsls	r1, r1, #8
 3467              	.LVL279:
1961:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC3E_Pos);
 3468              		.loc 1 1961 11 view .LVU1060
 3469 0006 1340     		ands	r3, r2
 3470              	.LVL280:
 3471              		.loc 1 1962 3 is_stmt 1 view .LVU1061
 3472              		.loc 1 1962 11 is_stmt 0 view .LVU1062
 3473 0008 1943     		orrs	r1, r3
 3474              	.LVL281:
1963:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER register */
1964:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 3475              		.loc 1 1964 3 is_stmt 1 view .LVU1063
 3476              		.loc 1 1964 14 is_stmt 0 view .LVU1064
 3477 000a 0162     		str	r1, [r0, #32]
1965:Library/src/lcm32f06x_tim.c **** }
 3478              		.loc 1 1965 1 view .LVU1065
 3479              		@ sp needed
 3480 000c 7047     		bx	lr
 3481              	.L154:
 3482 000e C046     		.align	2
 3483              	.L153:
 3484 0010 FFF7FFFF 		.word	-2049
 3485              		.cfi_endproc
ARM GAS  /tmp/ccWBHqpW.s 			page 104


 3486              	.LFE106:
 3488              		.section	.text.TIM_OC4PolarityConfig,"ax",%progbits
 3489              		.align	1
 3490              		.p2align 2,,3
 3491              		.global	TIM_OC4PolarityConfig
 3492              		.syntax unified
 3493              		.code	16
 3494              		.thumb_func
 3496              	TIM_OC4PolarityConfig:
 3497              	.LVL282:
 3498              	.LFB107:
1966:Library/src/lcm32f06x_tim.c **** 
1967:Library/src/lcm32f06x_tim.c **** /**
1968:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC4PolarityConfig
1969:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Channel 4 polarity.
1970:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx通道4极性。
1971:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
1972:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
1973:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
1974:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN:
1975:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OC4 Polarity.
1976:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OC4极性。
1977:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPolarity_High
1978:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPolarity_Low
1979:Library/src/lcm32f06x_tim.c ****   * @retval None
1980:Library/src/lcm32f06x_tim.c ****   */
1981:Library/src/lcm32f06x_tim.c **** void TIM_OC4PolarityConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCPolarity)
1982:Library/src/lcm32f06x_tim.c **** {
 3499              		.loc 1 1982 1 is_stmt 1 view -0
 3500              		.cfi_startproc
 3501              		@ args = 0, pretend = 0, frame = 0
 3502              		@ frame_needed = 0, uses_anonymous_args = 0
 3503              		@ link register save eliminated.
1983:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
 3504              		.loc 1 1983 3 view .LVU1067
1984:Library/src/lcm32f06x_tim.c **** 
1985:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
1986:Library/src/lcm32f06x_tim.c **** 
1987:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3505              		.loc 1 1987 3 view .LVU1068
 3506              		.loc 1 1987 11 is_stmt 0 view .LVU1069
 3507 0000 036A     		ldr	r3, [r0, #32]
 3508              	.LVL283:
1988:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC4P Bit */
1989:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)TIM_CCER_CC4P_Msk);
 3509              		.loc 1 1989 3 is_stmt 1 view .LVU1070
 3510              		.loc 1 1989 11 is_stmt 0 view .LVU1071
 3511 0002 034A     		ldr	r2, .L156
1990:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC4E_Pos);
 3512              		.loc 1 1990 14 view .LVU1072
 3513 0004 0903     		lsls	r1, r1, #12
 3514              	.LVL284:
1989:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC4E_Pos);
 3515              		.loc 1 1989 11 view .LVU1073
 3516 0006 1340     		ands	r3, r2
 3517              	.LVL285:
 3518              		.loc 1 1990 3 is_stmt 1 view .LVU1074
ARM GAS  /tmp/ccWBHqpW.s 			page 105


 3519              		.loc 1 1990 11 is_stmt 0 view .LVU1075
 3520 0008 1943     		orrs	r1, r3
 3521              	.LVL286:
1991:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER register */
1992:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 3522              		.loc 1 1992 3 is_stmt 1 view .LVU1076
 3523              		.loc 1 1992 14 is_stmt 0 view .LVU1077
 3524 000a 0162     		str	r1, [r0, #32]
1993:Library/src/lcm32f06x_tim.c **** }
 3525              		.loc 1 1993 1 view .LVU1078
 3526              		@ sp needed
 3527 000c 7047     		bx	lr
 3528              	.L157:
 3529 000e C046     		.align	2
 3530              	.L156:
 3531 0010 FFDFFFFF 		.word	-8193
 3532              		.cfi_endproc
 3533              	.LFE107:
 3535              		.section	.text.TIM_OC4NPolarityConfig,"ax",%progbits
 3536              		.align	1
 3537              		.p2align 2,,3
 3538              		.global	TIM_OC4NPolarityConfig
 3539              		.syntax unified
 3540              		.code	16
 3541              		.thumb_func
 3543              	TIM_OC4NPolarityConfig:
 3544              	.LVL287:
 3545              	.LFB108:
1994:Library/src/lcm32f06x_tim.c **** 
1995:Library/src/lcm32f06x_tim.c **** /**
1996:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC4NPolarityConfig
1997:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Channel 4N polarity.
1998:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx通道4N极性。
1999:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2000:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
2001:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
2002:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN:
2003:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OC4N Polarity.
2004:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OC4N极性。
2005:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCNPolarity_High
2006:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCNPolarity_Low
2007:Library/src/lcm32f06x_tim.c ****   * @retval None
2008:Library/src/lcm32f06x_tim.c ****   */
2009:Library/src/lcm32f06x_tim.c **** void TIM_OC4NPolarityConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCNPolarity)
2010:Library/src/lcm32f06x_tim.c **** {
 3546              		.loc 1 2010 1 is_stmt 1 view -0
 3547              		.cfi_startproc
 3548              		@ args = 0, pretend = 0, frame = 0
 3549              		@ frame_needed = 0, uses_anonymous_args = 0
 3550              		@ link register save eliminated.
2011:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
 3551              		.loc 1 2011 3 view .LVU1080
2012:Library/src/lcm32f06x_tim.c **** 
2013:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2014:Library/src/lcm32f06x_tim.c **** 
2015:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3552              		.loc 1 2015 3 view .LVU1081
ARM GAS  /tmp/ccWBHqpW.s 			page 106


 3553              		.loc 1 2015 11 is_stmt 0 view .LVU1082
 3554 0000 036A     		ldr	r3, [r0, #32]
 3555              	.LVL288:
2016:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC3NP Bit */
2017:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)TIM_CCER_CC4NP_Msk);
 3556              		.loc 1 2017 3 is_stmt 1 view .LVU1083
 3557              		.loc 1 2017 11 is_stmt 0 view .LVU1084
 3558 0002 034A     		ldr	r2, .L159
2018:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC4E_Pos);
 3559              		.loc 1 2018 14 view .LVU1085
 3560 0004 0903     		lsls	r1, r1, #12
 3561              	.LVL289:
2017:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC4E_Pos);
 3562              		.loc 1 2017 11 view .LVU1086
 3563 0006 1340     		ands	r3, r2
 3564              	.LVL290:
 3565              		.loc 1 2018 3 is_stmt 1 view .LVU1087
 3566              		.loc 1 2018 11 is_stmt 0 view .LVU1088
 3567 0008 1943     		orrs	r1, r3
 3568              	.LVL291:
2019:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER register */
2020:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 3569              		.loc 1 2020 3 is_stmt 1 view .LVU1089
 3570              		.loc 1 2020 14 is_stmt 0 view .LVU1090
 3571 000a 0162     		str	r1, [r0, #32]
2021:Library/src/lcm32f06x_tim.c **** }
 3572              		.loc 1 2021 1 view .LVU1091
 3573              		@ sp needed
 3574 000c 7047     		bx	lr
 3575              	.L160:
 3576 000e C046     		.align	2
 3577              	.L159:
 3578 0010 FF7FFFFF 		.word	-32769
 3579              		.cfi_endproc
 3580              	.LFE108:
 3582              		.section	.text.TIM_OC5PolarityConfig,"ax",%progbits
 3583              		.align	1
 3584              		.p2align 2,,3
 3585              		.global	TIM_OC5PolarityConfig
 3586              		.syntax unified
 3587              		.code	16
 3588              		.thumb_func
 3590              	TIM_OC5PolarityConfig:
 3591              	.LVL292:
 3592              	.LFB109:
2022:Library/src/lcm32f06x_tim.c **** 
2023:Library/src/lcm32f06x_tim.c **** /**
2024:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC5PolarityConfig
2025:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Channel 5 polarity.
2026:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx通道5极性。
2027:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2028:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
2029:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
2030:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN:
2031:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OC5 Polarity.
2032:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OC5极性。
2033:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPolarity_High
ARM GAS  /tmp/ccWBHqpW.s 			page 107


2034:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCPolarity_Low
2035:Library/src/lcm32f06x_tim.c ****   * @retval None
2036:Library/src/lcm32f06x_tim.c ****   */
2037:Library/src/lcm32f06x_tim.c **** void TIM_OC5PolarityConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCPolarity)
2038:Library/src/lcm32f06x_tim.c **** {
 3593              		.loc 1 2038 1 is_stmt 1 view -0
 3594              		.cfi_startproc
 3595              		@ args = 0, pretend = 0, frame = 0
 3596              		@ frame_needed = 0, uses_anonymous_args = 0
 3597              		@ link register save eliminated.
2039:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
 3598              		.loc 1 2039 3 view .LVU1093
2040:Library/src/lcm32f06x_tim.c **** 
2041:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2042:Library/src/lcm32f06x_tim.c **** 
2043:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3599              		.loc 1 2043 3 view .LVU1094
 3600              		.loc 1 2043 11 is_stmt 0 view .LVU1095
 3601 0000 036A     		ldr	r3, [r0, #32]
 3602              	.LVL293:
2044:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC4P Bit */
2045:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)TIM_CCER_CC5P_Msk);
 3603              		.loc 1 2045 3 is_stmt 1 view .LVU1096
 3604              		.loc 1 2045 11 is_stmt 0 view .LVU1097
 3605 0002 034A     		ldr	r2, .L162
2046:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC5E_Pos);
 3606              		.loc 1 2046 14 view .LVU1098
 3607 0004 0904     		lsls	r1, r1, #16
 3608              	.LVL294:
2045:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCPolarity << TIM_CCER_CC5E_Pos);
 3609              		.loc 1 2045 11 view .LVU1099
 3610 0006 1340     		ands	r3, r2
 3611              	.LVL295:
 3612              		.loc 1 2046 3 is_stmt 1 view .LVU1100
 3613              		.loc 1 2046 11 is_stmt 0 view .LVU1101
 3614 0008 1943     		orrs	r1, r3
 3615              	.LVL296:
2047:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER register */
2048:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 3616              		.loc 1 2048 3 is_stmt 1 view .LVU1102
 3617              		.loc 1 2048 14 is_stmt 0 view .LVU1103
 3618 000a 0162     		str	r1, [r0, #32]
2049:Library/src/lcm32f06x_tim.c **** }
 3619              		.loc 1 2049 1 view .LVU1104
 3620              		@ sp needed
 3621 000c 7047     		bx	lr
 3622              	.L163:
 3623 000e C046     		.align	2
 3624              	.L162:
 3625 0010 FFFFFDFF 		.word	-131073
 3626              		.cfi_endproc
 3627              	.LFE109:
 3629              		.section	.text.TIM_OC5NPolarityConfig,"ax",%progbits
 3630              		.align	1
 3631              		.p2align 2,,3
 3632              		.global	TIM_OC5NPolarityConfig
 3633              		.syntax unified
ARM GAS  /tmp/ccWBHqpW.s 			page 108


 3634              		.code	16
 3635              		.thumb_func
 3637              	TIM_OC5NPolarityConfig:
 3638              	.LVL297:
 3639              	.LFB110:
2050:Library/src/lcm32f06x_tim.c **** 
2051:Library/src/lcm32f06x_tim.c **** /**
2052:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OC5NPolarityConfig
2053:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Channel 5N polarity.
2054:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx通道5N极性。
2055:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2056:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
2057:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
2058:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN:
2059:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OC5N Polarity.
2060:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OC5N极性。
2061:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCNPolarity_High
2062:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCNPolarity_Low
2063:Library/src/lcm32f06x_tim.c ****   * @retval None
2064:Library/src/lcm32f06x_tim.c ****   */
2065:Library/src/lcm32f06x_tim.c **** void TIM_OC5NPolarityConfig(TIM_TypeDef *TIMx, uint32_t TIM_OCNPolarity)
2066:Library/src/lcm32f06x_tim.c **** {
 3640              		.loc 1 2066 1 is_stmt 1 view -0
 3641              		.cfi_startproc
 3642              		@ args = 0, pretend = 0, frame = 0
 3643              		@ frame_needed = 0, uses_anonymous_args = 0
 3644              		@ link register save eliminated.
2067:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
 3645              		.loc 1 2067 3 view .LVU1106
2068:Library/src/lcm32f06x_tim.c **** 
2069:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2070:Library/src/lcm32f06x_tim.c **** 
2071:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3646              		.loc 1 2071 3 view .LVU1107
 3647              		.loc 1 2071 11 is_stmt 0 view .LVU1108
 3648 0000 036A     		ldr	r3, [r0, #32]
 3649              	.LVL298:
2072:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the CC3NP Bit */
2073:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)TIM_CCER_CC5NP_Msk);
 3650              		.loc 1 2073 3 is_stmt 1 view .LVU1109
 3651              		.loc 1 2073 11 is_stmt 0 view .LVU1110
 3652 0002 034A     		ldr	r2, .L165
2074:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC5E_Pos);
 3653              		.loc 1 2074 14 view .LVU1111
 3654 0004 0904     		lsls	r1, r1, #16
 3655              	.LVL299:
2073:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_OCNPolarity << TIM_CCER_CC5E_Pos);
 3656              		.loc 1 2073 11 view .LVU1112
 3657 0006 1340     		ands	r3, r2
 3658              	.LVL300:
 3659              		.loc 1 2074 3 is_stmt 1 view .LVU1113
 3660              		.loc 1 2074 11 is_stmt 0 view .LVU1114
 3661 0008 1943     		orrs	r1, r3
 3662              	.LVL301:
2075:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER register */
2076:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 3663              		.loc 1 2076 3 is_stmt 1 view .LVU1115
ARM GAS  /tmp/ccWBHqpW.s 			page 109


 3664              		.loc 1 2076 14 is_stmt 0 view .LVU1116
 3665 000a 0162     		str	r1, [r0, #32]
2077:Library/src/lcm32f06x_tim.c **** }
 3666              		.loc 1 2077 1 view .LVU1117
 3667              		@ sp needed
 3668 000c 7047     		bx	lr
 3669              	.L166:
 3670 000e C046     		.align	2
 3671              	.L165:
 3672 0010 FFFFF7FF 		.word	-524289
 3673              		.cfi_endproc
 3674              	.LFE110:
 3676              		.section	.text.TIM_SelectOCREFClear,"ax",%progbits
 3677              		.align	1
 3678              		.p2align 2,,3
 3679              		.global	TIM_SelectOCREFClear
 3680              		.syntax unified
 3681              		.code	16
 3682              		.thumb_func
 3684              	TIM_SelectOCREFClear:
 3685              	.LVL302:
 3686              	.LFB111:
2078:Library/src/lcm32f06x_tim.c **** 
2079:Library/src/lcm32f06x_tim.c **** /**
2080:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SelectOCREFClear
2081:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Selects the OCReference Clear source.
2082:Library/src/lcm32f06x_tim.c ****   *         CN: 选择OCReference清除源。
2083:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2084:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
2085:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2086:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN:
2087:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the OCReference Clear source.
2088:Library/src/lcm32f06x_tim.c ****   *         CN: 指定OCReference清除源。
2089:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCReferenceClear_ETRF
2090:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_OCReferenceClear_OCREFCLR
2091:Library/src/lcm32f06x_tim.c ****   * @retval None
2092:Library/src/lcm32f06x_tim.c ****   */
2093:Library/src/lcm32f06x_tim.c **** void TIM_SelectOCREFClear(TIM_TypeDef *TIMx, uint32_t TIM_OCReferenceClear)
2094:Library/src/lcm32f06x_tim.c **** {
 3687              		.loc 1 2094 1 is_stmt 1 view -0
 3688              		.cfi_startproc
 3689              		@ args = 0, pretend = 0, frame = 0
 3690              		@ frame_needed = 0, uses_anonymous_args = 0
 3691              		@ link register save eliminated.
2095:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2096:Library/src/lcm32f06x_tim.c **** 
2097:Library/src/lcm32f06x_tim.c ****   /* Set the TIM_OCReferenceClear source */
2098:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR &= (uint32_t) ~((uint32_t)TIM_SMCR_OCCS_Msk);
 3692              		.loc 1 2098 3 view .LVU1119
 3693              		.loc 1 2098 14 is_stmt 0 view .LVU1120
 3694 0000 8022     		movs	r2, #128
2099:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_OCReferenceClear;
2100:Library/src/lcm32f06x_tim.c **** }
 3695              		.loc 1 2100 1 view .LVU1121
 3696              		@ sp needed
2098:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_OCReferenceClear;
 3697              		.loc 1 2098 7 view .LVU1122
ARM GAS  /tmp/ccWBHqpW.s 			page 110


 3698 0002 8368     		ldr	r3, [r0, #8]
2098:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_OCReferenceClear;
 3699              		.loc 1 2098 14 view .LVU1123
 3700 0004 9343     		bics	r3, r2
 3701 0006 8360     		str	r3, [r0, #8]
2099:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_OCReferenceClear;
 3702              		.loc 1 2099 3 is_stmt 1 view .LVU1124
2099:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_OCReferenceClear;
 3703              		.loc 1 2099 7 is_stmt 0 view .LVU1125
 3704 0008 8368     		ldr	r3, [r0, #8]
2099:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_OCReferenceClear;
 3705              		.loc 1 2099 14 view .LVU1126
 3706 000a 0B43     		orrs	r3, r1
 3707 000c 8360     		str	r3, [r0, #8]
 3708              		.loc 1 2100 1 view .LVU1127
 3709 000e 7047     		bx	lr
 3710              		.cfi_endproc
 3711              	.LFE111:
 3713              		.section	.text.TIM_CCxCmd,"ax",%progbits
 3714              		.align	1
 3715              		.p2align 2,,3
 3716              		.global	TIM_CCxCmd
 3717              		.syntax unified
 3718              		.code	16
 3719              		.thumb_func
 3721              	TIM_CCxCmd:
 3722              	.LVL303:
 3723              	.LFB112:
2101:Library/src/lcm32f06x_tim.c **** 
2102:Library/src/lcm32f06x_tim.c **** /**
2103:Library/src/lcm32f06x_tim.c ****   * @name   TIM_CCxNCmd
2104:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIM Capture Compare Channel x.
2105:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用TIM捕获比较通道x。
2106:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
2107:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
2108:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2109:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Channel: 
2110:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the TIM Channel
2111:Library/src/lcm32f06x_tim.c ****   *         CN: 指定TIM通道
2112:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_1
2113:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_2
2114:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_3 
2115:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_4
2116:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_5
2117:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCx: 
2118:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the TIM Channel CCxE bit new state.
2119:Library/src/lcm32f06x_tim.c ****   *         CN: 指定TIM信道CCxE位的新状态。
2120:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CCx_Disable
2121:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CCx_Enable
2122:Library/src/lcm32f06x_tim.c ****   * @retval None
2123:Library/src/lcm32f06x_tim.c ****   */
2124:Library/src/lcm32f06x_tim.c **** void TIM_CCxCmd(TIM_TypeDef *TIMx, uint32_t TIM_Channel, uint32_t TIM_CCx)
2125:Library/src/lcm32f06x_tim.c **** {
 3724              		.loc 1 2125 1 is_stmt 1 view -0
 3725              		.cfi_startproc
 3726              		@ args = 0, pretend = 0, frame = 0
 3727              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  /tmp/ccWBHqpW.s 			page 111


2126:Library/src/lcm32f06x_tim.c ****   uint32_t tmp = 0;
 3728              		.loc 1 2126 3 view .LVU1129
2127:Library/src/lcm32f06x_tim.c **** 
2128:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2129:Library/src/lcm32f06x_tim.c **** 
2130:Library/src/lcm32f06x_tim.c ****   tmp = TIM_CCER_CC1E_Msk << TIM_Channel;
 3729              		.loc 1 2130 3 view .LVU1130
2131:Library/src/lcm32f06x_tim.c **** 
2132:Library/src/lcm32f06x_tim.c ****   /* Reset the CCxE Bit */
2133:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t)~tmp;
 3730              		.loc 1 2133 3 view .LVU1131
2125:Library/src/lcm32f06x_tim.c ****   uint32_t tmp = 0;
 3731              		.loc 1 2125 1 is_stmt 0 view .LVU1132
 3732 0000 10B5     		push	{r4, lr}
 3733              	.LCFI6:
 3734              		.cfi_def_cfa_offset 8
 3735              		.cfi_offset 4, -8
 3736              		.cfi_offset 14, -4
2130:Library/src/lcm32f06x_tim.c **** 
 3737              		.loc 1 2130 7 view .LVU1133
 3738 0002 0124     		movs	r4, #1
2134:Library/src/lcm32f06x_tim.c **** 
2135:Library/src/lcm32f06x_tim.c ****   /* Set or reset the CCxE Bit */
2136:Library/src/lcm32f06x_tim.c ****   TIMx->CCER |= (uint32_t)(TIM_CCx << TIM_Channel);
2137:Library/src/lcm32f06x_tim.c **** }
 3739              		.loc 1 2137 1 view .LVU1134
 3740              		@ sp needed
2130:Library/src/lcm32f06x_tim.c **** 
 3741              		.loc 1 2130 7 view .LVU1135
 3742 0004 8C40     		lsls	r4, r4, r1
 3743              	.LVL304:
2136:Library/src/lcm32f06x_tim.c **** }
 3744              		.loc 1 2136 36 view .LVU1136
 3745 0006 8A40     		lsls	r2, r2, r1
 3746              	.LVL305:
2133:Library/src/lcm32f06x_tim.c **** 
 3747              		.loc 1 2133 7 view .LVU1137
 3748 0008 036A     		ldr	r3, [r0, #32]
2133:Library/src/lcm32f06x_tim.c **** 
 3749              		.loc 1 2133 14 view .LVU1138
 3750 000a A343     		bics	r3, r4
 3751 000c 0362     		str	r3, [r0, #32]
2136:Library/src/lcm32f06x_tim.c **** }
 3752              		.loc 1 2136 3 is_stmt 1 view .LVU1139
2136:Library/src/lcm32f06x_tim.c **** }
 3753              		.loc 1 2136 7 is_stmt 0 view .LVU1140
 3754 000e 036A     		ldr	r3, [r0, #32]
2136:Library/src/lcm32f06x_tim.c **** }
 3755              		.loc 1 2136 14 view .LVU1141
 3756 0010 1A43     		orrs	r2, r3
 3757 0012 0262     		str	r2, [r0, #32]
 3758              	.LVL306:
 3759              		.loc 1 2137 1 view .LVU1142
 3760 0014 10BD     		pop	{r4, pc}
 3761              		.cfi_endproc
 3762              	.LFE112:
 3764 0016 C046     		.section	.text.TIM_CCxNCmd,"ax",%progbits
ARM GAS  /tmp/ccWBHqpW.s 			page 112


 3765              		.align	1
 3766              		.p2align 2,,3
 3767              		.global	TIM_CCxNCmd
 3768              		.syntax unified
 3769              		.code	16
 3770              		.thumb_func
 3772              	TIM_CCxNCmd:
 3773              	.LVL307:
 3774              	.LFB113:
2138:Library/src/lcm32f06x_tim.c **** 
2139:Library/src/lcm32f06x_tim.c **** /**
2140:Library/src/lcm32f06x_tim.c ****   * @name   TIM_CCxNCmd
2141:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIM Capture Compare Channel xN.
2142:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用TIM捕获比较通道xN。
2143:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
2144:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
2145:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2146:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Channel: 
2147:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the TIM Channel
2148:Library/src/lcm32f06x_tim.c ****   *         CN: 指定TIM通道
2149:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_1
2150:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_2
2151:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_3
2152:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_4
2153:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_5
2154:Library/src/lcm32f06x_tim.c ****   * @param  TIM_CCxN: 
2155:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the TIM Channel CCxNE bit new state.
2156:Library/src/lcm32f06x_tim.c ****   *         CN: 指定TIM信道CCxNE比特的新状态。
2157:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CCxN_Disable
2158:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_CCxN_Enable
2159:Library/src/lcm32f06x_tim.c ****   * @retval None
2160:Library/src/lcm32f06x_tim.c ****   */
2161:Library/src/lcm32f06x_tim.c **** void TIM_CCxNCmd(TIM_TypeDef *TIMx, uint32_t TIM_Channel, uint32_t TIM_CCxN)
2162:Library/src/lcm32f06x_tim.c **** {
 3775              		.loc 1 2162 1 is_stmt 1 view -0
 3776              		.cfi_startproc
 3777              		@ args = 0, pretend = 0, frame = 0
 3778              		@ frame_needed = 0, uses_anonymous_args = 0
2163:Library/src/lcm32f06x_tim.c ****   uint32_t tmp = 0;
 3779              		.loc 1 2163 3 view .LVU1144
2164:Library/src/lcm32f06x_tim.c **** 
2165:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2166:Library/src/lcm32f06x_tim.c ****   tmp = TIM_CCER_CC1NE_Msk << TIM_Channel;
 3780              		.loc 1 2166 3 view .LVU1145
2167:Library/src/lcm32f06x_tim.c **** 
2168:Library/src/lcm32f06x_tim.c ****   /* Reset the CCxNE Bit */
2169:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t)~tmp;
 3781              		.loc 1 2169 3 view .LVU1146
2162:Library/src/lcm32f06x_tim.c ****   uint32_t tmp = 0;
 3782              		.loc 1 2162 1 is_stmt 0 view .LVU1147
 3783 0000 10B5     		push	{r4, lr}
 3784              	.LCFI7:
 3785              		.cfi_def_cfa_offset 8
 3786              		.cfi_offset 4, -8
 3787              		.cfi_offset 14, -4
2166:Library/src/lcm32f06x_tim.c **** 
 3788              		.loc 1 2166 7 view .LVU1148
ARM GAS  /tmp/ccWBHqpW.s 			page 113


 3789 0002 0424     		movs	r4, #4
2170:Library/src/lcm32f06x_tim.c **** 
2171:Library/src/lcm32f06x_tim.c ****   /* Set or reset the CCxNE Bit */
2172:Library/src/lcm32f06x_tim.c ****   TIMx->CCER |= (uint32_t)(TIM_CCxN << TIM_Channel);
2173:Library/src/lcm32f06x_tim.c **** }
 3790              		.loc 1 2173 1 view .LVU1149
 3791              		@ sp needed
2166:Library/src/lcm32f06x_tim.c **** 
 3792              		.loc 1 2166 7 view .LVU1150
 3793 0004 8C40     		lsls	r4, r4, r1
 3794              	.LVL308:
2172:Library/src/lcm32f06x_tim.c **** }
 3795              		.loc 1 2172 37 view .LVU1151
 3796 0006 8A40     		lsls	r2, r2, r1
 3797              	.LVL309:
2169:Library/src/lcm32f06x_tim.c **** 
 3798              		.loc 1 2169 7 view .LVU1152
 3799 0008 036A     		ldr	r3, [r0, #32]
2169:Library/src/lcm32f06x_tim.c **** 
 3800              		.loc 1 2169 14 view .LVU1153
 3801 000a A343     		bics	r3, r4
 3802 000c 0362     		str	r3, [r0, #32]
2172:Library/src/lcm32f06x_tim.c **** }
 3803              		.loc 1 2172 3 is_stmt 1 view .LVU1154
2172:Library/src/lcm32f06x_tim.c **** }
 3804              		.loc 1 2172 7 is_stmt 0 view .LVU1155
 3805 000e 036A     		ldr	r3, [r0, #32]
2172:Library/src/lcm32f06x_tim.c **** }
 3806              		.loc 1 2172 14 view .LVU1156
 3807 0010 1A43     		orrs	r2, r3
 3808 0012 0262     		str	r2, [r0, #32]
 3809              	.LVL310:
 3810              		.loc 1 2173 1 view .LVU1157
 3811 0014 10BD     		pop	{r4, pc}
 3812              		.cfi_endproc
 3813              	.LFE113:
 3815 0016 C046     		.section	.text.TIM_SelectCOM,"ax",%progbits
 3816              		.align	1
 3817              		.p2align 2,,3
 3818              		.global	TIM_SelectCOM
 3819              		.syntax unified
 3820              		.code	16
 3821              		.thumb_func
 3823              	TIM_SelectCOM:
 3824              	.LVL311:
 3825              	.LFB114:
2174:Library/src/lcm32f06x_tim.c **** 
2175:Library/src/lcm32f06x_tim.c **** /**
2176:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SelectCOM
2177:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Selects the TIM peripheral Commutation event.
2178:Library/src/lcm32f06x_tim.c ****   *         CN: 选择TIM外设COM事件。
2179:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
2180:Library/src/lcm32f06x_tim.c ****   *               CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2181:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
2182:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Commutation event.
2183:Library/src/lcm32f06x_tim.c ****   *         CN: COM事件的新状态。
2184:Library/src/lcm32f06x_tim.c ****   * @retval None
ARM GAS  /tmp/ccWBHqpW.s 			page 114


2185:Library/src/lcm32f06x_tim.c ****   */
2186:Library/src/lcm32f06x_tim.c **** void TIM_SelectCOM(TIM_TypeDef *TIMx, FunctionalState NewState)
2187:Library/src/lcm32f06x_tim.c **** {
 3826              		.loc 1 2187 1 is_stmt 1 view -0
 3827              		.cfi_startproc
 3828              		@ args = 0, pretend = 0, frame = 0
 3829              		@ frame_needed = 0, uses_anonymous_args = 0
 3830              		@ link register save eliminated.
2188:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2189:Library/src/lcm32f06x_tim.c **** 
2190:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 3831              		.loc 1 2190 3 view .LVU1159
2191:Library/src/lcm32f06x_tim.c ****   {
2192:Library/src/lcm32f06x_tim.c ****     /* Set the COM Bit */
2193:Library/src/lcm32f06x_tim.c ****     TIMx->CR2 |= TIM_CR2_CCUS_Msk;
 3832              		.loc 1 2193 15 is_stmt 0 view .LVU1160
 3833 0000 0422     		movs	r2, #4
 3834              		.loc 1 2193 9 view .LVU1161
 3835 0002 4368     		ldr	r3, [r0, #4]
2190:Library/src/lcm32f06x_tim.c ****   {
 3836              		.loc 1 2190 6 view .LVU1162
 3837 0004 0029     		cmp	r1, #0
 3838 0006 02D0     		beq	.L171
 3839              		.loc 1 2193 5 is_stmt 1 view .LVU1163
 3840              		.loc 1 2193 15 is_stmt 0 view .LVU1164
 3841 0008 1343     		orrs	r3, r2
 3842 000a 4360     		str	r3, [r0, #4]
 3843              	.L170:
2194:Library/src/lcm32f06x_tim.c ****   }
2195:Library/src/lcm32f06x_tim.c ****   else
2196:Library/src/lcm32f06x_tim.c ****   {
2197:Library/src/lcm32f06x_tim.c ****     /* Reset the COM Bit */
2198:Library/src/lcm32f06x_tim.c ****     TIMx->CR2 &= (uint32_t) ~((uint32_t)TIM_CR2_CCUS_Msk);
2199:Library/src/lcm32f06x_tim.c ****   }
2200:Library/src/lcm32f06x_tim.c **** }
 3844              		.loc 1 2200 1 view .LVU1165
 3845              		@ sp needed
 3846 000c 7047     		bx	lr
 3847              	.L171:
2198:Library/src/lcm32f06x_tim.c ****   }
 3848              		.loc 1 2198 5 is_stmt 1 view .LVU1166
2198:Library/src/lcm32f06x_tim.c ****   }
 3849              		.loc 1 2198 15 is_stmt 0 view .LVU1167
 3850 000e 9343     		bics	r3, r2
 3851 0010 4360     		str	r3, [r0, #4]
 3852              		.loc 1 2200 1 view .LVU1168
 3853 0012 FBE7     		b	.L170
 3854              		.cfi_endproc
 3855              	.LFE114:
 3857              		.section	.text.TIM_ICInit,"ax",%progbits
 3858              		.align	1
 3859              		.p2align 2,,3
 3860              		.global	TIM_ICInit
 3861              		.syntax unified
 3862              		.code	16
 3863              		.thumb_func
 3865              	TIM_ICInit:
ARM GAS  /tmp/ccWBHqpW.s 			page 115


 3866              	.LVL312:
 3867              	.LFB115:
2201:Library/src/lcm32f06x_tim.c **** 
2202:Library/src/lcm32f06x_tim.c **** /**
2203:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ICInit
2204:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Initializes the TIM peripheral according to the specified
2205:Library/src/lcm32f06x_tim.c ****   *             parameters in the TIM_ICInitStruct.
2206:Library/src/lcm32f06x_tim.c ****   *         CN: 根据TIM_ICInitStruct中指定的参数初始化TIM外围设备。
2207:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
2208:Library/src/lcm32f06x_tim.c ****   *               CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2209:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICInitStruct: 
2210:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_ICInitTypeDef structure
2211:Library/src/lcm32f06x_tim.c ****   *             that contains the configuration information for the specified TIM
2212:Library/src/lcm32f06x_tim.c ****   *         CN:指向TIM_ICInitTypeDef结构的指针，该结构包含指定TIM的配置信息。
2213:Library/src/lcm32f06x_tim.c ****   * @retval None
2214:Library/src/lcm32f06x_tim.c ****   */
2215:Library/src/lcm32f06x_tim.c **** void TIM_ICInit(TIM_TypeDef *TIMx, TIM_ICInitTypeDef *TIM_ICInitStruct)
2216:Library/src/lcm32f06x_tim.c **** {
 3868              		.loc 1 2216 1 is_stmt 1 view -0
 3869              		.cfi_startproc
 3870              		@ args = 0, pretend = 0, frame = 0
 3871              		@ frame_needed = 0, uses_anonymous_args = 0
2217:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2218:Library/src/lcm32f06x_tim.c **** 
2219:Library/src/lcm32f06x_tim.c ****   if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
 3872              		.loc 1 2219 3 view .LVU1170
2216:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 3873              		.loc 1 2216 1 is_stmt 0 view .LVU1171
 3874 0000 F0B5     		push	{r4, r5, r6, r7, lr}
 3875              	.LCFI8:
 3876              		.cfi_def_cfa_offset 20
 3877              		.cfi_offset 4, -20
 3878              		.cfi_offset 5, -16
 3879              		.cfi_offset 6, -12
 3880              		.cfi_offset 7, -8
 3881              		.cfi_offset 14, -4
 3882 0002 C646     		mov	lr, r8
 3883 0004 0B68     		ldr	r3, [r1]
 3884 0006 00B5     		push	{lr}
 3885              	.LCFI9:
 3886              		.cfi_def_cfa_offset 24
 3887              		.cfi_offset 8, -24
 3888 0008 102B     		cmp	r3, #16
 3889 000a 21D8     		bhi	.L173
 3890 000c 534A     		ldr	r2, .L181
 3891 000e 9B00     		lsls	r3, r3, #2
 3892 0010 D358     		ldr	r3, [r2, r3]
 3893 0012 9F46     		mov	pc, r3
 3894              		.section	.rodata.TIM_ICInit,"a",%progbits
 3895              		.align	2
 3896              	.L176:
 3897 0000 56000000 		.word	.L180
 3898 0004 50000000 		.word	.L173
 3899 0008 50000000 		.word	.L173
 3900 000c 50000000 		.word	.L173
 3901 0010 94000000 		.word	.L179
 3902 0014 50000000 		.word	.L173
ARM GAS  /tmp/ccWBHqpW.s 			page 116


 3903 0018 50000000 		.word	.L173
 3904 001c 50000000 		.word	.L173
 3905 0020 D8000000 		.word	.L178
 3906 0024 50000000 		.word	.L173
 3907 0028 50000000 		.word	.L173
 3908 002c 50000000 		.word	.L173
 3909 0030 18010000 		.word	.L177
 3910 0034 50000000 		.word	.L173
 3911 0038 50000000 		.word	.L173
 3912 003c 50000000 		.word	.L173
 3913 0040 14000000 		.word	.L175
 3914              		.section	.text.TIM_ICInit
 3915              	.L175:
2220:Library/src/lcm32f06x_tim.c ****   {
2221:Library/src/lcm32f06x_tim.c **** 
2222:Library/src/lcm32f06x_tim.c ****     /* TI1 Configuration */
2223:Library/src/lcm32f06x_tim.c ****     TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
2224:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
2225:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICFilter);
2226:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
2227:Library/src/lcm32f06x_tim.c ****     TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
2228:Library/src/lcm32f06x_tim.c ****   }
2229:Library/src/lcm32f06x_tim.c ****   else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2)
2230:Library/src/lcm32f06x_tim.c ****   {
2231:Library/src/lcm32f06x_tim.c **** 
2232:Library/src/lcm32f06x_tim.c ****     /* TI2 Configuration */
2233:Library/src/lcm32f06x_tim.c ****     TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
2234:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
2235:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICFilter);
2236:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
2237:Library/src/lcm32f06x_tim.c ****     TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
2238:Library/src/lcm32f06x_tim.c ****   }
2239:Library/src/lcm32f06x_tim.c ****   else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3)
2240:Library/src/lcm32f06x_tim.c ****   {
2241:Library/src/lcm32f06x_tim.c **** 
2242:Library/src/lcm32f06x_tim.c ****     /* TI3 Configuration */
2243:Library/src/lcm32f06x_tim.c ****     TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
2244:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
2245:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICFilter);
2246:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
2247:Library/src/lcm32f06x_tim.c ****     TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
2248:Library/src/lcm32f06x_tim.c ****   }
2249:Library/src/lcm32f06x_tim.c ****   else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_4)
2250:Library/src/lcm32f06x_tim.c ****   {
2251:Library/src/lcm32f06x_tim.c **** 
2252:Library/src/lcm32f06x_tim.c ****     /* TI4 Configuration */
2253:Library/src/lcm32f06x_tim.c ****     TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
2254:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
2255:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICFilter);
2256:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
2257:Library/src/lcm32f06x_tim.c ****     TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
2258:Library/src/lcm32f06x_tim.c ****   }
2259:Library/src/lcm32f06x_tim.c ****   else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_5)
2260:Library/src/lcm32f06x_tim.c ****   {
2261:Library/src/lcm32f06x_tim.c **** 
2262:Library/src/lcm32f06x_tim.c ****     /* TI5 Configuration */
2263:Library/src/lcm32f06x_tim.c ****     TI5_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
ARM GAS  /tmp/ccWBHqpW.s 			page 117


 3916              		.loc 1 2263 5 is_stmt 1 view .LVU1172
 3917              	.LBB400:
 3918              	.LBB401:
2264:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
2265:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICFilter);
2266:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
2267:Library/src/lcm32f06x_tim.c ****     TIM_SetIC5Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
2268:Library/src/lcm32f06x_tim.c ****   }
2269:Library/src/lcm32f06x_tim.c **** }
2270:Library/src/lcm32f06x_tim.c **** 
2271:Library/src/lcm32f06x_tim.c **** /**
2272:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ICStructInit
2273:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Fills each TIM_ICInitStruct member with its default value.
2274:Library/src/lcm32f06x_tim.c ****   *         CN: 用默认值填充每个 TIM_ICInitStruct 成员。
2275:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICInitStruct:
2276:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_ICInitTypeDef structure that contains the 
2277:Library/src/lcm32f06x_tim.c ****   *             configuration information for the specified TIM Base peripheral.
2278:Library/src/lcm32f06x_tim.c ****   *         CN: 指向 TIM_ICInitTypeDef 结构的指针，该结构包含指定 TIM IC的配置信息。
2279:Library/src/lcm32f06x_tim.c ****   * @retval None
2280:Library/src/lcm32f06x_tim.c ****   */
2281:Library/src/lcm32f06x_tim.c **** void TIM_ICStructInit(TIM_ICInitTypeDef *TIM_ICInitStruct)
2282:Library/src/lcm32f06x_tim.c **** {
2283:Library/src/lcm32f06x_tim.c ****   /* Set the default configuration */
2284:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_Channel = TIM_Channel_1;
2285:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising;
2286:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI;
2287:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1;
2288:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICFilter = 0x00;
2289:Library/src/lcm32f06x_tim.c **** }
2290:Library/src/lcm32f06x_tim.c **** 
2291:Library/src/lcm32f06x_tim.c **** /**
2292:Library/src/lcm32f06x_tim.c ****   * @name   TIM_PWMIConfig
2293:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIM peripheral according to the specified
2294:Library/src/lcm32f06x_tim.c ****   *             parameters in the TIM_ICInitStruct to measure an external PWM signal.
2295:Library/src/lcm32f06x_tim.c ****   *         CN: 根据TIM_ICInitStruct中的指定参数配置TIM外围设备，以测量外部PWM信号。
2296:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
2297:Library/src/lcm32f06x_tim.c ****   *               CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2298:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICInitStruct: 
2299:Library/src/lcm32f06x_tim.c ****   *         EN: pointer to a TIM_ICInitTypeDef structure
2300:Library/src/lcm32f06x_tim.c ****   *             that contains the configuration information for the specified TIM
2301:Library/src/lcm32f06x_tim.c ****   *         CN:指向TIM_ICInitTypeDef结构的指针，该结构包含指定TIM的配置信息。
2302:Library/src/lcm32f06x_tim.c ****   * @retval None
2303:Library/src/lcm32f06x_tim.c ****   */
2304:Library/src/lcm32f06x_tim.c **** void TIM_PWMIConfig(TIM_TypeDef *TIMx, TIM_ICInitTypeDef *TIM_ICInitStruct)
2305:Library/src/lcm32f06x_tim.c **** {
2306:Library/src/lcm32f06x_tim.c ****   uint32_t icoppositepolarity = TIM_ICPolarity_Rising;
2307:Library/src/lcm32f06x_tim.c ****   uint32_t icoppositeselection = TIM_ICSelection_DirectTI;
2308:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2309:Library/src/lcm32f06x_tim.c **** 
2310:Library/src/lcm32f06x_tim.c ****   /* Select the Opposite Input Polarity */
2311:Library/src/lcm32f06x_tim.c ****   if (TIM_ICInitStruct->TIM_ICPolarity == TIM_ICPolarity_Rising)
2312:Library/src/lcm32f06x_tim.c ****   {
2313:Library/src/lcm32f06x_tim.c ****     icoppositepolarity = TIM_ICPolarity_Falling;
2314:Library/src/lcm32f06x_tim.c ****   }
2315:Library/src/lcm32f06x_tim.c ****   else
2316:Library/src/lcm32f06x_tim.c ****   {
2317:Library/src/lcm32f06x_tim.c ****     icoppositepolarity = TIM_ICPolarity_Rising;
ARM GAS  /tmp/ccWBHqpW.s 			page 118


2318:Library/src/lcm32f06x_tim.c ****   }
2319:Library/src/lcm32f06x_tim.c ****   /* Select the Opposite Input */
2320:Library/src/lcm32f06x_tim.c ****   if (TIM_ICInitStruct->TIM_ICSelection == TIM_ICSelection_DirectTI)
2321:Library/src/lcm32f06x_tim.c ****   {
2322:Library/src/lcm32f06x_tim.c ****     icoppositeselection = TIM_ICSelection_IndirectTI;
2323:Library/src/lcm32f06x_tim.c ****   }
2324:Library/src/lcm32f06x_tim.c ****   else
2325:Library/src/lcm32f06x_tim.c ****   {
2326:Library/src/lcm32f06x_tim.c ****     icoppositeselection = TIM_ICSelection_DirectTI;
2327:Library/src/lcm32f06x_tim.c ****   }
2328:Library/src/lcm32f06x_tim.c ****   if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
2329:Library/src/lcm32f06x_tim.c ****   {
2330:Library/src/lcm32f06x_tim.c ****     /* TI1 Configuration */
2331:Library/src/lcm32f06x_tim.c ****     TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection,
2332:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICFilter);
2333:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
2334:Library/src/lcm32f06x_tim.c ****     TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
2335:Library/src/lcm32f06x_tim.c ****     /* TI2 Configuration */
2336:Library/src/lcm32f06x_tim.c ****     TI2_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter);
2337:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
2338:Library/src/lcm32f06x_tim.c ****     TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
2339:Library/src/lcm32f06x_tim.c ****   }
2340:Library/src/lcm32f06x_tim.c ****   else
2341:Library/src/lcm32f06x_tim.c ****   {
2342:Library/src/lcm32f06x_tim.c ****     /* TI2 Configuration */
2343:Library/src/lcm32f06x_tim.c ****     TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection,
2344:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICFilter);
2345:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
2346:Library/src/lcm32f06x_tim.c ****     TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
2347:Library/src/lcm32f06x_tim.c ****     /* TI1 Configuration */
2348:Library/src/lcm32f06x_tim.c ****     TI1_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter);
2349:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
2350:Library/src/lcm32f06x_tim.c ****     TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
2351:Library/src/lcm32f06x_tim.c ****   }
2352:Library/src/lcm32f06x_tim.c **** }
2353:Library/src/lcm32f06x_tim.c **** 
2354:Library/src/lcm32f06x_tim.c **** /**
2355:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCapture1
2356:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Input Capture 1 value.
2357:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx Input Capture 1的值。
2358:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2359:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1,2,15,16 or 17 to select the TIM peripheral.
2360:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2361:Library/src/lcm32f06x_tim.c ****   * @retval EN: Capture Compare 1 Register value.
2362:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较1寄存器值。
2363:Library/src/lcm32f06x_tim.c ****   */
2364:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCapture1(TIM_TypeDef *TIMx)
2365:Library/src/lcm32f06x_tim.c **** {
2366:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2367:Library/src/lcm32f06x_tim.c **** 
2368:Library/src/lcm32f06x_tim.c ****   /* Get the Capture 1 Register value */
2369:Library/src/lcm32f06x_tim.c ****   return TIMx->CCR1;
2370:Library/src/lcm32f06x_tim.c **** }
2371:Library/src/lcm32f06x_tim.c **** 
2372:Library/src/lcm32f06x_tim.c **** /**
2373:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCapture2
2374:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Input Capture 2 value.
ARM GAS  /tmp/ccWBHqpW.s 			page 119


2375:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx Input Capture 2的值。
2376:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2377:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1,2,15 or 16 to select the TIM peripheral.
2378:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
2379:Library/src/lcm32f06x_tim.c ****   * @retval EN: Capture Compare 2 Register value.
2380:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较2寄存器值。
2381:Library/src/lcm32f06x_tim.c ****   */
2382:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCapture2(TIM_TypeDef *TIMx)
2383:Library/src/lcm32f06x_tim.c **** {
2384:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2385:Library/src/lcm32f06x_tim.c **** 
2386:Library/src/lcm32f06x_tim.c ****   /* Get the Capture 2 Register value */
2387:Library/src/lcm32f06x_tim.c ****   return TIMx->CCR2;
2388:Library/src/lcm32f06x_tim.c **** }
2389:Library/src/lcm32f06x_tim.c **** 
2390:Library/src/lcm32f06x_tim.c **** /**
2391:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCapture3
2392:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Input Capture 3 value.
2393:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx Input Capture 3的值。
2394:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2395:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1,2,15 or 16 to select the TIM peripheral.
2396:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
2397:Library/src/lcm32f06x_tim.c ****   * @retval EN: Capture Compare 3 Register value.
2398:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较3寄存器值。
2399:Library/src/lcm32f06x_tim.c ****   */
2400:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCapture3(TIM_TypeDef *TIMx)
2401:Library/src/lcm32f06x_tim.c **** {
2402:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2403:Library/src/lcm32f06x_tim.c **** 
2404:Library/src/lcm32f06x_tim.c ****   /* Get the Capture 3 Register value */
2405:Library/src/lcm32f06x_tim.c ****   return TIMx->CCR3;
2406:Library/src/lcm32f06x_tim.c **** }
2407:Library/src/lcm32f06x_tim.c **** 
2408:Library/src/lcm32f06x_tim.c **** /**
2409:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCapture4
2410:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Input Capture 4 value.
2411:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx Input Capture 4的值。
2412:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2413:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
2414:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
2415:Library/src/lcm32f06x_tim.c ****   * @retval EN: Capture Compare 4 Register value.
2416:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较4寄存器值。
2417:Library/src/lcm32f06x_tim.c ****   */
2418:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCapture4(TIM_TypeDef *TIMx)
2419:Library/src/lcm32f06x_tim.c **** {
2420:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2421:Library/src/lcm32f06x_tim.c **** 
2422:Library/src/lcm32f06x_tim.c ****   /* Get the Capture 4 Register value */
2423:Library/src/lcm32f06x_tim.c ****   return TIMx->CCR4;
2424:Library/src/lcm32f06x_tim.c **** }
2425:Library/src/lcm32f06x_tim.c **** 
2426:Library/src/lcm32f06x_tim.c **** /**
2427:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCapture5
2428:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Input Capture 5 value.
2429:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx Input Capture 5的值。
2430:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2431:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
ARM GAS  /tmp/ccWBHqpW.s 			page 120


2432:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
2433:Library/src/lcm32f06x_tim.c ****   * @retval EN: Capture Compare 5 Register value.
2434:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较5寄存器值。
2435:Library/src/lcm32f06x_tim.c ****   */
2436:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCapture5(TIM_TypeDef *TIMx)
2437:Library/src/lcm32f06x_tim.c **** {
2438:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2439:Library/src/lcm32f06x_tim.c **** 
2440:Library/src/lcm32f06x_tim.c ****   /* Get the Capture 4 Register value */
2441:Library/src/lcm32f06x_tim.c ****   return TIMx->CCR5;
2442:Library/src/lcm32f06x_tim.c **** }
2443:Library/src/lcm32f06x_tim.c **** 
2444:Library/src/lcm32f06x_tim.c **** /**
2445:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetIC1Prescaler
2446:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Input Capture 1 prescaler.
2447:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx Input Capture 1 预分频器。
2448:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2449:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1,2,15,16 or 17 to select the TIM peripheral.
2450:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2451:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPSC: 
2452:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Input Capture1 prescaler new value.
2453:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Input Capture1预分频器的新值。
2454:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV1
2455:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV2
2456:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV4
2457:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV8。
2458:Library/src/lcm32f06x_tim.c ****   * @retval None
2459:Library/src/lcm32f06x_tim.c ****   */
2460:Library/src/lcm32f06x_tim.c **** void TIM_SetIC1Prescaler(TIM_TypeDef *TIMx, uint32_t TIM_ICPSC)
2461:Library/src/lcm32f06x_tim.c **** {
2462:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2463:Library/src/lcm32f06x_tim.c **** 
2464:Library/src/lcm32f06x_tim.c ****   /* Reset the IC1PSC Bits */
2465:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 &= (uint32_t) ~((uint32_t)TIM_CCMR1_Input_IC1PSC_Msk);
2466:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
2467:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 |= TIM_ICPSC;
2468:Library/src/lcm32f06x_tim.c **** }
2469:Library/src/lcm32f06x_tim.c **** 
2470:Library/src/lcm32f06x_tim.c **** 
2471:Library/src/lcm32f06x_tim.c **** /**
2472:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetIC2Prescaler
2473:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Input Capture 2 prescaler.
2474:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx Input Capture 2 预分频器。
2475:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2476:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1,2,15 or 16 to select the TIM peripheral.
2477:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15或16以选择TIM外围设备。
2478:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPSC: 
2479:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Input Capture2 prescaler new value.
2480:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Input Capture2预分频器的新值。
2481:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV1
2482:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV2
2483:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV4
2484:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV8。
2485:Library/src/lcm32f06x_tim.c ****   * @retval None
2486:Library/src/lcm32f06x_tim.c ****   */
2487:Library/src/lcm32f06x_tim.c **** void TIM_SetIC2Prescaler(TIM_TypeDef *TIMx, uint32_t TIM_ICPSC)
2488:Library/src/lcm32f06x_tim.c **** {
ARM GAS  /tmp/ccWBHqpW.s 			page 121


2489:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2490:Library/src/lcm32f06x_tim.c **** 
2491:Library/src/lcm32f06x_tim.c ****   /* Reset the IC2PSC Bits */
2492:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 &= (uint32_t) ~((uint32_t)TIM_CCMR1_Input_IC2PSC_Msk);
2493:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
2494:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 |= (uint32_t)(TIM_ICPSC << 8);
2495:Library/src/lcm32f06x_tim.c **** }
2496:Library/src/lcm32f06x_tim.c **** 
2497:Library/src/lcm32f06x_tim.c **** 
2498:Library/src/lcm32f06x_tim.c **** /**
2499:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetIC3Prescaler
2500:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Input Capture 3 prescaler.
2501:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx Input Capture 3 预分频器。
2502:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2503:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
2504:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
2505:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPSC: 
2506:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Input Capture3 prescaler new value.
2507:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Input Capture3预分频器的新值。
2508:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV1
2509:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV2
2510:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV4
2511:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV8。
2512:Library/src/lcm32f06x_tim.c ****   * @retval None
2513:Library/src/lcm32f06x_tim.c ****   */
2514:Library/src/lcm32f06x_tim.c **** void TIM_SetIC3Prescaler(TIM_TypeDef *TIMx, uint32_t TIM_ICPSC)
2515:Library/src/lcm32f06x_tim.c **** {
2516:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2517:Library/src/lcm32f06x_tim.c **** 
2518:Library/src/lcm32f06x_tim.c ****   /* Reset the IC3PSC Bits */
2519:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 &= (uint32_t) ~((uint32_t)TIM_CCMR2_Input_IC3PSC_Msk);
2520:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
2521:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 |= TIM_ICPSC;
2522:Library/src/lcm32f06x_tim.c **** }
2523:Library/src/lcm32f06x_tim.c **** 
2524:Library/src/lcm32f06x_tim.c **** /**
2525:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetIC4Prescaler
2526:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Input Capture 5 prescaler.
2527:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx Input Capture 5 预分频器。
2528:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2529:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 or 2 to select the TIM peripheral.
2530:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
2531:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPSC: 
2532:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Input Capture5 prescaler new value.
2533:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Input Capture5预分频器的新值。
2534:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV1
2535:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV2
2536:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV4
2537:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV8。
2538:Library/src/lcm32f06x_tim.c ****   * @retval None
2539:Library/src/lcm32f06x_tim.c ****   */
2540:Library/src/lcm32f06x_tim.c **** void TIM_SetIC4Prescaler(TIM_TypeDef *TIMx, uint32_t TIM_ICPSC)
2541:Library/src/lcm32f06x_tim.c **** {
2542:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2543:Library/src/lcm32f06x_tim.c **** 
2544:Library/src/lcm32f06x_tim.c ****   /* Reset the IC4PSC Bits */
2545:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 &= (uint32_t) ~((uint32_t)TIM_CCMR2_Input_IC4PSC_Msk);
ARM GAS  /tmp/ccWBHqpW.s 			page 122


2546:Library/src/lcm32f06x_tim.c ****   /* Set the IC4PSC value */
2547:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 |= (uint32_t)(TIM_ICPSC << 8);
2548:Library/src/lcm32f06x_tim.c **** }
2549:Library/src/lcm32f06x_tim.c **** 
2550:Library/src/lcm32f06x_tim.c **** /**
2551:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetIC5Prescaler
2552:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Input Capture 5 prescaler.
2553:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx Input Capture 5预分频器。
2554:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2555:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, to select the TIM peripheral.
2556:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
2557:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPSC: 
2558:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Input Capture5 prescaler new value.
2559:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Input Capture5预分频器的新值。
2560:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV1
2561:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV2
2562:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV4
2563:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPSC_DIV8。
2564:Library/src/lcm32f06x_tim.c ****   * @retval None
2565:Library/src/lcm32f06x_tim.c ****   */
2566:Library/src/lcm32f06x_tim.c **** void TIM_SetIC5Prescaler(TIM_TypeDef *TIMx, uint32_t TIM_ICPSC)
2567:Library/src/lcm32f06x_tim.c **** {
2568:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2569:Library/src/lcm32f06x_tim.c **** 
2570:Library/src/lcm32f06x_tim.c ****   /* Reset the IC3PSC Bits */
2571:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR3 &= (uint32_t) ~((uint32_t)TIM_CCMR3_Input_IC5PSC_Msk);
2572:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
2573:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR3 |= TIM_ICPSC;
2574:Library/src/lcm32f06x_tim.c **** }
2575:Library/src/lcm32f06x_tim.c **** 
2576:Library/src/lcm32f06x_tim.c **** /**
2577:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ITConfig
2578:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the specified TIM interrupts.
2579:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用指定的TIM中断。
2580:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2581:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2582:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2583:Library/src/lcm32f06x_tim.c ****   * @param  TIM_IT: 
2584:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the TIM interrupts sources to be enabled or disabled.
2585:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要启用或禁用的TIM中断源。
2586:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_Update
2587:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC1
2588:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC2
2589:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC3
2590:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC4
2591:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_COM
2592:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_Trigger
2593:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_Break
2594:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_DMA
2595:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC5
2596:Library/src/lcm32f06x_tim.c ****   * @param  NewState:
2597:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the TIM interrupts.
2598:Library/src/lcm32f06x_tim.c ****   *         CN: TIM中断的新状态。
2599:Library/src/lcm32f06x_tim.c ****   * @retval None
2600:Library/src/lcm32f06x_tim.c ****   */
2601:Library/src/lcm32f06x_tim.c **** void TIM_ITConfig(TIM_TypeDef *TIMx, uint32_t TIM_IT, FunctionalState NewState)
2602:Library/src/lcm32f06x_tim.c **** {
ARM GAS  /tmp/ccWBHqpW.s 			page 123


2603:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2604:Library/src/lcm32f06x_tim.c **** 
2605:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
2606:Library/src/lcm32f06x_tim.c ****   {
2607:Library/src/lcm32f06x_tim.c ****     /* Enable the Interrupt sources */
2608:Library/src/lcm32f06x_tim.c ****     TIMx->DIER |= TIM_IT;
2609:Library/src/lcm32f06x_tim.c ****   }
2610:Library/src/lcm32f06x_tim.c ****   else
2611:Library/src/lcm32f06x_tim.c ****   {
2612:Library/src/lcm32f06x_tim.c ****     /* Disable the Interrupt sources */
2613:Library/src/lcm32f06x_tim.c ****     TIMx->DIER &= (uint32_t)~TIM_IT;
2614:Library/src/lcm32f06x_tim.c ****   }
2615:Library/src/lcm32f06x_tim.c **** }
2616:Library/src/lcm32f06x_tim.c **** 
2617:Library/src/lcm32f06x_tim.c **** /**
2618:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GenerateEvent
2619:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx event to be generate by software.
2620:Library/src/lcm32f06x_tim.c ****   *         CN: 将TIMx事件配置为由软件生成。
2621:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2622:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2623:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2624:Library/src/lcm32f06x_tim.c ****   * @param  TIM_EventSource: 
2625:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the event source.
2626:Library/src/lcm32f06x_tim.c ****   *         CN: 指定事件源。
2627:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EventSource_Update
2628:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EventSource_CC1
2629:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EventSource_CC2
2630:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EventSource_CC3
2631:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EventSource_CC4
2632:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EventSource_COM
2633:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EventSource_Trigger
2634:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EventSource_Break
2635:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EventSource_Break2
2636:Library/src/lcm32f06x_tim.c ****   * @retval None
2637:Library/src/lcm32f06x_tim.c ****   */
2638:Library/src/lcm32f06x_tim.c **** void TIM_GenerateEvent(TIM_TypeDef *TIMx, uint32_t TIM_EventSource)
2639:Library/src/lcm32f06x_tim.c **** {
2640:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2641:Library/src/lcm32f06x_tim.c **** 
2642:Library/src/lcm32f06x_tim.c ****   /* Set the event sources */
2643:Library/src/lcm32f06x_tim.c ****   TIMx->EGR = TIM_EventSource;
2644:Library/src/lcm32f06x_tim.c **** }
2645:Library/src/lcm32f06x_tim.c **** 
2646:Library/src/lcm32f06x_tim.c **** /**
2647:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetFlagStatus
2648:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Checks whether the specified TIM flag is set or not.
2649:Library/src/lcm32f06x_tim.c ****   *         CN: 检查是否设置了指定的TIM标志。
2650:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2651:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2652:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2653:Library/src/lcm32f06x_tim.c ****   * @param  TIM_FLAG: 
2654:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the flag to check.
2655:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要检查的标志。
2656:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_Update
2657:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC1
2658:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC2
2659:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC3
ARM GAS  /tmp/ccWBHqpW.s 			page 124


2660:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC4
2661:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_COM
2662:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_Trigger
2663:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_Break
2664:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_Break2
2665:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC1OF
2666:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC2OF
2667:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC3OF
2668:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC4OF
2669:Library/src/lcm32f06x_tim.c ****   * @retval FlagStatus
2670:Library/src/lcm32f06x_tim.c ****   */
2671:Library/src/lcm32f06x_tim.c **** FlagStatus TIM_GetFlagStatus(TIM_TypeDef *TIMx, uint32_t TIM_FLAG)
2672:Library/src/lcm32f06x_tim.c **** {
2673:Library/src/lcm32f06x_tim.c ****   ITStatus bitstatus = RESET;
2674:Library/src/lcm32f06x_tim.c **** 
2675:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2676:Library/src/lcm32f06x_tim.c **** 
2677:Library/src/lcm32f06x_tim.c ****   if ((TIMx->SR & TIM_FLAG) != (uint32_t)RESET)
2678:Library/src/lcm32f06x_tim.c ****   {
2679:Library/src/lcm32f06x_tim.c ****     bitstatus = SET;
2680:Library/src/lcm32f06x_tim.c ****   }
2681:Library/src/lcm32f06x_tim.c ****   else
2682:Library/src/lcm32f06x_tim.c ****   {
2683:Library/src/lcm32f06x_tim.c ****     bitstatus = RESET;
2684:Library/src/lcm32f06x_tim.c ****   }
2685:Library/src/lcm32f06x_tim.c ****   return bitstatus;
2686:Library/src/lcm32f06x_tim.c **** }
2687:Library/src/lcm32f06x_tim.c **** 
2688:Library/src/lcm32f06x_tim.c **** /**
2689:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ClearFlag
2690:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Clears the TIMx's pending flags.
2691:Library/src/lcm32f06x_tim.c ****   *         CN: 清除TIMx的挂起标志。
2692:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2693:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2694:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2695:Library/src/lcm32f06x_tim.c ****   * @param  TIM_FLAG: 
2696:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the flag bit to clear.
2697:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要清除的标志位。
2698:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_Update
2699:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC1
2700:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC2
2701:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC3
2702:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC4
2703:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_COM
2704:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_Trigger
2705:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_Break
2706:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_Break2
2707:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC1OF
2708:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC2OF
2709:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC3OF
2710:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_FLAG_CC4OF
2711:Library/src/lcm32f06x_tim.c ****   * @retval None
2712:Library/src/lcm32f06x_tim.c ****   */
2713:Library/src/lcm32f06x_tim.c **** void TIM_ClearFlag(TIM_TypeDef *TIMx, uint32_t TIM_FLAG)
2714:Library/src/lcm32f06x_tim.c **** {
2715:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2716:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 125


2717:Library/src/lcm32f06x_tim.c ****   /* Clear the flags */
2718:Library/src/lcm32f06x_tim.c ****   TIMx->SR = (uint32_t)~TIM_FLAG;
2719:Library/src/lcm32f06x_tim.c **** }
2720:Library/src/lcm32f06x_tim.c **** 
2721:Library/src/lcm32f06x_tim.c **** /**
2722:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetITStatus
2723:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Checks whether the TIM interrupt has occurred or not.
2724:Library/src/lcm32f06x_tim.c ****   *         CN: 检查TIM中断是否发生。
2725:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2726:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2727:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2728:Library/src/lcm32f06x_tim.c ****   * @param  TIM_IT: 
2729:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the pending bit to clear.
2730:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要检查的挂起位。
2731:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_Update
2732:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC1
2733:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC2
2734:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC3
2735:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC4
2736:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_COM
2737:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_Trigger
2738:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_Break
2739:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_DMA
2740:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC5
2741:Library/src/lcm32f06x_tim.c ****   * @retval ITStatus
2742:Library/src/lcm32f06x_tim.c ****   */
2743:Library/src/lcm32f06x_tim.c **** ITStatus TIM_GetITStatus(TIM_TypeDef *TIMx, uint32_t TIM_IT)
2744:Library/src/lcm32f06x_tim.c **** {
2745:Library/src/lcm32f06x_tim.c ****   ITStatus bitstatus = RESET;
2746:Library/src/lcm32f06x_tim.c ****   uint32_t itstatus = 0x0, itenable = 0x0;
2747:Library/src/lcm32f06x_tim.c **** 
2748:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2749:Library/src/lcm32f06x_tim.c **** 
2750:Library/src/lcm32f06x_tim.c ****   itstatus = TIMx->SR & TIM_IT;
2751:Library/src/lcm32f06x_tim.c **** 
2752:Library/src/lcm32f06x_tim.c ****   itenable = TIMx->DIER & TIM_IT;
2753:Library/src/lcm32f06x_tim.c ****   if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET))
2754:Library/src/lcm32f06x_tim.c ****   {
2755:Library/src/lcm32f06x_tim.c ****     bitstatus = SET;
2756:Library/src/lcm32f06x_tim.c ****   }
2757:Library/src/lcm32f06x_tim.c ****   else
2758:Library/src/lcm32f06x_tim.c ****   {
2759:Library/src/lcm32f06x_tim.c ****     bitstatus = RESET;
2760:Library/src/lcm32f06x_tim.c ****   }
2761:Library/src/lcm32f06x_tim.c ****   return bitstatus;
2762:Library/src/lcm32f06x_tim.c **** }
2763:Library/src/lcm32f06x_tim.c **** 
2764:Library/src/lcm32f06x_tim.c **** /**
2765:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ClearITPendingBit
2766:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Clears the TIMx's interrupt pending bits.
2767:Library/src/lcm32f06x_tim.c ****   *         CN: 清除TIMx的中断挂起位。
2768:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2769:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2770:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2771:Library/src/lcm32f06x_tim.c ****   * @param  TIM_IT: 
2772:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the pending bit to clear.
2773:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要清除的挂起位。
ARM GAS  /tmp/ccWBHqpW.s 			page 126


2774:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_Update
2775:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC1
2776:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC2
2777:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC3
2778:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC4
2779:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_COM
2780:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_Trigger
2781:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_Break
2782:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_DMA
2783:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_IT_CC5
2784:Library/src/lcm32f06x_tim.c ****   * @retval None
2785:Library/src/lcm32f06x_tim.c ****   */
2786:Library/src/lcm32f06x_tim.c **** void TIM_ClearITPendingBit(TIM_TypeDef *TIMx, uint32_t TIM_IT)
2787:Library/src/lcm32f06x_tim.c **** {
2788:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2789:Library/src/lcm32f06x_tim.c **** 
2790:Library/src/lcm32f06x_tim.c ****   /* Clear the IT pending Bit */
2791:Library/src/lcm32f06x_tim.c ****   TIMx->SR &= (uint32_t)~TIM_IT;
2792:Library/src/lcm32f06x_tim.c **** }
2793:Library/src/lcm32f06x_tim.c **** 
2794:Library/src/lcm32f06x_tim.c **** /**
2795:Library/src/lcm32f06x_tim.c ****   * @name   TIM_DMAConfig
2796:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIMx's DMA Requests.
2797:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用TIMx的DMA请求。
2798:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2799:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2800:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2801:Library/src/lcm32f06x_tim.c ****   * @param  TIM_DMABase: 
2802:Library/src/lcm32f06x_tim.c ****   *         EN: DMA Base address.
2803:Library/src/lcm32f06x_tim.c ****   *         CN: DMA基地址。
2804:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_CR1
2805:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_CR2
2806:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_SMCR
2807:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_DIER
2808:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_SR
2809:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_EGR
2810:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_CCMR1
2811:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_CCMR2
2812:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_CCER
2813:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_CNT
2814:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_PSC
2815:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_ARR
2816:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_CCR1
2817:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_CCR2
2818:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_CCR3
2819:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_CCR4
2820:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_DCR
2821:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABase_OR
2822:Library/src/lcm32f06x_tim.c ****   * @param  TIM_DMABurstLength: 
2823:Library/src/lcm32f06x_tim.c ****   *         EN: DMA Burst length.
2824:Library/src/lcm32f06x_tim.c ****   *         CN: DMA突发长度。
2825:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABurstLength_1Transfer
2826:Library/src/lcm32f06x_tim.c ****   *             @arg ...
2827:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMABurstLength_18Transfers
2828:Library/src/lcm32f06x_tim.c ****   * @retval None
2829:Library/src/lcm32f06x_tim.c ****   */
2830:Library/src/lcm32f06x_tim.c **** void TIM_DMAConfig(TIM_TypeDef *TIMx, uint32_t TIM_DMABase, uint32_t TIM_DMABurstLength)
ARM GAS  /tmp/ccWBHqpW.s 			page 127


2831:Library/src/lcm32f06x_tim.c **** {
2832:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2833:Library/src/lcm32f06x_tim.c **** 
2834:Library/src/lcm32f06x_tim.c ****   /* Set the DMA Base and the DMA Burst Length */
2835:Library/src/lcm32f06x_tim.c ****   TIMx->DCR = TIM_DMABase | TIM_DMABurstLength;
2836:Library/src/lcm32f06x_tim.c **** }
2837:Library/src/lcm32f06x_tim.c **** 
2838:Library/src/lcm32f06x_tim.c **** /**
2839:Library/src/lcm32f06x_tim.c ****   * @name   TIM_WriteDMAR
2840:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Write DMA transfer register value.
2841:Library/src/lcm32f06x_tim.c ****   *         CN: 写DMA传输寄存器值。
2842:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2843:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2844:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2845:Library/src/lcm32f06x_tim.c ****   * @param  TIM_DMAB: 
2846:Library/src/lcm32f06x_tim.c ****   *         EN: DMA transfer register value.
2847:Library/src/lcm32f06x_tim.c ****   *         CN: DMA传输寄存器值。
2848:Library/src/lcm32f06x_tim.c ****   * @retval None
2849:Library/src/lcm32f06x_tim.c ****   */
2850:Library/src/lcm32f06x_tim.c **** void TIM_WriteDMAR(TIM_TypeDef *TIMx, uint32_t TIM_DMAB)
2851:Library/src/lcm32f06x_tim.c **** {
2852:Library/src/lcm32f06x_tim.c ****   TIMx->DMAR = TIM_DMAB;
2853:Library/src/lcm32f06x_tim.c **** }
2854:Library/src/lcm32f06x_tim.c **** 
2855:Library/src/lcm32f06x_tim.c **** /**
2856:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ReadDMAR
2857:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Read DMA transfer register value.
2858:Library/src/lcm32f06x_tim.c ****   *         CN: 读DMA传输寄存器值。
2859:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2860:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2861:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2862:Library/src/lcm32f06x_tim.c ****   * @retval uint32_t
2863:Library/src/lcm32f06x_tim.c ****   */
2864:Library/src/lcm32f06x_tim.c **** uint32_t TIM_ReadDMAR(TIM_TypeDef *TIMx)
2865:Library/src/lcm32f06x_tim.c **** {
2866:Library/src/lcm32f06x_tim.c ****   return TIMx->DMAR;
2867:Library/src/lcm32f06x_tim.c **** }
2868:Library/src/lcm32f06x_tim.c **** 
2869:Library/src/lcm32f06x_tim.c ****  /**
2870:Library/src/lcm32f06x_tim.c ****   * @name   TIM_DMACmd
2871:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIMx's DMA Requests.
2872:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用TIMx的DMA请求。
2873:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2874:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2875:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2876:Library/src/lcm32f06x_tim.c ****   * @param  TIM_DMASource: 
2877:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the DMA Request sources.
2878:Library/src/lcm32f06x_tim.c ****   *         CN: 指定DMA请求源。
2879:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMA_Update
2880:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMA_CC1
2881:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMA_CC2
2882:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMA_CC3
2883:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMA_CC4
2884:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMA_COM
2885:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_DMA_Trigger
2886:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
2887:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the DMA Request sources.
ARM GAS  /tmp/ccWBHqpW.s 			page 128


2888:Library/src/lcm32f06x_tim.c ****   *         CN: DMA请求源的新状态。
2889:Library/src/lcm32f06x_tim.c ****   * @retval None
2890:Library/src/lcm32f06x_tim.c ****   */
2891:Library/src/lcm32f06x_tim.c **** void TIM_DMACmd(TIM_TypeDef *TIMx, uint32_t TIM_DMASource, FunctionalState NewState)
2892:Library/src/lcm32f06x_tim.c **** {
2893:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2894:Library/src/lcm32f06x_tim.c **** 
2895:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
2896:Library/src/lcm32f06x_tim.c ****   {
2897:Library/src/lcm32f06x_tim.c ****     /* Enable the DMA sources */
2898:Library/src/lcm32f06x_tim.c ****     TIMx->DIER |= TIM_DMASource;
2899:Library/src/lcm32f06x_tim.c ****   }
2900:Library/src/lcm32f06x_tim.c ****   else
2901:Library/src/lcm32f06x_tim.c ****   {
2902:Library/src/lcm32f06x_tim.c ****     /* Disable the DMA sources */
2903:Library/src/lcm32f06x_tim.c ****     TIMx->DIER &= (uint32_t)~TIM_DMASource;
2904:Library/src/lcm32f06x_tim.c ****   }
2905:Library/src/lcm32f06x_tim.c **** }
2906:Library/src/lcm32f06x_tim.c **** 
2907:Library/src/lcm32f06x_tim.c ****  /**
2908:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SelectCCDMA
2909:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Selects the TIMx peripheral Capture Compare DMA source.
2910:Library/src/lcm32f06x_tim.c ****   *         CN: 选择TIMx外围设备捕获比较DMA源。
2911:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2912:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2913:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2914:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
2915:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the Capture Compare DMA source.
2916:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较DMA源的新状态。
2917:Library/src/lcm32f06x_tim.c ****   * @retval None
2918:Library/src/lcm32f06x_tim.c ****   */
2919:Library/src/lcm32f06x_tim.c **** void TIM_SelectCCDMA(TIM_TypeDef *TIMx, FunctionalState NewState)
2920:Library/src/lcm32f06x_tim.c **** {
2921:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2922:Library/src/lcm32f06x_tim.c **** 
2923:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
2924:Library/src/lcm32f06x_tim.c ****   {
2925:Library/src/lcm32f06x_tim.c ****     /* Set the CCDS Bit */
2926:Library/src/lcm32f06x_tim.c ****     TIMx->CR2 |= TIM_CR2_CCDS_Msk;
2927:Library/src/lcm32f06x_tim.c ****   }
2928:Library/src/lcm32f06x_tim.c ****   else
2929:Library/src/lcm32f06x_tim.c ****   {
2930:Library/src/lcm32f06x_tim.c ****     /* Reset the CCDS Bit */
2931:Library/src/lcm32f06x_tim.c ****     TIMx->CR2 &= (uint32_t) ~((uint32_t)TIM_CR2_CCDS_Msk);
2932:Library/src/lcm32f06x_tim.c ****   }
2933:Library/src/lcm32f06x_tim.c **** }
2934:Library/src/lcm32f06x_tim.c **** 
2935:Library/src/lcm32f06x_tim.c ****  /**
2936:Library/src/lcm32f06x_tim.c ****   * @name   TIM_InternalClockConfig
2937:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx internal Clock.
2938:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx内部时钟。
2939:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2940:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15 ,16 or 17 to select the TIM peripheral.
2941:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
2942:Library/src/lcm32f06x_tim.c ****   * @retval None
2943:Library/src/lcm32f06x_tim.c ****   */
2944:Library/src/lcm32f06x_tim.c **** void TIM_InternalClockConfig(TIM_TypeDef *TIMx)
ARM GAS  /tmp/ccWBHqpW.s 			page 129


2945:Library/src/lcm32f06x_tim.c **** {
2946:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2947:Library/src/lcm32f06x_tim.c **** 
2948:Library/src/lcm32f06x_tim.c ****   /* Disable slave mode to clock the prescaler directly with the internal clock */
2949:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR &= (uint32_t)(~((uint32_t)TIM_SMCR_SMS_Msk));
2950:Library/src/lcm32f06x_tim.c **** }
2951:Library/src/lcm32f06x_tim.c **** 
2952:Library/src/lcm32f06x_tim.c **** /**
2953:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ITRxExternalClockConfig
2954:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Internal Trigger as External Clock.
2955:Library/src/lcm32f06x_tim.c ****   *         CN: 将TIMx内部触发器配置为外部时钟。
2956:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2957:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 or 15 to select the TIM peripheral.
2958:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2或15以选择TIM外围设备。
2959:Library/src/lcm32f06x_tim.c ****   * @param  TIM_InputTriggerSource: 
2960:Library/src/lcm32f06x_tim.c ****   *         EN: Trigger source.
2961:Library/src/lcm32f06x_tim.c ****   *         CN: 触发源。
2962:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_ITR0   
2963:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_ITR1   
2964:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_ITR2   
2965:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_ITR3   
2966:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_TI1F_ED
2967:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_TI1FP1 
2968:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_TI2FP2 
2969:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_ETRF   
2970:Library/src/lcm32f06x_tim.c ****   * @retval None
2971:Library/src/lcm32f06x_tim.c ****   */
2972:Library/src/lcm32f06x_tim.c **** void TIM_ITRxExternalClockConfig(TIM_TypeDef *TIMx, uint32_t TIM_InputTriggerSource)
2973:Library/src/lcm32f06x_tim.c **** {
2974:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
2975:Library/src/lcm32f06x_tim.c **** 
2976:Library/src/lcm32f06x_tim.c ****   /* Select the Internal Trigger */
2977:Library/src/lcm32f06x_tim.c ****   TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource);
2978:Library/src/lcm32f06x_tim.c ****   /* Select the External clock mode1 */
2979:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_SlaveMode_External1;
2980:Library/src/lcm32f06x_tim.c **** }
2981:Library/src/lcm32f06x_tim.c **** 
2982:Library/src/lcm32f06x_tim.c **** 
2983:Library/src/lcm32f06x_tim.c **** /**
2984:Library/src/lcm32f06x_tim.c ****   * @name   TIM_TIxExternalClockConfig
2985:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx Trigger as External Clock.
2986:Library/src/lcm32f06x_tim.c ****   *         CN: 将TIMx触发器配置为外部时钟。
2987:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
2988:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 or 15 to select the TIM peripheral.
2989:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2或15以选择TIM外围设备。
2990:Library/src/lcm32f06x_tim.c ****   * @param  TIM_TIxExternalCLKSource: 
2991:Library/src/lcm32f06x_tim.c ****   *         EN: Trigger source.
2992:Library/src/lcm32f06x_tim.c ****   *         CN: 触发源。
2993:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TIxExternalCLK1Source_TI1
2994:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TIxExternalCLK1Source_TI2
2995:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TIxExternalCLK1Source_TI1ED
2996:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPolarity: 
2997:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the TIx Polarity.
2998:Library/src/lcm32f06x_tim.c ****   *         CN: 指定TIx极性。
2999:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Rising
3000:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Falling
3001:Library/src/lcm32f06x_tim.c ****   * @param  ICFilter: 
ARM GAS  /tmp/ccWBHqpW.s 			page 130


3002:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the filter value.
3003:Library/src/lcm32f06x_tim.c ****   *         CN: 指定滤波值。
3004:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xF.
3005:Library/src/lcm32f06x_tim.c ****   * @retval None
3006:Library/src/lcm32f06x_tim.c ****   */
3007:Library/src/lcm32f06x_tim.c **** void TIM_TIxExternalClockConfig(TIM_TypeDef *TIMx, uint32_t TIM_TIxExternalCLKSource,
3008:Library/src/lcm32f06x_tim.c ****                                 uint32_t TIM_ICPolarity, uint32_t ICFilter)
3009:Library/src/lcm32f06x_tim.c **** {
3010:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
3011:Library/src/lcm32f06x_tim.c **** 
3012:Library/src/lcm32f06x_tim.c ****   /* Configure the Timer Input Clock Source */
3013:Library/src/lcm32f06x_tim.c ****   if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2)
3014:Library/src/lcm32f06x_tim.c ****   {
3015:Library/src/lcm32f06x_tim.c ****     TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
3016:Library/src/lcm32f06x_tim.c ****   }
3017:Library/src/lcm32f06x_tim.c ****   else
3018:Library/src/lcm32f06x_tim.c ****   {
3019:Library/src/lcm32f06x_tim.c ****     TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
3020:Library/src/lcm32f06x_tim.c ****   }
3021:Library/src/lcm32f06x_tim.c ****   /* Select the Trigger source */
3022:Library/src/lcm32f06x_tim.c ****   TIM_SelectInputTrigger(TIMx, TIM_TIxExternalCLKSource);
3023:Library/src/lcm32f06x_tim.c ****   /* Select the External clock mode1 */
3024:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_SlaveMode_External1;
3025:Library/src/lcm32f06x_tim.c **** }
3026:Library/src/lcm32f06x_tim.c **** 
3027:Library/src/lcm32f06x_tim.c **** /**
3028:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ETRClockMode1Config
3029:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the External clock Mode1.
3030:Library/src/lcm32f06x_tim.c ****   *         CN: 配置外部时钟模式1。
3031:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
3032:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1,2 or to select the TIM peripheral.
3033:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
3034:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ExtTRGPrescaler: 
3035:Library/src/lcm32f06x_tim.c ****   *         EN: The external Trigger Prescaler.
3036:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发器预分频器。
3037:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_OFF
3038:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_DIV2
3039:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_DIV4
3040:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_DIV8
3041:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ExtTRGPolarity: 
3042:Library/src/lcm32f06x_tim.c ****   *         EN: The external Trigger Polarity.
3043:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发器极性。
3044:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPolarity_Inverted
3045:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPolarity_NonInverted
3046:Library/src/lcm32f06x_tim.c ****   * @param  ExtTRGFilter: 
3047:Library/src/lcm32f06x_tim.c ****   *         EN: External Trigger Filter.
3048:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发器过滤器。
3049:Library/src/lcm32f06x_tim.c ****   *         @range 0x00 - 0x0F.
3050:Library/src/lcm32f06x_tim.c ****   * @retval None
3051:Library/src/lcm32f06x_tim.c ****   */
3052:Library/src/lcm32f06x_tim.c **** void TIM_ETRClockMode1Config(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPo
3053:Library/src/lcm32f06x_tim.c ****                              uint32_t ExtTRGFilter)
3054:Library/src/lcm32f06x_tim.c **** {
3055:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
3056:Library/src/lcm32f06x_tim.c **** 
3057:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
3058:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 131


3059:Library/src/lcm32f06x_tim.c ****   /* Configure the ETR Clock source */
3060:Library/src/lcm32f06x_tim.c ****   TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter);
3061:Library/src/lcm32f06x_tim.c **** 
3062:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx SMCR register value */
3063:Library/src/lcm32f06x_tim.c ****   tmpsmcr = TIMx->SMCR;
3064:Library/src/lcm32f06x_tim.c ****   /* Reset the SMS Bits */
3065:Library/src/lcm32f06x_tim.c ****   tmpsmcr &= (uint32_t)(~((uint32_t)TIM_SMCR_SMS_Msk));
3066:Library/src/lcm32f06x_tim.c ****   /* Select the External clock mode1 */
3067:Library/src/lcm32f06x_tim.c ****   tmpsmcr |= TIM_SlaveMode_External1;
3068:Library/src/lcm32f06x_tim.c ****   /* Select the Trigger selection : ETRF */
3069:Library/src/lcm32f06x_tim.c ****   tmpsmcr &= (uint32_t)(~((uint32_t)TIM_SMCR_TS_Msk));
3070:Library/src/lcm32f06x_tim.c ****   tmpsmcr |= TIM_TS_ETRF;
3071:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
3072:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR = tmpsmcr;
3073:Library/src/lcm32f06x_tim.c **** }
3074:Library/src/lcm32f06x_tim.c **** 
3075:Library/src/lcm32f06x_tim.c **** /**
3076:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ETRClockMode2Config
3077:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the External clock Mode2.
3078:Library/src/lcm32f06x_tim.c ****   *         CN: 配置外部时钟模式2。
3079:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
3080:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1,2 or to select the TIM peripheral.
3081:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1或2以选择TIM外围设备。
3082:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ExtTRGPrescaler: 
3083:Library/src/lcm32f06x_tim.c ****   *         EN: The external Trigger Prescaler.
3084:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发器预分频器。
3085:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_OFF
3086:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_DIV2
3087:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_DIV4
3088:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_DIV8
3089:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ExtTRGPolarity: 
3090:Library/src/lcm32f06x_tim.c ****   *         EN: The external Trigger Polarity.
3091:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发器极性。
3092:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPolarity_Inverted
3093:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPolarity_NonInverted
3094:Library/src/lcm32f06x_tim.c ****   * @param  ExtTRGFilter: 
3095:Library/src/lcm32f06x_tim.c ****   *         EN: External Trigger Filter.
3096:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发器过滤器。
3097:Library/src/lcm32f06x_tim.c ****   *         @range 0x00 - 0x0F.
3098:Library/src/lcm32f06x_tim.c ****   * @retval None
3099:Library/src/lcm32f06x_tim.c ****   */
3100:Library/src/lcm32f06x_tim.c **** void TIM_ETRClockMode2Config(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
3101:Library/src/lcm32f06x_tim.c ****                              uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
3102:Library/src/lcm32f06x_tim.c **** {
3103:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
3104:Library/src/lcm32f06x_tim.c **** 
3105:Library/src/lcm32f06x_tim.c ****   /* Configure the ETR Clock source */
3106:Library/src/lcm32f06x_tim.c ****   TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter);
3107:Library/src/lcm32f06x_tim.c ****   /* Enable the External clock mode2 */
3108:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_SMCR_ECE_Msk;
3109:Library/src/lcm32f06x_tim.c **** }
3110:Library/src/lcm32f06x_tim.c **** 
3111:Library/src/lcm32f06x_tim.c **** 
3112:Library/src/lcm32f06x_tim.c **** /**
3113:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SelectInputTrigger
3114:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Selects the Input Trigger source.
3115:Library/src/lcm32f06x_tim.c ****   *         CN: 选择输入触发器源。
ARM GAS  /tmp/ccWBHqpW.s 			page 132


3116:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
3117:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 or 15 to select the TIM peripheral.
3118:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2或15以选择TIM外围设备。
3119:Library/src/lcm32f06x_tim.c ****   * @param  TIM_InputTriggerSource: 
3120:Library/src/lcm32f06x_tim.c ****   *         EN: The Input Trigger source.
3121:Library/src/lcm32f06x_tim.c ****   *         CN: 输入触发器源。
3122:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_ITR0
3123:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_ITR1
3124:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_ITR2
3125:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_ITR3
3126:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_TI1F_ED
3127:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_TI1FP1
3128:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_TI2FP2
3129:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TS_ETRF
3130:Library/src/lcm32f06x_tim.c ****   * @retval None
3131:Library/src/lcm32f06x_tim.c ****   */
3132:Library/src/lcm32f06x_tim.c **** void TIM_SelectInputTrigger(TIM_TypeDef *TIMx, uint32_t TIM_InputTriggerSource)
3133:Library/src/lcm32f06x_tim.c **** {
3134:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
3135:Library/src/lcm32f06x_tim.c **** 
3136:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
3137:Library/src/lcm32f06x_tim.c **** 
3138:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx SMCR register value */
3139:Library/src/lcm32f06x_tim.c ****   tmpsmcr = TIMx->SMCR;
3140:Library/src/lcm32f06x_tim.c ****   /* Reset the TS Bits */
3141:Library/src/lcm32f06x_tim.c ****   tmpsmcr &= (uint32_t)(~((uint32_t)TIM_SMCR_TS_Msk));
3142:Library/src/lcm32f06x_tim.c ****   /* Set the Input Trigger source */
3143:Library/src/lcm32f06x_tim.c ****   tmpsmcr |= TIM_InputTriggerSource; // 0060
3144:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
3145:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR = tmpsmcr;
3146:Library/src/lcm32f06x_tim.c **** }
3147:Library/src/lcm32f06x_tim.c **** 
3148:Library/src/lcm32f06x_tim.c **** /**
3149:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SelectOutputTrigger
3150:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Selects the TIMx Trigger Output Mode.
3151:Library/src/lcm32f06x_tim.c ****   *         CN: 选择TIMx触发器输出模式。
3152:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
3153:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15,16or 17 to select the TIM peripheral.
3154:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
3155:Library/src/lcm32f06x_tim.c ****   * @param  TIM_TRGOSource: 
3156:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Trigger Output source.
3157:Library/src/lcm32f06x_tim.c ****   *         CN: 指定触发器输出源。
3158:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TRGOSource_Reset
3159:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TRGOSource_Enable
3160:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TRGOSource_Update
3161:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TRGOSource_OC1
3162:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TRGOSource_OC1Ref
3163:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TRGOSource_OC2Ref
3164:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TRGOSource_OC3Ref
3165:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_TRGOSource_OC4Ref
3166:Library/src/lcm32f06x_tim.c ****   * @retval None
3167:Library/src/lcm32f06x_tim.c ****   */
3168:Library/src/lcm32f06x_tim.c **** void TIM_SelectOutputTrigger(TIM_TypeDef *TIMx, uint32_t TIM_TRGOSource)
3169:Library/src/lcm32f06x_tim.c **** {
3170:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
3171:Library/src/lcm32f06x_tim.c **** 
3172:Library/src/lcm32f06x_tim.c ****   /* Reset the MMS Bits */
ARM GAS  /tmp/ccWBHqpW.s 			page 133


3173:Library/src/lcm32f06x_tim.c ****   TIMx->CR2 &= (uint32_t) ~((uint32_t)TIM_CR2_MMS_Msk);
3174:Library/src/lcm32f06x_tim.c ****   /* Select the TRGO source */
3175:Library/src/lcm32f06x_tim.c ****   TIMx->CR2 |= TIM_TRGOSource;
3176:Library/src/lcm32f06x_tim.c **** }
3177:Library/src/lcm32f06x_tim.c **** 
3178:Library/src/lcm32f06x_tim.c **** /**
3179:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SelectSlaveMode
3180:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Selects the TIMx Slave Mode.
3181:Library/src/lcm32f06x_tim.c ****   *         CN: 选择TIMx从模式。
3182:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
3183:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15,16or 17 to select the TIM peripheral.
3184:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
3185:Library/src/lcm32f06x_tim.c ****   * @param  TIM_SlaveMode: 
3186:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Timer Slave Mode.
3187:Library/src/lcm32f06x_tim.c ****   *         CN: 指定计时器从模式。
3188:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_SlaveMode_Reset
3189:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_SlaveMode_Gated
3190:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_SlaveMode_Trigger
3191:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_SlaveMode_External1
3192:Library/src/lcm32f06x_tim.c ****   * @retval None
3193:Library/src/lcm32f06x_tim.c ****   */
3194:Library/src/lcm32f06x_tim.c **** void TIM_SelectSlaveMode(TIM_TypeDef *TIMx, uint32_t TIM_SlaveMode)
3195:Library/src/lcm32f06x_tim.c **** {
3196:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
3197:Library/src/lcm32f06x_tim.c **** 
3198:Library/src/lcm32f06x_tim.c ****   /* Reset the SMS Bits */
3199:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR &= (uint32_t) ~((uint32_t)TIM_SMCR_SMS_Msk);
3200:Library/src/lcm32f06x_tim.c ****   /* Select the Slave Mode */
3201:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_SlaveMode;
3202:Library/src/lcm32f06x_tim.c **** }
3203:Library/src/lcm32f06x_tim.c **** 
3204:Library/src/lcm32f06x_tim.c **** /**
3205:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SelectMasterSlaveMode
3206:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets or Resets the TIMx Master/Slave Mode.
3207:Library/src/lcm32f06x_tim.c ****   *         CN: 设置或重置TIMx主/从模式。
3208:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
3209:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15,16or 17 to select the TIM peripheral.
3210:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
3211:Library/src/lcm32f06x_tim.c ****   * @param  TIM_MasterSlaveMode: 
3212:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Timer Master Slave Mode.
3213:Library/src/lcm32f06x_tim.c ****   *         CN: 指定计时器主从模式。
3214:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_MasterSlaveMode_Enable
3215:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_MasterSlaveMode_Disable
3216:Library/src/lcm32f06x_tim.c ****   * @retval None
3217:Library/src/lcm32f06x_tim.c ****   */
3218:Library/src/lcm32f06x_tim.c **** void TIM_SelectMasterSlaveMode(TIM_TypeDef *TIMx, uint32_t TIM_MasterSlaveMode)
3219:Library/src/lcm32f06x_tim.c **** {
3220:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
3221:Library/src/lcm32f06x_tim.c **** 
3222:Library/src/lcm32f06x_tim.c ****   /* Reset the MSM Bit */
3223:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR &= (uint32_t) ~((uint32_t)TIM_SMCR_MSM_Msk);
3224:Library/src/lcm32f06x_tim.c **** 
3225:Library/src/lcm32f06x_tim.c ****   /* Set or Reset the MSM Bit */
3226:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR |= TIM_MasterSlaveMode;
3227:Library/src/lcm32f06x_tim.c **** }
3228:Library/src/lcm32f06x_tim.c **** 
3229:Library/src/lcm32f06x_tim.c **** /**
ARM GAS  /tmp/ccWBHqpW.s 			page 134


3230:Library/src/lcm32f06x_tim.c ****   * @name   TIM_ETRConfig
3231:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configures the TIMx External Trigger (ETR).
3232:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx外部触发器（ETR）。
3233:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
3234:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 ,15,16or 17 to select the TIM peripheral.
3235:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
3236:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ExtTRGPrescaler: 
3237:Library/src/lcm32f06x_tim.c ****   *         EN: The external Trigger Prescaler.
3238:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发器预分频器。
3239:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_OFF
3240:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_DIV2
3241:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_DIV4
3242:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPSC_DIV8
3243:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ExtTRGPolarity: 
3244:Library/src/lcm32f06x_tim.c ****   *         EN: The external Trigger Polarity.
3245:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发器极性。
3246:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPolarity_Inverted
3247:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ExtTRGPolarity_NonInverted
3248:Library/src/lcm32f06x_tim.c ****   * @param  ExtTRGFilter: 
3249:Library/src/lcm32f06x_tim.c ****   *         EN: External Trigger Filter.
3250:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发器过滤器。
3251:Library/src/lcm32f06x_tim.c ****   *         @range 0x00 - 0x0F.
3252:Library/src/lcm32f06x_tim.c ****   * @retval None
3253:Library/src/lcm32f06x_tim.c ****   */
3254:Library/src/lcm32f06x_tim.c **** void TIM_ETRConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity,
3255:Library/src/lcm32f06x_tim.c ****                    uint32_t ExtTRGFilter)
3256:Library/src/lcm32f06x_tim.c **** {
3257:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
3258:Library/src/lcm32f06x_tim.c **** 
3259:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
3260:Library/src/lcm32f06x_tim.c **** 
3261:Library/src/lcm32f06x_tim.c ****   tmpsmcr = TIMx->SMCR;
3262:Library/src/lcm32f06x_tim.c ****   /* Reset the ETR Bits */
3263:Library/src/lcm32f06x_tim.c ****   tmpsmcr &= 0xFFFF00FF;
3264:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler, the Filter value and the Polarity */
3265:Library/src/lcm32f06x_tim.c ****   tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (uint32_t)(TIM_ExtTRGPolarity | (uint32_t)(ExtTRGFilt
3266:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
3267:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR = tmpsmcr;
3268:Library/src/lcm32f06x_tim.c **** }
3269:Library/src/lcm32f06x_tim.c **** 
3270:Library/src/lcm32f06x_tim.c **** /**
3271:Library/src/lcm32f06x_tim.c ****   * @name   TIM_EncoderInterfaceConfig
3272:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIMx's Hall sensor interface.
3273:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用TIMx的霍尔传感器接口。
3274:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
3275:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 2 to select the TIM peripheral.
3276:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是2以选择TIM外围设备。
3277:Library/src/lcm32f06x_tim.c ****   * @param  TIM_EncoderMode: 
3278:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the TIMx Encoder Mode.
3279:Library/src/lcm32f06x_tim.c ****   *         CN: 指定TIMx编码器模式。
3280:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EncoderMode_TI1
3281:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EncoderMode_TI2
3282:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_EncoderMode_TI12
3283:Library/src/lcm32f06x_tim.c ****   * @param  TIM_IC1Polarity: 
3284:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the IC1 Polarity.
3285:Library/src/lcm32f06x_tim.c ****   *         CN: 指定IC1极性。
3286:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Falling
ARM GAS  /tmp/ccWBHqpW.s 			page 135


3287:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Rising
3288:Library/src/lcm32f06x_tim.c ****   * @param  TIM_IC2Polarity: 
3289:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the IC2 Polarity.
3290:Library/src/lcm32f06x_tim.c ****   *         CN: 指定IC2极性。
3291:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Falling
3292:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Rising
3293:Library/src/lcm32f06x_tim.c ****   * @retval None
3294:Library/src/lcm32f06x_tim.c ****   */
3295:Library/src/lcm32f06x_tim.c **** void TIM_EncoderInterfaceConfig(TIM_TypeDef *TIMx, uint32_t TIM_EncoderMode,
3296:Library/src/lcm32f06x_tim.c ****                                 uint32_t TIM_IC1Polarity, uint32_t TIM_IC2Polarity)
3297:Library/src/lcm32f06x_tim.c **** {
3298:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
3299:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0;
3300:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
3301:Library/src/lcm32f06x_tim.c **** 
3302:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
3303:Library/src/lcm32f06x_tim.c **** 
3304:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx SMCR register value */
3305:Library/src/lcm32f06x_tim.c ****   tmpsmcr = TIMx->SMCR;
3306:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR1 register value */
3307:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
3308:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCER register value */
3309:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
3310:Library/src/lcm32f06x_tim.c ****   /* Set the encoder Mode */
3311:Library/src/lcm32f06x_tim.c ****   tmpsmcr &= (uint32_t)(~((uint32_t)TIM_SMCR_SMS_Msk));
3312:Library/src/lcm32f06x_tim.c ****   tmpsmcr |= TIM_EncoderMode;
3313:Library/src/lcm32f06x_tim.c ****   /* Select the Capture Compare 1 and the Capture Compare 2 as input */
3314:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t)(((uint32_t) ~((uint32_t)TIM_CCMR1_Input_CC1S_Msk)) & (uint32_t)(~((uint32_
3315:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0;
3316:Library/src/lcm32f06x_tim.c ****   /* Set the TI1 and the TI2 Polarities */
3317:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)(TIM_CCER_CC1P_Msk | TIM_CCER_CC1NP_Msk)) & (uint32_t) ~((uint3
3318:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_IC1Polarity | (uint32_t)(TIM_IC2Polarity << (uint32_t)4));
3319:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
3320:Library/src/lcm32f06x_tim.c ****   TIMx->SMCR = tmpsmcr;
3321:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 */
3322:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
3323:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER */
3324:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
3325:Library/src/lcm32f06x_tim.c **** }
3326:Library/src/lcm32f06x_tim.c **** 
3327:Library/src/lcm32f06x_tim.c **** /**
3328:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SelectHallSensor
3329:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Enables or disables the TIMx's Hall sensor interface.
3330:Library/src/lcm32f06x_tim.c ****   *         CN: 启用或禁用TIMx的霍尔传感器接口。
3331:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
3332:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
3333:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是2以选择TIM外围设备。
3334:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPolarity: 
3335:Library/src/lcm32f06x_tim.c ****   *         EN: new state of the TIMx Hall sensor interface.
3336:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx霍尔传感器接口的新状态。
3337:Library/src/lcm32f06x_tim.c ****   * @retval None
3338:Library/src/lcm32f06x_tim.c ****   */
3339:Library/src/lcm32f06x_tim.c **** void TIM_SelectHallSensor(TIM_TypeDef *TIMx, FunctionalState NewState)
3340:Library/src/lcm32f06x_tim.c **** {
3341:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
3342:Library/src/lcm32f06x_tim.c **** 
3343:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
ARM GAS  /tmp/ccWBHqpW.s 			page 136


3344:Library/src/lcm32f06x_tim.c ****   {
3345:Library/src/lcm32f06x_tim.c ****     /* Set the TI1S Bit */
3346:Library/src/lcm32f06x_tim.c ****     TIMx->CR2 |= TIM_CR2_TI1S_Msk;
3347:Library/src/lcm32f06x_tim.c ****   }
3348:Library/src/lcm32f06x_tim.c ****   else
3349:Library/src/lcm32f06x_tim.c ****   {
3350:Library/src/lcm32f06x_tim.c ****     /* Reset the TI1S Bit */
3351:Library/src/lcm32f06x_tim.c ****     TIMx->CR2 &= (uint32_t) ~((uint32_t)TIM_CR2_TI1S_Msk);
3352:Library/src/lcm32f06x_tim.c ****   }
3353:Library/src/lcm32f06x_tim.c **** }
3354:Library/src/lcm32f06x_tim.c **** 
3355:Library/src/lcm32f06x_tim.c **** /**
3356:Library/src/lcm32f06x_tim.c ****   * @name   TI1_Config
3357:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configure the TI1 as Input.
3358:Library/src/lcm32f06x_tim.c ****   *         CN: 将TI1配置为输入。
3359:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
3360:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16or 17 to select the TIM peripheral.
3361:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1，2，15，16或17以选择TIM外围设备。
3362:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPolarity: 
3363:Library/src/lcm32f06x_tim.c ****   *         EN: The Input Polarity.
3364:Library/src/lcm32f06x_tim.c ****   *         CN: 输入极性。
3365:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Rising
3366:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Falling
3367:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICSelection: 
3368:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the input to be used.
3369:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要使用的输入。
3370:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICSelection_DirectTI:
3371:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICSelection_TRC:
3372:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICFilter: 
3373:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the input to be used.
3374:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要使用的输入。
3375:Library/src/lcm32f06x_tim.c ****   *         @range 0x00 - 0x0F.
3376:Library/src/lcm32f06x_tim.c ****   * @retval None
3377:Library/src/lcm32f06x_tim.c ****   */
3378:Library/src/lcm32f06x_tim.c **** static void TI1_Config(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
3379:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
3380:Library/src/lcm32f06x_tim.c **** {
3381:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0, tmpccer = 0;
3382:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 1: Reset the CC1E Bit */
3383:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t) ~((uint32_t)TIM_CCER_CC1E_Msk);
3384:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
3385:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
3386:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t)(((uint32_t) ~((uint32_t)TIM_CCMR1_Input_CC1S_Msk)) & ((uint32_t) ~((uint32
3388:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
3389:Library/src/lcm32f06x_tim.c **** 
3390:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC1E Bit */
3391:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)(TIM_CCER_CC1P_Msk | TIM_CCER_CC1NP_Msk));
3392:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
3393:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
3394:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
3395:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
3396:Library/src/lcm32f06x_tim.c **** }
3397:Library/src/lcm32f06x_tim.c **** 
3398:Library/src/lcm32f06x_tim.c **** /**
3399:Library/src/lcm32f06x_tim.c ****   * @name   TI2_Config
3400:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configure the TI2 as Input.
ARM GAS  /tmp/ccWBHqpW.s 			page 137


3401:Library/src/lcm32f06x_tim.c ****   *         CN: 将TI2配置为输入。
3402:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
3403:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 to select the TIM peripheral.
3404:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1，2以选择TIM外围设备。
3405:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPolarity: 
3406:Library/src/lcm32f06x_tim.c ****   *         EN: The Input Polarity.
3407:Library/src/lcm32f06x_tim.c ****   *         CN: 输入极性。
3408:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Rising
3409:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Falling
3410:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICSelection: 
3411:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the input to be used.
3412:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要使用的输入。
3413:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICSelection_DirectTI:
3414:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICSelection_TRC:
3415:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICFilter: 
3416:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the input to be used.
3417:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要使用的输入。
3418:Library/src/lcm32f06x_tim.c ****   *         @range 0x00 - 0x0F.
3419:Library/src/lcm32f06x_tim.c ****   * @retval None
3420:Library/src/lcm32f06x_tim.c ****   */
3421:Library/src/lcm32f06x_tim.c **** static void TI2_Config(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
3422:Library/src/lcm32f06x_tim.c ****                 uint32_t TIM_ICFilter)
3423:Library/src/lcm32f06x_tim.c **** {
3424:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0, tmpccer = 0, tmp = 0;
3425:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 2: Reset the CC2E Bit */
3426:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t) ~((uint32_t)TIM_CCER_CC2E_Msk);
3427:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
3428:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
3429:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 4);
3430:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 &= (uint32_t)(((uint32_t) ~((uint32_t)TIM_CCMR1_Input_CC2S_Msk)) & ((uint32_t) ~((uint32
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
3433:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
3434:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
3435:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)(TIM_CCER_CC2P_Msk | TIM_CCER_CC2NP_Msk));
3436:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
3437:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
3438:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR1 = tmpccmr1;
3439:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
3440:Library/src/lcm32f06x_tim.c **** }
3441:Library/src/lcm32f06x_tim.c **** 
3442:Library/src/lcm32f06x_tim.c **** /**
3443:Library/src/lcm32f06x_tim.c ****   * @name   TI3_Config
3444:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configure the TI3 as Input.
3445:Library/src/lcm32f06x_tim.c ****   *         CN: 将TI3配置为输入。
3446:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
3447:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 to select the TIM peripheral.
3448:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1，2以选择TIM外围设备。
3449:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPolarity: 
3450:Library/src/lcm32f06x_tim.c ****   *         EN: The Input Polarity.
3451:Library/src/lcm32f06x_tim.c ****   *         CN: 输入极性。
3452:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Rising
3453:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Falling
3454:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICSelection: 
3455:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the input to be used.
3456:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要使用的输入。
3457:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICSelection_DirectTI:
ARM GAS  /tmp/ccWBHqpW.s 			page 138


3458:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICSelection_TRC:
3459:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICFilter: 
3460:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the input to be used.
3461:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要使用的输入。
3462:Library/src/lcm32f06x_tim.c ****   *         @range 0x00 - 0x0F.
3463:Library/src/lcm32f06x_tim.c ****   * @retval None
3464:Library/src/lcm32f06x_tim.c ****   */
3465:Library/src/lcm32f06x_tim.c **** static void TI3_Config(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
3466:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
3467:Library/src/lcm32f06x_tim.c **** {
3468:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
3469:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 3: Reset the CC3E Bit */
3470:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t) ~((uint32_t)TIM_CCER_CC3E_Msk);
3471:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
3472:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
3473:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 8);
3474:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
3475:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t)(((uint32_t) ~((uint32_t)TIM_CCMR2_Input_CC3S_Msk)) & ((uint32_t) ~((uint32
3476:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
3477:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC3E Bit */
3478:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)(TIM_CCER_CC3P_Msk | TIM_CCER_CC3NP_Msk));
3479:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC3E_Msk);
3480:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 and CCER registers */
3481:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmr2;
3482:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
3483:Library/src/lcm32f06x_tim.c **** }
3484:Library/src/lcm32f06x_tim.c **** 
3485:Library/src/lcm32f06x_tim.c **** /**
3486:Library/src/lcm32f06x_tim.c ****   * @name   TI4_Config
3487:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configure the TI4 as Input.
3488:Library/src/lcm32f06x_tim.c ****   *         CN: 将TI4配置为输入。
3489:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
3490:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 to select the TIM peripheral.
3491:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1，2以选择TIM外围设备。
3492:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPolarity: 
3493:Library/src/lcm32f06x_tim.c ****   *         EN: The Input Polarity.
3494:Library/src/lcm32f06x_tim.c ****   *         CN: 输入极性。
3495:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Rising
3496:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Falling
3497:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICSelection: 
3498:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the input to be used.
3499:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要使用的输入。
3500:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICSelection_DirectTI:
3501:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICSelection_TRC:
3502:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICFilter: 
3503:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the input to be used.
3504:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要使用的输入。
3505:Library/src/lcm32f06x_tim.c ****   *         @range 0x00 - 0x0F.
3506:Library/src/lcm32f06x_tim.c ****   * @retval None
3507:Library/src/lcm32f06x_tim.c ****   */
3508:Library/src/lcm32f06x_tim.c **** static void TI4_Config(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
3509:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
3510:Library/src/lcm32f06x_tim.c **** {
3511:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
3512:Library/src/lcm32f06x_tim.c **** 
3513:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 4: Reset the CC4E Bit */
3514:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t) ~((uint32_t)TIM_CCER_CC4E_Msk);
ARM GAS  /tmp/ccWBHqpW.s 			page 139


3515:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
3516:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
3517:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 12);
3518:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
3519:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t)((uint32_t)(~(uint32_t)TIM_CCMR2_Input_CC4S_Msk) & ((uint32_t) ~((uint32_t)
3520:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection << 8);
3521:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICFilter << 12);
3522:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC4E Bit */
3523:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)(TIM_CCER_CC4P_Msk | TIM_CCER_CC4NP_Msk));
3524:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC4E_Msk);
3525:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 and CCER registers */
3526:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR2 = tmpccmr2;
3527:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
3528:Library/src/lcm32f06x_tim.c **** }
3529:Library/src/lcm32f06x_tim.c **** 
3530:Library/src/lcm32f06x_tim.c **** /**
3531:Library/src/lcm32f06x_tim.c ****   * @name   TI5_Config
3532:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configure the TI5 as Input.
3533:Library/src/lcm32f06x_tim.c ****   *         CN: 将TI5配置为输入。
3534:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
3535:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1to select the TIM peripheral.
3536:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
3537:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICPolarity: 
3538:Library/src/lcm32f06x_tim.c ****   *         EN: The Input Polarity.
3539:Library/src/lcm32f06x_tim.c ****   *         CN: 输入极性。
3540:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Rising
3541:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICPolarity_Falling
3542:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICSelection: 
3543:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the input to be used.
3544:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要使用的输入。
3545:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICSelection_DirectTI:
3546:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_ICSelection_TRC:
3547:Library/src/lcm32f06x_tim.c ****   * @param  TIM_ICFilter: 
3548:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the input to be used.
3549:Library/src/lcm32f06x_tim.c ****   *         CN: 指定要使用的输入。
3550:Library/src/lcm32f06x_tim.c ****   *         @range 0x00 - 0x0F.
3551:Library/src/lcm32f06x_tim.c ****   * @retval None
3552:Library/src/lcm32f06x_tim.c ****   */
3553:Library/src/lcm32f06x_tim.c **** static void TI5_Config(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
3554:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
3555:Library/src/lcm32f06x_tim.c **** {
3556:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
3557:Library/src/lcm32f06x_tim.c **** 
3558:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 4: Reset the CC5E Bit */
3559:Library/src/lcm32f06x_tim.c ****   TIMx->CCER &= (uint32_t) ~((uint32_t)TIM_CCER_CC5E_Msk);
3560:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR3;
3561:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
3562:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 16);
3563:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
3564:Library/src/lcm32f06x_tim.c ****   tmpccmr2 &= (uint32_t)((uint32_t)(~(uint32_t)TIM_CCMR3_Input_CC5S_Msk) & ((uint32_t) ~((uint32_t)
 3919              		.loc 1 3564 12 is_stmt 0 view .LVU1173
 3920 0014 F327     		movs	r7, #243
3559:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR3;
 3921              		.loc 1 3559 7 view .LVU1174
 3922 0016 046A     		ldr	r4, [r0, #32]
3559:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR3;
 3923              		.loc 1 3559 14 view .LVU1175
ARM GAS  /tmp/ccWBHqpW.s 			page 140


 3924 0018 514D     		ldr	r5, .L181+4
 3925              	.LBE401:
 3926              	.LBE400:
2263:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 3927              		.loc 1 2263 5 view .LVU1176
 3928 001a 4A68     		ldr	r2, [r1, #4]
 3929              	.LBB405:
 3930              	.LBB402:
3559:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR3;
 3931              		.loc 1 3559 14 view .LVU1177
 3932 001c 2C40     		ands	r4, r5
 3933              	.LBE402:
 3934              	.LBE405:
2263:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 3935              		.loc 1 2263 5 view .LVU1178
 3936 001e 8B68     		ldr	r3, [r1, #8]
 3937 0020 0E69     		ldr	r6, [r1, #16]
 3938              	.LVL313:
 3939              	.LBB406:
 3940              	.LBI400:
3553:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
 3941              		.loc 1 3553 13 is_stmt 1 view .LVU1179
 3942              	.LBB403:
3556:Library/src/lcm32f06x_tim.c **** 
 3943              		.loc 1 3556 3 view .LVU1180
3559:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR3;
 3944              		.loc 1 3559 3 view .LVU1181
3559:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR3;
 3945              		.loc 1 3559 14 is_stmt 0 view .LVU1182
 3946 0022 0462     		str	r4, [r0, #32]
3560:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3947              		.loc 1 3560 3 is_stmt 1 view .LVU1183
3560:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 3948              		.loc 1 3560 12 is_stmt 0 view .LVU1184
 3949 0024 456D     		ldr	r5, [r0, #84]
 3950              	.LVL314:
3561:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 16);
 3951              		.loc 1 3561 3 is_stmt 1 view .LVU1185
3565:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection) | (uint32_t)(TIM_ICFilter);
 3952              		.loc 1 3565 43 is_stmt 0 view .LVU1186
 3953 0026 3343     		orrs	r3, r6
 3954              	.LVL315:
3564:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection) | (uint32_t)(TIM_ICFilter);
 3955              		.loc 1 3564 12 view .LVU1187
 3956 0028 BD43     		bics	r5, r7
 3957              	.LVL316:
3561:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 16);
 3958              		.loc 1 3561 11 view .LVU1188
 3959 002a 046A     		ldr	r4, [r0, #32]
 3960              	.LVL317:
3562:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 3961              		.loc 1 3562 3 is_stmt 1 view .LVU1189
3564:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection) | (uint32_t)(TIM_ICFilter);
 3962              		.loc 1 3564 3 view .LVU1190
 3963              		.loc 1 3565 3 view .LVU1191
 3964              		.loc 1 3565 12 is_stmt 0 view .LVU1192
 3965 002c 2B43     		orrs	r3, r5
ARM GAS  /tmp/ccWBHqpW.s 			page 141


 3966              	.LVL318:
3566:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC5E Bit */
3567:Library/src/lcm32f06x_tim.c ****   tmpccer &= (uint32_t) ~((uint32_t)(TIM_CCER_CC5P_Msk | TIM_CCER_CC5NP_Msk));
 3967              		.loc 1 3567 3 is_stmt 1 view .LVU1193
3568:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC5E_Msk);
 3968              		.loc 1 3568 3 view .LVU1194
3567:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC5E_Msk);
 3969              		.loc 1 3567 11 is_stmt 0 view .LVU1195
 3970 002e 4D4D     		ldr	r5, .L181+8
3562:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 3971              		.loc 1 3562 7 view .LVU1196
 3972 0030 1204     		lsls	r2, r2, #16
 3973              	.LVL319:
3567:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC5E_Msk);
 3974              		.loc 1 3567 11 view .LVU1197
 3975 0032 2C40     		ands	r4, r5
 3976              	.LVL320:
 3977              		.loc 1 3568 11 view .LVU1198
 3978 0034 2243     		orrs	r2, r4
 3979              	.LVL321:
 3980              		.loc 1 3568 11 view .LVU1199
 3981 0036 8024     		movs	r4, #128
 3982              	.LVL322:
3569:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 and CCER registers */
3570:Library/src/lcm32f06x_tim.c ****   TIMx->CCMR3 = tmpccmr2;
 3983              		.loc 1 3570 15 view .LVU1200
 3984 0038 4365     		str	r3, [r0, #84]
 3985              	.LBE403:
 3986              	.LBE406:
2267:Library/src/lcm32f06x_tim.c ****   }
 3987              		.loc 1 2267 5 view .LVU1201
 3988 003a CB68     		ldr	r3, [r1, #12]
 3989              	.LVL323:
 3990              	.LBB407:
 3991              	.LBB408:
2571:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 3992              		.loc 1 2571 15 view .LVU1202
 3993 003c 0C21     		movs	r1, #12
 3994              	.LVL324:
2571:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 3995              		.loc 1 2571 15 view .LVU1203
 3996              	.LBE408:
 3997              	.LBE407:
 3998              	.LBB410:
 3999              	.LBB404:
3568:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR3 and CCER registers */
 4000              		.loc 1 3568 11 view .LVU1204
 4001 003e 6402     		lsls	r4, r4, #9
 4002 0040 2243     		orrs	r2, r4
 4003              	.LVL325:
 4004              		.loc 1 3570 3 is_stmt 1 view .LVU1205
3571:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4005              		.loc 1 3571 3 view .LVU1206
 4006              		.loc 1 3571 14 is_stmt 0 view .LVU1207
 4007 0042 0262     		str	r2, [r0, #32]
 4008              	.LVL326:
 4009              		.loc 1 3571 14 view .LVU1208
ARM GAS  /tmp/ccWBHqpW.s 			page 142


 4010              	.LBE404:
 4011              	.LBE410:
2267:Library/src/lcm32f06x_tim.c ****   }
 4012              		.loc 1 2267 5 is_stmt 1 view .LVU1209
 4013              	.LBB411:
 4014              	.LBI407:
2566:Library/src/lcm32f06x_tim.c **** {
 4015              		.loc 1 2566 6 view .LVU1210
 4016              	.LBB409:
2571:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 4017              		.loc 1 2571 3 view .LVU1211
2571:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 4018              		.loc 1 2571 7 is_stmt 0 view .LVU1212
 4019 0044 426D     		ldr	r2, [r0, #84]
2571:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 4020              		.loc 1 2571 15 view .LVU1213
 4021 0046 8A43     		bics	r2, r1
 4022 0048 4265     		str	r2, [r0, #84]
2573:Library/src/lcm32f06x_tim.c **** }
 4023              		.loc 1 2573 3 is_stmt 1 view .LVU1214
2573:Library/src/lcm32f06x_tim.c **** }
 4024              		.loc 1 2573 7 is_stmt 0 view .LVU1215
 4025 004a 426D     		ldr	r2, [r0, #84]
2573:Library/src/lcm32f06x_tim.c **** }
 4026              		.loc 1 2573 15 view .LVU1216
 4027 004c 1343     		orrs	r3, r2
 4028              	.LVL327:
2573:Library/src/lcm32f06x_tim.c **** }
 4029              		.loc 1 2573 15 view .LVU1217
 4030 004e 4365     		str	r3, [r0, #84]
 4031              	.LVL328:
 4032              	.L173:
2573:Library/src/lcm32f06x_tim.c **** }
 4033              		.loc 1 2573 15 view .LVU1218
 4034              	.LBE409:
 4035              	.LBE411:
2269:Library/src/lcm32f06x_tim.c **** 
 4036              		.loc 1 2269 1 view .LVU1219
 4037              		@ sp needed
 4038 0050 80BC     		pop	{r7}
 4039 0052 B846     		mov	r8, r7
 4040 0054 F0BD     		pop	{r4, r5, r6, r7, pc}
 4041              	.LVL329:
 4042              	.L180:
2223:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 4043              		.loc 1 2223 5 is_stmt 1 view .LVU1220
 4044              	.LBB412:
 4045              	.LBB413:
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4046              		.loc 1 3383 14 is_stmt 0 view .LVU1221
 4047 0056 0125     		movs	r5, #1
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4048              		.loc 1 3383 7 view .LVU1222
 4049 0058 036A     		ldr	r3, [r0, #32]
 4050              	.LBE413:
 4051              	.LBE412:
2223:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
ARM GAS  /tmp/ccWBHqpW.s 			page 143


 4052              		.loc 1 2223 5 view .LVU1223
 4053 005a 4E68     		ldr	r6, [r1, #4]
 4054              	.LBB416:
 4055              	.LBB414:
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4056              		.loc 1 3383 14 view .LVU1224
 4057 005c AB43     		bics	r3, r5
 4058              	.LBE414:
 4059              	.LBE416:
2223:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 4060              		.loc 1 2223 5 view .LVU1225
 4061 005e 8F68     		ldr	r7, [r1, #8]
 4062 0060 0A69     		ldr	r2, [r1, #16]
 4063              	.LVL330:
 4064              	.LBB417:
 4065              	.LBI412:
3378:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
 4066              		.loc 1 3378 13 is_stmt 1 view .LVU1226
 4067              	.LBB415:
3381:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 1: Reset the CC1E Bit */
 4068              		.loc 1 3381 3 view .LVU1227
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4069              		.loc 1 3383 3 view .LVU1228
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4070              		.loc 1 3383 14 is_stmt 0 view .LVU1229
 4071 0062 0362     		str	r3, [r0, #32]
3384:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4072              		.loc 1 3384 3 is_stmt 1 view .LVU1230
3384:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4073              		.loc 1 3384 12 is_stmt 0 view .LVU1231
 4074 0064 8469     		ldr	r4, [r0, #24]
 4075              	.LVL331:
3385:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4076              		.loc 1 3385 3 is_stmt 1 view .LVU1232
3385:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4077              		.loc 1 3385 11 is_stmt 0 view .LVU1233
 4078 0066 036A     		ldr	r3, [r0, #32]
 4079              	.LVL332:
3388:Library/src/lcm32f06x_tim.c **** 
 4080              		.loc 1 3388 44 view .LVU1234
 4081 0068 1201     		lsls	r2, r2, #4
 4082              	.LVL333:
3385:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4083              		.loc 1 3385 11 view .LVU1235
 4084 006a 9846     		mov	r8, r3
 4085              	.LVL334:
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4086              		.loc 1 3387 3 is_stmt 1 view .LVU1236
3388:Library/src/lcm32f06x_tim.c **** 
 4087              		.loc 1 3388 3 view .LVU1237
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4088              		.loc 1 3387 12 is_stmt 0 view .LVU1238
 4089 006c F323     		movs	r3, #243
 4090              	.LVL335:
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4091              		.loc 1 3387 12 view .LVU1239
 4092 006e 9C43     		bics	r4, r3
ARM GAS  /tmp/ccWBHqpW.s 			page 144


 4093              	.LVL336:
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4094              		.loc 1 3387 12 view .LVU1240
 4095 0070 3C43     		orrs	r4, r7
3388:Library/src/lcm32f06x_tim.c **** 
 4096              		.loc 1 3388 12 view .LVU1241
 4097 0072 2243     		orrs	r2, r4
 4098              	.LVL337:
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 4099              		.loc 1 3391 3 is_stmt 1 view .LVU1242
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4100              		.loc 1 3392 3 view .LVU1243
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 4101              		.loc 1 3391 11 is_stmt 0 view .LVU1244
 4102 0074 4346     		mov	r3, r8
 4103 0076 0A24     		movs	r4, #10
 4104 0078 A343     		bics	r3, r4
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4105              		.loc 1 3392 11 view .LVU1245
 4106 007a 3343     		orrs	r3, r6
 4107 007c 2B43     		orrs	r3, r5
 4108              	.LVL338:
3394:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4109              		.loc 1 3394 3 is_stmt 1 view .LVU1246
3394:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4110              		.loc 1 3394 15 is_stmt 0 view .LVU1247
 4111 007e 8261     		str	r2, [r0, #24]
3395:Library/src/lcm32f06x_tim.c **** }
 4112              		.loc 1 3395 3 is_stmt 1 view .LVU1248
3395:Library/src/lcm32f06x_tim.c **** }
 4113              		.loc 1 3395 14 is_stmt 0 view .LVU1249
 4114 0080 0362     		str	r3, [r0, #32]
 4115              	.LVL339:
3395:Library/src/lcm32f06x_tim.c **** }
 4116              		.loc 1 3395 14 view .LVU1250
 4117              	.LBE415:
 4118              	.LBE417:
2227:Library/src/lcm32f06x_tim.c ****   }
 4119              		.loc 1 2227 5 is_stmt 1 view .LVU1251
 4120 0082 CB68     		ldr	r3, [r1, #12]
 4121              	.LVL340:
 4122              	.LBB418:
 4123              	.LBI418:
2460:Library/src/lcm32f06x_tim.c **** {
 4124              		.loc 1 2460 6 view .LVU1252
 4125              	.LBB419:
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 4126              		.loc 1 2465 3 view .LVU1253
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 4127              		.loc 1 2465 15 is_stmt 0 view .LVU1254
 4128 0084 0C21     		movs	r1, #12
 4129              	.LVL341:
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 4130              		.loc 1 2465 7 view .LVU1255
 4131 0086 8269     		ldr	r2, [r0, #24]
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 4132              		.loc 1 2465 15 view .LVU1256
ARM GAS  /tmp/ccWBHqpW.s 			page 145


 4133 0088 8A43     		bics	r2, r1
 4134 008a 8261     		str	r2, [r0, #24]
2467:Library/src/lcm32f06x_tim.c **** }
 4135              		.loc 1 2467 3 is_stmt 1 view .LVU1257
2467:Library/src/lcm32f06x_tim.c **** }
 4136              		.loc 1 2467 7 is_stmt 0 view .LVU1258
 4137 008c 8269     		ldr	r2, [r0, #24]
2467:Library/src/lcm32f06x_tim.c **** }
 4138              		.loc 1 2467 15 view .LVU1259
 4139 008e 1343     		orrs	r3, r2
 4140              	.LVL342:
2467:Library/src/lcm32f06x_tim.c **** }
 4141              		.loc 1 2467 15 view .LVU1260
 4142 0090 8361     		str	r3, [r0, #24]
 4143              	.LVL343:
2468:Library/src/lcm32f06x_tim.c **** 
 4144              		.loc 1 2468 1 view .LVU1261
 4145 0092 DDE7     		b	.L173
 4146              	.LVL344:
 4147              	.L179:
2468:Library/src/lcm32f06x_tim.c **** 
 4148              		.loc 1 2468 1 view .LVU1262
 4149              	.LBE419:
 4150              	.LBE418:
2233:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 4151              		.loc 1 2233 5 is_stmt 1 view .LVU1263
 4152              	.LBB420:
 4153              	.LBB421:
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4154              		.loc 1 3426 14 is_stmt 0 view .LVU1264
 4155 0094 1026     		movs	r6, #16
 4156              	.LBE421:
 4157              	.LBE420:
2233:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 4158              		.loc 1 2233 5 view .LVU1265
 4159 0096 4B68     		ldr	r3, [r1, #4]
 4160              	.LBB425:
 4161              	.LBB422:
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4162              		.loc 1 3426 7 view .LVU1266
 4163 0098 046A     		ldr	r4, [r0, #32]
 4164              	.LBE422:
 4165              	.LBE425:
2233:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 4166              		.loc 1 2233 5 view .LVU1267
 4167 009a 9846     		mov	r8, r3
 4168              	.LBB426:
 4169              	.LBB423:
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4170              		.loc 1 3426 14 view .LVU1268
 4171 009c B443     		bics	r4, r6
 4172              	.LBE423:
 4173              	.LBE426:
2233:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 4174              		.loc 1 2233 5 view .LVU1269
 4175 009e 8F68     		ldr	r7, [r1, #8]
 4176 00a0 0A69     		ldr	r2, [r1, #16]
ARM GAS  /tmp/ccWBHqpW.s 			page 146


 4177              	.LVL345:
 4178              	.LBB427:
 4179              	.LBI420:
3421:Library/src/lcm32f06x_tim.c ****                 uint32_t TIM_ICFilter)
 4180              		.loc 1 3421 13 is_stmt 1 view .LVU1270
 4181              	.LBB424:
3424:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 2: Reset the CC2E Bit */
 4182              		.loc 1 3424 3 view .LVU1271
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4183              		.loc 1 3426 3 view .LVU1272
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4184              		.loc 1 3426 14 is_stmt 0 view .LVU1273
 4185 00a2 0462     		str	r4, [r0, #32]
3427:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4186              		.loc 1 3427 3 is_stmt 1 view .LVU1274
3427:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4187              		.loc 1 3427 12 is_stmt 0 view .LVU1275
 4188 00a4 8569     		ldr	r5, [r0, #24]
 4189              	.LVL346:
3428:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 4);
 4190              		.loc 1 3428 3 is_stmt 1 view .LVU1276
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 4191              		.loc 1 3431 12 is_stmt 0 view .LVU1277
 4192 00a6 304B     		ldr	r3, .L181+12
 4193              	.LVL347:
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 4194              		.loc 1 3432 15 view .LVU1278
 4195 00a8 1203     		lsls	r2, r2, #12
 4196              	.LVL348:
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 4197              		.loc 1 3433 15 view .LVU1279
 4198 00aa 3F02     		lsls	r7, r7, #8
 4199              	.LVL349:
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 4200              		.loc 1 3431 12 view .LVU1280
 4201 00ac 1D40     		ands	r5, r3
 4202              	.LVL350:
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 4203              		.loc 1 3433 12 view .LVU1281
 4204 00ae 3A43     		orrs	r2, r7
 4205 00b0 2A43     		orrs	r2, r5
3429:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4206              		.loc 1 3429 7 view .LVU1282
 4207 00b2 4346     		mov	r3, r8
3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 4208              		.loc 1 3435 11 view .LVU1283
 4209 00b4 A025     		movs	r5, #160
3428:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 4);
 4210              		.loc 1 3428 11 view .LVU1284
 4211 00b6 046A     		ldr	r4, [r0, #32]
 4212              	.LVL351:
3429:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4213              		.loc 1 3429 3 is_stmt 1 view .LVU1285
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 4214              		.loc 1 3431 3 view .LVU1286
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 4215              		.loc 1 3432 3 view .LVU1287
ARM GAS  /tmp/ccWBHqpW.s 			page 147


3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 4216              		.loc 1 3433 3 view .LVU1288
3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 4217              		.loc 1 3435 3 view .LVU1289
3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4218              		.loc 1 3436 3 view .LVU1290
3429:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4219              		.loc 1 3429 7 is_stmt 0 view .LVU1291
 4220 00b8 1B01     		lsls	r3, r3, #4
 4221              	.LVL352:
3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 4222              		.loc 1 3435 11 view .LVU1292
 4223 00ba AC43     		bics	r4, r5
 4224              	.LVL353:
3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4225              		.loc 1 3436 11 view .LVU1293
 4226 00bc 2343     		orrs	r3, r4
 4227              	.LVL354:
3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4228              		.loc 1 3436 11 view .LVU1294
 4229 00be 3343     		orrs	r3, r6
 4230              	.LVL355:
3438:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4231              		.loc 1 3438 3 is_stmt 1 view .LVU1295
3438:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4232              		.loc 1 3438 15 is_stmt 0 view .LVU1296
 4233 00c0 8261     		str	r2, [r0, #24]
3439:Library/src/lcm32f06x_tim.c **** }
 4234              		.loc 1 3439 3 is_stmt 1 view .LVU1297
3439:Library/src/lcm32f06x_tim.c **** }
 4235              		.loc 1 3439 14 is_stmt 0 view .LVU1298
 4236 00c2 0362     		str	r3, [r0, #32]
 4237              	.LVL356:
3439:Library/src/lcm32f06x_tim.c **** }
 4238              		.loc 1 3439 14 view .LVU1299
 4239              	.LBE424:
 4240              	.LBE427:
2237:Library/src/lcm32f06x_tim.c ****   }
 4241              		.loc 1 2237 5 is_stmt 1 view .LVU1300
 4242              	.LBB428:
 4243              	.LBB429:
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 4244              		.loc 1 2492 7 is_stmt 0 view .LVU1301
 4245 00c4 8269     		ldr	r2, [r0, #24]
 4246              	.LBE429:
 4247              	.LBE428:
2237:Library/src/lcm32f06x_tim.c ****   }
 4248              		.loc 1 2237 5 view .LVU1302
 4249 00c6 CB68     		ldr	r3, [r1, #12]
 4250              	.LVL357:
 4251              	.LBB431:
 4252              	.LBI428:
2487:Library/src/lcm32f06x_tim.c **** {
 4253              		.loc 1 2487 6 is_stmt 1 view .LVU1303
 4254              	.LBB430:
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 4255              		.loc 1 2492 3 view .LVU1304
ARM GAS  /tmp/ccWBHqpW.s 			page 148


2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 4256              		.loc 1 2492 15 is_stmt 0 view .LVU1305
 4257 00c8 2849     		ldr	r1, .L181+16
 4258              	.LVL358:
2494:Library/src/lcm32f06x_tim.c **** }
 4259              		.loc 1 2494 18 view .LVU1306
 4260 00ca 1B02     		lsls	r3, r3, #8
 4261              	.LVL359:
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 4262              		.loc 1 2492 15 view .LVU1307
 4263 00cc 0A40     		ands	r2, r1
 4264 00ce 8261     		str	r2, [r0, #24]
2494:Library/src/lcm32f06x_tim.c **** }
 4265              		.loc 1 2494 3 is_stmt 1 view .LVU1308
2494:Library/src/lcm32f06x_tim.c **** }
 4266              		.loc 1 2494 7 is_stmt 0 view .LVU1309
 4267 00d0 8269     		ldr	r2, [r0, #24]
2494:Library/src/lcm32f06x_tim.c **** }
 4268              		.loc 1 2494 15 view .LVU1310
 4269 00d2 1343     		orrs	r3, r2
 4270 00d4 8361     		str	r3, [r0, #24]
 4271              	.LVL360:
2495:Library/src/lcm32f06x_tim.c **** 
 4272              		.loc 1 2495 1 view .LVU1311
 4273 00d6 BBE7     		b	.L173
 4274              	.LVL361:
 4275              	.L178:
2495:Library/src/lcm32f06x_tim.c **** 
 4276              		.loc 1 2495 1 view .LVU1312
 4277              	.LBE430:
 4278              	.LBE431:
2243:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 4279              		.loc 1 2243 5 is_stmt 1 view .LVU1313
 4280              	.LBB432:
 4281              	.LBB433:
3475:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4282              		.loc 1 3475 12 is_stmt 0 view .LVU1314
 4283 00d8 F327     		movs	r7, #243
3470:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 4284              		.loc 1 3470 7 view .LVU1315
 4285 00da 046A     		ldr	r4, [r0, #32]
3470:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 4286              		.loc 1 3470 14 view .LVU1316
 4287 00dc 244D     		ldr	r5, .L181+20
 4288              	.LBE433:
 4289              	.LBE432:
2243:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 4290              		.loc 1 2243 5 view .LVU1317
 4291 00de 4A68     		ldr	r2, [r1, #4]
 4292              	.LBB437:
 4293              	.LBB434:
3470:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 4294              		.loc 1 3470 14 view .LVU1318
 4295 00e0 2C40     		ands	r4, r5
 4296              	.LBE434:
 4297              	.LBE437:
2243:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
ARM GAS  /tmp/ccWBHqpW.s 			page 149


 4298              		.loc 1 2243 5 view .LVU1319
 4299 00e2 8E68     		ldr	r6, [r1, #8]
 4300 00e4 0B69     		ldr	r3, [r1, #16]
 4301              	.LVL362:
 4302              	.LBB438:
 4303              	.LBI432:
3465:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
 4304              		.loc 1 3465 13 is_stmt 1 view .LVU1320
 4305              	.LBB435:
3468:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 3: Reset the CC3E Bit */
 4306              		.loc 1 3468 3 view .LVU1321
3470:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 4307              		.loc 1 3470 3 view .LVU1322
3470:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 4308              		.loc 1 3470 14 is_stmt 0 view .LVU1323
 4309 00e6 0462     		str	r4, [r0, #32]
3471:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4310              		.loc 1 3471 3 is_stmt 1 view .LVU1324
3471:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4311              		.loc 1 3471 12 is_stmt 0 view .LVU1325
 4312 00e8 C469     		ldr	r4, [r0, #28]
 4313              	.LVL363:
3472:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 8);
 4314              		.loc 1 3472 3 is_stmt 1 view .LVU1326
3476:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC3E Bit */
 4315              		.loc 1 3476 44 is_stmt 0 view .LVU1327
 4316 00ea 1B01     		lsls	r3, r3, #4
 4317              	.LVL364:
3475:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4318              		.loc 1 3475 12 view .LVU1328
 4319 00ec BC43     		bics	r4, r7
 4320              	.LVL365:
3475:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4321              		.loc 1 3475 12 view .LVU1329
 4322 00ee 3443     		orrs	r4, r6
3472:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 8);
 4323              		.loc 1 3472 11 view .LVU1330
 4324 00f0 056A     		ldr	r5, [r0, #32]
 4325              	.LVL366:
3473:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4326              		.loc 1 3473 3 is_stmt 1 view .LVU1331
3475:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4327              		.loc 1 3475 3 view .LVU1332
3476:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC3E Bit */
 4328              		.loc 1 3476 3 view .LVU1333
3476:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC3E Bit */
 4329              		.loc 1 3476 12 is_stmt 0 view .LVU1334
 4330 00f2 2343     		orrs	r3, r4
 4331              	.LVL367:
3478:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC3E_Msk);
 4332              		.loc 1 3478 3 is_stmt 1 view .LVU1335
3479:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 and CCER registers */
 4333              		.loc 1 3479 3 view .LVU1336
3478:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC3E_Msk);
 4334              		.loc 1 3478 11 is_stmt 0 view .LVU1337
 4335 00f4 1F4C     		ldr	r4, .L181+24
3473:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
ARM GAS  /tmp/ccWBHqpW.s 			page 150


 4336              		.loc 1 3473 7 view .LVU1338
 4337 00f6 1202     		lsls	r2, r2, #8
 4338              	.LVL368:
3478:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC3E_Msk);
 4339              		.loc 1 3478 11 view .LVU1339
 4340 00f8 2C40     		ands	r4, r5
 4341              	.LVL369:
3479:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 and CCER registers */
 4342              		.loc 1 3479 11 view .LVU1340
 4343 00fa 2243     		orrs	r2, r4
 4344              	.LVL370:
3479:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 and CCER registers */
 4345              		.loc 1 3479 11 view .LVU1341
 4346 00fc 8024     		movs	r4, #128
 4347              	.LVL371:
3481:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4348              		.loc 1 3481 15 view .LVU1342
 4349 00fe C361     		str	r3, [r0, #28]
 4350              	.LBE435:
 4351              	.LBE438:
2247:Library/src/lcm32f06x_tim.c ****   }
 4352              		.loc 1 2247 5 view .LVU1343
 4353 0100 CB68     		ldr	r3, [r1, #12]
 4354              	.LVL372:
 4355              	.LBB439:
 4356              	.LBB440:
2519:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 4357              		.loc 1 2519 15 view .LVU1344
 4358 0102 0C21     		movs	r1, #12
 4359              	.LVL373:
2519:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 4360              		.loc 1 2519 15 view .LVU1345
 4361              	.LBE440:
 4362              	.LBE439:
 4363              	.LBB442:
 4364              	.LBB436:
3479:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 and CCER registers */
 4365              		.loc 1 3479 11 view .LVU1346
 4366 0104 6400     		lsls	r4, r4, #1
 4367 0106 2243     		orrs	r2, r4
 4368              	.LVL374:
3481:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4369              		.loc 1 3481 3 is_stmt 1 view .LVU1347
3482:Library/src/lcm32f06x_tim.c **** }
 4370              		.loc 1 3482 3 view .LVU1348
3482:Library/src/lcm32f06x_tim.c **** }
 4371              		.loc 1 3482 14 is_stmt 0 view .LVU1349
 4372 0108 0262     		str	r2, [r0, #32]
 4373              	.LVL375:
3482:Library/src/lcm32f06x_tim.c **** }
 4374              		.loc 1 3482 14 view .LVU1350
 4375              	.LBE436:
 4376              	.LBE442:
2247:Library/src/lcm32f06x_tim.c ****   }
 4377              		.loc 1 2247 5 is_stmt 1 view .LVU1351
 4378              	.LBB443:
 4379              	.LBI439:
ARM GAS  /tmp/ccWBHqpW.s 			page 151


2514:Library/src/lcm32f06x_tim.c **** {
 4380              		.loc 1 2514 6 view .LVU1352
 4381              	.LBB441:
2519:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 4382              		.loc 1 2519 3 view .LVU1353
2519:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 4383              		.loc 1 2519 7 is_stmt 0 view .LVU1354
 4384 010a C269     		ldr	r2, [r0, #28]
2519:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 4385              		.loc 1 2519 15 view .LVU1355
 4386 010c 8A43     		bics	r2, r1
 4387 010e C261     		str	r2, [r0, #28]
2521:Library/src/lcm32f06x_tim.c **** }
 4388              		.loc 1 2521 3 is_stmt 1 view .LVU1356
2521:Library/src/lcm32f06x_tim.c **** }
 4389              		.loc 1 2521 7 is_stmt 0 view .LVU1357
 4390 0110 C269     		ldr	r2, [r0, #28]
2521:Library/src/lcm32f06x_tim.c **** }
 4391              		.loc 1 2521 15 view .LVU1358
 4392 0112 1343     		orrs	r3, r2
 4393              	.LVL376:
2521:Library/src/lcm32f06x_tim.c **** }
 4394              		.loc 1 2521 15 view .LVU1359
 4395 0114 C361     		str	r3, [r0, #28]
 4396              	.LVL377:
2522:Library/src/lcm32f06x_tim.c **** 
 4397              		.loc 1 2522 1 view .LVU1360
 4398 0116 9BE7     		b	.L173
 4399              	.LVL378:
 4400              	.L177:
2522:Library/src/lcm32f06x_tim.c **** 
 4401              		.loc 1 2522 1 view .LVU1361
 4402              	.LBE441:
 4403              	.LBE443:
2253:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 4404              		.loc 1 2253 5 is_stmt 1 view .LVU1362
 4405              	.LBB444:
 4406              	.LBB445:
3514:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 4407              		.loc 1 3514 7 is_stmt 0 view .LVU1363
 4408 0118 046A     		ldr	r4, [r0, #32]
3514:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 4409              		.loc 1 3514 14 view .LVU1364
 4410 011a 174D     		ldr	r5, .L181+28
 4411              	.LBE445:
 4412              	.LBE444:
2253:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
 4413              		.loc 1 2253 5 view .LVU1365
 4414 011c 4A68     		ldr	r2, [r1, #4]
 4415              	.LBB448:
 4416              	.LBB446:
3514:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 4417              		.loc 1 3514 14 view .LVU1366
 4418 011e 2C40     		ands	r4, r5
 4419              	.LBE446:
 4420              	.LBE448:
2253:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICSelection,
ARM GAS  /tmp/ccWBHqpW.s 			page 152


 4421              		.loc 1 2253 5 view .LVU1367
 4422 0120 8B68     		ldr	r3, [r1, #8]
 4423 0122 0E69     		ldr	r6, [r1, #16]
 4424              	.LVL379:
 4425              	.LBB449:
 4426              	.LBI444:
3508:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
 4427              		.loc 1 3508 13 is_stmt 1 view .LVU1368
 4428              	.LBB447:
3511:Library/src/lcm32f06x_tim.c **** 
 4429              		.loc 1 3511 3 view .LVU1369
3514:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 4430              		.loc 1 3514 3 view .LVU1370
3514:Library/src/lcm32f06x_tim.c ****   tmpccmr2 = TIMx->CCMR2;
 4431              		.loc 1 3514 14 is_stmt 0 view .LVU1371
 4432 0124 0462     		str	r4, [r0, #32]
3515:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4433              		.loc 1 3515 3 is_stmt 1 view .LVU1372
3515:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4434              		.loc 1 3515 12 is_stmt 0 view .LVU1373
 4435 0126 C569     		ldr	r5, [r0, #28]
 4436              	.LVL380:
3516:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 12);
 4437              		.loc 1 3516 3 is_stmt 1 view .LVU1374
3519:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection << 8);
 4438              		.loc 1 3519 12 is_stmt 0 view .LVU1375
 4439 0128 0F4F     		ldr	r7, .L181+12
3520:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICFilter << 12);
 4440              		.loc 1 3520 15 view .LVU1376
 4441 012a 1B02     		lsls	r3, r3, #8
 4442              	.LVL381:
3521:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC4E Bit */
 4443              		.loc 1 3521 15 view .LVU1377
 4444 012c 3603     		lsls	r6, r6, #12
 4445              	.LVL382:
3519:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection << 8);
 4446              		.loc 1 3519 12 view .LVU1378
 4447 012e 3D40     		ands	r5, r7
 4448              	.LVL383:
3521:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC4E Bit */
 4449              		.loc 1 3521 12 view .LVU1379
 4450 0130 3343     		orrs	r3, r6
3516:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 12);
 4451              		.loc 1 3516 11 view .LVU1380
 4452 0132 046A     		ldr	r4, [r0, #32]
 4453              	.LVL384:
3517:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4454              		.loc 1 3517 3 is_stmt 1 view .LVU1381
3519:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICSelection << 8);
 4455              		.loc 1 3519 3 view .LVU1382
3520:Library/src/lcm32f06x_tim.c ****   tmpccmr2 |= (uint32_t)(TIM_ICFilter << 12);
 4456              		.loc 1 3520 3 view .LVU1383
3521:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC4E Bit */
 4457              		.loc 1 3521 3 view .LVU1384
3521:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC4E Bit */
 4458              		.loc 1 3521 12 is_stmt 0 view .LVU1385
 4459 0134 2B43     		orrs	r3, r5
ARM GAS  /tmp/ccWBHqpW.s 			page 153


 4460              	.LVL385:
3523:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC4E_Msk);
 4461              		.loc 1 3523 3 is_stmt 1 view .LVU1386
3524:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 and CCER registers */
 4462              		.loc 1 3524 3 view .LVU1387
3523:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC4E_Msk);
 4463              		.loc 1 3523 11 is_stmt 0 view .LVU1388
 4464 0136 114D     		ldr	r5, .L181+32
3517:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4465              		.loc 1 3517 7 view .LVU1389
 4466 0138 1203     		lsls	r2, r2, #12
 4467              	.LVL386:
3523:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC4E_Msk);
 4468              		.loc 1 3523 11 view .LVU1390
 4469 013a 2C40     		ands	r4, r5
 4470              	.LVL387:
3524:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 and CCER registers */
 4471              		.loc 1 3524 11 view .LVU1391
 4472 013c 2243     		orrs	r2, r4
 4473              	.LVL388:
3524:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 and CCER registers */
 4474              		.loc 1 3524 11 view .LVU1392
 4475 013e 8024     		movs	r4, #128
 4476              	.LVL389:
3524:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR2 and CCER registers */
 4477              		.loc 1 3524 11 view .LVU1393
 4478 0140 6401     		lsls	r4, r4, #5
 4479 0142 2243     		orrs	r2, r4
 4480              	.LVL390:
3526:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4481              		.loc 1 3526 3 is_stmt 1 view .LVU1394
3526:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4482              		.loc 1 3526 15 is_stmt 0 view .LVU1395
 4483 0144 C361     		str	r3, [r0, #28]
3527:Library/src/lcm32f06x_tim.c **** }
 4484              		.loc 1 3527 3 is_stmt 1 view .LVU1396
3527:Library/src/lcm32f06x_tim.c **** }
 4485              		.loc 1 3527 14 is_stmt 0 view .LVU1397
 4486 0146 0262     		str	r2, [r0, #32]
 4487              	.LVL391:
3527:Library/src/lcm32f06x_tim.c **** }
 4488              		.loc 1 3527 14 view .LVU1398
 4489              	.LBE447:
 4490              	.LBE449:
2257:Library/src/lcm32f06x_tim.c ****   }
 4491              		.loc 1 2257 5 is_stmt 1 view .LVU1399
 4492 0148 CB68     		ldr	r3, [r1, #12]
 4493              	.LVL392:
 4494              	.LBB450:
 4495              	.LBI450:
2540:Library/src/lcm32f06x_tim.c **** {
 4496              		.loc 1 2540 6 view .LVU1400
 4497              	.LBB451:
2545:Library/src/lcm32f06x_tim.c ****   /* Set the IC4PSC value */
 4498              		.loc 1 2545 3 view .LVU1401
2545:Library/src/lcm32f06x_tim.c ****   /* Set the IC4PSC value */
 4499              		.loc 1 2545 7 is_stmt 0 view .LVU1402
ARM GAS  /tmp/ccWBHqpW.s 			page 154


 4500 014a C269     		ldr	r2, [r0, #28]
2545:Library/src/lcm32f06x_tim.c ****   /* Set the IC4PSC value */
 4501              		.loc 1 2545 15 view .LVU1403
 4502 014c 0749     		ldr	r1, .L181+16
 4503              	.LVL393:
2547:Library/src/lcm32f06x_tim.c **** }
 4504              		.loc 1 2547 18 view .LVU1404
 4505 014e 1B02     		lsls	r3, r3, #8
 4506              	.LVL394:
2545:Library/src/lcm32f06x_tim.c ****   /* Set the IC4PSC value */
 4507              		.loc 1 2545 15 view .LVU1405
 4508 0150 0A40     		ands	r2, r1
 4509 0152 C261     		str	r2, [r0, #28]
2547:Library/src/lcm32f06x_tim.c **** }
 4510              		.loc 1 2547 3 is_stmt 1 view .LVU1406
2547:Library/src/lcm32f06x_tim.c **** }
 4511              		.loc 1 2547 7 is_stmt 0 view .LVU1407
 4512 0154 C269     		ldr	r2, [r0, #28]
2547:Library/src/lcm32f06x_tim.c **** }
 4513              		.loc 1 2547 15 view .LVU1408
 4514 0156 1343     		orrs	r3, r2
 4515 0158 C361     		str	r3, [r0, #28]
 4516              	.LVL395:
2548:Library/src/lcm32f06x_tim.c **** 
 4517              		.loc 1 2548 1 view .LVU1409
 4518 015a 79E7     		b	.L173
 4519              	.L182:
 4520              		.align	2
 4521              	.L181:
 4522 015c 00000000 		.word	.L176
 4523 0160 FFFFFEFF 		.word	-65537
 4524 0164 FFFFF5FF 		.word	-655361
 4525 0168 FF0CFFFF 		.word	-62209
 4526 016c FFF3FFFF 		.word	-3073
 4527 0170 FFFEFFFF 		.word	-257
 4528 0174 FFF5FFFF 		.word	-2561
 4529 0178 FFEFFFFF 		.word	-4097
 4530 017c FF5FFFFF 		.word	-40961
 4531              	.LBE451:
 4532              	.LBE450:
 4533              		.cfi_endproc
 4534              	.LFE115:
 4536              		.section	.text.TIM_ICStructInit,"ax",%progbits
 4537              		.align	1
 4538              		.p2align 2,,3
 4539              		.global	TIM_ICStructInit
 4540              		.syntax unified
 4541              		.code	16
 4542              		.thumb_func
 4544              	TIM_ICStructInit:
 4545              	.LVL396:
 4546              	.LFB116:
2282:Library/src/lcm32f06x_tim.c ****   /* Set the default configuration */
 4547              		.loc 1 2282 1 is_stmt 1 view -0
 4548              		.cfi_startproc
 4549              		@ args = 0, pretend = 0, frame = 0
 4550              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  /tmp/ccWBHqpW.s 			page 155


 4551              		@ link register save eliminated.
2284:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising;
 4552              		.loc 1 2284 3 view .LVU1411
2284:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising;
 4553              		.loc 1 2284 33 is_stmt 0 view .LVU1412
 4554 0000 0023     		movs	r3, #0
2289:Library/src/lcm32f06x_tim.c **** 
 4555              		.loc 1 2289 1 view .LVU1413
 4556              		@ sp needed
2286:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1;
 4557              		.loc 1 2286 37 view .LVU1414
 4558 0002 0122     		movs	r2, #1
2284:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising;
 4559              		.loc 1 2284 33 view .LVU1415
 4560 0004 0360     		str	r3, [r0]
2285:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI;
 4561              		.loc 1 2285 3 is_stmt 1 view .LVU1416
2285:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI;
 4562              		.loc 1 2285 36 is_stmt 0 view .LVU1417
 4563 0006 4360     		str	r3, [r0, #4]
2286:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1;
 4564              		.loc 1 2286 3 is_stmt 1 view .LVU1418
2286:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1;
 4565              		.loc 1 2286 37 is_stmt 0 view .LVU1419
 4566 0008 8260     		str	r2, [r0, #8]
2287:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICFilter = 0x00;
 4567              		.loc 1 2287 3 is_stmt 1 view .LVU1420
2287:Library/src/lcm32f06x_tim.c ****   TIM_ICInitStruct->TIM_ICFilter = 0x00;
 4568              		.loc 1 2287 37 is_stmt 0 view .LVU1421
 4569 000a C360     		str	r3, [r0, #12]
2288:Library/src/lcm32f06x_tim.c **** }
 4570              		.loc 1 2288 3 is_stmt 1 view .LVU1422
2288:Library/src/lcm32f06x_tim.c **** }
 4571              		.loc 1 2288 34 is_stmt 0 view .LVU1423
 4572 000c 0361     		str	r3, [r0, #16]
2289:Library/src/lcm32f06x_tim.c **** 
 4573              		.loc 1 2289 1 view .LVU1424
 4574 000e 7047     		bx	lr
 4575              		.cfi_endproc
 4576              	.LFE116:
 4578              		.section	.text.TIM_PWMIConfig,"ax",%progbits
 4579              		.align	1
 4580              		.p2align 2,,3
 4581              		.global	TIM_PWMIConfig
 4582              		.syntax unified
 4583              		.code	16
 4584              		.thumb_func
 4586              	TIM_PWMIConfig:
 4587              	.LVL397:
 4588              	.LFB117:
2305:Library/src/lcm32f06x_tim.c ****   uint32_t icoppositepolarity = TIM_ICPolarity_Rising;
 4589              		.loc 1 2305 1 is_stmt 1 view -0
 4590              		.cfi_startproc
 4591              		@ args = 0, pretend = 0, frame = 8
 4592              		@ frame_needed = 0, uses_anonymous_args = 0
2306:Library/src/lcm32f06x_tim.c ****   uint32_t icoppositeselection = TIM_ICSelection_DirectTI;
 4593              		.loc 1 2306 3 view .LVU1426
ARM GAS  /tmp/ccWBHqpW.s 			page 156


2307:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 4594              		.loc 1 2307 3 view .LVU1427
2311:Library/src/lcm32f06x_tim.c ****   {
 4595              		.loc 1 2311 3 view .LVU1428
2305:Library/src/lcm32f06x_tim.c ****   uint32_t icoppositepolarity = TIM_ICPolarity_Rising;
 4596              		.loc 1 2305 1 is_stmt 0 view .LVU1429
 4597 0000 F0B5     		push	{r4, r5, r6, r7, lr}
 4598              	.LCFI10:
 4599              		.cfi_def_cfa_offset 20
 4600              		.cfi_offset 4, -20
 4601              		.cfi_offset 5, -16
 4602              		.cfi_offset 6, -12
 4603              		.cfi_offset 7, -8
 4604              		.cfi_offset 14, -4
 4605 0002 DE46     		mov	lr, fp
 4606 0004 5746     		mov	r7, r10
 4607 0006 4E46     		mov	r6, r9
 4608 0008 4546     		mov	r5, r8
 4609 000a E0B5     		push	{r5, r6, r7, lr}
 4610              	.LCFI11:
 4611              		.cfi_def_cfa_offset 36
 4612              		.cfi_offset 8, -36
 4613              		.cfi_offset 9, -32
 4614              		.cfi_offset 10, -28
 4615              		.cfi_offset 11, -24
2311:Library/src/lcm32f06x_tim.c ****   {
 4616              		.loc 1 2311 23 view .LVU1430
 4617 000c 4A68     		ldr	r2, [r1, #4]
2305:Library/src/lcm32f06x_tim.c ****   uint32_t icoppositepolarity = TIM_ICPolarity_Rising;
 4618              		.loc 1 2305 1 view .LVU1431
 4619 000e 83B0     		sub	sp, sp, #12
 4620              	.LCFI12:
 4621              		.cfi_def_cfa_offset 48
2311:Library/src/lcm32f06x_tim.c ****   {
 4622              		.loc 1 2311 6 view .LVU1432
 4623 0010 5342     		rsbs	r3, r2, #0
 4624 0012 5341     		adcs	r3, r3, r2
2320:Library/src/lcm32f06x_tim.c ****   {
 4625              		.loc 1 2320 23 view .LVU1433
 4626 0014 8C68     		ldr	r4, [r1, #8]
2311:Library/src/lcm32f06x_tim.c ****   {
 4627              		.loc 1 2311 6 view .LVU1434
 4628 0016 0193     		str	r3, [sp, #4]
 4629              	.LVL398:
2320:Library/src/lcm32f06x_tim.c ****   {
 4630              		.loc 1 2320 3 is_stmt 1 view .LVU1435
2320:Library/src/lcm32f06x_tim.c ****   {
 4631              		.loc 1 2320 6 is_stmt 0 view .LVU1436
 4632 0018 8023     		movs	r3, #128
 4633              	.LVL399:
2320:Library/src/lcm32f06x_tim.c ****   {
 4634              		.loc 1 2320 6 view .LVU1437
 4635 001a 012C     		cmp	r4, #1
 4636 001c 00D1     		bne	.LCB3595
 4637 001e 8DE0     		b	.L189	@long jump
 4638              	.LCB3595:
 4639 0020 5B00     		lsls	r3, r3, #1
ARM GAS  /tmp/ccWBHqpW.s 			page 157


 4640 0022 9846     		mov	r8, r3
2326:Library/src/lcm32f06x_tim.c ****   }
 4641              		.loc 1 2326 25 view .LVU1438
 4642 0024 FF3B     		subs	r3, r3, #255
 4643 0026 9C46     		mov	ip, r3
 4644              	.L185:
 4645              	.LVL400:
2328:Library/src/lcm32f06x_tim.c ****   {
 4646              		.loc 1 2328 3 is_stmt 1 view .LVU1439
2331:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICFilter);
 4647              		.loc 1 2331 5 is_stmt 0 view .LVU1440
 4648 0028 0D69     		ldr	r5, [r1, #16]
2334:Library/src/lcm32f06x_tim.c ****     /* TI2 Configuration */
 4649              		.loc 1 2334 5 view .LVU1441
 4650 002a CE68     		ldr	r6, [r1, #12]
2328:Library/src/lcm32f06x_tim.c ****   {
 4651              		.loc 1 2328 6 view .LVU1442
 4652 002c 0968     		ldr	r1, [r1]
 4653              	.LVL401:
 4654              	.LBB452:
 4655              	.LBB453:
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 4656              		.loc 1 3432 15 view .LVU1443
 4657 002e 2F03     		lsls	r7, r5, #12
 4658              	.LBE453:
 4659              	.LBE452:
 4660              	.LBB459:
 4661              	.LBB460:
3388:Library/src/lcm32f06x_tim.c **** 
 4662              		.loc 1 3388 44 view .LVU1444
 4663 0030 2B01     		lsls	r3, r5, #4
 4664              	.LBE460:
 4665              	.LBE459:
 4666              	.LBB466:
 4667              	.LBB454:
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 4668              		.loc 1 3432 15 view .LVU1445
 4669 0032 BA46     		mov	r10, r7
 4670              	.LBE454:
 4671              	.LBE466:
 4672              	.LBB467:
 4673              	.LBB461:
3388:Library/src/lcm32f06x_tim.c **** 
 4674              		.loc 1 3388 44 view .LVU1446
 4675 0034 0093     		str	r3, [sp]
 4676              	.LBE461:
 4677              	.LBE467:
 4678              	.LBB468:
 4679              	.LBB469:
2494:Library/src/lcm32f06x_tim.c **** }
 4680              		.loc 1 2494 18 view .LVU1447
 4681 0036 3702     		lsls	r7, r6, #8
 4682              	.LBE469:
 4683              	.LBE468:
2328:Library/src/lcm32f06x_tim.c ****   {
 4684              		.loc 1 2328 6 view .LVU1448
 4685 0038 0029     		cmp	r1, #0
ARM GAS  /tmp/ccWBHqpW.s 			page 158


 4686 003a 3FD1     		bne	.L186
2331:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICFilter);
 4687              		.loc 1 2331 5 is_stmt 1 view .LVU1449
 4688              	.LVL402:
 4689              	.LBB471:
 4690              	.LBI459:
3378:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
 4691              		.loc 1 3378 13 view .LVU1450
 4692              	.LBB462:
3381:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 1: Reset the CC1E Bit */
 4693              		.loc 1 3381 3 view .LVU1451
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4694              		.loc 1 3383 3 view .LVU1452
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4695              		.loc 1 3383 14 is_stmt 0 view .LVU1453
 4696 003c 0123     		movs	r3, #1
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4697              		.loc 1 3383 7 view .LVU1454
 4698 003e 016A     		ldr	r1, [r0, #32]
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4699              		.loc 1 3383 14 view .LVU1455
 4700 0040 9C46     		mov	ip, r3
 4701 0042 9943     		bics	r1, r3
 4702 0044 0162     		str	r1, [r0, #32]
3384:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4703              		.loc 1 3384 3 is_stmt 1 view .LVU1456
3384:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4704              		.loc 1 3384 12 is_stmt 0 view .LVU1457
 4705 0046 8369     		ldr	r3, [r0, #24]
 4706              	.LVL403:
3385:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4707              		.loc 1 3385 11 view .LVU1458
 4708 0048 016A     		ldr	r1, [r0, #32]
 4709              	.LVL404:
3384:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4710              		.loc 1 3384 12 view .LVU1459
 4711 004a 9946     		mov	r9, r3
 4712              	.LVL405:
3385:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4713              		.loc 1 3385 3 is_stmt 1 view .LVU1460
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4714              		.loc 1 3387 3 view .LVU1461
3388:Library/src/lcm32f06x_tim.c **** 
 4715              		.loc 1 3388 3 view .LVU1462
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4716              		.loc 1 3387 12 is_stmt 0 view .LVU1463
 4717 004c F323     		movs	r3, #243
 4718              	.LVL406:
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 4719              		.loc 1 3387 12 view .LVU1464
 4720 004e 9B46     		mov	fp, r3
 4721 0050 4B46     		mov	r3, r9
 4722 0052 5D46     		mov	r5, fp
 4723 0054 AB43     		bics	r3, r5
 4724 0056 1C43     		orrs	r4, r3
 4725              	.LVL407:
3388:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 159


 4726              		.loc 1 3388 12 view .LVU1465
 4727 0058 009B     		ldr	r3, [sp]
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 4728              		.loc 1 3391 11 view .LVU1466
 4729 005a E93D     		subs	r5, r5, #233
3388:Library/src/lcm32f06x_tim.c **** 
 4730              		.loc 1 3388 12 view .LVU1467
 4731 005c 1C43     		orrs	r4, r3
 4732              	.LVL408:
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 4733              		.loc 1 3391 3 is_stmt 1 view .LVU1468
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4734              		.loc 1 3392 3 view .LVU1469
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4735              		.loc 1 3392 11 is_stmt 0 view .LVU1470
 4736 005e 6346     		mov	r3, ip
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 4737              		.loc 1 3391 11 view .LVU1471
 4738 0060 A943     		bics	r1, r5
 4739              	.LVL409:
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4740              		.loc 1 3392 11 view .LVU1472
 4741 0062 0A43     		orrs	r2, r1
 4742              	.LVL410:
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4743              		.loc 1 3392 11 view .LVU1473
 4744              	.LBE462:
 4745              	.LBE471:
 4746              	.LBB472:
 4747              	.LBB473:
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 4748              		.loc 1 2465 15 view .LVU1474
 4749 0064 0C21     		movs	r1, #12
 4750              	.LBE473:
 4751              	.LBE472:
 4752              	.LBB476:
 4753              	.LBB463:
3394:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4754              		.loc 1 3394 15 view .LVU1475
 4755 0066 8461     		str	r4, [r0, #24]
 4756              	.LBE463:
 4757              	.LBE476:
 4758              	.LBB477:
 4759              	.LBB455:
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4760              		.loc 1 3426 14 view .LVU1476
 4761 0068 1024     		movs	r4, #16
 4762              	.LVL411:
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4763              		.loc 1 3426 14 view .LVU1477
 4764              	.LBE455:
 4765              	.LBE477:
 4766              	.LBB478:
 4767              	.LBB464:
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4768              		.loc 1 3392 11 view .LVU1478
 4769 006a 1A43     		orrs	r2, r3
ARM GAS  /tmp/ccWBHqpW.s 			page 160


 4770              	.LVL412:
3394:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4771              		.loc 1 3394 3 is_stmt 1 view .LVU1479
3395:Library/src/lcm32f06x_tim.c **** }
 4772              		.loc 1 3395 3 view .LVU1480
 4773              	.LBE464:
 4774              	.LBE478:
 4775              	.LBB479:
 4776              	.LBB456:
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 4777              		.loc 1 3432 12 is_stmt 0 view .LVU1481
 4778 006c 5346     		mov	r3, r10
 4779              	.LBE456:
 4780              	.LBE479:
 4781              	.LBB480:
 4782              	.LBB465:
3395:Library/src/lcm32f06x_tim.c **** }
 4783              		.loc 1 3395 14 view .LVU1482
 4784 006e 0262     		str	r2, [r0, #32]
 4785              	.LVL413:
3395:Library/src/lcm32f06x_tim.c **** }
 4786              		.loc 1 3395 14 view .LVU1483
 4787              	.LBE465:
 4788              	.LBE480:
2334:Library/src/lcm32f06x_tim.c ****     /* TI2 Configuration */
 4789              		.loc 1 2334 5 is_stmt 1 view .LVU1484
 4790              	.LBB481:
 4791              	.LBI472:
2460:Library/src/lcm32f06x_tim.c **** {
 4792              		.loc 1 2460 6 view .LVU1485
 4793              	.LBB474:
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 4794              		.loc 1 2465 3 view .LVU1486
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 4795              		.loc 1 2465 7 is_stmt 0 view .LVU1487
 4796 0070 8269     		ldr	r2, [r0, #24]
 4797              	.LBE474:
 4798              	.LBE481:
 4799              	.LBB482:
 4800              	.LBB457:
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 4801              		.loc 1 3431 12 view .LVU1488
 4802 0072 354D     		ldr	r5, .L190
 4803              	.LBE457:
 4804              	.LBE482:
 4805              	.LBB483:
 4806              	.LBB475:
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 4807              		.loc 1 2465 15 view .LVU1489
 4808 0074 8A43     		bics	r2, r1
 4809 0076 8261     		str	r2, [r0, #24]
2467:Library/src/lcm32f06x_tim.c **** }
 4810              		.loc 1 2467 3 is_stmt 1 view .LVU1490
2467:Library/src/lcm32f06x_tim.c **** }
 4811              		.loc 1 2467 7 is_stmt 0 view .LVU1491
 4812 0078 8269     		ldr	r2, [r0, #24]
2467:Library/src/lcm32f06x_tim.c **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 161


 4813              		.loc 1 2467 15 view .LVU1492
 4814 007a 3243     		orrs	r2, r6
 4815 007c 8261     		str	r2, [r0, #24]
 4816              	.LVL414:
2467:Library/src/lcm32f06x_tim.c **** }
 4817              		.loc 1 2467 15 view .LVU1493
 4818              	.LBE475:
 4819              	.LBE483:
2336:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
 4820              		.loc 1 2336 5 is_stmt 1 view .LVU1494
 4821              	.LBB484:
 4822              	.LBI452:
3421:Library/src/lcm32f06x_tim.c ****                 uint32_t TIM_ICFilter)
 4823              		.loc 1 3421 13 view .LVU1495
 4824              	.LBB458:
3424:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 2: Reset the CC2E Bit */
 4825              		.loc 1 3424 3 view .LVU1496
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4826              		.loc 1 3426 3 view .LVU1497
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4827              		.loc 1 3426 7 is_stmt 0 view .LVU1498
 4828 007e 026A     		ldr	r2, [r0, #32]
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4829              		.loc 1 3426 14 view .LVU1499
 4830 0080 A243     		bics	r2, r4
 4831 0082 0262     		str	r2, [r0, #32]
3427:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4832              		.loc 1 3427 3 is_stmt 1 view .LVU1500
3427:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4833              		.loc 1 3427 12 is_stmt 0 view .LVU1501
 4834 0084 8269     		ldr	r2, [r0, #24]
 4835              	.LVL415:
3428:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 4);
 4836              		.loc 1 3428 3 is_stmt 1 view .LVU1502
3428:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 4);
 4837              		.loc 1 3428 11 is_stmt 0 view .LVU1503
 4838 0086 016A     		ldr	r1, [r0, #32]
 4839              	.LVL416:
3429:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4840              		.loc 1 3429 3 is_stmt 1 view .LVU1504
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 4841              		.loc 1 3431 3 view .LVU1505
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 4842              		.loc 1 3431 12 is_stmt 0 view .LVU1506
 4843 0088 2A40     		ands	r2, r5
 4844              	.LVL417:
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 4845              		.loc 1 3432 3 is_stmt 1 view .LVU1507
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 4846              		.loc 1 3432 12 is_stmt 0 view .LVU1508
 4847 008a 1A43     		orrs	r2, r3
 4848              	.LVL418:
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 4849              		.loc 1 3433 3 is_stmt 1 view .LVU1509
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 4850              		.loc 1 3433 12 is_stmt 0 view .LVU1510
 4851 008c 4346     		mov	r3, r8
ARM GAS  /tmp/ccWBHqpW.s 			page 162


3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 4852              		.loc 1 3435 11 view .LVU1511
 4853 008e A025     		movs	r5, #160
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 4854              		.loc 1 3433 12 view .LVU1512
 4855 0090 1A43     		orrs	r2, r3
 4856              	.LVL419:
3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 4857              		.loc 1 3435 3 is_stmt 1 view .LVU1513
3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4858              		.loc 1 3436 3 view .LVU1514
3429:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4859              		.loc 1 3429 7 is_stmt 0 view .LVU1515
 4860 0092 019B     		ldr	r3, [sp, #4]
3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 4861              		.loc 1 3435 11 view .LVU1516
 4862 0094 A943     		bics	r1, r5
 4863              	.LVL420:
3429:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4864              		.loc 1 3429 7 view .LVU1517
 4865 0096 5B01     		lsls	r3, r3, #5
 4866              	.LVL421:
3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4867              		.loc 1 3436 11 view .LVU1518
 4868 0098 0B43     		orrs	r3, r1
 4869              	.LVL422:
3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4870              		.loc 1 3436 11 view .LVU1519
 4871 009a 2343     		orrs	r3, r4
 4872              	.LVL423:
3438:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4873              		.loc 1 3438 3 is_stmt 1 view .LVU1520
3438:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4874              		.loc 1 3438 15 is_stmt 0 view .LVU1521
 4875 009c 8261     		str	r2, [r0, #24]
3439:Library/src/lcm32f06x_tim.c **** }
 4876              		.loc 1 3439 3 is_stmt 1 view .LVU1522
3439:Library/src/lcm32f06x_tim.c **** }
 4877              		.loc 1 3439 14 is_stmt 0 view .LVU1523
 4878 009e 0362     		str	r3, [r0, #32]
 4879              	.LVL424:
3439:Library/src/lcm32f06x_tim.c **** }
 4880              		.loc 1 3439 14 view .LVU1524
 4881              	.LBE458:
 4882              	.LBE484:
2338:Library/src/lcm32f06x_tim.c ****   }
 4883              		.loc 1 2338 5 is_stmt 1 view .LVU1525
 4884              	.LBB485:
 4885              	.LBI468:
2487:Library/src/lcm32f06x_tim.c **** {
 4886              		.loc 1 2487 6 view .LVU1526
 4887              	.LBB470:
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 4888              		.loc 1 2492 3 view .LVU1527
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 4889              		.loc 1 2492 7 is_stmt 0 view .LVU1528
 4890 00a0 8369     		ldr	r3, [r0, #24]
ARM GAS  /tmp/ccWBHqpW.s 			page 163


2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 4891              		.loc 1 2492 15 view .LVU1529
 4892 00a2 2A4A     		ldr	r2, .L190+4
 4893 00a4 1340     		ands	r3, r2
 4894 00a6 8361     		str	r3, [r0, #24]
2494:Library/src/lcm32f06x_tim.c **** }
 4895              		.loc 1 2494 3 is_stmt 1 view .LVU1530
2494:Library/src/lcm32f06x_tim.c **** }
 4896              		.loc 1 2494 7 is_stmt 0 view .LVU1531
 4897 00a8 8369     		ldr	r3, [r0, #24]
2494:Library/src/lcm32f06x_tim.c **** }
 4898              		.loc 1 2494 15 view .LVU1532
 4899 00aa 3B43     		orrs	r3, r7
 4900 00ac 8361     		str	r3, [r0, #24]
 4901              	.LVL425:
 4902              	.L184:
2494:Library/src/lcm32f06x_tim.c **** }
 4903              		.loc 1 2494 15 view .LVU1533
 4904              	.LBE470:
 4905              	.LBE485:
2352:Library/src/lcm32f06x_tim.c **** 
 4906              		.loc 1 2352 1 view .LVU1534
 4907 00ae 03B0     		add	sp, sp, #12
 4908              		@ sp needed
 4909 00b0 F0BC     		pop	{r4, r5, r6, r7}
 4910 00b2 BB46     		mov	fp, r7
 4911 00b4 B246     		mov	r10, r6
 4912 00b6 A946     		mov	r9, r5
 4913 00b8 A046     		mov	r8, r4
 4914 00ba F0BD     		pop	{r4, r5, r6, r7, pc}
 4915              	.L186:
2343:Library/src/lcm32f06x_tim.c ****                TIM_ICInitStruct->TIM_ICFilter);
 4916              		.loc 1 2343 5 is_stmt 1 view .LVU1535
 4917              	.LVL426:
 4918              	.LBB486:
 4919              	.LBI486:
3421:Library/src/lcm32f06x_tim.c ****                 uint32_t TIM_ICFilter)
 4920              		.loc 1 3421 13 view .LVU1536
 4921              	.LBB487:
3424:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 2: Reset the CC2E Bit */
 4922              		.loc 1 3424 3 view .LVU1537
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4923              		.loc 1 3426 3 view .LVU1538
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4924              		.loc 1 3426 14 is_stmt 0 view .LVU1539
 4925 00bc 1021     		movs	r1, #16
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4926              		.loc 1 3426 7 view .LVU1540
 4927 00be 036A     		ldr	r3, [r0, #32]
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 4928              		.loc 1 3433 15 view .LVU1541
 4929 00c0 2402     		lsls	r4, r4, #8
 4930              	.LVL427:
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 4931              		.loc 1 3426 14 view .LVU1542
 4932 00c2 8B43     		bics	r3, r1
 4933 00c4 0362     		str	r3, [r0, #32]
ARM GAS  /tmp/ccWBHqpW.s 			page 164


3427:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4934              		.loc 1 3427 3 is_stmt 1 view .LVU1543
3427:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4935              		.loc 1 3427 12 is_stmt 0 view .LVU1544
 4936 00c6 8369     		ldr	r3, [r0, #24]
 4937              	.LVL428:
3429:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4938              		.loc 1 3429 7 view .LVU1545
 4939 00c8 1201     		lsls	r2, r2, #4
 4940              	.LVL429:
3427:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 4941              		.loc 1 3427 12 view .LVU1546
 4942 00ca 9946     		mov	r9, r3
 4943              	.LVL430:
3428:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 4);
 4944              		.loc 1 3428 3 is_stmt 1 view .LVU1547
3428:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 4);
 4945              		.loc 1 3428 11 is_stmt 0 view .LVU1548
 4946 00cc 036A     		ldr	r3, [r0, #32]
 4947              	.LVL431:
3428:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 4);
 4948              		.loc 1 3428 11 view .LVU1549
 4949 00ce 9846     		mov	r8, r3
 4950              	.LVL432:
3429:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 4951              		.loc 1 3429 3 is_stmt 1 view .LVU1550
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 4952              		.loc 1 3431 3 view .LVU1551
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 4953              		.loc 1 3431 12 is_stmt 0 view .LVU1552
 4954 00d0 1D4B     		ldr	r3, .L190
 4955              	.LVL433:
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 4956              		.loc 1 3431 12 view .LVU1553
 4957 00d2 9B46     		mov	fp, r3
 4958 00d4 4B46     		mov	r3, r9
 4959 00d6 5D46     		mov	r5, fp
 4960 00d8 2B40     		ands	r3, r5
 4961 00da 9946     		mov	r9, r3
 4962              	.LVL434:
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 4963              		.loc 1 3432 3 is_stmt 1 view .LVU1554
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 4964              		.loc 1 3433 3 view .LVU1555
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 4965              		.loc 1 3433 12 is_stmt 0 view .LVU1556
 4966 00dc 5346     		mov	r3, r10
 4967              	.LVL435:
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 4968              		.loc 1 3433 12 view .LVU1557
 4969 00de 1C43     		orrs	r4, r3
 4970 00e0 4B46     		mov	r3, r9
 4971 00e2 1C43     		orrs	r4, r3
 4972              	.LVL436:
3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 4973              		.loc 1 3435 3 is_stmt 1 view .LVU1558
3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
ARM GAS  /tmp/ccWBHqpW.s 			page 165


 4974              		.loc 1 3436 3 view .LVU1559
3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 4975              		.loc 1 3435 11 is_stmt 0 view .LVU1560
 4976 00e4 A023     		movs	r3, #160
 4977 00e6 9946     		mov	r9, r3
 4978 00e8 4346     		mov	r3, r8
 4979 00ea 4D46     		mov	r5, r9
 4980 00ec AB43     		bics	r3, r5
3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 4981              		.loc 1 3436 11 view .LVU1561
 4982 00ee 1A43     		orrs	r2, r3
 4983 00f0 0A43     		orrs	r2, r1
 4984              	.LVL437:
3438:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4985              		.loc 1 3438 3 is_stmt 1 view .LVU1562
3438:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 4986              		.loc 1 3438 15 is_stmt 0 view .LVU1563
 4987 00f2 8461     		str	r4, [r0, #24]
3439:Library/src/lcm32f06x_tim.c **** }
 4988              		.loc 1 3439 3 is_stmt 1 view .LVU1564
3439:Library/src/lcm32f06x_tim.c **** }
 4989              		.loc 1 3439 14 is_stmt 0 view .LVU1565
 4990 00f4 0262     		str	r2, [r0, #32]
 4991              	.LVL438:
3439:Library/src/lcm32f06x_tim.c **** }
 4992              		.loc 1 3439 14 view .LVU1566
 4993              	.LBE487:
 4994              	.LBE486:
2346:Library/src/lcm32f06x_tim.c ****     /* TI1 Configuration */
 4995              		.loc 1 2346 5 is_stmt 1 view .LVU1567
 4996              	.LBB488:
 4997              	.LBI488:
2487:Library/src/lcm32f06x_tim.c **** {
 4998              		.loc 1 2487 6 view .LVU1568
 4999              	.LBB489:
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 5000              		.loc 1 2492 3 view .LVU1569
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 5001              		.loc 1 2492 7 is_stmt 0 view .LVU1570
 5002 00f6 8269     		ldr	r2, [r0, #24]
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 5003              		.loc 1 2492 15 view .LVU1571
 5004 00f8 1449     		ldr	r1, .L190+4
 5005              	.LBE489:
 5006              	.LBE488:
 5007              	.LBB492:
 5008              	.LBB493:
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 5009              		.loc 1 3383 14 view .LVU1572
 5010 00fa 0124     		movs	r4, #1
 5011              	.LBE493:
 5012              	.LBE492:
 5013              	.LBB499:
 5014              	.LBB490:
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 5015              		.loc 1 2492 15 view .LVU1573
 5016 00fc 0A40     		ands	r2, r1
ARM GAS  /tmp/ccWBHqpW.s 			page 166


 5017 00fe 8261     		str	r2, [r0, #24]
2494:Library/src/lcm32f06x_tim.c **** }
 5018              		.loc 1 2494 3 is_stmt 1 view .LVU1574
2494:Library/src/lcm32f06x_tim.c **** }
 5019              		.loc 1 2494 7 is_stmt 0 view .LVU1575
 5020 0100 8269     		ldr	r2, [r0, #24]
 5021 0102 009B     		ldr	r3, [sp]
2494:Library/src/lcm32f06x_tim.c **** }
 5022              		.loc 1 2494 15 view .LVU1576
 5023 0104 3A43     		orrs	r2, r7
 5024              	.LBE490:
 5025              	.LBE499:
 5026              	.LBB500:
 5027              	.LBB494:
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 5028              		.loc 1 3387 12 view .LVU1577
 5029 0106 F327     		movs	r7, #243
 5030              	.LBE494:
 5031              	.LBE500:
 5032              	.LBB501:
 5033              	.LBB491:
2494:Library/src/lcm32f06x_tim.c **** }
 5034              		.loc 1 2494 15 view .LVU1578
 5035 0108 8261     		str	r2, [r0, #24]
 5036              	.LVL439:
2494:Library/src/lcm32f06x_tim.c **** }
 5037              		.loc 1 2494 15 view .LVU1579
 5038              	.LBE491:
 5039              	.LBE501:
2348:Library/src/lcm32f06x_tim.c ****     /* Set the Input Capture Prescaler value */
 5040              		.loc 1 2348 5 is_stmt 1 view .LVU1580
 5041              	.LBB502:
 5042              	.LBI492:
3378:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
 5043              		.loc 1 3378 13 view .LVU1581
 5044              	.LBB495:
3381:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 1: Reset the CC1E Bit */
 5045              		.loc 1 3381 3 view .LVU1582
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 5046              		.loc 1 3383 3 view .LVU1583
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 5047              		.loc 1 3383 7 is_stmt 0 view .LVU1584
 5048 010a 026A     		ldr	r2, [r0, #32]
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 5049              		.loc 1 3391 11 view .LVU1585
 5050 010c 963D     		subs	r5, r5, #150
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 5051              		.loc 1 3383 14 view .LVU1586
 5052 010e A243     		bics	r2, r4
 5053 0110 0262     		str	r2, [r0, #32]
3384:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 5054              		.loc 1 3384 3 is_stmt 1 view .LVU1587
3384:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 5055              		.loc 1 3384 12 is_stmt 0 view .LVU1588
 5056 0112 8169     		ldr	r1, [r0, #24]
 5057              	.LVL440:
3385:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
ARM GAS  /tmp/ccWBHqpW.s 			page 167


 5058              		.loc 1 3385 3 is_stmt 1 view .LVU1589
3385:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 5059              		.loc 1 3385 11 is_stmt 0 view .LVU1590
 5060 0114 026A     		ldr	r2, [r0, #32]
 5061              	.LVL441:
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 5062              		.loc 1 3387 3 is_stmt 1 view .LVU1591
3388:Library/src/lcm32f06x_tim.c **** 
 5063              		.loc 1 3388 3 view .LVU1592
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 5064              		.loc 1 3387 12 is_stmt 0 view .LVU1593
 5065 0116 B943     		bics	r1, r7
 5066              	.LVL442:
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 5067              		.loc 1 3387 12 view .LVU1594
 5068 0118 1943     		orrs	r1, r3
3388:Library/src/lcm32f06x_tim.c **** 
 5069              		.loc 1 3388 12 view .LVU1595
 5070 011a 6346     		mov	r3, ip
 5071 011c 1943     		orrs	r1, r3
 5072              	.LVL443:
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 5073              		.loc 1 3391 3 is_stmt 1 view .LVU1596
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 5074              		.loc 1 3392 3 view .LVU1597
 5075              	.LBE495:
 5076              	.LBE502:
2311:Library/src/lcm32f06x_tim.c ****   {
 5077              		.loc 1 2311 6 is_stmt 0 view .LVU1598
 5078 011e 019B     		ldr	r3, [sp, #4]
 5079              	.LBB503:
 5080              	.LBB496:
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 5081              		.loc 1 3391 11 view .LVU1599
 5082 0120 AA43     		bics	r2, r5
 5083              	.LVL444:
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 5084              		.loc 1 3391 11 view .LVU1600
 5085              	.LBE496:
 5086              	.LBE503:
2311:Library/src/lcm32f06x_tim.c ****   {
 5087              		.loc 1 2311 6 view .LVU1601
 5088 0122 5B00     		lsls	r3, r3, #1
 5089              	.LBB504:
 5090              	.LBB497:
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 5091              		.loc 1 3392 11 view .LVU1602
 5092 0124 1343     		orrs	r3, r2
 5093              	.LBE497:
 5094              	.LBE504:
 5095              	.LBB505:
 5096              	.LBB506:
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 5097              		.loc 1 2465 15 view .LVU1603
 5098 0126 0C22     		movs	r2, #12
 5099              	.LBE506:
 5100              	.LBE505:
ARM GAS  /tmp/ccWBHqpW.s 			page 168


 5101              	.LBB508:
 5102              	.LBB498:
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 5103              		.loc 1 3392 11 view .LVU1604
 5104 0128 2343     		orrs	r3, r4
 5105              	.LVL445:
3394:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 5106              		.loc 1 3394 3 is_stmt 1 view .LVU1605
3394:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 5107              		.loc 1 3394 15 is_stmt 0 view .LVU1606
 5108 012a 8161     		str	r1, [r0, #24]
3395:Library/src/lcm32f06x_tim.c **** }
 5109              		.loc 1 3395 3 is_stmt 1 view .LVU1607
3395:Library/src/lcm32f06x_tim.c **** }
 5110              		.loc 1 3395 14 is_stmt 0 view .LVU1608
 5111 012c 0362     		str	r3, [r0, #32]
 5112              	.LVL446:
3395:Library/src/lcm32f06x_tim.c **** }
 5113              		.loc 1 3395 14 view .LVU1609
 5114              	.LBE498:
 5115              	.LBE508:
2350:Library/src/lcm32f06x_tim.c ****   }
 5116              		.loc 1 2350 5 is_stmt 1 view .LVU1610
 5117              	.LBB509:
 5118              	.LBI505:
2460:Library/src/lcm32f06x_tim.c **** {
 5119              		.loc 1 2460 6 view .LVU1611
 5120              	.LBB507:
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 5121              		.loc 1 2465 3 view .LVU1612
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 5122              		.loc 1 2465 7 is_stmt 0 view .LVU1613
 5123 012e 8369     		ldr	r3, [r0, #24]
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 5124              		.loc 1 2465 15 view .LVU1614
 5125 0130 9343     		bics	r3, r2
 5126 0132 8361     		str	r3, [r0, #24]
2467:Library/src/lcm32f06x_tim.c **** }
 5127              		.loc 1 2467 3 is_stmt 1 view .LVU1615
2467:Library/src/lcm32f06x_tim.c **** }
 5128              		.loc 1 2467 7 is_stmt 0 view .LVU1616
 5129 0134 8369     		ldr	r3, [r0, #24]
2467:Library/src/lcm32f06x_tim.c **** }
 5130              		.loc 1 2467 15 view .LVU1617
 5131 0136 3343     		orrs	r3, r6
 5132 0138 8361     		str	r3, [r0, #24]
 5133              	.LVL447:
2467:Library/src/lcm32f06x_tim.c **** }
 5134              		.loc 1 2467 15 view .LVU1618
 5135              	.LBE507:
 5136              	.LBE509:
2352:Library/src/lcm32f06x_tim.c **** 
 5137              		.loc 1 2352 1 view .LVU1619
 5138 013a B8E7     		b	.L184
 5139              	.LVL448:
 5140              	.L189:
2320:Library/src/lcm32f06x_tim.c ****   {
ARM GAS  /tmp/ccWBHqpW.s 			page 169


 5141              		.loc 1 2320 6 view .LVU1620
 5142 013c 9B00     		lsls	r3, r3, #2
 5143 013e 9846     		mov	r8, r3
2322:Library/src/lcm32f06x_tim.c ****   }
 5144              		.loc 1 2322 25 view .LVU1621
 5145 0140 FF3B     		subs	r3, r3, #255
 5146 0142 FF3B     		subs	r3, r3, #255
 5147 0144 9C46     		mov	ip, r3
 5148 0146 6FE7     		b	.L185
 5149              	.L191:
 5150              		.align	2
 5151              	.L190:
 5152 0148 FF0CFFFF 		.word	-62209
 5153 014c FFF3FFFF 		.word	-3073
 5154              		.cfi_endproc
 5155              	.LFE117:
 5157              		.section	.text.TIM_GetCapture1,"ax",%progbits
 5158              		.align	1
 5159              		.p2align 2,,3
 5160              		.global	TIM_GetCapture1
 5161              		.syntax unified
 5162              		.code	16
 5163              		.thumb_func
 5165              	TIM_GetCapture1:
 5166              	.LVL449:
 5167              	.LFB118:
2365:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5168              		.loc 1 2365 1 is_stmt 1 view -0
 5169              		.cfi_startproc
 5170              		@ args = 0, pretend = 0, frame = 0
 5171              		@ frame_needed = 0, uses_anonymous_args = 0
 5172              		@ link register save eliminated.
2369:Library/src/lcm32f06x_tim.c **** }
 5173              		.loc 1 2369 3 view .LVU1623
2369:Library/src/lcm32f06x_tim.c **** }
 5174              		.loc 1 2369 14 is_stmt 0 view .LVU1624
 5175 0000 406B     		ldr	r0, [r0, #52]
 5176              	.LVL450:
2370:Library/src/lcm32f06x_tim.c **** 
 5177              		.loc 1 2370 1 view .LVU1625
 5178              		@ sp needed
 5179 0002 7047     		bx	lr
 5180              		.cfi_endproc
 5181              	.LFE118:
 5183              		.section	.text.TIM_GetCapture2,"ax",%progbits
 5184              		.align	1
 5185              		.p2align 2,,3
 5186              		.global	TIM_GetCapture2
 5187              		.syntax unified
 5188              		.code	16
 5189              		.thumb_func
 5191              	TIM_GetCapture2:
 5192              	.LVL451:
 5193              	.LFB119:
2383:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5194              		.loc 1 2383 1 is_stmt 1 view -0
 5195              		.cfi_startproc
ARM GAS  /tmp/ccWBHqpW.s 			page 170


 5196              		@ args = 0, pretend = 0, frame = 0
 5197              		@ frame_needed = 0, uses_anonymous_args = 0
 5198              		@ link register save eliminated.
2387:Library/src/lcm32f06x_tim.c **** }
 5199              		.loc 1 2387 3 view .LVU1627
2387:Library/src/lcm32f06x_tim.c **** }
 5200              		.loc 1 2387 14 is_stmt 0 view .LVU1628
 5201 0000 806B     		ldr	r0, [r0, #56]
 5202              	.LVL452:
2388:Library/src/lcm32f06x_tim.c **** 
 5203              		.loc 1 2388 1 view .LVU1629
 5204              		@ sp needed
 5205 0002 7047     		bx	lr
 5206              		.cfi_endproc
 5207              	.LFE119:
 5209              		.section	.text.TIM_GetCapture3,"ax",%progbits
 5210              		.align	1
 5211              		.p2align 2,,3
 5212              		.global	TIM_GetCapture3
 5213              		.syntax unified
 5214              		.code	16
 5215              		.thumb_func
 5217              	TIM_GetCapture3:
 5218              	.LVL453:
 5219              	.LFB120:
2401:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5220              		.loc 1 2401 1 is_stmt 1 view -0
 5221              		.cfi_startproc
 5222              		@ args = 0, pretend = 0, frame = 0
 5223              		@ frame_needed = 0, uses_anonymous_args = 0
 5224              		@ link register save eliminated.
2405:Library/src/lcm32f06x_tim.c **** }
 5225              		.loc 1 2405 3 view .LVU1631
2405:Library/src/lcm32f06x_tim.c **** }
 5226              		.loc 1 2405 14 is_stmt 0 view .LVU1632
 5227 0000 C06B     		ldr	r0, [r0, #60]
 5228              	.LVL454:
2406:Library/src/lcm32f06x_tim.c **** 
 5229              		.loc 1 2406 1 view .LVU1633
 5230              		@ sp needed
 5231 0002 7047     		bx	lr
 5232              		.cfi_endproc
 5233              	.LFE120:
 5235              		.section	.text.TIM_GetCapture4,"ax",%progbits
 5236              		.align	1
 5237              		.p2align 2,,3
 5238              		.global	TIM_GetCapture4
 5239              		.syntax unified
 5240              		.code	16
 5241              		.thumb_func
 5243              	TIM_GetCapture4:
 5244              	.LVL455:
 5245              	.LFB121:
2419:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5246              		.loc 1 2419 1 is_stmt 1 view -0
 5247              		.cfi_startproc
 5248              		@ args = 0, pretend = 0, frame = 0
ARM GAS  /tmp/ccWBHqpW.s 			page 171


 5249              		@ frame_needed = 0, uses_anonymous_args = 0
 5250              		@ link register save eliminated.
2423:Library/src/lcm32f06x_tim.c **** }
 5251              		.loc 1 2423 3 view .LVU1635
2423:Library/src/lcm32f06x_tim.c **** }
 5252              		.loc 1 2423 14 is_stmt 0 view .LVU1636
 5253 0000 006C     		ldr	r0, [r0, #64]
 5254              	.LVL456:
2424:Library/src/lcm32f06x_tim.c **** 
 5255              		.loc 1 2424 1 view .LVU1637
 5256              		@ sp needed
 5257 0002 7047     		bx	lr
 5258              		.cfi_endproc
 5259              	.LFE121:
 5261              		.section	.text.TIM_GetCapture5,"ax",%progbits
 5262              		.align	1
 5263              		.p2align 2,,3
 5264              		.global	TIM_GetCapture5
 5265              		.syntax unified
 5266              		.code	16
 5267              		.thumb_func
 5269              	TIM_GetCapture5:
 5270              	.LVL457:
 5271              	.LFB122:
2437:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5272              		.loc 1 2437 1 is_stmt 1 view -0
 5273              		.cfi_startproc
 5274              		@ args = 0, pretend = 0, frame = 0
 5275              		@ frame_needed = 0, uses_anonymous_args = 0
 5276              		@ link register save eliminated.
2441:Library/src/lcm32f06x_tim.c **** }
 5277              		.loc 1 2441 3 view .LVU1639
2441:Library/src/lcm32f06x_tim.c **** }
 5278              		.loc 1 2441 14 is_stmt 0 view .LVU1640
 5279 0000 806D     		ldr	r0, [r0, #88]
 5280              	.LVL458:
2442:Library/src/lcm32f06x_tim.c **** 
 5281              		.loc 1 2442 1 view .LVU1641
 5282              		@ sp needed
 5283 0002 7047     		bx	lr
 5284              		.cfi_endproc
 5285              	.LFE122:
 5287              		.section	.text.TIM_SetIC1Prescaler,"ax",%progbits
 5288              		.align	1
 5289              		.p2align 2,,3
 5290              		.global	TIM_SetIC1Prescaler
 5291              		.syntax unified
 5292              		.code	16
 5293              		.thumb_func
 5295              	TIM_SetIC1Prescaler:
 5296              	.LVL459:
 5297              	.LFB123:
2461:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5298              		.loc 1 2461 1 is_stmt 1 view -0
 5299              		.cfi_startproc
 5300              		@ args = 0, pretend = 0, frame = 0
 5301              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  /tmp/ccWBHqpW.s 			page 172


 5302              		@ link register save eliminated.
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 5303              		.loc 1 2465 3 view .LVU1643
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 5304              		.loc 1 2465 15 is_stmt 0 view .LVU1644
 5305 0000 0C22     		movs	r2, #12
2468:Library/src/lcm32f06x_tim.c **** 
 5306              		.loc 1 2468 1 view .LVU1645
 5307              		@ sp needed
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 5308              		.loc 1 2465 7 view .LVU1646
 5309 0002 8369     		ldr	r3, [r0, #24]
2465:Library/src/lcm32f06x_tim.c ****   /* Set the IC1PSC value */
 5310              		.loc 1 2465 15 view .LVU1647
 5311 0004 9343     		bics	r3, r2
 5312 0006 8361     		str	r3, [r0, #24]
2467:Library/src/lcm32f06x_tim.c **** }
 5313              		.loc 1 2467 3 is_stmt 1 view .LVU1648
2467:Library/src/lcm32f06x_tim.c **** }
 5314              		.loc 1 2467 7 is_stmt 0 view .LVU1649
 5315 0008 8369     		ldr	r3, [r0, #24]
2467:Library/src/lcm32f06x_tim.c **** }
 5316              		.loc 1 2467 15 view .LVU1650
 5317 000a 0B43     		orrs	r3, r1
 5318 000c 8361     		str	r3, [r0, #24]
2468:Library/src/lcm32f06x_tim.c **** 
 5319              		.loc 1 2468 1 view .LVU1651
 5320 000e 7047     		bx	lr
 5321              		.cfi_endproc
 5322              	.LFE123:
 5324              		.section	.text.TIM_SetIC2Prescaler,"ax",%progbits
 5325              		.align	1
 5326              		.p2align 2,,3
 5327              		.global	TIM_SetIC2Prescaler
 5328              		.syntax unified
 5329              		.code	16
 5330              		.thumb_func
 5332              	TIM_SetIC2Prescaler:
 5333              	.LVL460:
 5334              	.LFB124:
2488:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5335              		.loc 1 2488 1 is_stmt 1 view -0
 5336              		.cfi_startproc
 5337              		@ args = 0, pretend = 0, frame = 0
 5338              		@ frame_needed = 0, uses_anonymous_args = 0
 5339              		@ link register save eliminated.
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 5340              		.loc 1 2492 3 view .LVU1653
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 5341              		.loc 1 2492 7 is_stmt 0 view .LVU1654
 5342 0000 8369     		ldr	r3, [r0, #24]
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 5343              		.loc 1 2492 15 view .LVU1655
 5344 0002 044A     		ldr	r2, .L199
2494:Library/src/lcm32f06x_tim.c **** }
 5345              		.loc 1 2494 18 view .LVU1656
 5346 0004 0902     		lsls	r1, r1, #8
ARM GAS  /tmp/ccWBHqpW.s 			page 173


 5347              	.LVL461:
2492:Library/src/lcm32f06x_tim.c ****   /* Set the IC2PSC value */
 5348              		.loc 1 2492 15 view .LVU1657
 5349 0006 1340     		ands	r3, r2
 5350 0008 8361     		str	r3, [r0, #24]
2494:Library/src/lcm32f06x_tim.c **** }
 5351              		.loc 1 2494 3 is_stmt 1 view .LVU1658
2494:Library/src/lcm32f06x_tim.c **** }
 5352              		.loc 1 2494 7 is_stmt 0 view .LVU1659
 5353 000a 8369     		ldr	r3, [r0, #24]
2495:Library/src/lcm32f06x_tim.c **** 
 5354              		.loc 1 2495 1 view .LVU1660
 5355              		@ sp needed
2494:Library/src/lcm32f06x_tim.c **** }
 5356              		.loc 1 2494 15 view .LVU1661
 5357 000c 1943     		orrs	r1, r3
 5358 000e 8161     		str	r1, [r0, #24]
2495:Library/src/lcm32f06x_tim.c **** 
 5359              		.loc 1 2495 1 view .LVU1662
 5360 0010 7047     		bx	lr
 5361              	.L200:
 5362 0012 C046     		.align	2
 5363              	.L199:
 5364 0014 FFF3FFFF 		.word	-3073
 5365              		.cfi_endproc
 5366              	.LFE124:
 5368              		.section	.text.TIM_SetIC3Prescaler,"ax",%progbits
 5369              		.align	1
 5370              		.p2align 2,,3
 5371              		.global	TIM_SetIC3Prescaler
 5372              		.syntax unified
 5373              		.code	16
 5374              		.thumb_func
 5376              	TIM_SetIC3Prescaler:
 5377              	.LVL462:
 5378              	.LFB125:
2515:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5379              		.loc 1 2515 1 is_stmt 1 view -0
 5380              		.cfi_startproc
 5381              		@ args = 0, pretend = 0, frame = 0
 5382              		@ frame_needed = 0, uses_anonymous_args = 0
 5383              		@ link register save eliminated.
2519:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 5384              		.loc 1 2519 3 view .LVU1664
2519:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 5385              		.loc 1 2519 15 is_stmt 0 view .LVU1665
 5386 0000 0C22     		movs	r2, #12
2522:Library/src/lcm32f06x_tim.c **** 
 5387              		.loc 1 2522 1 view .LVU1666
 5388              		@ sp needed
2519:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 5389              		.loc 1 2519 7 view .LVU1667
 5390 0002 C369     		ldr	r3, [r0, #28]
2519:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 5391              		.loc 1 2519 15 view .LVU1668
 5392 0004 9343     		bics	r3, r2
 5393 0006 C361     		str	r3, [r0, #28]
ARM GAS  /tmp/ccWBHqpW.s 			page 174


2521:Library/src/lcm32f06x_tim.c **** }
 5394              		.loc 1 2521 3 is_stmt 1 view .LVU1669
2521:Library/src/lcm32f06x_tim.c **** }
 5395              		.loc 1 2521 7 is_stmt 0 view .LVU1670
 5396 0008 C369     		ldr	r3, [r0, #28]
2521:Library/src/lcm32f06x_tim.c **** }
 5397              		.loc 1 2521 15 view .LVU1671
 5398 000a 0B43     		orrs	r3, r1
 5399 000c C361     		str	r3, [r0, #28]
2522:Library/src/lcm32f06x_tim.c **** 
 5400              		.loc 1 2522 1 view .LVU1672
 5401 000e 7047     		bx	lr
 5402              		.cfi_endproc
 5403              	.LFE125:
 5405              		.section	.text.TIM_SetIC4Prescaler,"ax",%progbits
 5406              		.align	1
 5407              		.p2align 2,,3
 5408              		.global	TIM_SetIC4Prescaler
 5409              		.syntax unified
 5410              		.code	16
 5411              		.thumb_func
 5413              	TIM_SetIC4Prescaler:
 5414              	.LVL463:
 5415              	.LFB126:
2541:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5416              		.loc 1 2541 1 is_stmt 1 view -0
 5417              		.cfi_startproc
 5418              		@ args = 0, pretend = 0, frame = 0
 5419              		@ frame_needed = 0, uses_anonymous_args = 0
 5420              		@ link register save eliminated.
2545:Library/src/lcm32f06x_tim.c ****   /* Set the IC4PSC value */
 5421              		.loc 1 2545 3 view .LVU1674
2545:Library/src/lcm32f06x_tim.c ****   /* Set the IC4PSC value */
 5422              		.loc 1 2545 7 is_stmt 0 view .LVU1675
 5423 0000 C369     		ldr	r3, [r0, #28]
2545:Library/src/lcm32f06x_tim.c ****   /* Set the IC4PSC value */
 5424              		.loc 1 2545 15 view .LVU1676
 5425 0002 044A     		ldr	r2, .L203
2547:Library/src/lcm32f06x_tim.c **** }
 5426              		.loc 1 2547 18 view .LVU1677
 5427 0004 0902     		lsls	r1, r1, #8
 5428              	.LVL464:
2545:Library/src/lcm32f06x_tim.c ****   /* Set the IC4PSC value */
 5429              		.loc 1 2545 15 view .LVU1678
 5430 0006 1340     		ands	r3, r2
 5431 0008 C361     		str	r3, [r0, #28]
2547:Library/src/lcm32f06x_tim.c **** }
 5432              		.loc 1 2547 3 is_stmt 1 view .LVU1679
2547:Library/src/lcm32f06x_tim.c **** }
 5433              		.loc 1 2547 7 is_stmt 0 view .LVU1680
 5434 000a C369     		ldr	r3, [r0, #28]
2548:Library/src/lcm32f06x_tim.c **** 
 5435              		.loc 1 2548 1 view .LVU1681
 5436              		@ sp needed
2547:Library/src/lcm32f06x_tim.c **** }
 5437              		.loc 1 2547 15 view .LVU1682
 5438 000c 1943     		orrs	r1, r3
ARM GAS  /tmp/ccWBHqpW.s 			page 175


 5439 000e C161     		str	r1, [r0, #28]
2548:Library/src/lcm32f06x_tim.c **** 
 5440              		.loc 1 2548 1 view .LVU1683
 5441 0010 7047     		bx	lr
 5442              	.L204:
 5443 0012 C046     		.align	2
 5444              	.L203:
 5445 0014 FFF3FFFF 		.word	-3073
 5446              		.cfi_endproc
 5447              	.LFE126:
 5449              		.section	.text.TIM_SetIC5Prescaler,"ax",%progbits
 5450              		.align	1
 5451              		.p2align 2,,3
 5452              		.global	TIM_SetIC5Prescaler
 5453              		.syntax unified
 5454              		.code	16
 5455              		.thumb_func
 5457              	TIM_SetIC5Prescaler:
 5458              	.LVL465:
 5459              	.LFB127:
2567:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5460              		.loc 1 2567 1 is_stmt 1 view -0
 5461              		.cfi_startproc
 5462              		@ args = 0, pretend = 0, frame = 0
 5463              		@ frame_needed = 0, uses_anonymous_args = 0
 5464              		@ link register save eliminated.
2571:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 5465              		.loc 1 2571 3 view .LVU1685
2571:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 5466              		.loc 1 2571 15 is_stmt 0 view .LVU1686
 5467 0000 0C22     		movs	r2, #12
2574:Library/src/lcm32f06x_tim.c **** 
 5468              		.loc 1 2574 1 view .LVU1687
 5469              		@ sp needed
2571:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 5470              		.loc 1 2571 7 view .LVU1688
 5471 0002 436D     		ldr	r3, [r0, #84]
2571:Library/src/lcm32f06x_tim.c ****   /* Set the IC3PSC value */
 5472              		.loc 1 2571 15 view .LVU1689
 5473 0004 9343     		bics	r3, r2
 5474 0006 4365     		str	r3, [r0, #84]
2573:Library/src/lcm32f06x_tim.c **** }
 5475              		.loc 1 2573 3 is_stmt 1 view .LVU1690
2573:Library/src/lcm32f06x_tim.c **** }
 5476              		.loc 1 2573 7 is_stmt 0 view .LVU1691
 5477 0008 436D     		ldr	r3, [r0, #84]
2573:Library/src/lcm32f06x_tim.c **** }
 5478              		.loc 1 2573 15 view .LVU1692
 5479 000a 0B43     		orrs	r3, r1
 5480 000c 4365     		str	r3, [r0, #84]
2574:Library/src/lcm32f06x_tim.c **** 
 5481              		.loc 1 2574 1 view .LVU1693
 5482 000e 7047     		bx	lr
 5483              		.cfi_endproc
 5484              	.LFE127:
 5486              		.section	.text.TIM_ITConfig,"ax",%progbits
 5487              		.align	1
ARM GAS  /tmp/ccWBHqpW.s 			page 176


 5488              		.p2align 2,,3
 5489              		.global	TIM_ITConfig
 5490              		.syntax unified
 5491              		.code	16
 5492              		.thumb_func
 5494              	TIM_ITConfig:
 5495              	.LVL466:
 5496              	.LFB128:
2602:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5497              		.loc 1 2602 1 is_stmt 1 view -0
 5498              		.cfi_startproc
 5499              		@ args = 0, pretend = 0, frame = 0
 5500              		@ frame_needed = 0, uses_anonymous_args = 0
 5501              		@ link register save eliminated.
2605:Library/src/lcm32f06x_tim.c ****   {
 5502              		.loc 1 2605 3 view .LVU1695
2608:Library/src/lcm32f06x_tim.c ****   }
 5503              		.loc 1 2608 9 is_stmt 0 view .LVU1696
 5504 0000 C368     		ldr	r3, [r0, #12]
2605:Library/src/lcm32f06x_tim.c ****   {
 5505              		.loc 1 2605 6 view .LVU1697
 5506 0002 002A     		cmp	r2, #0
 5507 0004 02D0     		beq	.L207
2608:Library/src/lcm32f06x_tim.c ****   }
 5508              		.loc 1 2608 5 is_stmt 1 view .LVU1698
2608:Library/src/lcm32f06x_tim.c ****   }
 5509              		.loc 1 2608 16 is_stmt 0 view .LVU1699
 5510 0006 0B43     		orrs	r3, r1
 5511 0008 C360     		str	r3, [r0, #12]
 5512              	.L206:
2615:Library/src/lcm32f06x_tim.c **** 
 5513              		.loc 1 2615 1 view .LVU1700
 5514              		@ sp needed
 5515 000a 7047     		bx	lr
 5516              	.L207:
2613:Library/src/lcm32f06x_tim.c ****   }
 5517              		.loc 1 2613 5 is_stmt 1 view .LVU1701
2613:Library/src/lcm32f06x_tim.c ****   }
 5518              		.loc 1 2613 16 is_stmt 0 view .LVU1702
 5519 000c 8B43     		bics	r3, r1
 5520 000e C360     		str	r3, [r0, #12]
2615:Library/src/lcm32f06x_tim.c **** 
 5521              		.loc 1 2615 1 view .LVU1703
 5522 0010 FBE7     		b	.L206
 5523              		.cfi_endproc
 5524              	.LFE128:
 5526 0012 C046     		.section	.text.TIM_GenerateEvent,"ax",%progbits
 5527              		.align	1
 5528              		.p2align 2,,3
 5529              		.global	TIM_GenerateEvent
 5530              		.syntax unified
 5531              		.code	16
 5532              		.thumb_func
 5534              	TIM_GenerateEvent:
 5535              	.LVL467:
 5536              	.LFB129:
2639:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
ARM GAS  /tmp/ccWBHqpW.s 			page 177


 5537              		.loc 1 2639 1 is_stmt 1 view -0
 5538              		.cfi_startproc
 5539              		@ args = 0, pretend = 0, frame = 0
 5540              		@ frame_needed = 0, uses_anonymous_args = 0
 5541              		@ link register save eliminated.
2643:Library/src/lcm32f06x_tim.c **** }
 5542              		.loc 1 2643 3 view .LVU1705
2643:Library/src/lcm32f06x_tim.c **** }
 5543              		.loc 1 2643 13 is_stmt 0 view .LVU1706
 5544 0000 4161     		str	r1, [r0, #20]
2644:Library/src/lcm32f06x_tim.c **** 
 5545              		.loc 1 2644 1 view .LVU1707
 5546              		@ sp needed
 5547 0002 7047     		bx	lr
 5548              		.cfi_endproc
 5549              	.LFE129:
 5551              		.section	.text.TIM_GetFlagStatus,"ax",%progbits
 5552              		.align	1
 5553              		.p2align 2,,3
 5554              		.global	TIM_GetFlagStatus
 5555              		.syntax unified
 5556              		.code	16
 5557              		.thumb_func
 5559              	TIM_GetFlagStatus:
 5560              	.LVL468:
 5561              	.LFB130:
2672:Library/src/lcm32f06x_tim.c ****   ITStatus bitstatus = RESET;
 5562              		.loc 1 2672 1 is_stmt 1 view -0
 5563              		.cfi_startproc
 5564              		@ args = 0, pretend = 0, frame = 0
 5565              		@ frame_needed = 0, uses_anonymous_args = 0
 5566              		@ link register save eliminated.
2673:Library/src/lcm32f06x_tim.c **** 
 5567              		.loc 1 2673 3 view .LVU1709
2677:Library/src/lcm32f06x_tim.c ****   {
 5568              		.loc 1 2677 3 view .LVU1710
2677:Library/src/lcm32f06x_tim.c ****   {
 5569              		.loc 1 2677 12 is_stmt 0 view .LVU1711
 5570 0000 0369     		ldr	r3, [r0, #16]
 5571              	.LVL469:
2685:Library/src/lcm32f06x_tim.c **** }
 5572              		.loc 1 2685 3 is_stmt 1 view .LVU1712
2686:Library/src/lcm32f06x_tim.c **** 
 5573              		.loc 1 2686 1 is_stmt 0 view .LVU1713
 5574              		@ sp needed
2677:Library/src/lcm32f06x_tim.c ****   {
 5575              		.loc 1 2677 17 view .LVU1714
 5576 0002 1940     		ands	r1, r3
 5577              	.LVL470:
2677:Library/src/lcm32f06x_tim.c ****   {
 5578              		.loc 1 2677 17 view .LVU1715
 5579 0004 0800     		movs	r0, r1
 5580              	.LVL471:
2677:Library/src/lcm32f06x_tim.c ****   {
 5581              		.loc 1 2677 6 view .LVU1716
 5582 0006 431E     		subs	r3, r0, #1
 5583 0008 9841     		sbcs	r0, r0, r3
ARM GAS  /tmp/ccWBHqpW.s 			page 178


 5584              	.LVL472:
2685:Library/src/lcm32f06x_tim.c **** }
 5585              		.loc 1 2685 10 discriminator 1 view .LVU1717
 5586 000a C0B2     		uxtb	r0, r0
2686:Library/src/lcm32f06x_tim.c **** 
 5587              		.loc 1 2686 1 view .LVU1718
 5588 000c 7047     		bx	lr
 5589              		.cfi_endproc
 5590              	.LFE130:
 5592 000e C046     		.section	.text.TIM_ClearFlag,"ax",%progbits
 5593              		.align	1
 5594              		.p2align 2,,3
 5595              		.global	TIM_ClearFlag
 5596              		.syntax unified
 5597              		.code	16
 5598              		.thumb_func
 5600              	TIM_ClearFlag:
 5601              	.LVL473:
 5602              	.LFB131:
2714:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5603              		.loc 1 2714 1 is_stmt 1 view -0
 5604              		.cfi_startproc
 5605              		@ args = 0, pretend = 0, frame = 0
 5606              		@ frame_needed = 0, uses_anonymous_args = 0
 5607              		@ link register save eliminated.
2718:Library/src/lcm32f06x_tim.c **** }
 5608              		.loc 1 2718 3 view .LVU1720
2718:Library/src/lcm32f06x_tim.c **** }
 5609              		.loc 1 2718 24 is_stmt 0 view .LVU1721
 5610 0000 C943     		mvns	r1, r1
 5611              	.LVL474:
2719:Library/src/lcm32f06x_tim.c **** 
 5612              		.loc 1 2719 1 view .LVU1722
 5613              		@ sp needed
2718:Library/src/lcm32f06x_tim.c **** }
 5614              		.loc 1 2718 12 view .LVU1723
 5615 0002 0161     		str	r1, [r0, #16]
2719:Library/src/lcm32f06x_tim.c **** 
 5616              		.loc 1 2719 1 view .LVU1724
 5617 0004 7047     		bx	lr
 5618              		.cfi_endproc
 5619              	.LFE131:
 5621 0006 C046     		.section	.text.TIM_GetITStatus,"ax",%progbits
 5622              		.align	1
 5623              		.p2align 2,,3
 5624              		.global	TIM_GetITStatus
 5625              		.syntax unified
 5626              		.code	16
 5627              		.thumb_func
 5629              	TIM_GetITStatus:
 5630              	.LVL475:
 5631              	.LFB132:
2744:Library/src/lcm32f06x_tim.c ****   ITStatus bitstatus = RESET;
 5632              		.loc 1 2744 1 is_stmt 1 view -0
 5633              		.cfi_startproc
 5634              		@ args = 0, pretend = 0, frame = 0
 5635              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  /tmp/ccWBHqpW.s 			page 179


 5636              		@ link register save eliminated.
2745:Library/src/lcm32f06x_tim.c ****   uint32_t itstatus = 0x0, itenable = 0x0;
 5637              		.loc 1 2745 3 view .LVU1726
2746:Library/src/lcm32f06x_tim.c **** 
 5638              		.loc 1 2746 3 view .LVU1727
2750:Library/src/lcm32f06x_tim.c **** 
 5639              		.loc 1 2750 3 view .LVU1728
2750:Library/src/lcm32f06x_tim.c **** 
 5640              		.loc 1 2750 18 is_stmt 0 view .LVU1729
 5641 0000 0369     		ldr	r3, [r0, #16]
 5642              	.LVL476:
2752:Library/src/lcm32f06x_tim.c ****   if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET))
 5643              		.loc 1 2752 3 is_stmt 1 view .LVU1730
2752:Library/src/lcm32f06x_tim.c ****   if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET))
 5644              		.loc 1 2752 18 is_stmt 0 view .LVU1731
 5645 0002 C268     		ldr	r2, [r0, #12]
 5646              	.LVL477:
2753:Library/src/lcm32f06x_tim.c ****   {
 5647              		.loc 1 2753 3 is_stmt 1 view .LVU1732
2759:Library/src/lcm32f06x_tim.c ****   }
 5648              		.loc 1 2759 15 is_stmt 0 view .LVU1733
 5649 0004 0020     		movs	r0, #0
 5650              	.LVL478:
2753:Library/src/lcm32f06x_tim.c ****   {
 5651              		.loc 1 2753 6 view .LVU1734
 5652 0006 1942     		tst	r1, r3
 5653 0008 03D0     		beq	.L213
2752:Library/src/lcm32f06x_tim.c ****   if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET))
 5654              		.loc 1 2752 12 view .LVU1735
 5655 000a 1140     		ands	r1, r2
 5656              	.LVL479:
2753:Library/src/lcm32f06x_tim.c ****   {
 5657              		.loc 1 2753 37 discriminator 1 view .LVU1736
 5658 000c 4B1E     		subs	r3, r1, #1
 5659 000e 9941     		sbcs	r1, r1, r3
 5660              	.LVL480:
2753:Library/src/lcm32f06x_tim.c ****   {
 5661              		.loc 1 2753 37 discriminator 1 view .LVU1737
 5662 0010 C8B2     		uxtb	r0, r1
 5663              	.L213:
 5664              	.LVL481:
2761:Library/src/lcm32f06x_tim.c **** }
 5665              		.loc 1 2761 3 is_stmt 1 view .LVU1738
2762:Library/src/lcm32f06x_tim.c **** 
 5666              		.loc 1 2762 1 is_stmt 0 view .LVU1739
 5667              		@ sp needed
 5668 0012 7047     		bx	lr
 5669              		.cfi_endproc
 5670              	.LFE132:
 5672              		.section	.text.TIM_ClearITPendingBit,"ax",%progbits
 5673              		.align	1
 5674              		.p2align 2,,3
 5675              		.global	TIM_ClearITPendingBit
 5676              		.syntax unified
 5677              		.code	16
 5678              		.thumb_func
 5680              	TIM_ClearITPendingBit:
ARM GAS  /tmp/ccWBHqpW.s 			page 180


 5681              	.LVL482:
 5682              	.LFB133:
2787:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5683              		.loc 1 2787 1 is_stmt 1 view -0
 5684              		.cfi_startproc
 5685              		@ args = 0, pretend = 0, frame = 0
 5686              		@ frame_needed = 0, uses_anonymous_args = 0
 5687              		@ link register save eliminated.
2791:Library/src/lcm32f06x_tim.c **** }
 5688              		.loc 1 2791 3 view .LVU1741
2791:Library/src/lcm32f06x_tim.c **** }
 5689              		.loc 1 2791 7 is_stmt 0 view .LVU1742
 5690 0000 0369     		ldr	r3, [r0, #16]
2792:Library/src/lcm32f06x_tim.c **** 
 5691              		.loc 1 2792 1 view .LVU1743
 5692              		@ sp needed
2791:Library/src/lcm32f06x_tim.c **** }
 5693              		.loc 1 2791 12 view .LVU1744
 5694 0002 8B43     		bics	r3, r1
 5695 0004 0361     		str	r3, [r0, #16]
2792:Library/src/lcm32f06x_tim.c **** 
 5696              		.loc 1 2792 1 view .LVU1745
 5697 0006 7047     		bx	lr
 5698              		.cfi_endproc
 5699              	.LFE133:
 5701              		.section	.text.TIM_DMAConfig,"ax",%progbits
 5702              		.align	1
 5703              		.p2align 2,,3
 5704              		.global	TIM_DMAConfig
 5705              		.syntax unified
 5706              		.code	16
 5707              		.thumb_func
 5709              	TIM_DMAConfig:
 5710              	.LVL483:
 5711              	.LFB134:
2831:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5712              		.loc 1 2831 1 is_stmt 1 view -0
 5713              		.cfi_startproc
 5714              		@ args = 0, pretend = 0, frame = 0
 5715              		@ frame_needed = 0, uses_anonymous_args = 0
 5716              		@ link register save eliminated.
2835:Library/src/lcm32f06x_tim.c **** }
 5717              		.loc 1 2835 3 view .LVU1747
2835:Library/src/lcm32f06x_tim.c **** }
 5718              		.loc 1 2835 27 is_stmt 0 view .LVU1748
 5719 0000 1143     		orrs	r1, r2
 5720              	.LVL484:
2835:Library/src/lcm32f06x_tim.c **** }
 5721              		.loc 1 2835 13 view .LVU1749
 5722 0002 8164     		str	r1, [r0, #72]
2836:Library/src/lcm32f06x_tim.c **** 
 5723              		.loc 1 2836 1 view .LVU1750
 5724              		@ sp needed
 5725 0004 7047     		bx	lr
 5726              		.cfi_endproc
 5727              	.LFE134:
 5729 0006 C046     		.section	.text.TIM_WriteDMAR,"ax",%progbits
ARM GAS  /tmp/ccWBHqpW.s 			page 181


 5730              		.align	1
 5731              		.p2align 2,,3
 5732              		.global	TIM_WriteDMAR
 5733              		.syntax unified
 5734              		.code	16
 5735              		.thumb_func
 5737              	TIM_WriteDMAR:
 5738              	.LVL485:
 5739              	.LFB135:
2851:Library/src/lcm32f06x_tim.c ****   TIMx->DMAR = TIM_DMAB;
 5740              		.loc 1 2851 1 is_stmt 1 view -0
 5741              		.cfi_startproc
 5742              		@ args = 0, pretend = 0, frame = 0
 5743              		@ frame_needed = 0, uses_anonymous_args = 0
 5744              		@ link register save eliminated.
2852:Library/src/lcm32f06x_tim.c **** }
 5745              		.loc 1 2852 3 view .LVU1752
2852:Library/src/lcm32f06x_tim.c **** }
 5746              		.loc 1 2852 14 is_stmt 0 view .LVU1753
 5747 0000 C164     		str	r1, [r0, #76]
2853:Library/src/lcm32f06x_tim.c **** 
 5748              		.loc 1 2853 1 view .LVU1754
 5749              		@ sp needed
 5750 0002 7047     		bx	lr
 5751              		.cfi_endproc
 5752              	.LFE135:
 5754              		.section	.text.TIM_ReadDMAR,"ax",%progbits
 5755              		.align	1
 5756              		.p2align 2,,3
 5757              		.global	TIM_ReadDMAR
 5758              		.syntax unified
 5759              		.code	16
 5760              		.thumb_func
 5762              	TIM_ReadDMAR:
 5763              	.LVL486:
 5764              	.LFB136:
2865:Library/src/lcm32f06x_tim.c ****   return TIMx->DMAR;
 5765              		.loc 1 2865 1 is_stmt 1 view -0
 5766              		.cfi_startproc
 5767              		@ args = 0, pretend = 0, frame = 0
 5768              		@ frame_needed = 0, uses_anonymous_args = 0
 5769              		@ link register save eliminated.
2866:Library/src/lcm32f06x_tim.c **** }
 5770              		.loc 1 2866 3 view .LVU1756
2866:Library/src/lcm32f06x_tim.c **** }
 5771              		.loc 1 2866 14 is_stmt 0 view .LVU1757
 5772 0000 C06C     		ldr	r0, [r0, #76]
 5773              	.LVL487:
2867:Library/src/lcm32f06x_tim.c **** 
 5774              		.loc 1 2867 1 view .LVU1758
 5775              		@ sp needed
 5776 0002 7047     		bx	lr
 5777              		.cfi_endproc
 5778              	.LFE136:
 5780              		.section	.text.TIM_DMACmd,"ax",%progbits
 5781              		.align	1
 5782              		.p2align 2,,3
ARM GAS  /tmp/ccWBHqpW.s 			page 182


 5783              		.global	TIM_DMACmd
 5784              		.syntax unified
 5785              		.code	16
 5786              		.thumb_func
 5788              	TIM_DMACmd:
 5789              	.LFB208:
 5790              		.cfi_startproc
2891:Library/src/lcm32f06x_tim.c **** {
 5791              		.loc 1 2891 6 is_stmt 1 view -0
 5792              		@ args = 0, pretend = 0, frame = 0
 5793              		@ frame_needed = 0, uses_anonymous_args = 0
 5794              		@ link register save eliminated.
 5795 0000 C368     		ldr	r3, [r0, #12]
 5796 0002 002A     		cmp	r2, #0
 5797 0004 02D0     		beq	.L221
 5798 0006 1943     		orrs	r1, r3
 5799 0008 C160     		str	r1, [r0, #12]
 5800              	.L220:
 5801              		@ sp needed
 5802 000a 7047     		bx	lr
 5803              	.L221:
 5804 000c 8B43     		bics	r3, r1
 5805 000e C360     		str	r3, [r0, #12]
 5806 0010 FBE7     		b	.L220
 5807              		.cfi_endproc
 5808              	.LFE208:
 5810 0012 C046     		.section	.text.TIM_SelectCCDMA,"ax",%progbits
 5811              		.align	1
 5812              		.p2align 2,,3
 5813              		.global	TIM_SelectCCDMA
 5814              		.syntax unified
 5815              		.code	16
 5816              		.thumb_func
 5818              	TIM_SelectCCDMA:
 5819              	.LVL488:
 5820              	.LFB138:
2920:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5821              		.loc 1 2920 1 view -0
 5822              		.cfi_startproc
 5823              		@ args = 0, pretend = 0, frame = 0
 5824              		@ frame_needed = 0, uses_anonymous_args = 0
 5825              		@ link register save eliminated.
2923:Library/src/lcm32f06x_tim.c ****   {
 5826              		.loc 1 2923 3 view .LVU1761
2926:Library/src/lcm32f06x_tim.c ****   }
 5827              		.loc 1 2926 15 is_stmt 0 view .LVU1762
 5828 0000 0822     		movs	r2, #8
2926:Library/src/lcm32f06x_tim.c ****   }
 5829              		.loc 1 2926 9 view .LVU1763
 5830 0002 4368     		ldr	r3, [r0, #4]
2923:Library/src/lcm32f06x_tim.c ****   {
 5831              		.loc 1 2923 6 view .LVU1764
 5832 0004 0029     		cmp	r1, #0
 5833 0006 02D0     		beq	.L224
2926:Library/src/lcm32f06x_tim.c ****   }
 5834              		.loc 1 2926 5 is_stmt 1 view .LVU1765
2926:Library/src/lcm32f06x_tim.c ****   }
ARM GAS  /tmp/ccWBHqpW.s 			page 183


 5835              		.loc 1 2926 15 is_stmt 0 view .LVU1766
 5836 0008 1343     		orrs	r3, r2
 5837 000a 4360     		str	r3, [r0, #4]
 5838              	.L223:
2933:Library/src/lcm32f06x_tim.c **** 
 5839              		.loc 1 2933 1 view .LVU1767
 5840              		@ sp needed
 5841 000c 7047     		bx	lr
 5842              	.L224:
2931:Library/src/lcm32f06x_tim.c ****   }
 5843              		.loc 1 2931 5 is_stmt 1 view .LVU1768
2931:Library/src/lcm32f06x_tim.c ****   }
 5844              		.loc 1 2931 15 is_stmt 0 view .LVU1769
 5845 000e 9343     		bics	r3, r2
 5846 0010 4360     		str	r3, [r0, #4]
2933:Library/src/lcm32f06x_tim.c **** 
 5847              		.loc 1 2933 1 view .LVU1770
 5848 0012 FBE7     		b	.L223
 5849              		.cfi_endproc
 5850              	.LFE138:
 5852              		.section	.text.TIM_InternalClockConfig,"ax",%progbits
 5853              		.align	1
 5854              		.p2align 2,,3
 5855              		.global	TIM_InternalClockConfig
 5856              		.syntax unified
 5857              		.code	16
 5858              		.thumb_func
 5860              	TIM_InternalClockConfig:
 5861              	.LVL489:
 5862              	.LFB139:
2945:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5863              		.loc 1 2945 1 is_stmt 1 view -0
 5864              		.cfi_startproc
 5865              		@ args = 0, pretend = 0, frame = 0
 5866              		@ frame_needed = 0, uses_anonymous_args = 0
 5867              		@ link register save eliminated.
2949:Library/src/lcm32f06x_tim.c **** }
 5868              		.loc 1 2949 3 view .LVU1772
2949:Library/src/lcm32f06x_tim.c **** }
 5869              		.loc 1 2949 14 is_stmt 0 view .LVU1773
 5870 0000 0722     		movs	r2, #7
2950:Library/src/lcm32f06x_tim.c **** 
 5871              		.loc 1 2950 1 view .LVU1774
 5872              		@ sp needed
2949:Library/src/lcm32f06x_tim.c **** }
 5873              		.loc 1 2949 7 view .LVU1775
 5874 0002 8368     		ldr	r3, [r0, #8]
2949:Library/src/lcm32f06x_tim.c **** }
 5875              		.loc 1 2949 14 view .LVU1776
 5876 0004 9343     		bics	r3, r2
 5877 0006 8360     		str	r3, [r0, #8]
2950:Library/src/lcm32f06x_tim.c **** 
 5878              		.loc 1 2950 1 view .LVU1777
 5879 0008 7047     		bx	lr
 5880              		.cfi_endproc
 5881              	.LFE139:
 5883 000a C046     		.section	.text.TIM_ITRxExternalClockConfig,"ax",%progbits
ARM GAS  /tmp/ccWBHqpW.s 			page 184


 5884              		.align	1
 5885              		.p2align 2,,3
 5886              		.global	TIM_ITRxExternalClockConfig
 5887              		.syntax unified
 5888              		.code	16
 5889              		.thumb_func
 5891              	TIM_ITRxExternalClockConfig:
 5892              	.LVL490:
 5893              	.LFB140:
2973:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5894              		.loc 1 2973 1 is_stmt 1 view -0
 5895              		.cfi_startproc
 5896              		@ args = 0, pretend = 0, frame = 0
 5897              		@ frame_needed = 0, uses_anonymous_args = 0
 5898              		@ link register save eliminated.
2977:Library/src/lcm32f06x_tim.c ****   /* Select the External clock mode1 */
 5899              		.loc 1 2977 3 view .LVU1779
 5900              	.LBB510:
 5901              	.LBI510:
3132:Library/src/lcm32f06x_tim.c **** {
 5902              		.loc 1 3132 6 view .LVU1780
 5903              	.LBB511:
3134:Library/src/lcm32f06x_tim.c **** 
 5904              		.loc 1 3134 3 view .LVU1781
3139:Library/src/lcm32f06x_tim.c ****   /* Reset the TS Bits */
 5905              		.loc 1 3139 3 view .LVU1782
3141:Library/src/lcm32f06x_tim.c ****   /* Set the Input Trigger source */
 5906              		.loc 1 3141 11 is_stmt 0 view .LVU1783
 5907 0000 7022     		movs	r2, #112
 5908              	.LBE511:
 5909              	.LBE510:
2980:Library/src/lcm32f06x_tim.c **** 
 5910              		.loc 1 2980 1 view .LVU1784
 5911              		@ sp needed
 5912              	.LBB513:
 5913              	.LBB512:
3139:Library/src/lcm32f06x_tim.c ****   /* Reset the TS Bits */
 5914              		.loc 1 3139 11 view .LVU1785
 5915 0002 8368     		ldr	r3, [r0, #8]
 5916              	.LVL491:
3141:Library/src/lcm32f06x_tim.c ****   /* Set the Input Trigger source */
 5917              		.loc 1 3141 3 is_stmt 1 view .LVU1786
3141:Library/src/lcm32f06x_tim.c ****   /* Set the Input Trigger source */
 5918              		.loc 1 3141 11 is_stmt 0 view .LVU1787
 5919 0004 9343     		bics	r3, r2
 5920              	.LVL492:
3143:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 5921              		.loc 1 3143 3 is_stmt 1 view .LVU1788
3143:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 5922              		.loc 1 3143 11 is_stmt 0 view .LVU1789
 5923 0006 1943     		orrs	r1, r3
 5924              	.LVL493:
3145:Library/src/lcm32f06x_tim.c **** }
 5925              		.loc 1 3145 3 is_stmt 1 view .LVU1790
3145:Library/src/lcm32f06x_tim.c **** }
 5926              		.loc 1 3145 14 is_stmt 0 view .LVU1791
 5927 0008 8160     		str	r1, [r0, #8]
ARM GAS  /tmp/ccWBHqpW.s 			page 185


 5928              	.LVL494:
3145:Library/src/lcm32f06x_tim.c **** }
 5929              		.loc 1 3145 14 view .LVU1792
 5930              	.LBE512:
 5931              	.LBE513:
2979:Library/src/lcm32f06x_tim.c **** }
 5932              		.loc 1 2979 3 is_stmt 1 view .LVU1793
2979:Library/src/lcm32f06x_tim.c **** }
 5933              		.loc 1 2979 7 is_stmt 0 view .LVU1794
 5934 000a 8368     		ldr	r3, [r0, #8]
2979:Library/src/lcm32f06x_tim.c **** }
 5935              		.loc 1 2979 14 view .LVU1795
 5936 000c 693A     		subs	r2, r2, #105
 5937 000e 1343     		orrs	r3, r2
 5938 0010 8360     		str	r3, [r0, #8]
2980:Library/src/lcm32f06x_tim.c **** 
 5939              		.loc 1 2980 1 view .LVU1796
 5940 0012 7047     		bx	lr
 5941              		.cfi_endproc
 5942              	.LFE140:
 5944              		.section	.text.TIM_TIxExternalClockConfig,"ax",%progbits
 5945              		.align	1
 5946              		.p2align 2,,3
 5947              		.global	TIM_TIxExternalClockConfig
 5948              		.syntax unified
 5949              		.code	16
 5950              		.thumb_func
 5952              	TIM_TIxExternalClockConfig:
 5953              	.LVL495:
 5954              	.LFB141:
3009:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5955              		.loc 1 3009 1 is_stmt 1 view -0
 5956              		.cfi_startproc
 5957              		@ args = 0, pretend = 0, frame = 0
 5958              		@ frame_needed = 0, uses_anonymous_args = 0
3013:Library/src/lcm32f06x_tim.c ****   {
 5959              		.loc 1 3013 3 view .LVU1798
3009:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5960              		.loc 1 3009 1 is_stmt 0 view .LVU1799
 5961 0000 F0B5     		push	{r4, r5, r6, r7, lr}
 5962              	.LCFI13:
 5963              		.cfi_def_cfa_offset 20
 5964              		.cfi_offset 4, -20
 5965              		.cfi_offset 5, -16
 5966              		.cfi_offset 6, -12
 5967              		.cfi_offset 7, -8
 5968              		.cfi_offset 14, -4
3009:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 5969              		.loc 1 3009 1 view .LVU1800
 5970 0002 1500     		movs	r5, r2
 5971              	.LBB514:
 5972              	.LBB515:
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 5973              		.loc 1 3426 7 view .LVU1801
 5974 0004 026A     		ldr	r2, [r0, #32]
 5975              	.LVL496:
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
ARM GAS  /tmp/ccWBHqpW.s 			page 186


 5976              		.loc 1 3426 7 view .LVU1802
 5977              	.LBE515:
 5978              	.LBE514:
3013:Library/src/lcm32f06x_tim.c ****   {
 5979              		.loc 1 3013 6 view .LVU1803
 5980 0006 6029     		cmp	r1, #96
 5981 0008 19D0     		beq	.L231
3019:Library/src/lcm32f06x_tim.c ****   }
 5982              		.loc 1 3019 5 is_stmt 1 view .LVU1804
 5983              	.LVL497:
 5984              	.LBB517:
 5985              	.LBI517:
3378:Library/src/lcm32f06x_tim.c ****                        uint32_t TIM_ICFilter)
 5986              		.loc 1 3378 13 view .LVU1805
 5987              	.LBB518:
3381:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 1: Reset the CC1E Bit */
 5988              		.loc 1 3381 3 view .LVU1806
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 5989              		.loc 1 3383 3 view .LVU1807
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 5990              		.loc 1 3383 14 is_stmt 0 view .LVU1808
 5991 000a 0126     		movs	r6, #1
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 5992              		.loc 1 3387 12 view .LVU1809
 5993 000c F327     		movs	r7, #243
3383:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 5994              		.loc 1 3383 14 view .LVU1810
 5995 000e B243     		bics	r2, r6
 5996 0010 0262     		str	r2, [r0, #32]
3384:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 5997              		.loc 1 3384 3 is_stmt 1 view .LVU1811
3384:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 5998              		.loc 1 3384 12 is_stmt 0 view .LVU1812
 5999 0012 8469     		ldr	r4, [r0, #24]
 6000              	.LVL498:
3385:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 6001              		.loc 1 3385 3 is_stmt 1 view .LVU1813
3388:Library/src/lcm32f06x_tim.c **** 
 6002              		.loc 1 3388 44 is_stmt 0 view .LVU1814
 6003 0014 1B01     		lsls	r3, r3, #4
 6004              	.LVL499:
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 6005              		.loc 1 3387 12 view .LVU1815
 6006 0016 BC43     		bics	r4, r7
 6007              	.LVL500:
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 6008              		.loc 1 3387 12 view .LVU1816
 6009 0018 2343     		orrs	r3, r4
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 6010              		.loc 1 3391 11 view .LVU1817
 6011 001a 0A24     		movs	r4, #10
3385:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 6012              		.loc 1 3385 11 view .LVU1818
 6013 001c 026A     		ldr	r2, [r0, #32]
 6014              	.LVL501:
3387:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection | (uint32_t)(TIM_ICFilter << (uint32_t)4));
 6015              		.loc 1 3387 3 is_stmt 1 view .LVU1819
ARM GAS  /tmp/ccWBHqpW.s 			page 187


3388:Library/src/lcm32f06x_tim.c **** 
 6016              		.loc 1 3388 3 view .LVU1820
3388:Library/src/lcm32f06x_tim.c **** 
 6017              		.loc 1 3388 12 is_stmt 0 view .LVU1821
 6018 001e 3343     		orrs	r3, r6
 6019              	.LVL502:
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 6020              		.loc 1 3391 3 is_stmt 1 view .LVU1822
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 6021              		.loc 1 3392 3 view .LVU1823
3391:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E_Msk);
 6022              		.loc 1 3391 11 is_stmt 0 view .LVU1824
 6023 0020 A243     		bics	r2, r4
 6024              	.LVL503:
3392:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 6025              		.loc 1 3392 11 view .LVU1825
 6026 0022 2A43     		orrs	r2, r5
 6027 0024 3243     		orrs	r2, r6
 6028              	.LVL504:
3394:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 6029              		.loc 1 3394 3 is_stmt 1 view .LVU1826
3394:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 6030              		.loc 1 3394 15 is_stmt 0 view .LVU1827
 6031 0026 8361     		str	r3, [r0, #24]
3395:Library/src/lcm32f06x_tim.c **** }
 6032              		.loc 1 3395 3 is_stmt 1 view .LVU1828
3395:Library/src/lcm32f06x_tim.c **** }
 6033              		.loc 1 3395 14 is_stmt 0 view .LVU1829
 6034 0028 0262     		str	r2, [r0, #32]
 6035              	.LVL505:
 6036              	.L230:
3395:Library/src/lcm32f06x_tim.c **** }
 6037              		.loc 1 3395 14 view .LVU1830
 6038              	.LBE518:
 6039              	.LBE517:
3022:Library/src/lcm32f06x_tim.c ****   /* Select the External clock mode1 */
 6040              		.loc 1 3022 3 is_stmt 1 view .LVU1831
 6041              	.LBB519:
 6042              	.LBI519:
3132:Library/src/lcm32f06x_tim.c **** {
 6043              		.loc 1 3132 6 view .LVU1832
 6044              	.LBB520:
3134:Library/src/lcm32f06x_tim.c **** 
 6045              		.loc 1 3134 3 view .LVU1833
3139:Library/src/lcm32f06x_tim.c ****   /* Reset the TS Bits */
 6046              		.loc 1 3139 3 view .LVU1834
3141:Library/src/lcm32f06x_tim.c ****   /* Set the Input Trigger source */
 6047              		.loc 1 3141 11 is_stmt 0 view .LVU1835
 6048 002a 7022     		movs	r2, #112
 6049              	.LBE520:
 6050              	.LBE519:
3025:Library/src/lcm32f06x_tim.c **** 
 6051              		.loc 1 3025 1 view .LVU1836
 6052              		@ sp needed
 6053              	.LBB522:
 6054              	.LBB521:
3139:Library/src/lcm32f06x_tim.c ****   /* Reset the TS Bits */
ARM GAS  /tmp/ccWBHqpW.s 			page 188


 6055              		.loc 1 3139 11 view .LVU1837
 6056 002c 8368     		ldr	r3, [r0, #8]
 6057              	.LVL506:
3141:Library/src/lcm32f06x_tim.c ****   /* Set the Input Trigger source */
 6058              		.loc 1 3141 3 is_stmt 1 view .LVU1838
3141:Library/src/lcm32f06x_tim.c ****   /* Set the Input Trigger source */
 6059              		.loc 1 3141 11 is_stmt 0 view .LVU1839
 6060 002e 9343     		bics	r3, r2
 6061              	.LVL507:
3143:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6062              		.loc 1 3143 3 is_stmt 1 view .LVU1840
3143:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6063              		.loc 1 3143 11 is_stmt 0 view .LVU1841
 6064 0030 1943     		orrs	r1, r3
 6065              	.LVL508:
3145:Library/src/lcm32f06x_tim.c **** }
 6066              		.loc 1 3145 3 is_stmt 1 view .LVU1842
3145:Library/src/lcm32f06x_tim.c **** }
 6067              		.loc 1 3145 14 is_stmt 0 view .LVU1843
 6068 0032 8160     		str	r1, [r0, #8]
 6069              	.LVL509:
3145:Library/src/lcm32f06x_tim.c **** }
 6070              		.loc 1 3145 14 view .LVU1844
 6071              	.LBE521:
 6072              	.LBE522:
3024:Library/src/lcm32f06x_tim.c **** }
 6073              		.loc 1 3024 3 is_stmt 1 view .LVU1845
3024:Library/src/lcm32f06x_tim.c **** }
 6074              		.loc 1 3024 7 is_stmt 0 view .LVU1846
 6075 0034 8368     		ldr	r3, [r0, #8]
3024:Library/src/lcm32f06x_tim.c **** }
 6076              		.loc 1 3024 14 view .LVU1847
 6077 0036 693A     		subs	r2, r2, #105
 6078 0038 1343     		orrs	r3, r2
 6079 003a 8360     		str	r3, [r0, #8]
3025:Library/src/lcm32f06x_tim.c **** 
 6080              		.loc 1 3025 1 view .LVU1848
 6081 003c F0BD     		pop	{r4, r5, r6, r7, pc}
 6082              	.LVL510:
 6083              	.L231:
3015:Library/src/lcm32f06x_tim.c ****   }
 6084              		.loc 1 3015 5 is_stmt 1 view .LVU1849
 6085              	.LBB523:
 6086              	.LBI514:
3421:Library/src/lcm32f06x_tim.c ****                 uint32_t TIM_ICFilter)
 6087              		.loc 1 3421 13 view .LVU1850
 6088              	.LBB516:
3424:Library/src/lcm32f06x_tim.c ****   /* Disable the Channel 2: Reset the CC2E Bit */
 6089              		.loc 1 3424 3 view .LVU1851
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 6090              		.loc 1 3426 3 view .LVU1852
3426:Library/src/lcm32f06x_tim.c ****   tmpccmr1 = TIMx->CCMR1;
 6091              		.loc 1 3426 14 is_stmt 0 view .LVU1853
 6092 003e 1026     		movs	r6, #16
 6093 0040 B243     		bics	r2, r6
 6094 0042 0262     		str	r2, [r0, #32]
3427:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
ARM GAS  /tmp/ccWBHqpW.s 			page 189


 6095              		.loc 1 3427 3 is_stmt 1 view .LVU1854
3427:Library/src/lcm32f06x_tim.c ****   tmpccer = TIMx->CCER;
 6096              		.loc 1 3427 12 is_stmt 0 view .LVU1855
 6097 0044 8769     		ldr	r7, [r0, #24]
 6098              	.LVL511:
3428:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 4);
 6099              		.loc 1 3428 3 is_stmt 1 view .LVU1856
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 6100              		.loc 1 3431 12 is_stmt 0 view .LVU1857
 6101 0046 084C     		ldr	r4, .L232
3428:Library/src/lcm32f06x_tim.c ****   tmp = (uint32_t)(TIM_ICPolarity << 4);
 6102              		.loc 1 3428 11 view .LVU1858
 6103 0048 026A     		ldr	r2, [r0, #32]
 6104              	.LVL512:
3429:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 6105              		.loc 1 3429 3 is_stmt 1 view .LVU1859
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 6106              		.loc 1 3431 3 view .LVU1860
3431:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICFilter << 12);
 6107              		.loc 1 3431 12 is_stmt 0 view .LVU1861
 6108 004a 2740     		ands	r7, r4
 6109              	.LVL513:
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 6110              		.loc 1 3432 3 is_stmt 1 view .LVU1862
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 6111              		.loc 1 3432 15 is_stmt 0 view .LVU1863
 6112 004c 1C03     		lsls	r4, r3, #12
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 6113              		.loc 1 3433 12 view .LVU1864
 6114 004e 8023     		movs	r3, #128
 6115              	.LVL514:
3432:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= (uint32_t)(TIM_ICSelection << 8);
 6116              		.loc 1 3432 12 view .LVU1865
 6117 0050 3C43     		orrs	r4, r7
 6118              	.LVL515:
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 6119              		.loc 1 3433 3 is_stmt 1 view .LVU1866
3433:Library/src/lcm32f06x_tim.c ****   /* Select the Polarity and set the CC2E Bit */
 6120              		.loc 1 3433 12 is_stmt 0 view .LVU1867
 6121 0052 5B00     		lsls	r3, r3, #1
 6122 0054 2343     		orrs	r3, r4
 6123              	.LVL516:
3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 6124              		.loc 1 3435 3 is_stmt 1 view .LVU1868
3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 6125              		.loc 1 3436 3 view .LVU1869
3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 6126              		.loc 1 3435 11 is_stmt 0 view .LVU1870
 6127 0056 A024     		movs	r4, #160
3429:Library/src/lcm32f06x_tim.c ****   /* Select the Input and set the filter */
 6128              		.loc 1 3429 7 view .LVU1871
 6129 0058 2D01     		lsls	r5, r5, #4
 6130              	.LVL517:
3435:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(tmp | (uint32_t)TIM_CCER_CC2E_Msk);
 6131              		.loc 1 3435 11 view .LVU1872
 6132 005a A243     		bics	r2, r4
 6133              	.LVL518:
ARM GAS  /tmp/ccWBHqpW.s 			page 190


3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 6134              		.loc 1 3436 11 view .LVU1873
 6135 005c 1543     		orrs	r5, r2
 6136              	.LVL519:
3436:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 and CCER registers */
 6137              		.loc 1 3436 11 view .LVU1874
 6138 005e 3543     		orrs	r5, r6
 6139              	.LVL520:
3438:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 6140              		.loc 1 3438 3 is_stmt 1 view .LVU1875
3438:Library/src/lcm32f06x_tim.c ****   TIMx->CCER = tmpccer;
 6141              		.loc 1 3438 15 is_stmt 0 view .LVU1876
 6142 0060 8361     		str	r3, [r0, #24]
3439:Library/src/lcm32f06x_tim.c **** }
 6143              		.loc 1 3439 3 is_stmt 1 view .LVU1877
3439:Library/src/lcm32f06x_tim.c **** }
 6144              		.loc 1 3439 14 is_stmt 0 view .LVU1878
 6145 0062 0562     		str	r5, [r0, #32]
 6146              	.LVL521:
3440:Library/src/lcm32f06x_tim.c **** 
 6147              		.loc 1 3440 1 view .LVU1879
 6148 0064 E1E7     		b	.L230
 6149              	.L233:
 6150 0066 C046     		.align	2
 6151              	.L232:
 6152 0068 FF0CFFFF 		.word	-62209
 6153              	.LBE516:
 6154              	.LBE523:
 6155              		.cfi_endproc
 6156              	.LFE141:
 6158              		.section	.text.TIM_ETRClockMode1Config,"ax",%progbits
 6159              		.align	1
 6160              		.p2align 2,,3
 6161              		.global	TIM_ETRClockMode1Config
 6162              		.syntax unified
 6163              		.code	16
 6164              		.thumb_func
 6166              	TIM_ETRClockMode1Config:
 6167              	.LVL522:
 6168              	.LFB142:
3054:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
 6169              		.loc 1 3054 1 is_stmt 1 view -0
 6170              		.cfi_startproc
 6171              		@ args = 0, pretend = 0, frame = 0
 6172              		@ frame_needed = 0, uses_anonymous_args = 0
3055:Library/src/lcm32f06x_tim.c **** 
 6173              		.loc 1 3055 3 view .LVU1881
3060:Library/src/lcm32f06x_tim.c **** 
 6174              		.loc 1 3060 3 view .LVU1882
 6175              	.LBB524:
 6176              	.LBI524:
3254:Library/src/lcm32f06x_tim.c ****                    uint32_t ExtTRGFilter)
 6177              		.loc 1 3254 6 view .LVU1883
 6178              	.LBB525:
3257:Library/src/lcm32f06x_tim.c **** 
 6179              		.loc 1 3257 3 view .LVU1884
3261:Library/src/lcm32f06x_tim.c ****   /* Reset the ETR Bits */
ARM GAS  /tmp/ccWBHqpW.s 			page 191


 6180              		.loc 1 3261 3 view .LVU1885
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6181              		.loc 1 3265 79 is_stmt 0 view .LVU1886
 6182 0000 1B02     		lsls	r3, r3, #8
 6183              	.LVL523:
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6184              		.loc 1 3265 47 view .LVU1887
 6185 0002 1343     		orrs	r3, r2
 6186              	.LBE525:
 6187              	.LBE524:
3070:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6188              		.loc 1 3070 11 view .LVU1888
 6189 0004 7722     		movs	r2, #119
 6190              	.LVL524:
3054:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
 6191              		.loc 1 3054 1 view .LVU1889
 6192 0006 30B5     		push	{r4, r5, lr}
 6193              	.LCFI14:
 6194              		.cfi_def_cfa_offset 12
 6195              		.cfi_offset 4, -12
 6196              		.cfi_offset 5, -8
 6197              		.cfi_offset 14, -4
 6198              	.LBB527:
 6199              	.LBB526:
3261:Library/src/lcm32f06x_tim.c ****   /* Reset the ETR Bits */
 6200              		.loc 1 3261 11 view .LVU1890
 6201 0008 8468     		ldr	r4, [r0, #8]
 6202              	.LVL525:
3263:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler, the Filter value and the Polarity */
 6203              		.loc 1 3263 3 is_stmt 1 view .LVU1891
3263:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler, the Filter value and the Polarity */
 6204              		.loc 1 3263 11 is_stmt 0 view .LVU1892
 6205 000a 044D     		ldr	r5, .L235
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6206              		.loc 1 3265 14 view .LVU1893
 6207 000c 0B43     		orrs	r3, r1
3263:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler, the Filter value and the Polarity */
 6208              		.loc 1 3263 11 view .LVU1894
 6209 000e 2C40     		ands	r4, r5
 6210              	.LVL526:
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6211              		.loc 1 3265 3 is_stmt 1 view .LVU1895
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6212              		.loc 1 3265 11 is_stmt 0 view .LVU1896
 6213 0010 2343     		orrs	r3, r4
 6214              	.LVL527:
3267:Library/src/lcm32f06x_tim.c **** }
 6215              		.loc 1 3267 3 is_stmt 1 view .LVU1897
3267:Library/src/lcm32f06x_tim.c **** }
 6216              		.loc 1 3267 14 is_stmt 0 view .LVU1898
 6217 0012 8360     		str	r3, [r0, #8]
 6218              	.LVL528:
3267:Library/src/lcm32f06x_tim.c **** }
 6219              		.loc 1 3267 14 view .LVU1899
 6220              	.LBE526:
 6221              	.LBE527:
3063:Library/src/lcm32f06x_tim.c ****   /* Reset the SMS Bits */
ARM GAS  /tmp/ccWBHqpW.s 			page 192


 6222              		.loc 1 3063 3 is_stmt 1 view .LVU1900
3063:Library/src/lcm32f06x_tim.c ****   /* Reset the SMS Bits */
 6223              		.loc 1 3063 11 is_stmt 0 view .LVU1901
 6224 0014 8368     		ldr	r3, [r0, #8]
 6225              	.LVL529:
3065:Library/src/lcm32f06x_tim.c ****   /* Select the External clock mode1 */
 6226              		.loc 1 3065 3 is_stmt 1 view .LVU1902
3067:Library/src/lcm32f06x_tim.c ****   /* Select the Trigger selection : ETRF */
 6227              		.loc 1 3067 3 view .LVU1903
3069:Library/src/lcm32f06x_tim.c ****   tmpsmcr |= TIM_TS_ETRF;
 6228              		.loc 1 3069 3 view .LVU1904
3070:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6229              		.loc 1 3070 3 view .LVU1905
3073:Library/src/lcm32f06x_tim.c **** 
 6230              		.loc 1 3073 1 is_stmt 0 view .LVU1906
 6231              		@ sp needed
3070:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6232              		.loc 1 3070 11 view .LVU1907
 6233 0016 1343     		orrs	r3, r2
 6234              	.LVL530:
3072:Library/src/lcm32f06x_tim.c **** }
 6235              		.loc 1 3072 3 is_stmt 1 view .LVU1908
3072:Library/src/lcm32f06x_tim.c **** }
 6236              		.loc 1 3072 14 is_stmt 0 view .LVU1909
 6237 0018 8360     		str	r3, [r0, #8]
3073:Library/src/lcm32f06x_tim.c **** 
 6238              		.loc 1 3073 1 view .LVU1910
 6239 001a 30BD     		pop	{r4, r5, pc}
 6240              	.L236:
 6241              		.align	2
 6242              	.L235:
 6243 001c FF00FFFF 		.word	-65281
 6244              		.cfi_endproc
 6245              	.LFE142:
 6247              		.section	.text.TIM_ETRClockMode2Config,"ax",%progbits
 6248              		.align	1
 6249              		.p2align 2,,3
 6250              		.global	TIM_ETRClockMode2Config
 6251              		.syntax unified
 6252              		.code	16
 6253              		.thumb_func
 6255              	TIM_ETRClockMode2Config:
 6256              	.LVL531:
 6257              	.LFB143:
3102:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 6258              		.loc 1 3102 1 is_stmt 1 view -0
 6259              		.cfi_startproc
 6260              		@ args = 0, pretend = 0, frame = 0
 6261              		@ frame_needed = 0, uses_anonymous_args = 0
3106:Library/src/lcm32f06x_tim.c ****   /* Enable the External clock mode2 */
 6262              		.loc 1 3106 3 view .LVU1912
 6263              	.LBB528:
 6264              	.LBI528:
3254:Library/src/lcm32f06x_tim.c ****                    uint32_t ExtTRGFilter)
 6265              		.loc 1 3254 6 view .LVU1913
 6266              	.LBB529:
3257:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 193


 6267              		.loc 1 3257 3 view .LVU1914
3261:Library/src/lcm32f06x_tim.c ****   /* Reset the ETR Bits */
 6268              		.loc 1 3261 3 view .LVU1915
 6269              	.LBE529:
 6270              	.LBE528:
3102:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 6271              		.loc 1 3102 1 is_stmt 0 view .LVU1916
 6272 0000 30B5     		push	{r4, r5, lr}
 6273              	.LCFI15:
 6274              		.cfi_def_cfa_offset 12
 6275              		.cfi_offset 4, -12
 6276              		.cfi_offset 5, -8
 6277              		.cfi_offset 14, -4
 6278              	.LBB531:
 6279              	.LBB530:
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6280              		.loc 1 3265 79 view .LVU1917
 6281 0002 1B02     		lsls	r3, r3, #8
 6282              	.LVL532:
3261:Library/src/lcm32f06x_tim.c ****   /* Reset the ETR Bits */
 6283              		.loc 1 3261 11 view .LVU1918
 6284 0004 8468     		ldr	r4, [r0, #8]
 6285              	.LVL533:
3263:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler, the Filter value and the Polarity */
 6286              		.loc 1 3263 3 is_stmt 1 view .LVU1919
3263:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler, the Filter value and the Polarity */
 6287              		.loc 1 3263 11 is_stmt 0 view .LVU1920
 6288 0006 064D     		ldr	r5, .L238
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6289              		.loc 1 3265 47 view .LVU1921
 6290 0008 1343     		orrs	r3, r2
3263:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler, the Filter value and the Polarity */
 6291              		.loc 1 3263 11 view .LVU1922
 6292 000a 2C40     		ands	r4, r5
 6293              	.LVL534:
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6294              		.loc 1 3265 3 is_stmt 1 view .LVU1923
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6295              		.loc 1 3265 14 is_stmt 0 view .LVU1924
 6296 000c 0B43     		orrs	r3, r1
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6297              		.loc 1 3265 11 view .LVU1925
 6298 000e 2343     		orrs	r3, r4
 6299              	.LVL535:
3267:Library/src/lcm32f06x_tim.c **** }
 6300              		.loc 1 3267 3 is_stmt 1 view .LVU1926
3267:Library/src/lcm32f06x_tim.c **** }
 6301              		.loc 1 3267 14 is_stmt 0 view .LVU1927
 6302 0010 8360     		str	r3, [r0, #8]
 6303              	.LVL536:
3267:Library/src/lcm32f06x_tim.c **** }
 6304              		.loc 1 3267 14 view .LVU1928
 6305              	.LBE530:
 6306              	.LBE531:
3108:Library/src/lcm32f06x_tim.c **** }
 6307              		.loc 1 3108 3 is_stmt 1 view .LVU1929
3108:Library/src/lcm32f06x_tim.c **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 194


 6308              		.loc 1 3108 14 is_stmt 0 view .LVU1930
 6309 0012 8023     		movs	r3, #128
3109:Library/src/lcm32f06x_tim.c **** 
 6310              		.loc 1 3109 1 view .LVU1931
 6311              		@ sp needed
3108:Library/src/lcm32f06x_tim.c **** }
 6312              		.loc 1 3108 7 view .LVU1932
 6313 0014 8268     		ldr	r2, [r0, #8]
 6314              	.LVL537:
3108:Library/src/lcm32f06x_tim.c **** }
 6315              		.loc 1 3108 14 view .LVU1933
 6316 0016 DB01     		lsls	r3, r3, #7
 6317 0018 1343     		orrs	r3, r2
 6318 001a 8360     		str	r3, [r0, #8]
3109:Library/src/lcm32f06x_tim.c **** 
 6319              		.loc 1 3109 1 view .LVU1934
 6320 001c 30BD     		pop	{r4, r5, pc}
 6321              	.L239:
 6322 001e C046     		.align	2
 6323              	.L238:
 6324 0020 FF00FFFF 		.word	-65281
 6325              		.cfi_endproc
 6326              	.LFE143:
 6328              		.section	.text.TIM_SelectInputTrigger,"ax",%progbits
 6329              		.align	1
 6330              		.p2align 2,,3
 6331              		.global	TIM_SelectInputTrigger
 6332              		.syntax unified
 6333              		.code	16
 6334              		.thumb_func
 6336              	TIM_SelectInputTrigger:
 6337              	.LVL538:
 6338              	.LFB144:
3133:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
 6339              		.loc 1 3133 1 is_stmt 1 view -0
 6340              		.cfi_startproc
 6341              		@ args = 0, pretend = 0, frame = 0
 6342              		@ frame_needed = 0, uses_anonymous_args = 0
 6343              		@ link register save eliminated.
3134:Library/src/lcm32f06x_tim.c **** 
 6344              		.loc 1 3134 3 view .LVU1936
3139:Library/src/lcm32f06x_tim.c ****   /* Reset the TS Bits */
 6345              		.loc 1 3139 3 view .LVU1937
3141:Library/src/lcm32f06x_tim.c ****   /* Set the Input Trigger source */
 6346              		.loc 1 3141 11 is_stmt 0 view .LVU1938
 6347 0000 7022     		movs	r2, #112
3146:Library/src/lcm32f06x_tim.c **** 
 6348              		.loc 1 3146 1 view .LVU1939
 6349              		@ sp needed
3139:Library/src/lcm32f06x_tim.c ****   /* Reset the TS Bits */
 6350              		.loc 1 3139 11 view .LVU1940
 6351 0002 8368     		ldr	r3, [r0, #8]
 6352              	.LVL539:
3141:Library/src/lcm32f06x_tim.c ****   /* Set the Input Trigger source */
 6353              		.loc 1 3141 3 is_stmt 1 view .LVU1941
3141:Library/src/lcm32f06x_tim.c ****   /* Set the Input Trigger source */
 6354              		.loc 1 3141 11 is_stmt 0 view .LVU1942
ARM GAS  /tmp/ccWBHqpW.s 			page 195


 6355 0004 9343     		bics	r3, r2
 6356              	.LVL540:
3143:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6357              		.loc 1 3143 3 is_stmt 1 view .LVU1943
3143:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6358              		.loc 1 3143 11 is_stmt 0 view .LVU1944
 6359 0006 0B43     		orrs	r3, r1
 6360              	.LVL541:
3145:Library/src/lcm32f06x_tim.c **** }
 6361              		.loc 1 3145 3 is_stmt 1 view .LVU1945
3145:Library/src/lcm32f06x_tim.c **** }
 6362              		.loc 1 3145 14 is_stmt 0 view .LVU1946
 6363 0008 8360     		str	r3, [r0, #8]
3146:Library/src/lcm32f06x_tim.c **** 
 6364              		.loc 1 3146 1 view .LVU1947
 6365 000a 7047     		bx	lr
 6366              		.cfi_endproc
 6367              	.LFE144:
 6369              		.section	.text.TIM_SelectOutputTrigger,"ax",%progbits
 6370              		.align	1
 6371              		.p2align 2,,3
 6372              		.global	TIM_SelectOutputTrigger
 6373              		.syntax unified
 6374              		.code	16
 6375              		.thumb_func
 6377              	TIM_SelectOutputTrigger:
 6378              	.LVL542:
 6379              	.LFB145:
3169:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 6380              		.loc 1 3169 1 is_stmt 1 view -0
 6381              		.cfi_startproc
 6382              		@ args = 0, pretend = 0, frame = 0
 6383              		@ frame_needed = 0, uses_anonymous_args = 0
 6384              		@ link register save eliminated.
3173:Library/src/lcm32f06x_tim.c ****   /* Select the TRGO source */
 6385              		.loc 1 3173 3 view .LVU1949
3173:Library/src/lcm32f06x_tim.c ****   /* Select the TRGO source */
 6386              		.loc 1 3173 13 is_stmt 0 view .LVU1950
 6387 0000 7022     		movs	r2, #112
3176:Library/src/lcm32f06x_tim.c **** 
 6388              		.loc 1 3176 1 view .LVU1951
 6389              		@ sp needed
3173:Library/src/lcm32f06x_tim.c ****   /* Select the TRGO source */
 6390              		.loc 1 3173 7 view .LVU1952
 6391 0002 4368     		ldr	r3, [r0, #4]
3173:Library/src/lcm32f06x_tim.c ****   /* Select the TRGO source */
 6392              		.loc 1 3173 13 view .LVU1953
 6393 0004 9343     		bics	r3, r2
 6394 0006 4360     		str	r3, [r0, #4]
3175:Library/src/lcm32f06x_tim.c **** }
 6395              		.loc 1 3175 3 is_stmt 1 view .LVU1954
3175:Library/src/lcm32f06x_tim.c **** }
 6396              		.loc 1 3175 7 is_stmt 0 view .LVU1955
 6397 0008 4368     		ldr	r3, [r0, #4]
3175:Library/src/lcm32f06x_tim.c **** }
 6398              		.loc 1 3175 13 view .LVU1956
 6399 000a 0B43     		orrs	r3, r1
ARM GAS  /tmp/ccWBHqpW.s 			page 196


 6400 000c 4360     		str	r3, [r0, #4]
3176:Library/src/lcm32f06x_tim.c **** 
 6401              		.loc 1 3176 1 view .LVU1957
 6402 000e 7047     		bx	lr
 6403              		.cfi_endproc
 6404              	.LFE145:
 6406              		.section	.text.TIM_SelectSlaveMode,"ax",%progbits
 6407              		.align	1
 6408              		.p2align 2,,3
 6409              		.global	TIM_SelectSlaveMode
 6410              		.syntax unified
 6411              		.code	16
 6412              		.thumb_func
 6414              	TIM_SelectSlaveMode:
 6415              	.LVL543:
 6416              	.LFB146:
3195:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 6417              		.loc 1 3195 1 is_stmt 1 view -0
 6418              		.cfi_startproc
 6419              		@ args = 0, pretend = 0, frame = 0
 6420              		@ frame_needed = 0, uses_anonymous_args = 0
 6421              		@ link register save eliminated.
3199:Library/src/lcm32f06x_tim.c ****   /* Select the Slave Mode */
 6422              		.loc 1 3199 3 view .LVU1959
3199:Library/src/lcm32f06x_tim.c ****   /* Select the Slave Mode */
 6423              		.loc 1 3199 14 is_stmt 0 view .LVU1960
 6424 0000 0722     		movs	r2, #7
3202:Library/src/lcm32f06x_tim.c **** 
 6425              		.loc 1 3202 1 view .LVU1961
 6426              		@ sp needed
3199:Library/src/lcm32f06x_tim.c ****   /* Select the Slave Mode */
 6427              		.loc 1 3199 7 view .LVU1962
 6428 0002 8368     		ldr	r3, [r0, #8]
3199:Library/src/lcm32f06x_tim.c ****   /* Select the Slave Mode */
 6429              		.loc 1 3199 14 view .LVU1963
 6430 0004 9343     		bics	r3, r2
 6431 0006 8360     		str	r3, [r0, #8]
3201:Library/src/lcm32f06x_tim.c **** }
 6432              		.loc 1 3201 3 is_stmt 1 view .LVU1964
3201:Library/src/lcm32f06x_tim.c **** }
 6433              		.loc 1 3201 7 is_stmt 0 view .LVU1965
 6434 0008 8368     		ldr	r3, [r0, #8]
3201:Library/src/lcm32f06x_tim.c **** }
 6435              		.loc 1 3201 14 view .LVU1966
 6436 000a 0B43     		orrs	r3, r1
 6437 000c 8360     		str	r3, [r0, #8]
3202:Library/src/lcm32f06x_tim.c **** 
 6438              		.loc 1 3202 1 view .LVU1967
 6439 000e 7047     		bx	lr
 6440              		.cfi_endproc
 6441              	.LFE146:
 6443              		.section	.text.TIM_SelectMasterSlaveMode,"ax",%progbits
 6444              		.align	1
 6445              		.p2align 2,,3
 6446              		.global	TIM_SelectMasterSlaveMode
 6447              		.syntax unified
 6448              		.code	16
ARM GAS  /tmp/ccWBHqpW.s 			page 197


 6449              		.thumb_func
 6451              	TIM_SelectMasterSlaveMode:
 6452              	.LFB206:
 6453              		.cfi_startproc
3218:Library/src/lcm32f06x_tim.c **** {
 6454              		.loc 1 3218 6 is_stmt 1 view -0
 6455              		@ args = 0, pretend = 0, frame = 0
 6456              		@ frame_needed = 0, uses_anonymous_args = 0
 6457              		@ link register save eliminated.
 6458 0000 8022     		movs	r2, #128
 6459              		@ sp needed
 6460 0002 8368     		ldr	r3, [r0, #8]
 6461 0004 9343     		bics	r3, r2
 6462 0006 8360     		str	r3, [r0, #8]
 6463 0008 8368     		ldr	r3, [r0, #8]
 6464 000a 1943     		orrs	r1, r3
 6465 000c 8160     		str	r1, [r0, #8]
 6466 000e 7047     		bx	lr
 6467              		.cfi_endproc
 6468              	.LFE206:
 6470              		.section	.text.TIM_ETRConfig,"ax",%progbits
 6471              		.align	1
 6472              		.p2align 2,,3
 6473              		.global	TIM_ETRConfig
 6474              		.syntax unified
 6475              		.code	16
 6476              		.thumb_func
 6478              	TIM_ETRConfig:
 6479              	.LVL544:
 6480              	.LFB148:
3256:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
 6481              		.loc 1 3256 1 view -0
 6482              		.cfi_startproc
 6483              		@ args = 0, pretend = 0, frame = 0
 6484              		@ frame_needed = 0, uses_anonymous_args = 0
3257:Library/src/lcm32f06x_tim.c **** 
 6485              		.loc 1 3257 3 view .LVU1970
3261:Library/src/lcm32f06x_tim.c ****   /* Reset the ETR Bits */
 6486              		.loc 1 3261 3 view .LVU1971
3256:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
 6487              		.loc 1 3256 1 is_stmt 0 view .LVU1972
 6488 0000 30B5     		push	{r4, r5, lr}
 6489              	.LCFI16:
 6490              		.cfi_def_cfa_offset 12
 6491              		.cfi_offset 4, -12
 6492              		.cfi_offset 5, -8
 6493              		.cfi_offset 14, -4
3261:Library/src/lcm32f06x_tim.c ****   /* Reset the ETR Bits */
 6494              		.loc 1 3261 11 view .LVU1973
 6495 0002 8468     		ldr	r4, [r0, #8]
 6496              	.LVL545:
3263:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler, the Filter value and the Polarity */
 6497              		.loc 1 3263 3 is_stmt 1 view .LVU1974
3263:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler, the Filter value and the Polarity */
 6498              		.loc 1 3263 11 is_stmt 0 view .LVU1975
 6499 0004 034D     		ldr	r5, .L245
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
ARM GAS  /tmp/ccWBHqpW.s 			page 198


 6500              		.loc 1 3265 14 view .LVU1976
 6501 0006 0A43     		orrs	r2, r1
 6502              	.LVL546:
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6503              		.loc 1 3265 79 view .LVU1977
 6504 0008 1B02     		lsls	r3, r3, #8
 6505              	.LVL547:
3263:Library/src/lcm32f06x_tim.c ****   /* Set the Prescaler, the Filter value and the Polarity */
 6506              		.loc 1 3263 11 view .LVU1978
 6507 000a 2C40     		ands	r4, r5
 6508              	.LVL548:
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6509              		.loc 1 3265 3 is_stmt 1 view .LVU1979
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6510              		.loc 1 3265 14 is_stmt 0 view .LVU1980
 6511 000c 1343     		orrs	r3, r2
3265:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6512              		.loc 1 3265 11 view .LVU1981
 6513 000e 2343     		orrs	r3, r4
 6514              	.LVL549:
3267:Library/src/lcm32f06x_tim.c **** }
 6515              		.loc 1 3267 3 is_stmt 1 view .LVU1982
3267:Library/src/lcm32f06x_tim.c **** }
 6516              		.loc 1 3267 14 is_stmt 0 view .LVU1983
 6517 0010 8360     		str	r3, [r0, #8]
3268:Library/src/lcm32f06x_tim.c **** 
 6518              		.loc 1 3268 1 view .LVU1984
 6519              		@ sp needed
 6520 0012 30BD     		pop	{r4, r5, pc}
 6521              	.L246:
 6522              		.align	2
 6523              	.L245:
 6524 0014 FF00FFFF 		.word	-65281
 6525              		.cfi_endproc
 6526              	.LFE148:
 6528              		.section	.text.TIM_EncoderInterfaceConfig,"ax",%progbits
 6529              		.align	1
 6530              		.p2align 2,,3
 6531              		.global	TIM_EncoderInterfaceConfig
 6532              		.syntax unified
 6533              		.code	16
 6534              		.thumb_func
 6536              	TIM_EncoderInterfaceConfig:
 6537              	.LVL550:
 6538              	.LFB149:
3297:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
 6539              		.loc 1 3297 1 is_stmt 1 view -0
 6540              		.cfi_startproc
 6541              		@ args = 0, pretend = 0, frame = 0
 6542              		@ frame_needed = 0, uses_anonymous_args = 0
3298:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccmr1 = 0;
 6543              		.loc 1 3298 3 view .LVU1986
3299:Library/src/lcm32f06x_tim.c ****   uint32_t tmpccer = 0;
 6544              		.loc 1 3299 3 view .LVU1987
3300:Library/src/lcm32f06x_tim.c **** 
 6545              		.loc 1 3300 3 view .LVU1988
3305:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR1 register value */
ARM GAS  /tmp/ccWBHqpW.s 			page 199


 6546              		.loc 1 3305 3 view .LVU1989
3297:Library/src/lcm32f06x_tim.c ****   uint32_t tmpsmcr = 0;
 6547              		.loc 1 3297 1 is_stmt 0 view .LVU1990
 6548 0000 F0B5     		push	{r4, r5, r6, r7, lr}
 6549              	.LCFI17:
 6550              		.cfi_def_cfa_offset 20
 6551              		.cfi_offset 4, -20
 6552              		.cfi_offset 5, -16
 6553              		.cfi_offset 6, -12
 6554              		.cfi_offset 7, -8
 6555              		.cfi_offset 14, -4
3311:Library/src/lcm32f06x_tim.c ****   tmpsmcr |= TIM_EncoderMode;
 6556              		.loc 1 3311 11 view .LVU1991
 6557 0002 0727     		movs	r7, #7
3325:Library/src/lcm32f06x_tim.c **** 
 6558              		.loc 1 3325 1 view .LVU1992
 6559              		@ sp needed
3305:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCMR1 register value */
 6560              		.loc 1 3305 11 view .LVU1993
 6561 0004 8668     		ldr	r6, [r0, #8]
 6562              	.LVL551:
3307:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCER register value */
 6563              		.loc 1 3307 3 is_stmt 1 view .LVU1994
3307:Library/src/lcm32f06x_tim.c ****   /* Get the TIMx CCER register value */
 6564              		.loc 1 3307 12 is_stmt 0 view .LVU1995
 6565 0006 8469     		ldr	r4, [r0, #24]
 6566              	.LVL552:
3309:Library/src/lcm32f06x_tim.c ****   /* Set the encoder Mode */
 6567              		.loc 1 3309 3 is_stmt 1 view .LVU1996
3311:Library/src/lcm32f06x_tim.c ****   tmpsmcr |= TIM_EncoderMode;
 6568              		.loc 1 3311 11 is_stmt 0 view .LVU1997
 6569 0008 BE43     		bics	r6, r7
 6570              	.LVL553:
3312:Library/src/lcm32f06x_tim.c ****   /* Select the Capture Compare 1 and the Capture Compare 2 as input */
 6571              		.loc 1 3312 11 view .LVU1998
 6572 000a 3143     		orrs	r1, r6
 6573              	.LVL554:
3314:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0;
 6574              		.loc 1 3314 12 view .LVU1999
 6575 000c 074E     		ldr	r6, .L248
3309:Library/src/lcm32f06x_tim.c ****   /* Set the encoder Mode */
 6576              		.loc 1 3309 11 view .LVU2000
 6577 000e 056A     		ldr	r5, [r0, #32]
 6578              	.LVL555:
3311:Library/src/lcm32f06x_tim.c ****   tmpsmcr |= TIM_EncoderMode;
 6579              		.loc 1 3311 3 is_stmt 1 view .LVU2001
3312:Library/src/lcm32f06x_tim.c ****   /* Select the Capture Compare 1 and the Capture Compare 2 as input */
 6580              		.loc 1 3312 3 view .LVU2002
3314:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0;
 6581              		.loc 1 3314 3 view .LVU2003
3314:Library/src/lcm32f06x_tim.c ****   tmpccmr1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0;
 6582              		.loc 1 3314 12 is_stmt 0 view .LVU2004
 6583 0010 2640     		ands	r6, r4
 6584              	.LVL556:
3315:Library/src/lcm32f06x_tim.c ****   /* Set the TI1 and the TI2 Polarities */
 6585              		.loc 1 3315 3 is_stmt 1 view .LVU2005
3315:Library/src/lcm32f06x_tim.c ****   /* Set the TI1 and the TI2 Polarities */
ARM GAS  /tmp/ccWBHqpW.s 			page 200


 6586              		.loc 1 3315 12 is_stmt 0 view .LVU2006
 6587 0012 0224     		movs	r4, #2
 6588 0014 FF34     		adds	r4, r4, #255
 6589 0016 3443     		orrs	r4, r6
 6590              	.LVL557:
3317:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_IC1Polarity | (uint32_t)(TIM_IC2Polarity << (uint32_t)4));
 6591              		.loc 1 3317 3 is_stmt 1 view .LVU2007
3317:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_IC1Polarity | (uint32_t)(TIM_IC2Polarity << (uint32_t)4));
 6592              		.loc 1 3317 11 is_stmt 0 view .LVU2008
 6593 0018 AA26     		movs	r6, #170
3318:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6594              		.loc 1 3318 43 view .LVU2009
 6595 001a 1B01     		lsls	r3, r3, #4
 6596              	.LVL558:
3317:Library/src/lcm32f06x_tim.c ****   tmpccer |= (uint32_t)(TIM_IC1Polarity | (uint32_t)(TIM_IC2Polarity << (uint32_t)4));
 6597              		.loc 1 3317 11 view .LVU2010
 6598 001c B543     		bics	r5, r6
 6599              	.LVL559:
3318:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6600              		.loc 1 3318 3 is_stmt 1 view .LVU2011
3318:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6601              		.loc 1 3318 14 is_stmt 0 view .LVU2012
 6602 001e 1343     		orrs	r3, r2
3318:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx SMCR */
 6603              		.loc 1 3318 11 view .LVU2013
 6604 0020 2B43     		orrs	r3, r5
 6605              	.LVL560:
3320:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 */
 6606              		.loc 1 3320 3 is_stmt 1 view .LVU2014
3320:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCMR1 */
 6607              		.loc 1 3320 14 is_stmt 0 view .LVU2015
 6608 0022 8160     		str	r1, [r0, #8]
3322:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER */
 6609              		.loc 1 3322 3 is_stmt 1 view .LVU2016
3322:Library/src/lcm32f06x_tim.c ****   /* Write to TIMx CCER */
 6610              		.loc 1 3322 15 is_stmt 0 view .LVU2017
 6611 0024 8461     		str	r4, [r0, #24]
3324:Library/src/lcm32f06x_tim.c **** }
 6612              		.loc 1 3324 3 is_stmt 1 view .LVU2018
3324:Library/src/lcm32f06x_tim.c **** }
 6613              		.loc 1 3324 14 is_stmt 0 view .LVU2019
 6614 0026 0362     		str	r3, [r0, #32]
 6615              	.LVL561:
3325:Library/src/lcm32f06x_tim.c **** 
 6616              		.loc 1 3325 1 view .LVU2020
 6617 0028 F0BD     		pop	{r4, r5, r6, r7, pc}
 6618              	.L249:
 6619 002a C046     		.align	2
 6620              	.L248:
 6621 002c FCFCFFFF 		.word	-772
 6622              		.cfi_endproc
 6623              	.LFE149:
 6625              		.section	.text.TIM_SelectHallSensor,"ax",%progbits
 6626              		.align	1
 6627              		.p2align 2,,3
 6628              		.global	TIM_SelectHallSensor
 6629              		.syntax unified
ARM GAS  /tmp/ccWBHqpW.s 			page 201


 6630              		.code	16
 6631              		.thumb_func
 6633              	TIM_SelectHallSensor:
 6634              	.LVL562:
 6635              	.LFB150:
3340:Library/src/lcm32f06x_tim.c ****   /* Check the parameters */
 6636              		.loc 1 3340 1 is_stmt 1 view -0
 6637              		.cfi_startproc
 6638              		@ args = 0, pretend = 0, frame = 0
 6639              		@ frame_needed = 0, uses_anonymous_args = 0
 6640              		@ link register save eliminated.
3343:Library/src/lcm32f06x_tim.c ****   {
 6641              		.loc 1 3343 3 view .LVU2022
3346:Library/src/lcm32f06x_tim.c ****   }
 6642              		.loc 1 3346 15 is_stmt 0 view .LVU2023
 6643 0000 8022     		movs	r2, #128
3346:Library/src/lcm32f06x_tim.c ****   }
 6644              		.loc 1 3346 9 view .LVU2024
 6645 0002 4368     		ldr	r3, [r0, #4]
3343:Library/src/lcm32f06x_tim.c ****   {
 6646              		.loc 1 3343 6 view .LVU2025
 6647 0004 0029     		cmp	r1, #0
 6648 0006 02D0     		beq	.L251
3346:Library/src/lcm32f06x_tim.c ****   }
 6649              		.loc 1 3346 5 is_stmt 1 view .LVU2026
3346:Library/src/lcm32f06x_tim.c ****   }
 6650              		.loc 1 3346 15 is_stmt 0 view .LVU2027
 6651 0008 1343     		orrs	r3, r2
 6652 000a 4360     		str	r3, [r0, #4]
 6653              	.L250:
3353:Library/src/lcm32f06x_tim.c **** 
 6654              		.loc 1 3353 1 view .LVU2028
 6655              		@ sp needed
 6656 000c 7047     		bx	lr
 6657              	.L251:
3351:Library/src/lcm32f06x_tim.c ****   }
 6658              		.loc 1 3351 5 is_stmt 1 view .LVU2029
3351:Library/src/lcm32f06x_tim.c ****   }
 6659              		.loc 1 3351 15 is_stmt 0 view .LVU2030
 6660 000e 9343     		bics	r3, r2
 6661 0010 4360     		str	r3, [r0, #4]
3353:Library/src/lcm32f06x_tim.c **** 
 6662              		.loc 1 3353 1 view .LVU2031
 6663 0012 FBE7     		b	.L250
 6664              		.cfi_endproc
 6665              	.LFE150:
 6667              		.section	.text.TIM1_IntputSourceCfg,"ax",%progbits
 6668              		.align	1
 6669              		.p2align 2,,3
 6670              		.global	TIM1_IntputSourceCfg
 6671              		.syntax unified
 6672              		.code	16
 6673              		.thumb_func
 6675              	TIM1_IntputSourceCfg:
 6676              	.LVL563:
 6677              	.LFB156:
3572:Library/src/lcm32f06x_tim.c **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 202


3573:Library/src/lcm32f06x_tim.c **** 
3574:Library/src/lcm32f06x_tim.c **** /**
3575:Library/src/lcm32f06x_tim.c ****   * @name   TIM1_IntputSourceCfg
3576:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM1 external trigger input source configuration TIx ETRx.
3577:Library/src/lcm32f06x_tim.c ****   *         CN: TIM1外部触发输入源配置。
3578:Library/src/lcm32f06x_tim.c ****   * @param  TIx: 
3579:Library/src/lcm32f06x_tim.c ****   *         EN: External trigger input.
3580:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发输入TIx ETRx。
3581:Library/src/lcm32f06x_tim.c ****   * @param  TIM_IntputSource: 
3582:Library/src/lcm32f06x_tim.c ****   *         EN: TIx ETRx Input trigger source selection.
3583:Library/src/lcm32f06x_tim.c ****   *         CN: TIx ETRx 输入触发源选择。
3584:Library/src/lcm32f06x_tim.c ****   * @retval None
3585:Library/src/lcm32f06x_tim.c ****   */
3586:Library/src/lcm32f06x_tim.c **** void TIM1_IntputSourceCfg(uint32_t TIx, uint32_t TIM_IntputSource)
3587:Library/src/lcm32f06x_tim.c **** {
 6678              		.loc 1 3587 1 is_stmt 1 view -0
 6679              		.cfi_startproc
 6680              		@ args = 0, pretend = 0, frame = 0
 6681              		@ frame_needed = 0, uses_anonymous_args = 0
3588:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM1_INPUT_TI(TIx));
 6682              		.loc 1 3588 3 view .LVU2033
3589:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM1_IntputSource(TIM_IntputSource));
 6683              		.loc 1 3589 3 view .LVU2034
3590:Library/src/lcm32f06x_tim.c ****   sysctrl_access();
 6684              		.loc 1 3590 3 view .LVU2035
 6685              	.LBB532:
 6686              	.LBI532:
 6687              		.file 2 "Core/cmsis_gcc.h"
   1:Core/cmsis_gcc.h **** /**************************************************************************//**
   2:Core/cmsis_gcc.h ****  * @file     cmsis_gcc.h
   3:Core/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
   4:Core/cmsis_gcc.h ****  * @version  V5.4.1
   5:Core/cmsis_gcc.h ****  * @date     27. May 2021
   6:Core/cmsis_gcc.h ****  ******************************************************************************/
   7:Core/cmsis_gcc.h **** /*
   8:Core/cmsis_gcc.h ****  * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
   9:Core/cmsis_gcc.h ****  *
  10:Core/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
  11:Core/cmsis_gcc.h ****  *
  12:Core/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  13:Core/cmsis_gcc.h ****  * not use this file except in compliance with the License.
  14:Core/cmsis_gcc.h ****  * You may obtain a copy of the License at
  15:Core/cmsis_gcc.h ****  *
  16:Core/cmsis_gcc.h ****  * www.apache.org/licenses/LICENSE-2.0
  17:Core/cmsis_gcc.h ****  *
  18:Core/cmsis_gcc.h ****  * Unless required by applicable law or agreed to in writing, software
  19:Core/cmsis_gcc.h ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  20:Core/cmsis_gcc.h ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  21:Core/cmsis_gcc.h ****  * See the License for the specific language governing permissions and
  22:Core/cmsis_gcc.h ****  * limitations under the License.
  23:Core/cmsis_gcc.h ****  */
  24:Core/cmsis_gcc.h **** 
  25:Core/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
  26:Core/cmsis_gcc.h **** #define __CMSIS_GCC_H
  27:Core/cmsis_gcc.h **** 
  28:Core/cmsis_gcc.h **** /* ignore some GCC warnings */
  29:Core/cmsis_gcc.h **** #pragma GCC diagnostic push
ARM GAS  /tmp/ccWBHqpW.s 			page 203


  30:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
  31:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
  32:Core/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
  33:Core/cmsis_gcc.h **** 
  34:Core/cmsis_gcc.h **** /* Fallback for __has_builtin */
  35:Core/cmsis_gcc.h **** #ifndef __has_builtin
  36:Core/cmsis_gcc.h ****   #define __has_builtin(x) (0)
  37:Core/cmsis_gcc.h **** #endif
  38:Core/cmsis_gcc.h **** 
  39:Core/cmsis_gcc.h **** /* CMSIS compiler specific defines */
  40:Core/cmsis_gcc.h **** #ifndef   __ASM
  41:Core/cmsis_gcc.h ****   #define __ASM                                  __asm
  42:Core/cmsis_gcc.h **** #endif
  43:Core/cmsis_gcc.h **** #ifndef   __INLINE
  44:Core/cmsis_gcc.h ****   #define __INLINE                               inline
  45:Core/cmsis_gcc.h **** #endif
  46:Core/cmsis_gcc.h **** #ifndef   __STATIC_INLINE
  47:Core/cmsis_gcc.h ****   #define __STATIC_INLINE                        static inline
  48:Core/cmsis_gcc.h **** #endif
  49:Core/cmsis_gcc.h **** #ifndef   __STATIC_FORCEINLINE
  50:Core/cmsis_gcc.h ****   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
  51:Core/cmsis_gcc.h **** #endif
  52:Core/cmsis_gcc.h **** #ifndef   __NO_RETURN
  53:Core/cmsis_gcc.h ****   #define __NO_RETURN                            __attribute__((__noreturn__))
  54:Core/cmsis_gcc.h **** #endif
  55:Core/cmsis_gcc.h **** #ifndef   __USED
  56:Core/cmsis_gcc.h ****   #define __USED                                 __attribute__((used))
  57:Core/cmsis_gcc.h **** #endif
  58:Core/cmsis_gcc.h **** #ifndef   __WEAK
  59:Core/cmsis_gcc.h ****   #define __WEAK                                 __attribute__((weak))
  60:Core/cmsis_gcc.h **** #endif
  61:Core/cmsis_gcc.h **** #ifndef   __PACKED
  62:Core/cmsis_gcc.h ****   #define __PACKED                               __attribute__((packed, aligned(1)))
  63:Core/cmsis_gcc.h **** #endif
  64:Core/cmsis_gcc.h **** #ifndef   __PACKED_STRUCT
  65:Core/cmsis_gcc.h ****   #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
  66:Core/cmsis_gcc.h **** #endif
  67:Core/cmsis_gcc.h **** #ifndef   __PACKED_UNION
  68:Core/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
  69:Core/cmsis_gcc.h **** #endif
  70:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32        /* deprecated */
  71:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  72:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  73:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  74:Core/cmsis_gcc.h ****   struct __attribute__((packed)) T_UINT32 { uint32_t v; };
  75:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  76:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
  77:Core/cmsis_gcc.h **** #endif
  78:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_WRITE
  79:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  80:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  81:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  82:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
  83:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  84:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
  85:Core/cmsis_gcc.h **** #endif
  86:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_READ
ARM GAS  /tmp/ccWBHqpW.s 			page 204


  87:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  88:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  89:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  90:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
  91:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  92:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(add
  93:Core/cmsis_gcc.h **** #endif
  94:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_WRITE
  95:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
  96:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  97:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  98:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
  99:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 100:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
 101:Core/cmsis_gcc.h **** #endif
 102:Core/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_READ
 103:Core/cmsis_gcc.h ****   #pragma GCC diagnostic push
 104:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
 105:Core/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
 106:Core/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
 107:Core/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 108:Core/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(add
 109:Core/cmsis_gcc.h **** #endif
 110:Core/cmsis_gcc.h **** #ifndef   __ALIGNED
 111:Core/cmsis_gcc.h ****   #define __ALIGNED(x)                           __attribute__((aligned(x)))
 112:Core/cmsis_gcc.h **** #endif
 113:Core/cmsis_gcc.h **** #ifndef   __RESTRICT
 114:Core/cmsis_gcc.h ****   #define __RESTRICT                             __restrict
 115:Core/cmsis_gcc.h **** #endif
 116:Core/cmsis_gcc.h **** #ifndef   __COMPILER_BARRIER
 117:Core/cmsis_gcc.h ****   #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
 118:Core/cmsis_gcc.h **** #endif
 119:Core/cmsis_gcc.h **** 
 120:Core/cmsis_gcc.h **** /* #########################  Startup and Lowlevel Init  ######################## */
 121:Core/cmsis_gcc.h **** 
 122:Core/cmsis_gcc.h **** #ifndef __PROGRAM_START
 123:Core/cmsis_gcc.h **** 
 124:Core/cmsis_gcc.h **** /**
 125:Core/cmsis_gcc.h ****   \brief   Initializes data and bss sections
 126:Core/cmsis_gcc.h ****   \details This default implementations initialized all data and additional bss
 127:Core/cmsis_gcc.h ****            sections relying on .copy.table and .zero.table specified properly
 128:Core/cmsis_gcc.h ****            in the used linker script.
 129:Core/cmsis_gcc.h **** 
 130:Core/cmsis_gcc.h ****  */
 131:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
 132:Core/cmsis_gcc.h **** {
 133:Core/cmsis_gcc.h ****   extern void _start(void) __NO_RETURN;
 134:Core/cmsis_gcc.h **** 
 135:Core/cmsis_gcc.h ****   typedef struct {
 136:Core/cmsis_gcc.h ****     uint32_t const* src;
 137:Core/cmsis_gcc.h ****     uint32_t* dest;
 138:Core/cmsis_gcc.h ****     uint32_t  wlen;
 139:Core/cmsis_gcc.h ****   } __copy_table_t;
 140:Core/cmsis_gcc.h **** 
 141:Core/cmsis_gcc.h ****   typedef struct {
 142:Core/cmsis_gcc.h ****     uint32_t* dest;
 143:Core/cmsis_gcc.h ****     uint32_t  wlen;
ARM GAS  /tmp/ccWBHqpW.s 			page 205


 144:Core/cmsis_gcc.h ****   } __zero_table_t;
 145:Core/cmsis_gcc.h **** 
 146:Core/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_start__;
 147:Core/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_end__;
 148:Core/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_start__;
 149:Core/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_end__;
 150:Core/cmsis_gcc.h **** 
 151:Core/cmsis_gcc.h ****   for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
 152:Core/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 153:Core/cmsis_gcc.h ****       pTable->dest[i] = pTable->src[i];
 154:Core/cmsis_gcc.h ****     }
 155:Core/cmsis_gcc.h ****   }
 156:Core/cmsis_gcc.h **** 
 157:Core/cmsis_gcc.h ****   for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
 158:Core/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 159:Core/cmsis_gcc.h ****       pTable->dest[i] = 0u;
 160:Core/cmsis_gcc.h ****     }
 161:Core/cmsis_gcc.h ****   }
 162:Core/cmsis_gcc.h **** 
 163:Core/cmsis_gcc.h ****   _start();
 164:Core/cmsis_gcc.h **** }
 165:Core/cmsis_gcc.h **** 
 166:Core/cmsis_gcc.h **** #define __PROGRAM_START           __cmsis_start
 167:Core/cmsis_gcc.h **** #endif
 168:Core/cmsis_gcc.h **** 
 169:Core/cmsis_gcc.h **** #ifndef __INITIAL_SP
 170:Core/cmsis_gcc.h **** #define __INITIAL_SP              __StackTop
 171:Core/cmsis_gcc.h **** #endif
 172:Core/cmsis_gcc.h **** 
 173:Core/cmsis_gcc.h **** #ifndef __STACK_LIMIT
 174:Core/cmsis_gcc.h **** #define __STACK_LIMIT             __StackLimit
 175:Core/cmsis_gcc.h **** #endif
 176:Core/cmsis_gcc.h **** 
 177:Core/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
 178:Core/cmsis_gcc.h **** #define __VECTOR_TABLE            __Vectors
 179:Core/cmsis_gcc.h **** #endif
 180:Core/cmsis_gcc.h **** 
 181:Core/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
 182:Core/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section(".vectors")))
 183:Core/cmsis_gcc.h **** #endif
 184:Core/cmsis_gcc.h **** 
 185:Core/cmsis_gcc.h **** #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 186:Core/cmsis_gcc.h **** #ifndef __STACK_SEAL
 187:Core/cmsis_gcc.h **** #define __STACK_SEAL              __StackSeal
 188:Core/cmsis_gcc.h **** #endif
 189:Core/cmsis_gcc.h **** 
 190:Core/cmsis_gcc.h **** #ifndef __TZ_STACK_SEAL_SIZE
 191:Core/cmsis_gcc.h **** #define __TZ_STACK_SEAL_SIZE      8U
 192:Core/cmsis_gcc.h **** #endif
 193:Core/cmsis_gcc.h **** 
 194:Core/cmsis_gcc.h **** #ifndef __TZ_STACK_SEAL_VALUE
 195:Core/cmsis_gcc.h **** #define __TZ_STACK_SEAL_VALUE     0xFEF5EDA5FEF5EDA5ULL
 196:Core/cmsis_gcc.h **** #endif
 197:Core/cmsis_gcc.h **** 
 198:Core/cmsis_gcc.h **** 
 199:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
 200:Core/cmsis_gcc.h ****   *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE;
ARM GAS  /tmp/ccWBHqpW.s 			page 206


 201:Core/cmsis_gcc.h **** }
 202:Core/cmsis_gcc.h **** #endif
 203:Core/cmsis_gcc.h **** 
 204:Core/cmsis_gcc.h **** 
 205:Core/cmsis_gcc.h **** /* ##########################  Core Instruction Access  ######################### */
 206:Core/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
 207:Core/cmsis_gcc.h ****   Access to dedicated instructions
 208:Core/cmsis_gcc.h ****   @{
 209:Core/cmsis_gcc.h **** */
 210:Core/cmsis_gcc.h **** 
 211:Core/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
 212:Core/cmsis_gcc.h ****  * For thumb1, use low register (r0-r7), specified by constraint "l"
 213:Core/cmsis_gcc.h ****  * Otherwise, use general registers, specified by constraint "r" */
 214:Core/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
 215:Core/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
 216:Core/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
 217:Core/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
 218:Core/cmsis_gcc.h **** #else
 219:Core/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
 220:Core/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
 221:Core/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
 222:Core/cmsis_gcc.h **** #endif
 223:Core/cmsis_gcc.h **** 
 224:Core/cmsis_gcc.h **** /**
 225:Core/cmsis_gcc.h ****   \brief   No Operation
 226:Core/cmsis_gcc.h ****   \details No Operation does nothing. This instruction can be used for code alignment purposes.
 227:Core/cmsis_gcc.h ****  */
 228:Core/cmsis_gcc.h **** #define __NOP()                             __ASM volatile ("nop")
 229:Core/cmsis_gcc.h **** 
 230:Core/cmsis_gcc.h **** /**
 231:Core/cmsis_gcc.h ****   \brief   Wait For Interrupt
 232:Core/cmsis_gcc.h ****   \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
 233:Core/cmsis_gcc.h ****  */
 234:Core/cmsis_gcc.h **** #define __WFI()                             __ASM volatile ("wfi":::"memory")
 235:Core/cmsis_gcc.h **** 
 236:Core/cmsis_gcc.h **** 
 237:Core/cmsis_gcc.h **** /**
 238:Core/cmsis_gcc.h ****   \brief   Wait For Event
 239:Core/cmsis_gcc.h ****   \details Wait For Event is a hint instruction that permits the processor to enter
 240:Core/cmsis_gcc.h ****            a low-power state until one of a number of events occurs.
 241:Core/cmsis_gcc.h ****  */
 242:Core/cmsis_gcc.h **** #define __WFE()                             __ASM volatile ("wfe":::"memory")
 243:Core/cmsis_gcc.h **** 
 244:Core/cmsis_gcc.h **** 
 245:Core/cmsis_gcc.h **** /**
 246:Core/cmsis_gcc.h ****   \brief   Send Event
 247:Core/cmsis_gcc.h ****   \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
 248:Core/cmsis_gcc.h ****  */
 249:Core/cmsis_gcc.h **** #define __SEV()                             __ASM volatile ("sev")
 250:Core/cmsis_gcc.h **** 
 251:Core/cmsis_gcc.h **** 
 252:Core/cmsis_gcc.h **** /**
 253:Core/cmsis_gcc.h ****   \brief   Instruction Synchronization Barrier
 254:Core/cmsis_gcc.h ****   \details Instruction Synchronization Barrier flushes the pipeline in the processor,
 255:Core/cmsis_gcc.h ****            so that all instructions following the ISB are fetched from cache or memory,
 256:Core/cmsis_gcc.h ****            after the instruction has been completed.
 257:Core/cmsis_gcc.h ****  */
ARM GAS  /tmp/ccWBHqpW.s 			page 207


 258:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
 6688              		.loc 2 258 27 view .LVU2036
 6689              	.LBB533:
 259:Core/cmsis_gcc.h **** {
 260:Core/cmsis_gcc.h ****   __ASM volatile ("isb 0xF":::"memory");
 6690              		.loc 2 260 3 view .LVU2037
 6691              	.LBE533:
 6692              	.LBE532:
3587:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM1_INPUT_TI(TIx));
 6693              		.loc 1 3587 1 is_stmt 0 view .LVU2038
 6694 0000 10B5     		push	{r4, lr}
 6695              	.LCFI18:
 6696              		.cfi_def_cfa_offset 8
 6697              		.cfi_offset 4, -8
 6698              		.cfi_offset 14, -4
 6699              	.LBB535:
 6700              	.LBB534:
 6701              		.loc 2 260 3 view .LVU2039
 6702              		.syntax divided
 6703              	@ 260 "Core/cmsis_gcc.h" 1
 6704 0002 BFF36F8F 		isb 0xF
 6705              	@ 0 "" 2
 6706              		.thumb
 6707              		.syntax unified
 6708              	.LBE534:
 6709              	.LBE535:
 6710              		.loc 1 3590 3 is_stmt 1 discriminator 1 view .LVU2040
 6711              	.LBB536:
 6712              	.LBI536:
 261:Core/cmsis_gcc.h **** }
 262:Core/cmsis_gcc.h **** 
 263:Core/cmsis_gcc.h **** 
 264:Core/cmsis_gcc.h **** /**
 265:Core/cmsis_gcc.h ****   \brief   Data Synchronization Barrier
 266:Core/cmsis_gcc.h ****   \details Acts as a special kind of Data Memory Barrier.
 267:Core/cmsis_gcc.h ****            It completes when all explicit memory accesses before this instruction complete.
 268:Core/cmsis_gcc.h ****  */
 269:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
 270:Core/cmsis_gcc.h **** {
 271:Core/cmsis_gcc.h ****   __ASM volatile ("dsb 0xF":::"memory");
 272:Core/cmsis_gcc.h **** }
 273:Core/cmsis_gcc.h **** 
 274:Core/cmsis_gcc.h **** 
 275:Core/cmsis_gcc.h **** /**
 276:Core/cmsis_gcc.h ****   \brief   Data Memory Barrier
 277:Core/cmsis_gcc.h ****   \details Ensures the apparent order of the explicit memory operations before
 278:Core/cmsis_gcc.h ****            and after the instruction, without ensuring their completion.
 279:Core/cmsis_gcc.h ****  */
 280:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
 281:Core/cmsis_gcc.h **** {
 282:Core/cmsis_gcc.h ****   __ASM volatile ("dmb 0xF":::"memory");
 283:Core/cmsis_gcc.h **** }
 284:Core/cmsis_gcc.h **** 
 285:Core/cmsis_gcc.h **** 
 286:Core/cmsis_gcc.h **** /**
 287:Core/cmsis_gcc.h ****   \brief   Reverse byte order (32 bit)
 288:Core/cmsis_gcc.h ****   \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
ARM GAS  /tmp/ccWBHqpW.s 			page 208


 289:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 290:Core/cmsis_gcc.h ****   \return               Reversed value
 291:Core/cmsis_gcc.h ****  */
 292:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
 293:Core/cmsis_gcc.h **** {
 294:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
 295:Core/cmsis_gcc.h ****   return __builtin_bswap32(value);
 296:Core/cmsis_gcc.h **** #else
 297:Core/cmsis_gcc.h ****   uint32_t result;
 298:Core/cmsis_gcc.h **** 
 299:Core/cmsis_gcc.h ****   __ASM ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 300:Core/cmsis_gcc.h ****   return result;
 301:Core/cmsis_gcc.h **** #endif
 302:Core/cmsis_gcc.h **** }
 303:Core/cmsis_gcc.h **** 
 304:Core/cmsis_gcc.h **** 
 305:Core/cmsis_gcc.h **** /**
 306:Core/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 307:Core/cmsis_gcc.h ****   \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 
 308:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 309:Core/cmsis_gcc.h ****   \return               Reversed value
 310:Core/cmsis_gcc.h ****  */
 311:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
 312:Core/cmsis_gcc.h **** {
 313:Core/cmsis_gcc.h ****   uint32_t result;
 314:Core/cmsis_gcc.h **** 
 315:Core/cmsis_gcc.h ****   __ASM ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 316:Core/cmsis_gcc.h ****   return result;
 317:Core/cmsis_gcc.h **** }
 318:Core/cmsis_gcc.h **** 
 319:Core/cmsis_gcc.h **** 
 320:Core/cmsis_gcc.h **** /**
 321:Core/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 322:Core/cmsis_gcc.h ****   \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
 323:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 324:Core/cmsis_gcc.h ****   \return               Reversed value
 325:Core/cmsis_gcc.h ****  */
 326:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
 327:Core/cmsis_gcc.h **** {
 328:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 329:Core/cmsis_gcc.h ****   return (int16_t)__builtin_bswap16(value);
 330:Core/cmsis_gcc.h **** #else
 331:Core/cmsis_gcc.h ****   int16_t result;
 332:Core/cmsis_gcc.h **** 
 333:Core/cmsis_gcc.h ****   __ASM ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 334:Core/cmsis_gcc.h ****   return result;
 335:Core/cmsis_gcc.h **** #endif
 336:Core/cmsis_gcc.h **** }
 337:Core/cmsis_gcc.h **** 
 338:Core/cmsis_gcc.h **** 
 339:Core/cmsis_gcc.h **** /**
 340:Core/cmsis_gcc.h ****   \brief   Rotate Right in unsigned value (32 bit)
 341:Core/cmsis_gcc.h ****   \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
 342:Core/cmsis_gcc.h ****   \param [in]    op1  Value to rotate
 343:Core/cmsis_gcc.h ****   \param [in]    op2  Number of Bits to rotate
 344:Core/cmsis_gcc.h ****   \return               Rotated value
 345:Core/cmsis_gcc.h ****  */
ARM GAS  /tmp/ccWBHqpW.s 			page 209


 346:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
 347:Core/cmsis_gcc.h **** {
 348:Core/cmsis_gcc.h ****   op2 %= 32U;
 349:Core/cmsis_gcc.h ****   if (op2 == 0U)
 350:Core/cmsis_gcc.h ****   {
 351:Core/cmsis_gcc.h ****     return op1;
 352:Core/cmsis_gcc.h ****   }
 353:Core/cmsis_gcc.h ****   return (op1 >> op2) | (op1 << (32U - op2));
 354:Core/cmsis_gcc.h **** }
 355:Core/cmsis_gcc.h **** 
 356:Core/cmsis_gcc.h **** 
 357:Core/cmsis_gcc.h **** /**
 358:Core/cmsis_gcc.h ****   \brief   Breakpoint
 359:Core/cmsis_gcc.h ****   \details Causes the processor to enter Debug state.
 360:Core/cmsis_gcc.h ****            Debug tools can use this to investigate system state when the instruction at a particula
 361:Core/cmsis_gcc.h ****   \param [in]    value  is ignored by the processor.
 362:Core/cmsis_gcc.h ****                  If required, a debugger can use it to store additional information about the break
 363:Core/cmsis_gcc.h ****  */
 364:Core/cmsis_gcc.h **** #define __BKPT(value)                       __ASM volatile ("bkpt "#value)
 365:Core/cmsis_gcc.h **** 
 366:Core/cmsis_gcc.h **** 
 367:Core/cmsis_gcc.h **** /**
 368:Core/cmsis_gcc.h ****   \brief   Reverse bit order of value
 369:Core/cmsis_gcc.h ****   \details Reverses the bit order of the given value.
 370:Core/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 371:Core/cmsis_gcc.h ****   \return               Reversed value
 372:Core/cmsis_gcc.h ****  */
 373:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
 374:Core/cmsis_gcc.h **** {
 375:Core/cmsis_gcc.h ****   uint32_t result;
 376:Core/cmsis_gcc.h **** 
 377:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 378:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 379:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
 380:Core/cmsis_gcc.h ****    __ASM ("rbit %0, %1" : "=r" (result) : "r" (value) );
 381:Core/cmsis_gcc.h **** #else
 382:Core/cmsis_gcc.h ****   uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
 383:Core/cmsis_gcc.h **** 
 384:Core/cmsis_gcc.h ****   result = value;                      /* r will be reversed bits of v; first get LSB of v */
 385:Core/cmsis_gcc.h ****   for (value >>= 1U; value != 0U; value >>= 1U)
 386:Core/cmsis_gcc.h ****   {
 387:Core/cmsis_gcc.h ****     result <<= 1U;
 388:Core/cmsis_gcc.h ****     result |= value & 1U;
 389:Core/cmsis_gcc.h ****     s--;
 390:Core/cmsis_gcc.h ****   }
 391:Core/cmsis_gcc.h ****   result <<= s;                        /* shift when v's highest bits are zero */
 392:Core/cmsis_gcc.h **** #endif
 393:Core/cmsis_gcc.h ****   return result;
 394:Core/cmsis_gcc.h **** }
 395:Core/cmsis_gcc.h **** 
 396:Core/cmsis_gcc.h **** 
 397:Core/cmsis_gcc.h **** /**
 398:Core/cmsis_gcc.h ****   \brief   Count leading zeros
 399:Core/cmsis_gcc.h ****   \details Counts the number of leading zeros of a data value.
 400:Core/cmsis_gcc.h ****   \param [in]  value  Value to count the leading zeros
 401:Core/cmsis_gcc.h ****   \return             number of leading zeros in value
 402:Core/cmsis_gcc.h ****  */
ARM GAS  /tmp/ccWBHqpW.s 			page 210


 403:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
 404:Core/cmsis_gcc.h **** {
 405:Core/cmsis_gcc.h ****   /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
 406:Core/cmsis_gcc.h ****      __builtin_clz(0) is undefined behaviour, so handle this case specially.
 407:Core/cmsis_gcc.h ****      This guarantees ARM-compatible results if happening to compile on a non-ARM
 408:Core/cmsis_gcc.h ****      target, and ensures the compiler doesn't decide to activate any
 409:Core/cmsis_gcc.h ****      optimisations using the logic "value was passed to __builtin_clz, so it
 410:Core/cmsis_gcc.h ****      is non-zero".
 411:Core/cmsis_gcc.h ****      ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
 412:Core/cmsis_gcc.h ****      single CLZ instruction.
 413:Core/cmsis_gcc.h ****    */
 414:Core/cmsis_gcc.h ****   if (value == 0U)
 415:Core/cmsis_gcc.h ****   {
 416:Core/cmsis_gcc.h ****     return 32U;
 417:Core/cmsis_gcc.h ****   }
 418:Core/cmsis_gcc.h ****   return __builtin_clz(value);
 419:Core/cmsis_gcc.h **** }
 420:Core/cmsis_gcc.h **** 
 421:Core/cmsis_gcc.h **** 
 422:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 423:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 424:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 425:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
 426:Core/cmsis_gcc.h **** /**
 427:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (8 bit)
 428:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 8 bit value.
 429:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 430:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 431:Core/cmsis_gcc.h ****  */
 432:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
 433:Core/cmsis_gcc.h **** {
 434:Core/cmsis_gcc.h ****     uint32_t result;
 435:Core/cmsis_gcc.h **** 
 436:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 437:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
 438:Core/cmsis_gcc.h **** #else
 439:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 440:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 441:Core/cmsis_gcc.h ****     */
 442:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
 443:Core/cmsis_gcc.h **** #endif
 444:Core/cmsis_gcc.h ****    return ((uint8_t) result);    /* Add explicit type cast here */
 445:Core/cmsis_gcc.h **** }
 446:Core/cmsis_gcc.h **** 
 447:Core/cmsis_gcc.h **** 
 448:Core/cmsis_gcc.h **** /**
 449:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (16 bit)
 450:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 16 bit values.
 451:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 452:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 453:Core/cmsis_gcc.h ****  */
 454:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
 455:Core/cmsis_gcc.h **** {
 456:Core/cmsis_gcc.h ****     uint32_t result;
 457:Core/cmsis_gcc.h **** 
 458:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 459:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
ARM GAS  /tmp/ccWBHqpW.s 			page 211


 460:Core/cmsis_gcc.h **** #else
 461:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 462:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 463:Core/cmsis_gcc.h ****     */
 464:Core/cmsis_gcc.h ****    __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
 465:Core/cmsis_gcc.h **** #endif
 466:Core/cmsis_gcc.h ****    return ((uint16_t) result);    /* Add explicit type cast here */
 467:Core/cmsis_gcc.h **** }
 468:Core/cmsis_gcc.h **** 
 469:Core/cmsis_gcc.h **** 
 470:Core/cmsis_gcc.h **** /**
 471:Core/cmsis_gcc.h ****   \brief   LDR Exclusive (32 bit)
 472:Core/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 32 bit values.
 473:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 474:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 475:Core/cmsis_gcc.h ****  */
 476:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
 477:Core/cmsis_gcc.h **** {
 478:Core/cmsis_gcc.h ****     uint32_t result;
 479:Core/cmsis_gcc.h **** 
 480:Core/cmsis_gcc.h ****    __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 481:Core/cmsis_gcc.h ****    return(result);
 482:Core/cmsis_gcc.h **** }
 483:Core/cmsis_gcc.h **** 
 484:Core/cmsis_gcc.h **** 
 485:Core/cmsis_gcc.h **** /**
 486:Core/cmsis_gcc.h ****   \brief   STR Exclusive (8 bit)
 487:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 8 bit values.
 488:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 489:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 490:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 491:Core/cmsis_gcc.h ****   \return          1  Function failed
 492:Core/cmsis_gcc.h ****  */
 493:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
 494:Core/cmsis_gcc.h **** {
 495:Core/cmsis_gcc.h ****    uint32_t result;
 496:Core/cmsis_gcc.h **** 
 497:Core/cmsis_gcc.h ****    __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
 498:Core/cmsis_gcc.h ****    return(result);
 499:Core/cmsis_gcc.h **** }
 500:Core/cmsis_gcc.h **** 
 501:Core/cmsis_gcc.h **** 
 502:Core/cmsis_gcc.h **** /**
 503:Core/cmsis_gcc.h ****   \brief   STR Exclusive (16 bit)
 504:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 16 bit values.
 505:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 506:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 507:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 508:Core/cmsis_gcc.h ****   \return          1  Function failed
 509:Core/cmsis_gcc.h ****  */
 510:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
 511:Core/cmsis_gcc.h **** {
 512:Core/cmsis_gcc.h ****    uint32_t result;
 513:Core/cmsis_gcc.h **** 
 514:Core/cmsis_gcc.h ****    __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
 515:Core/cmsis_gcc.h ****    return(result);
 516:Core/cmsis_gcc.h **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 212


 517:Core/cmsis_gcc.h **** 
 518:Core/cmsis_gcc.h **** 
 519:Core/cmsis_gcc.h **** /**
 520:Core/cmsis_gcc.h ****   \brief   STR Exclusive (32 bit)
 521:Core/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 32 bit values.
 522:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 523:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 524:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 525:Core/cmsis_gcc.h ****   \return          1  Function failed
 526:Core/cmsis_gcc.h ****  */
 527:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
 528:Core/cmsis_gcc.h **** {
 529:Core/cmsis_gcc.h ****    uint32_t result;
 530:Core/cmsis_gcc.h **** 
 531:Core/cmsis_gcc.h ****    __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 532:Core/cmsis_gcc.h ****    return(result);
 533:Core/cmsis_gcc.h **** }
 534:Core/cmsis_gcc.h **** 
 535:Core/cmsis_gcc.h **** 
 536:Core/cmsis_gcc.h **** /**
 537:Core/cmsis_gcc.h ****   \brief   Remove the exclusive lock
 538:Core/cmsis_gcc.h ****   \details Removes the exclusive lock which is created by LDREX.
 539:Core/cmsis_gcc.h ****  */
 540:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void)
 541:Core/cmsis_gcc.h **** {
 542:Core/cmsis_gcc.h ****   __ASM volatile ("clrex" ::: "memory");
 543:Core/cmsis_gcc.h **** }
 544:Core/cmsis_gcc.h **** 
 545:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 546:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 547:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 548:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 549:Core/cmsis_gcc.h **** 
 550:Core/cmsis_gcc.h **** 
 551:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 552:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 553:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
 554:Core/cmsis_gcc.h **** /**
 555:Core/cmsis_gcc.h ****   \brief   Signed Saturate
 556:Core/cmsis_gcc.h ****   \details Saturates a signed value.
 557:Core/cmsis_gcc.h ****   \param [in]  ARG1  Value to be saturated
 558:Core/cmsis_gcc.h ****   \param [in]  ARG2  Bit position to saturate to (1..32)
 559:Core/cmsis_gcc.h ****   \return             Saturated value
 560:Core/cmsis_gcc.h ****  */
 561:Core/cmsis_gcc.h **** #define __SSAT(ARG1, ARG2) \
 562:Core/cmsis_gcc.h **** __extension__ \
 563:Core/cmsis_gcc.h **** ({                          \
 564:Core/cmsis_gcc.h ****   int32_t __RES, __ARG1 = (ARG1); \
 565:Core/cmsis_gcc.h ****   __ASM volatile ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
 566:Core/cmsis_gcc.h ****   __RES; \
 567:Core/cmsis_gcc.h ****  })
 568:Core/cmsis_gcc.h **** 
 569:Core/cmsis_gcc.h **** 
 570:Core/cmsis_gcc.h **** /**
 571:Core/cmsis_gcc.h ****   \brief   Unsigned Saturate
 572:Core/cmsis_gcc.h ****   \details Saturates an unsigned value.
 573:Core/cmsis_gcc.h ****   \param [in]  ARG1  Value to be saturated
ARM GAS  /tmp/ccWBHqpW.s 			page 213


 574:Core/cmsis_gcc.h ****   \param [in]  ARG2  Bit position to saturate to (0..31)
 575:Core/cmsis_gcc.h ****   \return             Saturated value
 576:Core/cmsis_gcc.h ****  */
 577:Core/cmsis_gcc.h **** #define __USAT(ARG1, ARG2) \
 578:Core/cmsis_gcc.h **** __extension__ \
 579:Core/cmsis_gcc.h **** ({                          \
 580:Core/cmsis_gcc.h ****   uint32_t __RES, __ARG1 = (ARG1); \
 581:Core/cmsis_gcc.h ****   __ASM volatile ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
 582:Core/cmsis_gcc.h ****   __RES; \
 583:Core/cmsis_gcc.h ****  })
 584:Core/cmsis_gcc.h **** 
 585:Core/cmsis_gcc.h **** 
 586:Core/cmsis_gcc.h **** /**
 587:Core/cmsis_gcc.h ****   \brief   Rotate Right with Extend (32 bit)
 588:Core/cmsis_gcc.h ****   \details Moves each bit of a bitstring right by one bit.
 589:Core/cmsis_gcc.h ****            The carry input is shifted in at the left end of the bitstring.
 590:Core/cmsis_gcc.h ****   \param [in]    value  Value to rotate
 591:Core/cmsis_gcc.h ****   \return               Rotated value
 592:Core/cmsis_gcc.h ****  */
 593:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
 594:Core/cmsis_gcc.h **** {
 595:Core/cmsis_gcc.h ****   uint32_t result;
 596:Core/cmsis_gcc.h **** 
 597:Core/cmsis_gcc.h ****   __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 598:Core/cmsis_gcc.h ****   return(result);
 599:Core/cmsis_gcc.h **** }
 600:Core/cmsis_gcc.h **** 
 601:Core/cmsis_gcc.h **** 
 602:Core/cmsis_gcc.h **** /**
 603:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (8 bit)
 604:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 8 bit value.
 605:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 606:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 607:Core/cmsis_gcc.h ****  */
 608:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
 609:Core/cmsis_gcc.h **** {
 610:Core/cmsis_gcc.h ****     uint32_t result;
 611:Core/cmsis_gcc.h **** 
 612:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 613:Core/cmsis_gcc.h ****    __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
 614:Core/cmsis_gcc.h **** #else
 615:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 616:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 617:Core/cmsis_gcc.h ****     */
 618:Core/cmsis_gcc.h ****    __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
 619:Core/cmsis_gcc.h **** #endif
 620:Core/cmsis_gcc.h ****    return ((uint8_t) result);    /* Add explicit type cast here */
 621:Core/cmsis_gcc.h **** }
 622:Core/cmsis_gcc.h **** 
 623:Core/cmsis_gcc.h **** 
 624:Core/cmsis_gcc.h **** /**
 625:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (16 bit)
 626:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 16 bit values.
 627:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 628:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 629:Core/cmsis_gcc.h ****  */
 630:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
ARM GAS  /tmp/ccWBHqpW.s 			page 214


 631:Core/cmsis_gcc.h **** {
 632:Core/cmsis_gcc.h ****     uint32_t result;
 633:Core/cmsis_gcc.h **** 
 634:Core/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 635:Core/cmsis_gcc.h ****    __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
 636:Core/cmsis_gcc.h **** #else
 637:Core/cmsis_gcc.h ****     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
 638:Core/cmsis_gcc.h ****        accepted by assembler. So has to use following less efficient pattern.
 639:Core/cmsis_gcc.h ****     */
 640:Core/cmsis_gcc.h ****    __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
 641:Core/cmsis_gcc.h **** #endif
 642:Core/cmsis_gcc.h ****    return ((uint16_t) result);    /* Add explicit type cast here */
 643:Core/cmsis_gcc.h **** }
 644:Core/cmsis_gcc.h **** 
 645:Core/cmsis_gcc.h **** 
 646:Core/cmsis_gcc.h **** /**
 647:Core/cmsis_gcc.h ****   \brief   LDRT Unprivileged (32 bit)
 648:Core/cmsis_gcc.h ****   \details Executes a Unprivileged LDRT instruction for 32 bit values.
 649:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 650:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 651:Core/cmsis_gcc.h ****  */
 652:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
 653:Core/cmsis_gcc.h **** {
 654:Core/cmsis_gcc.h ****     uint32_t result;
 655:Core/cmsis_gcc.h **** 
 656:Core/cmsis_gcc.h ****    __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
 657:Core/cmsis_gcc.h ****    return(result);
 658:Core/cmsis_gcc.h **** }
 659:Core/cmsis_gcc.h **** 
 660:Core/cmsis_gcc.h **** 
 661:Core/cmsis_gcc.h **** /**
 662:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (8 bit)
 663:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 8 bit values.
 664:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 665:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 666:Core/cmsis_gcc.h ****  */
 667:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
 668:Core/cmsis_gcc.h **** {
 669:Core/cmsis_gcc.h ****    __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
 670:Core/cmsis_gcc.h **** }
 671:Core/cmsis_gcc.h **** 
 672:Core/cmsis_gcc.h **** 
 673:Core/cmsis_gcc.h **** /**
 674:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (16 bit)
 675:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 16 bit values.
 676:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 677:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 678:Core/cmsis_gcc.h ****  */
 679:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
 680:Core/cmsis_gcc.h **** {
 681:Core/cmsis_gcc.h ****    __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
 682:Core/cmsis_gcc.h **** }
 683:Core/cmsis_gcc.h **** 
 684:Core/cmsis_gcc.h **** 
 685:Core/cmsis_gcc.h **** /**
 686:Core/cmsis_gcc.h ****   \brief   STRT Unprivileged (32 bit)
 687:Core/cmsis_gcc.h ****   \details Executes a Unprivileged STRT instruction for 32 bit values.
ARM GAS  /tmp/ccWBHqpW.s 			page 215


 688:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 689:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 690:Core/cmsis_gcc.h ****  */
 691:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
 692:Core/cmsis_gcc.h **** {
 693:Core/cmsis_gcc.h ****    __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
 694:Core/cmsis_gcc.h **** }
 695:Core/cmsis_gcc.h **** 
 696:Core/cmsis_gcc.h **** #else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 697:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 698:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 699:Core/cmsis_gcc.h **** 
 700:Core/cmsis_gcc.h **** /**
 701:Core/cmsis_gcc.h ****   \brief   Signed Saturate
 702:Core/cmsis_gcc.h ****   \details Saturates a signed value.
 703:Core/cmsis_gcc.h ****   \param [in]  value  Value to be saturated
 704:Core/cmsis_gcc.h ****   \param [in]    sat  Bit position to saturate to (1..32)
 705:Core/cmsis_gcc.h ****   \return             Saturated value
 706:Core/cmsis_gcc.h ****  */
 707:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
 708:Core/cmsis_gcc.h **** {
 709:Core/cmsis_gcc.h ****   if ((sat >= 1U) && (sat <= 32U))
 710:Core/cmsis_gcc.h ****   {
 711:Core/cmsis_gcc.h ****     const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
 712:Core/cmsis_gcc.h ****     const int32_t min = -1 - max ;
 713:Core/cmsis_gcc.h ****     if (val > max)
 714:Core/cmsis_gcc.h ****     {
 715:Core/cmsis_gcc.h ****       return max;
 716:Core/cmsis_gcc.h ****     }
 717:Core/cmsis_gcc.h ****     else if (val < min)
 718:Core/cmsis_gcc.h ****     {
 719:Core/cmsis_gcc.h ****       return min;
 720:Core/cmsis_gcc.h ****     }
 721:Core/cmsis_gcc.h ****   }
 722:Core/cmsis_gcc.h ****   return val;
 723:Core/cmsis_gcc.h **** }
 724:Core/cmsis_gcc.h **** 
 725:Core/cmsis_gcc.h **** /**
 726:Core/cmsis_gcc.h ****   \brief   Unsigned Saturate
 727:Core/cmsis_gcc.h ****   \details Saturates an unsigned value.
 728:Core/cmsis_gcc.h ****   \param [in]  value  Value to be saturated
 729:Core/cmsis_gcc.h ****   \param [in]    sat  Bit position to saturate to (0..31)
 730:Core/cmsis_gcc.h ****   \return             Saturated value
 731:Core/cmsis_gcc.h ****  */
 732:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
 733:Core/cmsis_gcc.h **** {
 734:Core/cmsis_gcc.h ****   if (sat <= 31U)
 735:Core/cmsis_gcc.h ****   {
 736:Core/cmsis_gcc.h ****     const uint32_t max = ((1U << sat) - 1U);
 737:Core/cmsis_gcc.h ****     if (val > (int32_t)max)
 738:Core/cmsis_gcc.h ****     {
 739:Core/cmsis_gcc.h ****       return max;
 740:Core/cmsis_gcc.h ****     }
 741:Core/cmsis_gcc.h ****     else if (val < 0)
 742:Core/cmsis_gcc.h ****     {
 743:Core/cmsis_gcc.h ****       return 0U;
 744:Core/cmsis_gcc.h ****     }
ARM GAS  /tmp/ccWBHqpW.s 			page 216


 745:Core/cmsis_gcc.h ****   }
 746:Core/cmsis_gcc.h ****   return (uint32_t)val;
 747:Core/cmsis_gcc.h **** }
 748:Core/cmsis_gcc.h **** 
 749:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 750:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 751:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 752:Core/cmsis_gcc.h **** 
 753:Core/cmsis_gcc.h **** 
 754:Core/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 755:Core/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
 756:Core/cmsis_gcc.h **** /**
 757:Core/cmsis_gcc.h ****   \brief   Load-Acquire (8 bit)
 758:Core/cmsis_gcc.h ****   \details Executes a LDAB instruction for 8 bit value.
 759:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 760:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 761:Core/cmsis_gcc.h ****  */
 762:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
 763:Core/cmsis_gcc.h **** {
 764:Core/cmsis_gcc.h ****     uint32_t result;
 765:Core/cmsis_gcc.h **** 
 766:Core/cmsis_gcc.h ****    __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 767:Core/cmsis_gcc.h ****    return ((uint8_t) result);
 768:Core/cmsis_gcc.h **** }
 769:Core/cmsis_gcc.h **** 
 770:Core/cmsis_gcc.h **** 
 771:Core/cmsis_gcc.h **** /**
 772:Core/cmsis_gcc.h ****   \brief   Load-Acquire (16 bit)
 773:Core/cmsis_gcc.h ****   \details Executes a LDAH instruction for 16 bit values.
 774:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 775:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 776:Core/cmsis_gcc.h ****  */
 777:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
 778:Core/cmsis_gcc.h **** {
 779:Core/cmsis_gcc.h ****     uint32_t result;
 780:Core/cmsis_gcc.h **** 
 781:Core/cmsis_gcc.h ****    __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 782:Core/cmsis_gcc.h ****    return ((uint16_t) result);
 783:Core/cmsis_gcc.h **** }
 784:Core/cmsis_gcc.h **** 
 785:Core/cmsis_gcc.h **** 
 786:Core/cmsis_gcc.h **** /**
 787:Core/cmsis_gcc.h ****   \brief   Load-Acquire (32 bit)
 788:Core/cmsis_gcc.h ****   \details Executes a LDA instruction for 32 bit values.
 789:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 790:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 791:Core/cmsis_gcc.h ****  */
 792:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
 793:Core/cmsis_gcc.h **** {
 794:Core/cmsis_gcc.h ****     uint32_t result;
 795:Core/cmsis_gcc.h **** 
 796:Core/cmsis_gcc.h ****    __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 797:Core/cmsis_gcc.h ****    return(result);
 798:Core/cmsis_gcc.h **** }
 799:Core/cmsis_gcc.h **** 
 800:Core/cmsis_gcc.h **** 
 801:Core/cmsis_gcc.h **** /**
ARM GAS  /tmp/ccWBHqpW.s 			page 217


 802:Core/cmsis_gcc.h ****   \brief   Store-Release (8 bit)
 803:Core/cmsis_gcc.h ****   \details Executes a STLB instruction for 8 bit values.
 804:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 805:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 806:Core/cmsis_gcc.h ****  */
 807:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
 808:Core/cmsis_gcc.h **** {
 809:Core/cmsis_gcc.h ****    __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 810:Core/cmsis_gcc.h **** }
 811:Core/cmsis_gcc.h **** 
 812:Core/cmsis_gcc.h **** 
 813:Core/cmsis_gcc.h **** /**
 814:Core/cmsis_gcc.h ****   \brief   Store-Release (16 bit)
 815:Core/cmsis_gcc.h ****   \details Executes a STLH instruction for 16 bit values.
 816:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 817:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 818:Core/cmsis_gcc.h ****  */
 819:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
 820:Core/cmsis_gcc.h **** {
 821:Core/cmsis_gcc.h ****    __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 822:Core/cmsis_gcc.h **** }
 823:Core/cmsis_gcc.h **** 
 824:Core/cmsis_gcc.h **** 
 825:Core/cmsis_gcc.h **** /**
 826:Core/cmsis_gcc.h ****   \brief   Store-Release (32 bit)
 827:Core/cmsis_gcc.h ****   \details Executes a STL instruction for 32 bit values.
 828:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 829:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 830:Core/cmsis_gcc.h ****  */
 831:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
 832:Core/cmsis_gcc.h **** {
 833:Core/cmsis_gcc.h ****    __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
 834:Core/cmsis_gcc.h **** }
 835:Core/cmsis_gcc.h **** 
 836:Core/cmsis_gcc.h **** 
 837:Core/cmsis_gcc.h **** /**
 838:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (8 bit)
 839:Core/cmsis_gcc.h ****   \details Executes a LDAB exclusive instruction for 8 bit value.
 840:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 841:Core/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 842:Core/cmsis_gcc.h ****  */
 843:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
 844:Core/cmsis_gcc.h **** {
 845:Core/cmsis_gcc.h ****     uint32_t result;
 846:Core/cmsis_gcc.h **** 
 847:Core/cmsis_gcc.h ****    __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 848:Core/cmsis_gcc.h ****    return ((uint8_t) result);
 849:Core/cmsis_gcc.h **** }
 850:Core/cmsis_gcc.h **** 
 851:Core/cmsis_gcc.h **** 
 852:Core/cmsis_gcc.h **** /**
 853:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (16 bit)
 854:Core/cmsis_gcc.h ****   \details Executes a LDAH exclusive instruction for 16 bit values.
 855:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 856:Core/cmsis_gcc.h ****   \return        value of type uint16_t at (*ptr)
 857:Core/cmsis_gcc.h ****  */
 858:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
ARM GAS  /tmp/ccWBHqpW.s 			page 218


 859:Core/cmsis_gcc.h **** {
 860:Core/cmsis_gcc.h ****     uint32_t result;
 861:Core/cmsis_gcc.h **** 
 862:Core/cmsis_gcc.h ****    __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 863:Core/cmsis_gcc.h ****    return ((uint16_t) result);
 864:Core/cmsis_gcc.h **** }
 865:Core/cmsis_gcc.h **** 
 866:Core/cmsis_gcc.h **** 
 867:Core/cmsis_gcc.h **** /**
 868:Core/cmsis_gcc.h ****   \brief   Load-Acquire Exclusive (32 bit)
 869:Core/cmsis_gcc.h ****   \details Executes a LDA exclusive instruction for 32 bit values.
 870:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
 871:Core/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 872:Core/cmsis_gcc.h ****  */
 873:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
 874:Core/cmsis_gcc.h **** {
 875:Core/cmsis_gcc.h ****     uint32_t result;
 876:Core/cmsis_gcc.h **** 
 877:Core/cmsis_gcc.h ****    __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
 878:Core/cmsis_gcc.h ****    return(result);
 879:Core/cmsis_gcc.h **** }
 880:Core/cmsis_gcc.h **** 
 881:Core/cmsis_gcc.h **** 
 882:Core/cmsis_gcc.h **** /**
 883:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (8 bit)
 884:Core/cmsis_gcc.h ****   \details Executes a STLB exclusive instruction for 8 bit values.
 885:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 886:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 887:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 888:Core/cmsis_gcc.h ****   \return          1  Function failed
 889:Core/cmsis_gcc.h ****  */
 890:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
 891:Core/cmsis_gcc.h **** {
 892:Core/cmsis_gcc.h ****    uint32_t result;
 893:Core/cmsis_gcc.h **** 
 894:Core/cmsis_gcc.h ****    __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "mem
 895:Core/cmsis_gcc.h ****    return(result);
 896:Core/cmsis_gcc.h **** }
 897:Core/cmsis_gcc.h **** 
 898:Core/cmsis_gcc.h **** 
 899:Core/cmsis_gcc.h **** /**
 900:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (16 bit)
 901:Core/cmsis_gcc.h ****   \details Executes a STLH exclusive instruction for 16 bit values.
 902:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 903:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 904:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 905:Core/cmsis_gcc.h ****   \return          1  Function failed
 906:Core/cmsis_gcc.h ****  */
 907:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
 908:Core/cmsis_gcc.h **** {
 909:Core/cmsis_gcc.h ****    uint32_t result;
 910:Core/cmsis_gcc.h **** 
 911:Core/cmsis_gcc.h ****    __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "mem
 912:Core/cmsis_gcc.h ****    return(result);
 913:Core/cmsis_gcc.h **** }
 914:Core/cmsis_gcc.h **** 
 915:Core/cmsis_gcc.h **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 219


 916:Core/cmsis_gcc.h **** /**
 917:Core/cmsis_gcc.h ****   \brief   Store-Release Exclusive (32 bit)
 918:Core/cmsis_gcc.h ****   \details Executes a STL exclusive instruction for 32 bit values.
 919:Core/cmsis_gcc.h ****   \param [in]  value  Value to store
 920:Core/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 921:Core/cmsis_gcc.h ****   \return          0  Function succeeded
 922:Core/cmsis_gcc.h ****   \return          1  Function failed
 923:Core/cmsis_gcc.h ****  */
 924:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
 925:Core/cmsis_gcc.h **** {
 926:Core/cmsis_gcc.h ****    uint32_t result;
 927:Core/cmsis_gcc.h **** 
 928:Core/cmsis_gcc.h ****    __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memo
 929:Core/cmsis_gcc.h ****    return(result);
 930:Core/cmsis_gcc.h **** }
 931:Core/cmsis_gcc.h **** 
 932:Core/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 933:Core/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 934:Core/cmsis_gcc.h **** 
 935:Core/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
 936:Core/cmsis_gcc.h **** 
 937:Core/cmsis_gcc.h **** 
 938:Core/cmsis_gcc.h **** /* ###########################  Core Function Access  ########################### */
 939:Core/cmsis_gcc.h **** /** \ingroup  CMSIS_Core_FunctionInterface
 940:Core/cmsis_gcc.h ****     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
 941:Core/cmsis_gcc.h ****   @{
 942:Core/cmsis_gcc.h ****  */
 943:Core/cmsis_gcc.h **** 
 944:Core/cmsis_gcc.h **** /**
 945:Core/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
 946:Core/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing special-purpose register PRIMASK.
 947:Core/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 948:Core/cmsis_gcc.h ****  */
 949:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
 950:Core/cmsis_gcc.h **** {
 951:Core/cmsis_gcc.h ****   __ASM volatile ("cpsie i" : : : "memory");
 952:Core/cmsis_gcc.h **** }
 953:Core/cmsis_gcc.h **** 
 954:Core/cmsis_gcc.h **** 
 955:Core/cmsis_gcc.h **** /**
 956:Core/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
 957:Core/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting special-purpose register PRIMASK.
 958:Core/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 959:Core/cmsis_gcc.h ****  */
 960:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
 961:Core/cmsis_gcc.h **** {
 962:Core/cmsis_gcc.h ****   __ASM volatile ("cpsid i" : : : "memory");
 963:Core/cmsis_gcc.h **** }
 964:Core/cmsis_gcc.h **** 
 965:Core/cmsis_gcc.h **** 
 966:Core/cmsis_gcc.h **** /**
 967:Core/cmsis_gcc.h ****   \brief   Get Control Register
 968:Core/cmsis_gcc.h ****   \details Returns the content of the Control Register.
 969:Core/cmsis_gcc.h ****   \return               Control Register value
 970:Core/cmsis_gcc.h ****  */
 971:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
 972:Core/cmsis_gcc.h **** {
ARM GAS  /tmp/ccWBHqpW.s 			page 220


 973:Core/cmsis_gcc.h ****   uint32_t result;
 974:Core/cmsis_gcc.h **** 
 975:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control" : "=r" (result) );
 976:Core/cmsis_gcc.h ****   return(result);
 977:Core/cmsis_gcc.h **** }
 978:Core/cmsis_gcc.h **** 
 979:Core/cmsis_gcc.h **** 
 980:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 981:Core/cmsis_gcc.h **** /**
 982:Core/cmsis_gcc.h ****   \brief   Get Control Register (non-secure)
 983:Core/cmsis_gcc.h ****   \details Returns the content of the non-secure Control Register when in secure mode.
 984:Core/cmsis_gcc.h ****   \return               non-secure Control Register value
 985:Core/cmsis_gcc.h ****  */
 986:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
 987:Core/cmsis_gcc.h **** {
 988:Core/cmsis_gcc.h ****   uint32_t result;
 989:Core/cmsis_gcc.h **** 
 990:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
 991:Core/cmsis_gcc.h ****   return(result);
 992:Core/cmsis_gcc.h **** }
 993:Core/cmsis_gcc.h **** #endif
 994:Core/cmsis_gcc.h **** 
 995:Core/cmsis_gcc.h **** 
 996:Core/cmsis_gcc.h **** /**
 997:Core/cmsis_gcc.h ****   \brief   Set Control Register
 998:Core/cmsis_gcc.h ****   \details Writes the given value to the Control Register.
 999:Core/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
1000:Core/cmsis_gcc.h ****  */
1001:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
1002:Core/cmsis_gcc.h **** {
1003:Core/cmsis_gcc.h ****   __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
1004:Core/cmsis_gcc.h ****   __ISB();
1005:Core/cmsis_gcc.h **** }
1006:Core/cmsis_gcc.h **** 
1007:Core/cmsis_gcc.h **** 
1008:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1009:Core/cmsis_gcc.h **** /**
1010:Core/cmsis_gcc.h ****   \brief   Set Control Register (non-secure)
1011:Core/cmsis_gcc.h ****   \details Writes the given value to the non-secure Control Register when in secure state.
1012:Core/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
1013:Core/cmsis_gcc.h ****  */
1014:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
1015:Core/cmsis_gcc.h **** {
1016:Core/cmsis_gcc.h ****   __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
1017:Core/cmsis_gcc.h ****   __ISB();
1018:Core/cmsis_gcc.h **** }
1019:Core/cmsis_gcc.h **** #endif
1020:Core/cmsis_gcc.h **** 
1021:Core/cmsis_gcc.h **** 
1022:Core/cmsis_gcc.h **** /**
1023:Core/cmsis_gcc.h ****   \brief   Get IPSR Register
1024:Core/cmsis_gcc.h ****   \details Returns the content of the IPSR Register.
1025:Core/cmsis_gcc.h ****   \return               IPSR Register value
1026:Core/cmsis_gcc.h ****  */
1027:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
1028:Core/cmsis_gcc.h **** {
1029:Core/cmsis_gcc.h ****   uint32_t result;
ARM GAS  /tmp/ccWBHqpW.s 			page 221


1030:Core/cmsis_gcc.h **** 
1031:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
1032:Core/cmsis_gcc.h ****   return(result);
1033:Core/cmsis_gcc.h **** }
1034:Core/cmsis_gcc.h **** 
1035:Core/cmsis_gcc.h **** 
1036:Core/cmsis_gcc.h **** /**
1037:Core/cmsis_gcc.h ****   \brief   Get APSR Register
1038:Core/cmsis_gcc.h ****   \details Returns the content of the APSR Register.
1039:Core/cmsis_gcc.h ****   \return               APSR Register value
1040:Core/cmsis_gcc.h ****  */
1041:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
1042:Core/cmsis_gcc.h **** {
1043:Core/cmsis_gcc.h ****   uint32_t result;
1044:Core/cmsis_gcc.h **** 
1045:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, apsr" : "=r" (result) );
1046:Core/cmsis_gcc.h ****   return(result);
1047:Core/cmsis_gcc.h **** }
1048:Core/cmsis_gcc.h **** 
1049:Core/cmsis_gcc.h **** 
1050:Core/cmsis_gcc.h **** /**
1051:Core/cmsis_gcc.h ****   \brief   Get xPSR Register
1052:Core/cmsis_gcc.h ****   \details Returns the content of the xPSR Register.
1053:Core/cmsis_gcc.h ****   \return               xPSR Register value
1054:Core/cmsis_gcc.h ****  */
1055:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
1056:Core/cmsis_gcc.h **** {
1057:Core/cmsis_gcc.h ****   uint32_t result;
1058:Core/cmsis_gcc.h **** 
1059:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
1060:Core/cmsis_gcc.h ****   return(result);
1061:Core/cmsis_gcc.h **** }
1062:Core/cmsis_gcc.h **** 
1063:Core/cmsis_gcc.h **** 
1064:Core/cmsis_gcc.h **** /**
1065:Core/cmsis_gcc.h ****   \brief   Get Process Stack Pointer
1066:Core/cmsis_gcc.h ****   \details Returns the current value of the Process Stack Pointer (PSP).
1067:Core/cmsis_gcc.h ****   \return               PSP Register value
1068:Core/cmsis_gcc.h ****  */
1069:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
1070:Core/cmsis_gcc.h **** {
1071:Core/cmsis_gcc.h ****   uint32_t result;
1072:Core/cmsis_gcc.h **** 
1073:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp"  : "=r" (result) );
1074:Core/cmsis_gcc.h ****   return(result);
1075:Core/cmsis_gcc.h **** }
1076:Core/cmsis_gcc.h **** 
1077:Core/cmsis_gcc.h **** 
1078:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1079:Core/cmsis_gcc.h **** /**
1080:Core/cmsis_gcc.h ****   \brief   Get Process Stack Pointer (non-secure)
1081:Core/cmsis_gcc.h ****   \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
1082:Core/cmsis_gcc.h ****   \return               PSP Register value
1083:Core/cmsis_gcc.h ****  */
1084:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
1085:Core/cmsis_gcc.h **** {
1086:Core/cmsis_gcc.h ****   uint32_t result;
ARM GAS  /tmp/ccWBHqpW.s 			page 222


1087:Core/cmsis_gcc.h **** 
1088:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
1089:Core/cmsis_gcc.h ****   return(result);
1090:Core/cmsis_gcc.h **** }
1091:Core/cmsis_gcc.h **** #endif
1092:Core/cmsis_gcc.h **** 
1093:Core/cmsis_gcc.h **** 
1094:Core/cmsis_gcc.h **** /**
1095:Core/cmsis_gcc.h ****   \brief   Set Process Stack Pointer
1096:Core/cmsis_gcc.h ****   \details Assigns the given value to the Process Stack Pointer (PSP).
1097:Core/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
1098:Core/cmsis_gcc.h ****  */
1099:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
1100:Core/cmsis_gcc.h **** {
1101:Core/cmsis_gcc.h ****   __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
1102:Core/cmsis_gcc.h **** }
1103:Core/cmsis_gcc.h **** 
1104:Core/cmsis_gcc.h **** 
1105:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1106:Core/cmsis_gcc.h **** /**
1107:Core/cmsis_gcc.h ****   \brief   Set Process Stack Pointer (non-secure)
1108:Core/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
1109:Core/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
1110:Core/cmsis_gcc.h ****  */
1111:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
1112:Core/cmsis_gcc.h **** {
1113:Core/cmsis_gcc.h ****   __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
1114:Core/cmsis_gcc.h **** }
1115:Core/cmsis_gcc.h **** #endif
1116:Core/cmsis_gcc.h **** 
1117:Core/cmsis_gcc.h **** 
1118:Core/cmsis_gcc.h **** /**
1119:Core/cmsis_gcc.h ****   \brief   Get Main Stack Pointer
1120:Core/cmsis_gcc.h ****   \details Returns the current value of the Main Stack Pointer (MSP).
1121:Core/cmsis_gcc.h ****   \return               MSP Register value
1122:Core/cmsis_gcc.h ****  */
1123:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
1124:Core/cmsis_gcc.h **** {
1125:Core/cmsis_gcc.h ****   uint32_t result;
1126:Core/cmsis_gcc.h **** 
1127:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp" : "=r" (result) );
1128:Core/cmsis_gcc.h ****   return(result);
1129:Core/cmsis_gcc.h **** }
1130:Core/cmsis_gcc.h **** 
1131:Core/cmsis_gcc.h **** 
1132:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1133:Core/cmsis_gcc.h **** /**
1134:Core/cmsis_gcc.h ****   \brief   Get Main Stack Pointer (non-secure)
1135:Core/cmsis_gcc.h ****   \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
1136:Core/cmsis_gcc.h ****   \return               MSP Register value
1137:Core/cmsis_gcc.h ****  */
1138:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
1139:Core/cmsis_gcc.h **** {
1140:Core/cmsis_gcc.h ****   uint32_t result;
1141:Core/cmsis_gcc.h **** 
1142:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
1143:Core/cmsis_gcc.h ****   return(result);
ARM GAS  /tmp/ccWBHqpW.s 			page 223


1144:Core/cmsis_gcc.h **** }
1145:Core/cmsis_gcc.h **** #endif
1146:Core/cmsis_gcc.h **** 
1147:Core/cmsis_gcc.h **** 
1148:Core/cmsis_gcc.h **** /**
1149:Core/cmsis_gcc.h ****   \brief   Set Main Stack Pointer
1150:Core/cmsis_gcc.h ****   \details Assigns the given value to the Main Stack Pointer (MSP).
1151:Core/cmsis_gcc.h ****   \param [in]    topOfMainStack  Main Stack Pointer value to set
1152:Core/cmsis_gcc.h ****  */
1153:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
1154:Core/cmsis_gcc.h **** {
1155:Core/cmsis_gcc.h ****   __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
1156:Core/cmsis_gcc.h **** }
1157:Core/cmsis_gcc.h **** 
1158:Core/cmsis_gcc.h **** 
1159:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1160:Core/cmsis_gcc.h **** /**
1161:Core/cmsis_gcc.h ****   \brief   Set Main Stack Pointer (non-secure)
1162:Core/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
1163:Core/cmsis_gcc.h ****   \param [in]    topOfMainStack  Main Stack Pointer value to set
1164:Core/cmsis_gcc.h ****  */
1165:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
1166:Core/cmsis_gcc.h **** {
1167:Core/cmsis_gcc.h ****   __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
1168:Core/cmsis_gcc.h **** }
1169:Core/cmsis_gcc.h **** #endif
1170:Core/cmsis_gcc.h **** 
1171:Core/cmsis_gcc.h **** 
1172:Core/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1173:Core/cmsis_gcc.h **** /**
1174:Core/cmsis_gcc.h ****   \brief   Get Stack Pointer (non-secure)
1175:Core/cmsis_gcc.h ****   \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
1176:Core/cmsis_gcc.h ****   \return               SP Register value
1177:Core/cmsis_gcc.h ****  */
1178:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
1179:Core/cmsis_gcc.h **** {
1180:Core/cmsis_gcc.h ****   uint32_t result;
1181:Core/cmsis_gcc.h **** 
1182:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
1183:Core/cmsis_gcc.h ****   return(result);
1184:Core/cmsis_gcc.h **** }
1185:Core/cmsis_gcc.h **** 
1186:Core/cmsis_gcc.h **** 
1187:Core/cmsis_gcc.h **** /**
1188:Core/cmsis_gcc.h ****   \brief   Set Stack Pointer (non-secure)
1189:Core/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
1190:Core/cmsis_gcc.h ****   \param [in]    topOfStack  Stack Pointer value to set
1191:Core/cmsis_gcc.h ****  */
1192:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
1193:Core/cmsis_gcc.h **** {
1194:Core/cmsis_gcc.h ****   __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
1195:Core/cmsis_gcc.h **** }
1196:Core/cmsis_gcc.h **** #endif
1197:Core/cmsis_gcc.h **** 
1198:Core/cmsis_gcc.h **** 
1199:Core/cmsis_gcc.h **** /**
1200:Core/cmsis_gcc.h ****   \brief   Get Priority Mask
ARM GAS  /tmp/ccWBHqpW.s 			page 224


1201:Core/cmsis_gcc.h ****   \details Returns the current state of the priority mask bit from the Priority Mask Register.
1202:Core/cmsis_gcc.h ****   \return               Priority Mask value
1203:Core/cmsis_gcc.h ****  */
1204:Core/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
 6713              		.loc 2 1204 31 view .LVU2041
 6714              	.LBB537:
1205:Core/cmsis_gcc.h **** {
1206:Core/cmsis_gcc.h ****   uint32_t result;
 6715              		.loc 2 1206 3 view .LVU2042
1207:Core/cmsis_gcc.h **** 
1208:Core/cmsis_gcc.h ****   __ASM volatile ("MRS %0, primask" : "=r" (result) );
 6716              		.loc 2 1208 3 view .LVU2043
 6717              		.syntax divided
 6718              	@ 1208 "Core/cmsis_gcc.h" 1
 6719 0006 EFF31083 		MRS r3, primask
 6720              	@ 0 "" 2
 6721              	.LVL564:
1209:Core/cmsis_gcc.h ****   return(result);
 6722              		.loc 2 1209 3 view .LVU2044
 6723              		.loc 2 1209 3 is_stmt 0 view .LVU2045
 6724              		.thumb
 6725              		.syntax unified
 6726              	.LBE537:
 6727              	.LBE536:
 6728              		.loc 1 3590 3 is_stmt 1 discriminator 2 view .LVU2046
 6729              	.LBB538:
 6730              	.LBI538:
 960:Core/cmsis_gcc.h **** {
 6731              		.loc 2 960 27 view .LVU2047
 6732              	.LBB539:
 962:Core/cmsis_gcc.h **** }
 6733              		.loc 2 962 3 view .LVU2048
 6734              		.syntax divided
 6735              	@ 962 "Core/cmsis_gcc.h" 1
 6736 000a 72B6     		cpsid i
 6737              	@ 0 "" 2
 6738              		.thumb
 6739              		.syntax unified
 6740              	.LBE539:
 6741              	.LBE538:
 6742              		.loc 1 3590 3 discriminator 3 view .LVU2049
3591:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG1 &= (uint32_t) ~(0xF<< (TIx * 4));
 6743              		.loc 1 3591 40 is_stmt 0 view .LVU2050
 6744 000c 0F24     		movs	r4, #15
 6745              		.loc 1 3591 48 view .LVU2051
 6746 000e 8000     		lsls	r0, r0, #2
 6747              	.LVL565:
 6748              		.loc 1 3591 40 view .LVU2052
 6749 0010 8440     		lsls	r4, r4, r0
3592:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG1 |= TIM_IntputSource << (TIx * 4); // TIM1 TIx ETR 输入触发源选择
 6750              		.loc 1 3592 41 view .LVU2053
 6751 0012 8140     		lsls	r1, r1, r0
 6752              	.LVL566:
3590:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG1 &= (uint32_t) ~(0xF<< (TIx * 4));
 6753              		.loc 1 3590 3 discriminator 3 view .LVU2054
 6754 0014 054B     		ldr	r3, .L254
 6755 0016 064A     		ldr	r2, .L254+4
ARM GAS  /tmp/ccWBHqpW.s 			page 225


 6756 0018 1A60     		str	r2, [r3]
3590:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG1 &= (uint32_t) ~(0xF<< (TIx * 4));
 6757              		.loc 1 3590 19 is_stmt 1 discriminator 3 view .LVU2055
3591:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG1 &= (uint32_t) ~(0xF<< (TIx * 4));
 6758              		.loc 1 3591 3 view .LVU2056
3591:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG1 &= (uint32_t) ~(0xF<< (TIx * 4));
 6759              		.loc 1 3591 10 is_stmt 0 view .LVU2057
 6760 001a 064B     		ldr	r3, .L254+8
 6761 001c 5A6A     		ldr	r2, [r3, #36]
3591:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG1 &= (uint32_t) ~(0xF<< (TIx * 4));
 6762              		.loc 1 3591 21 view .LVU2058
 6763 001e A243     		bics	r2, r4
 6764 0020 5A62     		str	r2, [r3, #36]
 6765              		.loc 1 3592 3 is_stmt 1 view .LVU2059
 6766              		.loc 1 3592 10 is_stmt 0 view .LVU2060
 6767 0022 5A6A     		ldr	r2, [r3, #36]
 6768              		.loc 1 3592 21 view .LVU2061
 6769 0024 1143     		orrs	r1, r2
 6770 0026 5962     		str	r1, [r3, #36]
3593:Library/src/lcm32f06x_tim.c ****   __dekey();
 6771              		.loc 1 3593 3 is_stmt 1 view .LVU2062
 6772              	.LBB540:
 6773              	.LBI540:
 949:Core/cmsis_gcc.h **** {
 6774              		.loc 2 949 27 view .LVU2063
 6775              	.LBB541:
 951:Core/cmsis_gcc.h **** }
 6776              		.loc 2 951 3 view .LVU2064
 6777              		.syntax divided
 6778              	@ 951 "Core/cmsis_gcc.h" 1
 6779 0028 62B6     		cpsie i
 6780              	@ 0 "" 2
 6781              		.thumb
 6782              		.syntax unified
 6783              	.LBE541:
 6784              	.LBE540:
 6785              		.loc 1 3593 12 discriminator 1 view .LVU2065
3594:Library/src/lcm32f06x_tim.c **** }
 6786              		.loc 1 3594 1 is_stmt 0 view .LVU2066
 6787              		@ sp needed
 6788 002a 10BD     		pop	{r4, pc}
 6789              	.L255:
 6790              		.align	2
 6791              	.L254:
 6792 002c 7C700048 		.word	1207988348
 6793 0030 9A65FA05 		.word	100296090
 6794 0034 00700048 		.word	1207988224
 6795              		.cfi_endproc
 6796              	.LFE156:
 6798              		.section	.text.TIM2_IntputSourceCfg,"ax",%progbits
 6799              		.align	1
 6800              		.p2align 2,,3
 6801              		.global	TIM2_IntputSourceCfg
 6802              		.syntax unified
 6803              		.code	16
 6804              		.thumb_func
 6806              	TIM2_IntputSourceCfg:
ARM GAS  /tmp/ccWBHqpW.s 			page 226


 6807              	.LVL567:
 6808              	.LFB157:
3595:Library/src/lcm32f06x_tim.c **** 
3596:Library/src/lcm32f06x_tim.c **** /**
3597:Library/src/lcm32f06x_tim.c ****   * @name   TIM2_IntputSourceCfg
3598:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM2 external trigger input source configuration TIx ETRx.
3599:Library/src/lcm32f06x_tim.c ****   *         CN: TIM2外部触发输入源配置。
3600:Library/src/lcm32f06x_tim.c ****   * @param  TIx: 
3601:Library/src/lcm32f06x_tim.c ****   *         EN: External trigger input.
3602:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发输入TIx ETRx。
3603:Library/src/lcm32f06x_tim.c ****   * @param  TIM_IntputSource: 
3604:Library/src/lcm32f06x_tim.c ****   *         EN: TIx ETRx Input trigger source selection.
3605:Library/src/lcm32f06x_tim.c ****   *         CN: TIx ETRx 输入触发源选择。
3606:Library/src/lcm32f06x_tim.c ****   * @retval None
3607:Library/src/lcm32f06x_tim.c ****   */
3608:Library/src/lcm32f06x_tim.c **** void TIM2_IntputSourceCfg(uint32_t TIx, uint32_t TIM_IntputSource)
3609:Library/src/lcm32f06x_tim.c **** {
 6809              		.loc 1 3609 1 is_stmt 1 view -0
 6810              		.cfi_startproc
 6811              		@ args = 0, pretend = 0, frame = 0
 6812              		@ frame_needed = 0, uses_anonymous_args = 0
3610:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM2_INPUT_TI(TIx));
 6813              		.loc 1 3610 3 view .LVU2068
3611:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM2_IntputSource(TIM_IntputSource));
 6814              		.loc 1 3611 3 view .LVU2069
3612:Library/src/lcm32f06x_tim.c ****   sysctrl_access();
 6815              		.loc 1 3612 3 view .LVU2070
 6816              	.LBB542:
 6817              	.LBI542:
 258:Core/cmsis_gcc.h **** {
 6818              		.loc 2 258 27 view .LVU2071
 6819              	.LBB543:
 260:Core/cmsis_gcc.h **** }
 6820              		.loc 2 260 3 view .LVU2072
 6821              	.LBE543:
 6822              	.LBE542:
3609:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM2_INPUT_TI(TIx));
 6823              		.loc 1 3609 1 is_stmt 0 view .LVU2073
 6824 0000 10B5     		push	{r4, lr}
 6825              	.LCFI19:
 6826              		.cfi_def_cfa_offset 8
 6827              		.cfi_offset 4, -8
 6828              		.cfi_offset 14, -4
 6829              	.LBB545:
 6830              	.LBB544:
 260:Core/cmsis_gcc.h **** }
 6831              		.loc 2 260 3 view .LVU2074
 6832              		.syntax divided
 6833              	@ 260 "Core/cmsis_gcc.h" 1
 6834 0002 BFF36F8F 		isb 0xF
 6835              	@ 0 "" 2
 6836              		.thumb
 6837              		.syntax unified
 6838              	.LBE544:
 6839              	.LBE545:
 6840              		.loc 1 3612 3 is_stmt 1 discriminator 1 view .LVU2075
 6841              	.LBB546:
ARM GAS  /tmp/ccWBHqpW.s 			page 227


 6842              	.LBI546:
1204:Core/cmsis_gcc.h **** {
 6843              		.loc 2 1204 31 view .LVU2076
 6844              	.LBB547:
1206:Core/cmsis_gcc.h **** 
 6845              		.loc 2 1206 3 view .LVU2077
1208:Core/cmsis_gcc.h ****   return(result);
 6846              		.loc 2 1208 3 view .LVU2078
 6847              		.syntax divided
 6848              	@ 1208 "Core/cmsis_gcc.h" 1
 6849 0006 EFF31083 		MRS r3, primask
 6850              	@ 0 "" 2
 6851              	.LVL568:
 6852              		.loc 2 1209 3 view .LVU2079
 6853              		.loc 2 1209 3 is_stmt 0 view .LVU2080
 6854              		.thumb
 6855              		.syntax unified
 6856              	.LBE547:
 6857              	.LBE546:
 6858              		.loc 1 3612 3 is_stmt 1 discriminator 2 view .LVU2081
 6859              	.LBB548:
 6860              	.LBI548:
 960:Core/cmsis_gcc.h **** {
 6861              		.loc 2 960 27 view .LVU2082
 6862              	.LBB549:
 962:Core/cmsis_gcc.h **** }
 6863              		.loc 2 962 3 view .LVU2083
 6864              		.syntax divided
 6865              	@ 962 "Core/cmsis_gcc.h" 1
 6866 000a 72B6     		cpsid i
 6867              	@ 0 "" 2
 6868              		.thumb
 6869              		.syntax unified
 6870              	.LBE549:
 6871              	.LBE548:
 6872              		.loc 1 3612 3 discriminator 3 view .LVU2084
3613:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG8 &= (uint32_t) ~(0xF<< (TIx * 4));
 6873              		.loc 1 3613 40 is_stmt 0 view .LVU2085
 6874 000c 0F24     		movs	r4, #15
 6875              		.loc 1 3613 48 view .LVU2086
 6876 000e 8000     		lsls	r0, r0, #2
 6877              	.LVL569:
 6878              		.loc 1 3613 40 view .LVU2087
 6879 0010 8440     		lsls	r4, r4, r0
3614:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG8 |= TIM_IntputSource << (TIx * 4); // TIM2 TIx ETR 输入触发源选择
 6880              		.loc 1 3614 41 view .LVU2088
 6881 0012 8140     		lsls	r1, r1, r0
 6882              	.LVL570:
3612:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG8 &= (uint32_t) ~(0xF<< (TIx * 4));
 6883              		.loc 1 3612 3 discriminator 3 view .LVU2089
 6884 0014 054B     		ldr	r3, .L257
 6885 0016 064A     		ldr	r2, .L257+4
 6886 0018 1A60     		str	r2, [r3]
3612:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG8 &= (uint32_t) ~(0xF<< (TIx * 4));
 6887              		.loc 1 3612 19 is_stmt 1 discriminator 3 view .LVU2090
3613:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG8 &= (uint32_t) ~(0xF<< (TIx * 4));
 6888              		.loc 1 3613 3 view .LVU2091
ARM GAS  /tmp/ccWBHqpW.s 			page 228


3613:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG8 &= (uint32_t) ~(0xF<< (TIx * 4));
 6889              		.loc 1 3613 10 is_stmt 0 view .LVU2092
 6890 001a 064B     		ldr	r3, .L257+8
 6891 001c 1A6C     		ldr	r2, [r3, #64]
3613:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG8 &= (uint32_t) ~(0xF<< (TIx * 4));
 6892              		.loc 1 3613 21 view .LVU2093
 6893 001e A243     		bics	r2, r4
 6894 0020 1A64     		str	r2, [r3, #64]
 6895              		.loc 1 3614 3 is_stmt 1 view .LVU2094
 6896              		.loc 1 3614 10 is_stmt 0 view .LVU2095
 6897 0022 1A6C     		ldr	r2, [r3, #64]
 6898              		.loc 1 3614 21 view .LVU2096
 6899 0024 1143     		orrs	r1, r2
 6900 0026 1964     		str	r1, [r3, #64]
3615:Library/src/lcm32f06x_tim.c ****   __dekey();
 6901              		.loc 1 3615 3 is_stmt 1 view .LVU2097
 6902              	.LBB550:
 6903              	.LBI550:
 949:Core/cmsis_gcc.h **** {
 6904              		.loc 2 949 27 view .LVU2098
 6905              	.LBB551:
 951:Core/cmsis_gcc.h **** }
 6906              		.loc 2 951 3 view .LVU2099
 6907              		.syntax divided
 6908              	@ 951 "Core/cmsis_gcc.h" 1
 6909 0028 62B6     		cpsie i
 6910              	@ 0 "" 2
 6911              		.thumb
 6912              		.syntax unified
 6913              	.LBE551:
 6914              	.LBE550:
 6915              		.loc 1 3615 12 discriminator 1 view .LVU2100
3616:Library/src/lcm32f06x_tim.c **** }
 6916              		.loc 1 3616 1 is_stmt 0 view .LVU2101
 6917              		@ sp needed
 6918 002a 10BD     		pop	{r4, pc}
 6919              	.L258:
 6920              		.align	2
 6921              	.L257:
 6922 002c 7C700048 		.word	1207988348
 6923 0030 9A65FA05 		.word	100296090
 6924 0034 00700048 		.word	1207988224
 6925              		.cfi_endproc
 6926              	.LFE157:
 6928              		.section	.text.TIM15_IntputSourceCfg,"ax",%progbits
 6929              		.align	1
 6930              		.p2align 2,,3
 6931              		.global	TIM15_IntputSourceCfg
 6932              		.syntax unified
 6933              		.code	16
 6934              		.thumb_func
 6936              	TIM15_IntputSourceCfg:
 6937              	.LVL571:
 6938              	.LFB158:
3617:Library/src/lcm32f06x_tim.c **** 
3618:Library/src/lcm32f06x_tim.c **** /**
3619:Library/src/lcm32f06x_tim.c ****   * @name   TIM15_IntputSourceCfg
ARM GAS  /tmp/ccWBHqpW.s 			page 229


3620:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM15 external trigger input source configuration TIx ETRx.
3621:Library/src/lcm32f06x_tim.c ****   *         CN: TIM15外部触发输入源配置。
3622:Library/src/lcm32f06x_tim.c ****   * @param  TIx: 
3623:Library/src/lcm32f06x_tim.c ****   *         EN: External trigger input.
3624:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发输入TIx ETRx。
3625:Library/src/lcm32f06x_tim.c ****   * @param  TIM_IntputSource: 
3626:Library/src/lcm32f06x_tim.c ****   *         EN: TIx ETRx Input trigger source selection.
3627:Library/src/lcm32f06x_tim.c ****   *         CN: TIx ETRx 输入触发源选择。
3628:Library/src/lcm32f06x_tim.c ****   * @retval None
3629:Library/src/lcm32f06x_tim.c ****   */
3630:Library/src/lcm32f06x_tim.c **** void TIM15_IntputSourceCfg(uint32_t TIx, uint32_t TIM_IntputSource)
3631:Library/src/lcm32f06x_tim.c **** {
 6939              		.loc 1 3631 1 is_stmt 1 view -0
 6940              		.cfi_startproc
 6941              		@ args = 0, pretend = 0, frame = 0
 6942              		@ frame_needed = 0, uses_anonymous_args = 0
3632:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM15_INPUT_TI(TIx));
 6943              		.loc 1 3632 3 view .LVU2103
3633:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM15_IntputSource(TIM_IntputSource));
 6944              		.loc 1 3633 3 view .LVU2104
3634:Library/src/lcm32f06x_tim.c ****   sysctrl_access();
 6945              		.loc 1 3634 3 view .LVU2105
 6946              	.LBB552:
 6947              	.LBI552:
 258:Core/cmsis_gcc.h **** {
 6948              		.loc 2 258 27 view .LVU2106
 6949              	.LBB553:
 260:Core/cmsis_gcc.h **** }
 6950              		.loc 2 260 3 view .LVU2107
 6951              	.LBE553:
 6952              	.LBE552:
3631:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM15_INPUT_TI(TIx));
 6953              		.loc 1 3631 1 is_stmt 0 view .LVU2108
 6954 0000 10B5     		push	{r4, lr}
 6955              	.LCFI20:
 6956              		.cfi_def_cfa_offset 8
 6957              		.cfi_offset 4, -8
 6958              		.cfi_offset 14, -4
 6959              	.LBB555:
 6960              	.LBB554:
 260:Core/cmsis_gcc.h **** }
 6961              		.loc 2 260 3 view .LVU2109
 6962              		.syntax divided
 6963              	@ 260 "Core/cmsis_gcc.h" 1
 6964 0002 BFF36F8F 		isb 0xF
 6965              	@ 0 "" 2
 6966              		.thumb
 6967              		.syntax unified
 6968              	.LBE554:
 6969              	.LBE555:
 6970              		.loc 1 3634 3 is_stmt 1 discriminator 1 view .LVU2110
 6971              	.LBB556:
 6972              	.LBI556:
1204:Core/cmsis_gcc.h **** {
 6973              		.loc 2 1204 31 view .LVU2111
 6974              	.LBB557:
1206:Core/cmsis_gcc.h **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 230


 6975              		.loc 2 1206 3 view .LVU2112
1208:Core/cmsis_gcc.h ****   return(result);
 6976              		.loc 2 1208 3 view .LVU2113
 6977              		.syntax divided
 6978              	@ 1208 "Core/cmsis_gcc.h" 1
 6979 0006 EFF31083 		MRS r3, primask
 6980              	@ 0 "" 2
 6981              	.LVL572:
 6982              		.loc 2 1209 3 view .LVU2114
 6983              		.loc 2 1209 3 is_stmt 0 view .LVU2115
 6984              		.thumb
 6985              		.syntax unified
 6986              	.LBE557:
 6987              	.LBE556:
 6988              		.loc 1 3634 3 is_stmt 1 discriminator 2 view .LVU2116
 6989              	.LBB558:
 6990              	.LBI558:
 960:Core/cmsis_gcc.h **** {
 6991              		.loc 2 960 27 view .LVU2117
 6992              	.LBB559:
 962:Core/cmsis_gcc.h **** }
 6993              		.loc 2 962 3 view .LVU2118
 6994              		.syntax divided
 6995              	@ 962 "Core/cmsis_gcc.h" 1
 6996 000a 72B6     		cpsid i
 6997              	@ 0 "" 2
 6998              		.thumb
 6999              		.syntax unified
 7000              	.LBE559:
 7001              	.LBE558:
 7002              		.loc 1 3634 3 discriminator 3 view .LVU2119
3635:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7003              		.loc 1 3635 40 is_stmt 0 view .LVU2120
 7004 000c 0F24     		movs	r4, #15
 7005              		.loc 1 3635 48 view .LVU2121
 7006 000e 8000     		lsls	r0, r0, #2
 7007              	.LVL573:
 7008              		.loc 1 3635 40 view .LVU2122
 7009 0010 8440     		lsls	r4, r4, r0
3636:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 |= TIM_IntputSource << (TIx * 4); // TIM15 TIx ETR 输入触发源选择
 7010              		.loc 1 3636 41 view .LVU2123
 7011 0012 8140     		lsls	r1, r1, r0
 7012              	.LVL574:
3634:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7013              		.loc 1 3634 3 discriminator 3 view .LVU2124
 7014 0014 054B     		ldr	r3, .L260
 7015 0016 064A     		ldr	r2, .L260+4
 7016 0018 1A60     		str	r2, [r3]
3634:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7017              		.loc 1 3634 19 is_stmt 1 discriminator 3 view .LVU2125
3635:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7018              		.loc 1 3635 3 view .LVU2126
3635:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7019              		.loc 1 3635 10 is_stmt 0 view .LVU2127
 7020 001a 064B     		ldr	r3, .L260+8
 7021 001c DA6A     		ldr	r2, [r3, #44]
3635:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
ARM GAS  /tmp/ccWBHqpW.s 			page 231


 7022              		.loc 1 3635 21 view .LVU2128
 7023 001e A243     		bics	r2, r4
 7024 0020 DA62     		str	r2, [r3, #44]
 7025              		.loc 1 3636 3 is_stmt 1 view .LVU2129
 7026              		.loc 1 3636 10 is_stmt 0 view .LVU2130
 7027 0022 DA6A     		ldr	r2, [r3, #44]
 7028              		.loc 1 3636 21 view .LVU2131
 7029 0024 1143     		orrs	r1, r2
 7030 0026 D962     		str	r1, [r3, #44]
3637:Library/src/lcm32f06x_tim.c ****   __dekey();
 7031              		.loc 1 3637 3 is_stmt 1 view .LVU2132
 7032              	.LBB560:
 7033              	.LBI560:
 949:Core/cmsis_gcc.h **** {
 7034              		.loc 2 949 27 view .LVU2133
 7035              	.LBB561:
 951:Core/cmsis_gcc.h **** }
 7036              		.loc 2 951 3 view .LVU2134
 7037              		.syntax divided
 7038              	@ 951 "Core/cmsis_gcc.h" 1
 7039 0028 62B6     		cpsie i
 7040              	@ 0 "" 2
 7041              		.thumb
 7042              		.syntax unified
 7043              	.LBE561:
 7044              	.LBE560:
 7045              		.loc 1 3637 12 discriminator 1 view .LVU2135
3638:Library/src/lcm32f06x_tim.c **** }
 7046              		.loc 1 3638 1 is_stmt 0 view .LVU2136
 7047              		@ sp needed
 7048 002a 10BD     		pop	{r4, pc}
 7049              	.L261:
 7050              		.align	2
 7051              	.L260:
 7052 002c 7C700048 		.word	1207988348
 7053 0030 9A65FA05 		.word	100296090
 7054 0034 00700048 		.word	1207988224
 7055              		.cfi_endproc
 7056              	.LFE158:
 7058              		.section	.text.TIM16_IntputSourceCfg,"ax",%progbits
 7059              		.align	1
 7060              		.p2align 2,,3
 7061              		.global	TIM16_IntputSourceCfg
 7062              		.syntax unified
 7063              		.code	16
 7064              		.thumb_func
 7066              	TIM16_IntputSourceCfg:
 7067              	.LVL575:
 7068              	.LFB159:
3639:Library/src/lcm32f06x_tim.c **** 
3640:Library/src/lcm32f06x_tim.c **** /**
3641:Library/src/lcm32f06x_tim.c ****   * @name   TIM16_IntputSourceCfg
3642:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM16 external trigger input source configuration TIx ETRx.
3643:Library/src/lcm32f06x_tim.c ****   *         CN: TIM16外部触发输入源配置。
3644:Library/src/lcm32f06x_tim.c ****   * @param  TIx: 
3645:Library/src/lcm32f06x_tim.c ****   *         EN: External trigger input.
3646:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发输入TIx ETRx。
ARM GAS  /tmp/ccWBHqpW.s 			page 232


3647:Library/src/lcm32f06x_tim.c ****   * @param  TIM_IntputSource: 
3648:Library/src/lcm32f06x_tim.c ****   *         EN: TIx ETRx Input trigger source selection.
3649:Library/src/lcm32f06x_tim.c ****   *         CN: TIx ETRx 输入触发源选择。
3650:Library/src/lcm32f06x_tim.c ****   * @retval None
3651:Library/src/lcm32f06x_tim.c ****   */
3652:Library/src/lcm32f06x_tim.c **** void TIM16_IntputSourceCfg(uint32_t TIx, uint32_t TIM_IntputSource)
3653:Library/src/lcm32f06x_tim.c **** {
 7069              		.loc 1 3653 1 is_stmt 1 view -0
 7070              		.cfi_startproc
 7071              		@ args = 0, pretend = 0, frame = 0
 7072              		@ frame_needed = 0, uses_anonymous_args = 0
3654:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM16_INPUT_TI(TIx));
 7073              		.loc 1 3654 3 view .LVU2138
3655:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM16_IntputSource(TIM_IntputSource));
 7074              		.loc 1 3655 3 view .LVU2139
3656:Library/src/lcm32f06x_tim.c ****   sysctrl_access();
 7075              		.loc 1 3656 3 view .LVU2140
 7076              	.LBB562:
 7077              	.LBI562:
 258:Core/cmsis_gcc.h **** {
 7078              		.loc 2 258 27 view .LVU2141
 7079              	.LBB563:
 260:Core/cmsis_gcc.h **** }
 7080              		.loc 2 260 3 view .LVU2142
 7081              	.LBE563:
 7082              	.LBE562:
3653:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM16_INPUT_TI(TIx));
 7083              		.loc 1 3653 1 is_stmt 0 view .LVU2143
 7084 0000 10B5     		push	{r4, lr}
 7085              	.LCFI21:
 7086              		.cfi_def_cfa_offset 8
 7087              		.cfi_offset 4, -8
 7088              		.cfi_offset 14, -4
 7089              	.LBB565:
 7090              	.LBB564:
 260:Core/cmsis_gcc.h **** }
 7091              		.loc 2 260 3 view .LVU2144
 7092              		.syntax divided
 7093              	@ 260 "Core/cmsis_gcc.h" 1
 7094 0002 BFF36F8F 		isb 0xF
 7095              	@ 0 "" 2
 7096              		.thumb
 7097              		.syntax unified
 7098              	.LBE564:
 7099              	.LBE565:
 7100              		.loc 1 3656 3 is_stmt 1 discriminator 1 view .LVU2145
 7101              	.LBB566:
 7102              	.LBI566:
1204:Core/cmsis_gcc.h **** {
 7103              		.loc 2 1204 31 view .LVU2146
 7104              	.LBB567:
1206:Core/cmsis_gcc.h **** 
 7105              		.loc 2 1206 3 view .LVU2147
1208:Core/cmsis_gcc.h ****   return(result);
 7106              		.loc 2 1208 3 view .LVU2148
 7107              		.syntax divided
 7108              	@ 1208 "Core/cmsis_gcc.h" 1
ARM GAS  /tmp/ccWBHqpW.s 			page 233


 7109 0006 EFF31083 		MRS r3, primask
 7110              	@ 0 "" 2
 7111              	.LVL576:
 7112              		.loc 2 1209 3 view .LVU2149
 7113              		.loc 2 1209 3 is_stmt 0 view .LVU2150
 7114              		.thumb
 7115              		.syntax unified
 7116              	.LBE567:
 7117              	.LBE566:
 7118              		.loc 1 3656 3 is_stmt 1 discriminator 2 view .LVU2151
 7119              	.LBB568:
 7120              	.LBI568:
 960:Core/cmsis_gcc.h **** {
 7121              		.loc 2 960 27 view .LVU2152
 7122              	.LBB569:
 962:Core/cmsis_gcc.h **** }
 7123              		.loc 2 962 3 view .LVU2153
 7124              		.syntax divided
 7125              	@ 962 "Core/cmsis_gcc.h" 1
 7126 000a 72B6     		cpsid i
 7127              	@ 0 "" 2
 7128              		.thumb
 7129              		.syntax unified
 7130              	.LBE569:
 7131              	.LBE568:
 7132              		.loc 1 3656 3 discriminator 3 view .LVU2154
3657:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7133              		.loc 1 3657 40 is_stmt 0 view .LVU2155
 7134 000c 0F24     		movs	r4, #15
 7135              		.loc 1 3657 48 view .LVU2156
 7136 000e 8000     		lsls	r0, r0, #2
 7137              	.LVL577:
 7138              		.loc 1 3657 40 view .LVU2157
 7139 0010 8440     		lsls	r4, r4, r0
3658:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 |= TIM_IntputSource << ((TIx * 4) + 12); // TIM16 TIx ETR 输入触发源选择
 7140              		.loc 1 3658 55 view .LVU2158
 7141 0012 0C30     		adds	r0, r0, #12
 7142              		.loc 1 3658 41 view .LVU2159
 7143 0014 8140     		lsls	r1, r1, r0
 7144              	.LVL578:
3656:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7145              		.loc 1 3656 3 discriminator 3 view .LVU2160
 7146 0016 064B     		ldr	r3, .L263
 7147 0018 064A     		ldr	r2, .L263+4
 7148 001a 1A60     		str	r2, [r3]
3656:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7149              		.loc 1 3656 19 is_stmt 1 discriminator 3 view .LVU2161
3657:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7150              		.loc 1 3657 3 view .LVU2162
3657:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7151              		.loc 1 3657 10 is_stmt 0 view .LVU2163
 7152 001c 064B     		ldr	r3, .L263+8
 7153 001e DA6A     		ldr	r2, [r3, #44]
3657:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7154              		.loc 1 3657 21 view .LVU2164
 7155 0020 A243     		bics	r2, r4
 7156 0022 DA62     		str	r2, [r3, #44]
ARM GAS  /tmp/ccWBHqpW.s 			page 234


 7157              		.loc 1 3658 3 is_stmt 1 view .LVU2165
 7158              		.loc 1 3658 10 is_stmt 0 view .LVU2166
 7159 0024 DA6A     		ldr	r2, [r3, #44]
 7160              		.loc 1 3658 21 view .LVU2167
 7161 0026 1143     		orrs	r1, r2
 7162 0028 D962     		str	r1, [r3, #44]
3659:Library/src/lcm32f06x_tim.c ****   __dekey();
 7163              		.loc 1 3659 3 is_stmt 1 view .LVU2168
 7164              	.LBB570:
 7165              	.LBI570:
 949:Core/cmsis_gcc.h **** {
 7166              		.loc 2 949 27 view .LVU2169
 7167              	.LBB571:
 951:Core/cmsis_gcc.h **** }
 7168              		.loc 2 951 3 view .LVU2170
 7169              		.syntax divided
 7170              	@ 951 "Core/cmsis_gcc.h" 1
 7171 002a 62B6     		cpsie i
 7172              	@ 0 "" 2
 7173              		.thumb
 7174              		.syntax unified
 7175              	.LBE571:
 7176              	.LBE570:
 7177              		.loc 1 3659 12 discriminator 1 view .LVU2171
3660:Library/src/lcm32f06x_tim.c **** }
 7178              		.loc 1 3660 1 is_stmt 0 view .LVU2172
 7179              		@ sp needed
 7180 002c 10BD     		pop	{r4, pc}
 7181              	.L264:
 7182 002e C046     		.align	2
 7183              	.L263:
 7184 0030 7C700048 		.word	1207988348
 7185 0034 9A65FA05 		.word	100296090
 7186 0038 00700048 		.word	1207988224
 7187              		.cfi_endproc
 7188              	.LFE159:
 7190              		.section	.text.TIM17_IntputSourceCfg,"ax",%progbits
 7191              		.align	1
 7192              		.p2align 2,,3
 7193              		.global	TIM17_IntputSourceCfg
 7194              		.syntax unified
 7195              		.code	16
 7196              		.thumb_func
 7198              	TIM17_IntputSourceCfg:
 7199              	.LVL579:
 7200              	.LFB160:
3661:Library/src/lcm32f06x_tim.c **** 
3662:Library/src/lcm32f06x_tim.c **** /**
3663:Library/src/lcm32f06x_tim.c ****   * @name   TIM17_IntputSourceCfg
3664:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM17 external trigger input source configuration TIx ETRx.
3665:Library/src/lcm32f06x_tim.c ****   *         CN: TIM17外部触发输入源配置。
3666:Library/src/lcm32f06x_tim.c ****   * @param  TIx: 
3667:Library/src/lcm32f06x_tim.c ****   *         EN: External trigger input.
3668:Library/src/lcm32f06x_tim.c ****   *         CN: 外部触发输入TIx ETRx。
3669:Library/src/lcm32f06x_tim.c ****   * @param  TIM_IntputSource: 
3670:Library/src/lcm32f06x_tim.c ****   *         EN: TIx ETRx Input trigger source selection.
3671:Library/src/lcm32f06x_tim.c ****   *         CN: TIx ETRx 输入触发源选择。
ARM GAS  /tmp/ccWBHqpW.s 			page 235


3672:Library/src/lcm32f06x_tim.c ****   * @retval None
3673:Library/src/lcm32f06x_tim.c ****   */
3674:Library/src/lcm32f06x_tim.c **** void TIM17_IntputSourceCfg(uint32_t TIx, uint32_t TIM_IntputSource)
3675:Library/src/lcm32f06x_tim.c **** {
 7201              		.loc 1 3675 1 is_stmt 1 view -0
 7202              		.cfi_startproc
 7203              		@ args = 0, pretend = 0, frame = 0
 7204              		@ frame_needed = 0, uses_anonymous_args = 0
3676:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM17_INPUT_TI(TIx));
 7205              		.loc 1 3676 3 view .LVU2174
3677:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM17_IntputSource(TIM_IntputSource));
 7206              		.loc 1 3677 3 view .LVU2175
3678:Library/src/lcm32f06x_tim.c ****   sysctrl_access();
 7207              		.loc 1 3678 3 view .LVU2176
 7208              	.LBB572:
 7209              	.LBI572:
 258:Core/cmsis_gcc.h **** {
 7210              		.loc 2 258 27 view .LVU2177
 7211              	.LBB573:
 260:Core/cmsis_gcc.h **** }
 7212              		.loc 2 260 3 view .LVU2178
 7213              	.LBE573:
 7214              	.LBE572:
3675:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM17_INPUT_TI(TIx));
 7215              		.loc 1 3675 1 is_stmt 0 view .LVU2179
 7216 0000 10B5     		push	{r4, lr}
 7217              	.LCFI22:
 7218              		.cfi_def_cfa_offset 8
 7219              		.cfi_offset 4, -8
 7220              		.cfi_offset 14, -4
 7221              	.LBB575:
 7222              	.LBB574:
 260:Core/cmsis_gcc.h **** }
 7223              		.loc 2 260 3 view .LVU2180
 7224              		.syntax divided
 7225              	@ 260 "Core/cmsis_gcc.h" 1
 7226 0002 BFF36F8F 		isb 0xF
 7227              	@ 0 "" 2
 7228              		.thumb
 7229              		.syntax unified
 7230              	.LBE574:
 7231              	.LBE575:
 7232              		.loc 1 3678 3 is_stmt 1 discriminator 1 view .LVU2181
 7233              	.LBB576:
 7234              	.LBI576:
1204:Core/cmsis_gcc.h **** {
 7235              		.loc 2 1204 31 view .LVU2182
 7236              	.LBB577:
1206:Core/cmsis_gcc.h **** 
 7237              		.loc 2 1206 3 view .LVU2183
1208:Core/cmsis_gcc.h ****   return(result);
 7238              		.loc 2 1208 3 view .LVU2184
 7239              		.syntax divided
 7240              	@ 1208 "Core/cmsis_gcc.h" 1
 7241 0006 EFF31083 		MRS r3, primask
 7242              	@ 0 "" 2
 7243              	.LVL580:
ARM GAS  /tmp/ccWBHqpW.s 			page 236


 7244              		.loc 2 1209 3 view .LVU2185
 7245              		.loc 2 1209 3 is_stmt 0 view .LVU2186
 7246              		.thumb
 7247              		.syntax unified
 7248              	.LBE577:
 7249              	.LBE576:
 7250              		.loc 1 3678 3 is_stmt 1 discriminator 2 view .LVU2187
 7251              	.LBB578:
 7252              	.LBI578:
 960:Core/cmsis_gcc.h **** {
 7253              		.loc 2 960 27 view .LVU2188
 7254              	.LBB579:
 962:Core/cmsis_gcc.h **** }
 7255              		.loc 2 962 3 view .LVU2189
 7256              		.syntax divided
 7257              	@ 962 "Core/cmsis_gcc.h" 1
 7258 000a 72B6     		cpsid i
 7259              	@ 0 "" 2
 7260              		.thumb
 7261              		.syntax unified
 7262              	.LBE579:
 7263              	.LBE578:
 7264              		.loc 1 3678 3 discriminator 3 view .LVU2190
3679:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7265              		.loc 1 3679 40 is_stmt 0 view .LVU2191
 7266 000c 0F24     		movs	r4, #15
 7267              		.loc 1 3679 48 view .LVU2192
 7268 000e 8000     		lsls	r0, r0, #2
 7269              	.LVL581:
 7270              		.loc 1 3679 40 view .LVU2193
 7271 0010 8440     		lsls	r4, r4, r0
3680:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 |= TIM_IntputSource << ((TIx * 4) + 24); // TIM17 TIx ETR 输入触发源选择
 7272              		.loc 1 3680 55 view .LVU2194
 7273 0012 1830     		adds	r0, r0, #24
 7274              		.loc 1 3680 41 view .LVU2195
 7275 0014 8140     		lsls	r1, r1, r0
 7276              	.LVL582:
3678:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7277              		.loc 1 3678 3 discriminator 3 view .LVU2196
 7278 0016 064B     		ldr	r3, .L266
 7279 0018 064A     		ldr	r2, .L266+4
 7280 001a 1A60     		str	r2, [r3]
3678:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7281              		.loc 1 3678 19 is_stmt 1 discriminator 3 view .LVU2197
3679:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7282              		.loc 1 3679 3 view .LVU2198
3679:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7283              		.loc 1 3679 10 is_stmt 0 view .LVU2199
 7284 001c 064B     		ldr	r3, .L266+8
 7285 001e DA6A     		ldr	r2, [r3, #44]
3679:Library/src/lcm32f06x_tim.c ****   SYSCTRL->EDU_CFG3 &= (uint32_t) ~(0xF<< (TIx * 4));
 7286              		.loc 1 3679 21 view .LVU2200
 7287 0020 A243     		bics	r2, r4
 7288 0022 DA62     		str	r2, [r3, #44]
 7289              		.loc 1 3680 3 is_stmt 1 view .LVU2201
 7290              		.loc 1 3680 10 is_stmt 0 view .LVU2202
 7291 0024 DA6A     		ldr	r2, [r3, #44]
ARM GAS  /tmp/ccWBHqpW.s 			page 237


 7292              		.loc 1 3680 21 view .LVU2203
 7293 0026 1143     		orrs	r1, r2
 7294 0028 D962     		str	r1, [r3, #44]
3681:Library/src/lcm32f06x_tim.c ****   __dekey();
 7295              		.loc 1 3681 3 is_stmt 1 view .LVU2204
 7296              	.LBB580:
 7297              	.LBI580:
 949:Core/cmsis_gcc.h **** {
 7298              		.loc 2 949 27 view .LVU2205
 7299              	.LBB581:
 951:Core/cmsis_gcc.h **** }
 7300              		.loc 2 951 3 view .LVU2206
 7301              		.syntax divided
 7302              	@ 951 "Core/cmsis_gcc.h" 1
 7303 002a 62B6     		cpsie i
 7304              	@ 0 "" 2
 7305              		.thumb
 7306              		.syntax unified
 7307              	.LBE581:
 7308              	.LBE580:
 7309              		.loc 1 3681 12 discriminator 1 view .LVU2207
3682:Library/src/lcm32f06x_tim.c **** }
 7310              		.loc 1 3682 1 is_stmt 0 view .LVU2208
 7311              		@ sp needed
 7312 002c 10BD     		pop	{r4, pc}
 7313              	.L267:
 7314 002e C046     		.align	2
 7315              	.L266:
 7316 0030 7C700048 		.word	1207988348
 7317 0034 9A65FA05 		.word	100296090
 7318 0038 00700048 		.word	1207988224
 7319              		.cfi_endproc
 7320              	.LFE160:
 7322              		.section	.text.TIM1_BreakSourceCfg,"ax",%progbits
 7323              		.align	1
 7324              		.p2align 2,,3
 7325              		.global	TIM1_BreakSourceCfg
 7326              		.syntax unified
 7327              		.code	16
 7328              		.thumb_func
 7330              	TIM1_BreakSourceCfg:
 7331              	.LVL583:
 7332              	.LFB161:
3683:Library/src/lcm32f06x_tim.c **** 
3684:Library/src/lcm32f06x_tim.c **** /**
3685:Library/src/lcm32f06x_tim.c ****   * @name   TIM1_BreakSourceCfg
3686:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM1 brake trigger input source configuration.
3687:Library/src/lcm32f06x_tim.c ****   *         CN: TIM1 刹车触发输入源配置。
3688:Library/src/lcm32f06x_tim.c ****   * @param  TIM_BreakSource: 
3689:Library/src/lcm32f06x_tim.c ****   *         EN: Brake input trigger source selection.
3690:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源选择。
3691:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Level: 
3692:Library/src/lcm32f06x_tim.c ****   *         EN: Effective level selection of TIM1 brake input trigger source.
3693:Library/src/lcm32f06x_tim.c ****   *         CN: TIM1 刹车输入触发源的有效电平选择。
3694:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
3695:Library/src/lcm32f06x_tim.c ****   *         EN: New status of brake input trigger source.
3696:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源新状态。
ARM GAS  /tmp/ccWBHqpW.s 			page 238


3697:Library/src/lcm32f06x_tim.c ****   * @retval None
3698:Library/src/lcm32f06x_tim.c ****   */
3699:Library/src/lcm32f06x_tim.c **** void TIM1_BreakSourceCfg(uint32_t TIM_BreakSource, uint32_t TIM_Level, FunctionalState NewState)
3700:Library/src/lcm32f06x_tim.c **** {
 7333              		.loc 1 3700 1 is_stmt 1 view -0
 7334              		.cfi_startproc
 7335              		@ args = 0, pretend = 0, frame = 0
 7336              		@ frame_needed = 0, uses_anonymous_args = 0
 7337              		@ link register save eliminated.
3701:Library/src/lcm32f06x_tim.c ****   uint32_t temprg;
 7338              		.loc 1 3701 3 view .LVU2210
3702:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM1_BreakSource(TIM_BreakSource));
 7339              		.loc 1 3702 3 view .LVU2211
3703:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM_InputLevel(TIM_Level));
 7340              		.loc 1 3703 3 view .LVU2212
3704:Library/src/lcm32f06x_tim.c **** 
3705:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 7341              		.loc 1 3705 3 view .LVU2213
 7342              		.loc 1 3705 6 is_stmt 0 view .LVU2214
 7343 0000 002A     		cmp	r2, #0
 7344 0002 22D0     		beq	.L269
3706:Library/src/lcm32f06x_tim.c ****   {
3707:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 7345              		.loc 1 3707 5 is_stmt 1 view .LVU2215
 7346              	.LBB582:
 7347              	.LBI582:
 258:Core/cmsis_gcc.h **** {
 7348              		.loc 2 258 27 view .LVU2216
 7349              	.LBB583:
 260:Core/cmsis_gcc.h **** }
 7350              		.loc 2 260 3 view .LVU2217
 7351              		.syntax divided
 7352              	@ 260 "Core/cmsis_gcc.h" 1
 7353 0004 BFF36F8F 		isb 0xF
 7354              	@ 0 "" 2
 7355              		.thumb
 7356              		.syntax unified
 7357              	.LBE583:
 7358              	.LBE582:
 7359              		.loc 1 3707 5 discriminator 1 view .LVU2218
 7360              	.LBB584:
 7361              	.LBI584:
1204:Core/cmsis_gcc.h **** {
 7362              		.loc 2 1204 31 view .LVU2219
 7363              	.LBB585:
1206:Core/cmsis_gcc.h **** 
 7364              		.loc 2 1206 3 view .LVU2220
1208:Core/cmsis_gcc.h ****   return(result);
 7365              		.loc 2 1208 3 view .LVU2221
 7366              		.syntax divided
 7367              	@ 1208 "Core/cmsis_gcc.h" 1
 7368 0008 EFF31083 		MRS r3, primask
 7369              	@ 0 "" 2
 7370              	.LVL584:
 7371              		.loc 2 1209 3 view .LVU2222
 7372              		.loc 2 1209 3 is_stmt 0 view .LVU2223
 7373              		.thumb
ARM GAS  /tmp/ccWBHqpW.s 			page 239


 7374              		.syntax unified
 7375              	.LBE585:
 7376              	.LBE584:
 7377              		.loc 1 3707 5 is_stmt 1 discriminator 2 view .LVU2224
 7378              	.LBB586:
 7379              	.LBI586:
 960:Core/cmsis_gcc.h **** {
 7380              		.loc 2 960 27 view .LVU2225
 7381              	.LBB587:
 962:Core/cmsis_gcc.h **** }
 7382              		.loc 2 962 3 view .LVU2226
 7383              		.syntax divided
 7384              	@ 962 "Core/cmsis_gcc.h" 1
 7385 000c 72B6     		cpsid i
 7386              	@ 0 "" 2
 7387              		.thumb
 7388              		.syntax unified
 7389              	.LBE587:
 7390              	.LBE586:
 7391              		.loc 1 3707 5 discriminator 3 view .LVU2227
 7392 000e 334B     		ldr	r3, .L282
 7393 0010 334A     		ldr	r2, .L282+4
 7394              	.LVL585:
 7395              		.loc 1 3707 5 is_stmt 0 discriminator 3 view .LVU2228
 7396 0012 1A60     		str	r2, [r3]
 7397              		.loc 1 3707 21 is_stmt 1 discriminator 3 view .LVU2229
3708:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 |= TIM_BreakSource; // TIM1 break 输入触发源
 7398              		.loc 1 3708 5 view .LVU2230
 7399              		.loc 1 3708 12 is_stmt 0 view .LVU2231
 7400 0014 334A     		ldr	r2, .L282+8
 7401 0016 136B     		ldr	r3, [r2, #48]
 7402              		.loc 1 3708 23 view .LVU2232
 7403 0018 0343     		orrs	r3, r0
 7404 001a 1363     		str	r3, [r2, #48]
3709:Library/src/lcm32f06x_tim.c ****     __dekey();
 7405              		.loc 1 3709 5 is_stmt 1 view .LVU2233
 7406              	.LBB588:
 7407              	.LBI588:
 949:Core/cmsis_gcc.h **** {
 7408              		.loc 2 949 27 view .LVU2234
 7409              	.LBB589:
 951:Core/cmsis_gcc.h **** }
 7410              		.loc 2 951 3 view .LVU2235
 7411              		.syntax divided
 7412              	@ 951 "Core/cmsis_gcc.h" 1
 7413 001c 62B6     		cpsie i
 7414              	@ 0 "" 2
 7415              		.thumb
 7416              		.syntax unified
 7417              	.LBE589:
 7418              	.LBE588:
 7419              		.loc 1 3709 14 discriminator 1 view .LVU2236
3710:Library/src/lcm32f06x_tim.c ****   }
3711:Library/src/lcm32f06x_tim.c ****   else
3712:Library/src/lcm32f06x_tim.c ****   {
3713:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
3714:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_BreakSource); // TIM1 break 输入触发源
ARM GAS  /tmp/ccWBHqpW.s 			page 240


3715:Library/src/lcm32f06x_tim.c ****     __dekey();
 7420              		.loc 1 3715 14 view .LVU2237
3716:Library/src/lcm32f06x_tim.c ****   }
3717:Library/src/lcm32f06x_tim.c ****    
3718:Library/src/lcm32f06x_tim.c ****   temprg = SYSCTRL->EDU_CFG4;
 7421              		.loc 1 3718 3 view .LVU2238
 7422              		.loc 1 3718 10 is_stmt 0 view .LVU2239
 7423 001e 314B     		ldr	r3, .L282+8
 7424 0020 1A6B     		ldr	r2, [r3, #48]
 7425              	.LVL586:
3719:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM1 break 触发源有效电平为高
 7426              		.loc 1 3719 3 is_stmt 1 view .LVU2240
 7427              		.loc 1 3719 6 is_stmt 0 view .LVU2241
 7428 0022 0029     		cmp	r1, #0
 7429 0024 22D1     		bne	.L271
 7430              	.L281:
3720:Library/src/lcm32f06x_tim.c ****   {
3721:Library/src/lcm32f06x_tim.c ****     if (temprg & 0x00007F00)
 7431              		.loc 1 3721 5 is_stmt 1 view .LVU2242
 7432              		.loc 1 3721 16 is_stmt 0 view .LVU2243
 7433 0026 FE21     		movs	r1, #254
 7434              	.LVL587:
 7435              		.loc 1 3721 16 view .LVU2244
 7436 0028 C901     		lsls	r1, r1, #7
 7437              		.loc 1 3721 8 view .LVU2245
 7438 002a 0A42     		tst	r2, r1
 7439 002c 32D0     		beq	.L272
3722:Library/src/lcm32f06x_tim.c ****     {
3723:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
 7440              		.loc 1 3723 7 is_stmt 1 view .LVU2246
 7441              	.LBB590:
 7442              	.LBI590:
 258:Core/cmsis_gcc.h **** {
 7443              		.loc 2 258 27 view .LVU2247
 7444              	.LBB591:
 260:Core/cmsis_gcc.h **** }
 7445              		.loc 2 260 3 view .LVU2248
 7446              		.syntax divided
 7447              	@ 260 "Core/cmsis_gcc.h" 1
 7448 002e BFF36F8F 		isb 0xF
 7449              	@ 0 "" 2
 7450              		.thumb
 7451              		.syntax unified
 7452              	.LBE591:
 7453              	.LBE590:
 7454              		.loc 1 3723 7 discriminator 1 view .LVU2249
 7455              	.LBB592:
 7456              	.LBI592:
1204:Core/cmsis_gcc.h **** {
 7457              		.loc 2 1204 31 view .LVU2250
 7458              	.LBB593:
1206:Core/cmsis_gcc.h **** 
 7459              		.loc 2 1206 3 view .LVU2251
1208:Core/cmsis_gcc.h ****   return(result);
 7460              		.loc 2 1208 3 view .LVU2252
 7461              		.syntax divided
 7462              	@ 1208 "Core/cmsis_gcc.h" 1
ARM GAS  /tmp/ccWBHqpW.s 			page 241


 7463 0032 EFF31082 		MRS r2, primask
 7464              	@ 0 "" 2
 7465              	.LVL588:
 7466              		.loc 2 1209 3 view .LVU2253
 7467              		.loc 2 1209 3 is_stmt 0 view .LVU2254
 7468              		.thumb
 7469              		.syntax unified
 7470              	.LBE593:
 7471              	.LBE592:
 7472              		.loc 1 3723 7 is_stmt 1 discriminator 2 view .LVU2255
 7473              	.LBB594:
 7474              	.LBI594:
 960:Core/cmsis_gcc.h **** {
 7475              		.loc 2 960 27 view .LVU2256
 7476              	.LBB595:
 962:Core/cmsis_gcc.h **** }
 7477              		.loc 2 962 3 view .LVU2257
 7478              		.syntax divided
 7479              	@ 962 "Core/cmsis_gcc.h" 1
 7480 0036 72B6     		cpsid i
 7481              	@ 0 "" 2
 7482              		.thumb
 7483              		.syntax unified
 7484              	.LBE595:
 7485              	.LBE594:
 7486              		.loc 1 3723 7 discriminator 3 view .LVU2258
 7487 0038 284A     		ldr	r2, .L282
 7488 003a 2949     		ldr	r1, .L282+4
3724:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 &= (~(TIM_BreakSource >> 8));
 7489              		.loc 1 3724 47 is_stmt 0 view .LVU2259
 7490 003c 000A     		lsrs	r0, r0, #8
 7491              	.LVL589:
3723:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 &= (~(TIM_BreakSource >> 8));
 7492              		.loc 1 3723 7 discriminator 3 view .LVU2260
 7493 003e 1160     		str	r1, [r2]
3723:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 &= (~(TIM_BreakSource >> 8));
 7494              		.loc 1 3723 23 is_stmt 1 discriminator 3 view .LVU2261
 7495              		.loc 1 3724 7 view .LVU2262
 7496              		.loc 1 3724 14 is_stmt 0 view .LVU2263
 7497 0040 1A6B     		ldr	r2, [r3, #48]
 7498              		.loc 1 3724 25 view .LVU2264
 7499 0042 8243     		bics	r2, r0
 7500 0044 1A63     		str	r2, [r3, #48]
3725:Library/src/lcm32f06x_tim.c ****       __dekey();
 7501              		.loc 1 3725 7 is_stmt 1 view .LVU2265
 7502              	.LBB596:
 7503              	.LBI596:
 949:Core/cmsis_gcc.h **** {
 7504              		.loc 2 949 27 view .LVU2266
 7505              	.LBB597:
 951:Core/cmsis_gcc.h **** }
 7506              		.loc 2 951 3 view .LVU2267
 7507              		.syntax divided
 7508              	@ 951 "Core/cmsis_gcc.h" 1
 7509 0046 62B6     		cpsie i
 7510              	@ 0 "" 2
 7511              		.thumb
ARM GAS  /tmp/ccWBHqpW.s 			page 242


 7512              		.syntax unified
 7513              	.LBE597:
 7514              	.LBE596:
 7515              		.loc 1 3725 16 discriminator 1 view .LVU2268
 7516              	.LVL590:
 7517              	.L268:
3726:Library/src/lcm32f06x_tim.c ****     }
3727:Library/src/lcm32f06x_tim.c ****     else if (temprg & 0x003F0000)
3728:Library/src/lcm32f06x_tim.c ****     {
3729:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
3730:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 &= (~(TIM_BreakSource >> 16));
3731:Library/src/lcm32f06x_tim.c ****       __dekey();
3732:Library/src/lcm32f06x_tim.c ****     }
3733:Library/src/lcm32f06x_tim.c ****   }
3734:Library/src/lcm32f06x_tim.c ****   else if (TIM_Level == TIM_InputLevel_Low)  // TIM1 break 触发源有效电平为低
3735:Library/src/lcm32f06x_tim.c ****   {
3736:Library/src/lcm32f06x_tim.c ****     if (temprg & 0x00007F00)
3737:Library/src/lcm32f06x_tim.c ****     {
3738:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
3739:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 8);
3740:Library/src/lcm32f06x_tim.c ****       __dekey();
3741:Library/src/lcm32f06x_tim.c ****     }
3742:Library/src/lcm32f06x_tim.c ****     else if (temprg & 0x003F0000)
3743:Library/src/lcm32f06x_tim.c ****     {
3744:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
3745:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 16);
3746:Library/src/lcm32f06x_tim.c ****       __dekey();
3747:Library/src/lcm32f06x_tim.c ****     }
3748:Library/src/lcm32f06x_tim.c ****   }
3749:Library/src/lcm32f06x_tim.c **** }
 7518              		.loc 1 3749 1 is_stmt 0 view .LVU2269
 7519              		@ sp needed
 7520 0048 7047     		bx	lr
 7521              	.LVL591:
 7522              	.L269:
3713:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_BreakSource); // TIM1 break 输入触发源
 7523              		.loc 1 3713 5 is_stmt 1 view .LVU2270
 7524              	.LBB598:
 7525              	.LBI598:
 258:Core/cmsis_gcc.h **** {
 7526              		.loc 2 258 27 view .LVU2271
 7527              	.LBB599:
 260:Core/cmsis_gcc.h **** }
 7528              		.loc 2 260 3 view .LVU2272
 7529              		.syntax divided
 7530              	@ 260 "Core/cmsis_gcc.h" 1
 7531 004a BFF36F8F 		isb 0xF
 7532              	@ 0 "" 2
 7533              		.thumb
 7534              		.syntax unified
 7535              	.LBE599:
 7536              	.LBE598:
3713:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_BreakSource); // TIM1 break 输入触发源
 7537              		.loc 1 3713 5 discriminator 1 view .LVU2273
 7538              	.LBB600:
 7539              	.LBI600:
1204:Core/cmsis_gcc.h **** {
ARM GAS  /tmp/ccWBHqpW.s 			page 243


 7540              		.loc 2 1204 31 view .LVU2274
 7541              	.LBB601:
1206:Core/cmsis_gcc.h **** 
 7542              		.loc 2 1206 3 view .LVU2275
1208:Core/cmsis_gcc.h ****   return(result);
 7543              		.loc 2 1208 3 view .LVU2276
 7544              		.syntax divided
 7545              	@ 1208 "Core/cmsis_gcc.h" 1
 7546 004e EFF31083 		MRS r3, primask
 7547              	@ 0 "" 2
 7548              	.LVL592:
 7549              		.loc 2 1209 3 view .LVU2277
 7550              		.loc 2 1209 3 is_stmt 0 view .LVU2278
 7551              		.thumb
 7552              		.syntax unified
 7553              	.LBE601:
 7554              	.LBE600:
3713:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_BreakSource); // TIM1 break 输入触发源
 7555              		.loc 1 3713 5 is_stmt 1 discriminator 2 view .LVU2279
 7556              	.LBB602:
 7557              	.LBI602:
 960:Core/cmsis_gcc.h **** {
 7558              		.loc 2 960 27 view .LVU2280
 7559              	.LBB603:
 962:Core/cmsis_gcc.h **** }
 7560              		.loc 2 962 3 view .LVU2281
 7561              		.syntax divided
 7562              	@ 962 "Core/cmsis_gcc.h" 1
 7563 0052 72B6     		cpsid i
 7564              	@ 0 "" 2
 7565              		.thumb
 7566              		.syntax unified
 7567              	.LBE603:
 7568              	.LBE602:
3713:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_BreakSource); // TIM1 break 输入触发源
 7569              		.loc 1 3713 5 discriminator 3 view .LVU2282
 7570 0054 214B     		ldr	r3, .L282
 7571 0056 224A     		ldr	r2, .L282+4
 7572              	.LVL593:
3713:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_BreakSource); // TIM1 break 输入触发源
 7573              		.loc 1 3713 5 is_stmt 0 discriminator 3 view .LVU2283
 7574 0058 1A60     		str	r2, [r3]
3713:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_BreakSource); // TIM1 break 输入触发源
 7575              		.loc 1 3713 21 is_stmt 1 discriminator 3 view .LVU2284
3714:Library/src/lcm32f06x_tim.c ****     __dekey();
 7576              		.loc 1 3714 5 view .LVU2285
3714:Library/src/lcm32f06x_tim.c ****     __dekey();
 7577              		.loc 1 3714 12 is_stmt 0 view .LVU2286
 7578 005a 224A     		ldr	r2, .L282+8
 7579 005c 136B     		ldr	r3, [r2, #48]
3714:Library/src/lcm32f06x_tim.c ****     __dekey();
 7580              		.loc 1 3714 23 view .LVU2287
 7581 005e 8343     		bics	r3, r0
 7582 0060 1363     		str	r3, [r2, #48]
3715:Library/src/lcm32f06x_tim.c ****   }
 7583              		.loc 1 3715 5 is_stmt 1 view .LVU2288
 7584              	.LBB604:
ARM GAS  /tmp/ccWBHqpW.s 			page 244


 7585              	.LBI604:
 949:Core/cmsis_gcc.h **** {
 7586              		.loc 2 949 27 view .LVU2289
 7587              	.LBB605:
 951:Core/cmsis_gcc.h **** }
 7588              		.loc 2 951 3 view .LVU2290
 7589              		.syntax divided
 7590              	@ 951 "Core/cmsis_gcc.h" 1
 7591 0062 62B6     		cpsie i
 7592              	@ 0 "" 2
 7593              		.thumb
 7594              		.syntax unified
 7595              	.LBE605:
 7596              	.LBE604:
3715:Library/src/lcm32f06x_tim.c ****   }
 7597              		.loc 1 3715 14 view .LVU2291
3718:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM1 break 触发源有效电平为高
 7598              		.loc 1 3718 3 view .LVU2292
3718:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM1 break 触发源有效电平为高
 7599              		.loc 1 3718 10 is_stmt 0 view .LVU2293
 7600 0064 1F4B     		ldr	r3, .L282+8
 7601 0066 1A6B     		ldr	r2, [r3, #48]
 7602              	.LVL594:
3719:Library/src/lcm32f06x_tim.c ****   {
 7603              		.loc 1 3719 3 is_stmt 1 view .LVU2294
3719:Library/src/lcm32f06x_tim.c ****   {
 7604              		.loc 1 3719 6 is_stmt 0 view .LVU2295
 7605 0068 0029     		cmp	r1, #0
 7606 006a DCD0     		beq	.L281
 7607              	.L271:
3734:Library/src/lcm32f06x_tim.c ****   {
 7608              		.loc 1 3734 8 is_stmt 1 view .LVU2296
3734:Library/src/lcm32f06x_tim.c ****   {
 7609              		.loc 1 3734 11 is_stmt 0 view .LVU2297
 7610 006c 0129     		cmp	r1, #1
 7611 006e EBD1     		bne	.L268
3736:Library/src/lcm32f06x_tim.c ****     {
 7612              		.loc 1 3736 5 is_stmt 1 view .LVU2298
3736:Library/src/lcm32f06x_tim.c ****     {
 7613              		.loc 1 3736 16 is_stmt 0 view .LVU2299
 7614 0070 FE21     		movs	r1, #254
 7615              	.LVL595:
3736:Library/src/lcm32f06x_tim.c ****     {
 7616              		.loc 1 3736 16 view .LVU2300
 7617 0072 C901     		lsls	r1, r1, #7
3736:Library/src/lcm32f06x_tim.c ****     {
 7618              		.loc 1 3736 8 view .LVU2301
 7619 0074 0A42     		tst	r2, r1
 7620 0076 1FD0     		beq	.L274
3738:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 8);
 7621              		.loc 1 3738 7 is_stmt 1 view .LVU2302
 7622              	.LBB606:
 7623              	.LBI606:
 258:Core/cmsis_gcc.h **** {
 7624              		.loc 2 258 27 view .LVU2303
 7625              	.LBB607:
 260:Core/cmsis_gcc.h **** }
ARM GAS  /tmp/ccWBHqpW.s 			page 245


 7626              		.loc 2 260 3 view .LVU2304
 7627              		.syntax divided
 7628              	@ 260 "Core/cmsis_gcc.h" 1
 7629 0078 BFF36F8F 		isb 0xF
 7630              	@ 0 "" 2
 7631              		.thumb
 7632              		.syntax unified
 7633              	.LBE607:
 7634              	.LBE606:
3738:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 8);
 7635              		.loc 1 3738 7 discriminator 1 view .LVU2305
 7636              	.LBB608:
 7637              	.LBI608:
1204:Core/cmsis_gcc.h **** {
 7638              		.loc 2 1204 31 view .LVU2306
 7639              	.LBB609:
1206:Core/cmsis_gcc.h **** 
 7640              		.loc 2 1206 3 view .LVU2307
1208:Core/cmsis_gcc.h ****   return(result);
 7641              		.loc 2 1208 3 view .LVU2308
 7642              		.syntax divided
 7643              	@ 1208 "Core/cmsis_gcc.h" 1
 7644 007c EFF31082 		MRS r2, primask
 7645              	@ 0 "" 2
 7646              	.LVL596:
 7647              		.loc 2 1209 3 view .LVU2309
 7648              		.loc 2 1209 3 is_stmt 0 view .LVU2310
 7649              		.thumb
 7650              		.syntax unified
 7651              	.LBE609:
 7652              	.LBE608:
3738:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 8);
 7653              		.loc 1 3738 7 is_stmt 1 discriminator 2 view .LVU2311
 7654              	.LBB610:
 7655              	.LBI610:
 960:Core/cmsis_gcc.h **** {
 7656              		.loc 2 960 27 view .LVU2312
 7657              	.LBB611:
 962:Core/cmsis_gcc.h **** }
 7658              		.loc 2 962 3 view .LVU2313
 7659              		.syntax divided
 7660              	@ 962 "Core/cmsis_gcc.h" 1
 7661 0080 72B6     		cpsid i
 7662              	@ 0 "" 2
 7663              		.thumb
 7664              		.syntax unified
 7665              	.LBE611:
 7666              	.LBE610:
3738:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 8);
 7667              		.loc 1 3738 7 discriminator 3 view .LVU2314
 7668 0082 164A     		ldr	r2, .L282
 7669 0084 1649     		ldr	r1, .L282+4
3739:Library/src/lcm32f06x_tim.c ****       __dekey();
 7670              		.loc 1 3739 45 is_stmt 0 view .LVU2315
 7671 0086 000A     		lsrs	r0, r0, #8
 7672              	.LVL597:
3738:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 8);
ARM GAS  /tmp/ccWBHqpW.s 			page 246


 7673              		.loc 1 3738 7 discriminator 3 view .LVU2316
 7674 0088 1160     		str	r1, [r2]
3738:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 8);
 7675              		.loc 1 3738 23 is_stmt 1 discriminator 3 view .LVU2317
3739:Library/src/lcm32f06x_tim.c ****       __dekey();
 7676              		.loc 1 3739 7 view .LVU2318
3739:Library/src/lcm32f06x_tim.c ****       __dekey();
 7677              		.loc 1 3739 14 is_stmt 0 view .LVU2319
 7678 008a 1A6B     		ldr	r2, [r3, #48]
3739:Library/src/lcm32f06x_tim.c ****       __dekey();
 7679              		.loc 1 3739 25 view .LVU2320
 7680 008c 1043     		orrs	r0, r2
 7681 008e 1863     		str	r0, [r3, #48]
3740:Library/src/lcm32f06x_tim.c ****     }
 7682              		.loc 1 3740 7 is_stmt 1 view .LVU2321
 7683              	.LBB612:
 7684              	.LBI612:
 949:Core/cmsis_gcc.h **** {
 7685              		.loc 2 949 27 view .LVU2322
 7686              	.LBB613:
 951:Core/cmsis_gcc.h **** }
 7687              		.loc 2 951 3 view .LVU2323
 7688              		.syntax divided
 7689              	@ 951 "Core/cmsis_gcc.h" 1
 7690 0090 62B6     		cpsie i
 7691              	@ 0 "" 2
 7692              		.thumb
 7693              		.syntax unified
 7694              	.LBE613:
 7695              	.LBE612:
3740:Library/src/lcm32f06x_tim.c ****     }
 7696              		.loc 1 3740 16 discriminator 1 view .LVU2324
 7697              	.LBB615:
 7698              	.LBB614:
 952:Core/cmsis_gcc.h **** 
 7699              		.loc 2 952 1 is_stmt 0 view .LVU2325
 7700 0092 D9E7     		b	.L268
 7701              	.LVL598:
 7702              	.L272:
 952:Core/cmsis_gcc.h **** 
 7703              		.loc 2 952 1 view .LVU2326
 7704              	.LBE614:
 7705              	.LBE615:
3727:Library/src/lcm32f06x_tim.c ****     {
 7706              		.loc 1 3727 10 is_stmt 1 view .LVU2327
3727:Library/src/lcm32f06x_tim.c ****     {
 7707              		.loc 1 3727 21 is_stmt 0 view .LVU2328
 7708 0094 FC21     		movs	r1, #252
 7709 0096 8903     		lsls	r1, r1, #14
3727:Library/src/lcm32f06x_tim.c ****     {
 7710              		.loc 1 3727 13 view .LVU2329
 7711 0098 0A42     		tst	r2, r1
 7712 009a D5D0     		beq	.L268
3729:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 &= (~(TIM_BreakSource >> 16));
 7713              		.loc 1 3729 7 is_stmt 1 view .LVU2330
 7714              	.LBB616:
 7715              	.LBI616:
ARM GAS  /tmp/ccWBHqpW.s 			page 247


 258:Core/cmsis_gcc.h **** {
 7716              		.loc 2 258 27 view .LVU2331
 7717              	.LBB617:
 260:Core/cmsis_gcc.h **** }
 7718              		.loc 2 260 3 view .LVU2332
 7719              		.syntax divided
 7720              	@ 260 "Core/cmsis_gcc.h" 1
 7721 009c BFF36F8F 		isb 0xF
 7722              	@ 0 "" 2
 7723              		.thumb
 7724              		.syntax unified
 7725              	.LBE617:
 7726              	.LBE616:
3729:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 &= (~(TIM_BreakSource >> 16));
 7727              		.loc 1 3729 7 discriminator 1 view .LVU2333
 7728              	.LBB618:
 7729              	.LBI618:
1204:Core/cmsis_gcc.h **** {
 7730              		.loc 2 1204 31 view .LVU2334
 7731              	.LBB619:
1206:Core/cmsis_gcc.h **** 
 7732              		.loc 2 1206 3 view .LVU2335
1208:Core/cmsis_gcc.h ****   return(result);
 7733              		.loc 2 1208 3 view .LVU2336
 7734              		.syntax divided
 7735              	@ 1208 "Core/cmsis_gcc.h" 1
 7736 00a0 EFF31082 		MRS r2, primask
 7737              	@ 0 "" 2
 7738              	.LVL599:
 7739              		.loc 2 1209 3 view .LVU2337
 7740              		.loc 2 1209 3 is_stmt 0 view .LVU2338
 7741              		.thumb
 7742              		.syntax unified
 7743              	.LBE619:
 7744              	.LBE618:
3729:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 &= (~(TIM_BreakSource >> 16));
 7745              		.loc 1 3729 7 is_stmt 1 discriminator 2 view .LVU2339
 7746              	.LBB620:
 7747              	.LBI620:
 960:Core/cmsis_gcc.h **** {
 7748              		.loc 2 960 27 view .LVU2340
 7749              	.LBB621:
 962:Core/cmsis_gcc.h **** }
 7750              		.loc 2 962 3 view .LVU2341
 7751              		.syntax divided
 7752              	@ 962 "Core/cmsis_gcc.h" 1
 7753 00a4 72B6     		cpsid i
 7754              	@ 0 "" 2
 7755              		.thumb
 7756              		.syntax unified
 7757              	.LBE621:
 7758              	.LBE620:
3729:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 &= (~(TIM_BreakSource >> 16));
 7759              		.loc 1 3729 7 discriminator 3 view .LVU2342
 7760 00a6 0D4A     		ldr	r2, .L282
 7761 00a8 0D49     		ldr	r1, .L282+4
3730:Library/src/lcm32f06x_tim.c ****       __dekey();
ARM GAS  /tmp/ccWBHqpW.s 			page 248


 7762              		.loc 1 3730 47 is_stmt 0 view .LVU2343
 7763 00aa 000C     		lsrs	r0, r0, #16
 7764              	.LVL600:
3729:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 &= (~(TIM_BreakSource >> 16));
 7765              		.loc 1 3729 7 discriminator 3 view .LVU2344
 7766 00ac 1160     		str	r1, [r2]
3729:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 &= (~(TIM_BreakSource >> 16));
 7767              		.loc 1 3729 23 is_stmt 1 discriminator 3 view .LVU2345
3730:Library/src/lcm32f06x_tim.c ****       __dekey();
 7768              		.loc 1 3730 7 view .LVU2346
3730:Library/src/lcm32f06x_tim.c ****       __dekey();
 7769              		.loc 1 3730 14 is_stmt 0 view .LVU2347
 7770 00ae 1A6B     		ldr	r2, [r3, #48]
3730:Library/src/lcm32f06x_tim.c ****       __dekey();
 7771              		.loc 1 3730 25 view .LVU2348
 7772 00b0 8243     		bics	r2, r0
 7773 00b2 1A63     		str	r2, [r3, #48]
3731:Library/src/lcm32f06x_tim.c ****     }
 7774              		.loc 1 3731 7 is_stmt 1 view .LVU2349
 7775              	.LBB622:
 7776              	.LBI622:
 949:Core/cmsis_gcc.h **** {
 7777              		.loc 2 949 27 view .LVU2350
 7778              	.LBB623:
 951:Core/cmsis_gcc.h **** }
 7779              		.loc 2 951 3 view .LVU2351
 7780              		.syntax divided
 7781              	@ 951 "Core/cmsis_gcc.h" 1
 7782 00b4 62B6     		cpsie i
 7783              	@ 0 "" 2
 952:Core/cmsis_gcc.h **** 
 7784              		.loc 2 952 1 is_stmt 0 view .LVU2352
 7785              		.thumb
 7786              		.syntax unified
 7787 00b6 C7E7     		b	.L268
 7788              	.LVL601:
 7789              	.L274:
 952:Core/cmsis_gcc.h **** 
 7790              		.loc 2 952 1 view .LVU2353
 7791              	.LBE623:
 7792              	.LBE622:
3742:Library/src/lcm32f06x_tim.c ****     {
 7793              		.loc 1 3742 10 is_stmt 1 view .LVU2354
3742:Library/src/lcm32f06x_tim.c ****     {
 7794              		.loc 1 3742 21 is_stmt 0 view .LVU2355
 7795 00b8 FC21     		movs	r1, #252
 7796 00ba 8903     		lsls	r1, r1, #14
3742:Library/src/lcm32f06x_tim.c ****     {
 7797              		.loc 1 3742 13 view .LVU2356
 7798 00bc 0A42     		tst	r2, r1
 7799 00be C3D0     		beq	.L268
3744:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 16);
 7800              		.loc 1 3744 7 is_stmt 1 view .LVU2357
 7801              	.LBB624:
 7802              	.LBI624:
 258:Core/cmsis_gcc.h **** {
 7803              		.loc 2 258 27 view .LVU2358
ARM GAS  /tmp/ccWBHqpW.s 			page 249


 7804              	.LBB625:
 260:Core/cmsis_gcc.h **** }
 7805              		.loc 2 260 3 view .LVU2359
 7806              		.syntax divided
 7807              	@ 260 "Core/cmsis_gcc.h" 1
 7808 00c0 BFF36F8F 		isb 0xF
 7809              	@ 0 "" 2
 7810              		.thumb
 7811              		.syntax unified
 7812              	.LBE625:
 7813              	.LBE624:
3744:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 16);
 7814              		.loc 1 3744 7 discriminator 1 view .LVU2360
 7815              	.LBB626:
 7816              	.LBI626:
1204:Core/cmsis_gcc.h **** {
 7817              		.loc 2 1204 31 view .LVU2361
 7818              	.LBB627:
1206:Core/cmsis_gcc.h **** 
 7819              		.loc 2 1206 3 view .LVU2362
1208:Core/cmsis_gcc.h ****   return(result);
 7820              		.loc 2 1208 3 view .LVU2363
 7821              		.syntax divided
 7822              	@ 1208 "Core/cmsis_gcc.h" 1
 7823 00c4 EFF31082 		MRS r2, primask
 7824              	@ 0 "" 2
 7825              	.LVL602:
 7826              		.loc 2 1209 3 view .LVU2364
 7827              		.loc 2 1209 3 is_stmt 0 view .LVU2365
 7828              		.thumb
 7829              		.syntax unified
 7830              	.LBE627:
 7831              	.LBE626:
3744:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 16);
 7832              		.loc 1 3744 7 is_stmt 1 discriminator 2 view .LVU2366
 7833              	.LBB628:
 7834              	.LBI628:
 960:Core/cmsis_gcc.h **** {
 7835              		.loc 2 960 27 view .LVU2367
 7836              	.LBB629:
 962:Core/cmsis_gcc.h **** }
 7837              		.loc 2 962 3 view .LVU2368
 7838              		.syntax divided
 7839              	@ 962 "Core/cmsis_gcc.h" 1
 7840 00c8 72B6     		cpsid i
 7841              	@ 0 "" 2
 7842              		.thumb
 7843              		.syntax unified
 7844              	.LBE629:
 7845              	.LBE628:
3744:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 16);
 7846              		.loc 1 3744 7 discriminator 3 view .LVU2369
 7847 00ca 044A     		ldr	r2, .L282
 7848 00cc 0449     		ldr	r1, .L282+4
3745:Library/src/lcm32f06x_tim.c ****       __dekey();
 7849              		.loc 1 3745 45 is_stmt 0 view .LVU2370
 7850 00ce 000C     		lsrs	r0, r0, #16
ARM GAS  /tmp/ccWBHqpW.s 			page 250


 7851              	.LVL603:
3744:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 16);
 7852              		.loc 1 3744 7 discriminator 3 view .LVU2371
 7853 00d0 1160     		str	r1, [r2]
3744:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG4 |= (TIM_BreakSource >> 16);
 7854              		.loc 1 3744 23 is_stmt 1 discriminator 3 view .LVU2372
3745:Library/src/lcm32f06x_tim.c ****       __dekey();
 7855              		.loc 1 3745 7 view .LVU2373
3745:Library/src/lcm32f06x_tim.c ****       __dekey();
 7856              		.loc 1 3745 14 is_stmt 0 view .LVU2374
 7857 00d2 1A6B     		ldr	r2, [r3, #48]
3745:Library/src/lcm32f06x_tim.c ****       __dekey();
 7858              		.loc 1 3745 25 view .LVU2375
 7859 00d4 1043     		orrs	r0, r2
 7860 00d6 1863     		str	r0, [r3, #48]
3746:Library/src/lcm32f06x_tim.c ****     }
 7861              		.loc 1 3746 7 is_stmt 1 view .LVU2376
 7862              	.LBB630:
 7863              	.LBI630:
 949:Core/cmsis_gcc.h **** {
 7864              		.loc 2 949 27 view .LVU2377
 7865              	.LBB631:
 951:Core/cmsis_gcc.h **** }
 7866              		.loc 2 951 3 view .LVU2378
 7867              		.syntax divided
 7868              	@ 951 "Core/cmsis_gcc.h" 1
 7869 00d8 62B6     		cpsie i
 7870              	@ 0 "" 2
 7871              		.thumb
 7872              		.syntax unified
 7873              	.LBE631:
 7874              	.LBE630:
3746:Library/src/lcm32f06x_tim.c ****     }
 7875              		.loc 1 3746 16 view .LVU2379
 7876              		.loc 1 3749 1 is_stmt 0 view .LVU2380
 7877 00da B5E7     		b	.L268
 7878              	.L283:
 7879              		.align	2
 7880              	.L282:
 7881 00dc 7C700048 		.word	1207988348
 7882 00e0 9A65FA05 		.word	100296090
 7883 00e4 00700048 		.word	1207988224
 7884              		.cfi_endproc
 7885              	.LFE161:
 7887              		.section	.text.TIM1_OCREF_CLR_SourceCfg,"ax",%progbits
 7888              		.align	1
 7889              		.p2align 2,,3
 7890              		.global	TIM1_OCREF_CLR_SourceCfg
 7891              		.syntax unified
 7892              		.code	16
 7893              		.thumb_func
 7895              	TIM1_OCREF_CLR_SourceCfg:
 7896              	.LVL604:
 7897              	.LFB162:
3750:Library/src/lcm32f06x_tim.c **** 
3751:Library/src/lcm32f06x_tim.c **** /**
3752:Library/src/lcm32f06x_tim.c ****   * @name   TIM1_OCREF_CLR_SourceCfg
ARM GAS  /tmp/ccWBHqpW.s 			page 251


3753:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM1  OCREF_CLR trigger input source configuration.
3754:Library/src/lcm32f06x_tim.c ****   *         CN: TIM1 OCREF_CLR触发输入源配置。
3755:Library/src/lcm32f06x_tim.c ****   * @param  TIM_OCREF_CLR_Source: 
3756:Library/src/lcm32f06x_tim.c ****   *         EN:  OCREF_CLR input trigger source selection.
3757:Library/src/lcm32f06x_tim.c ****   *         CN:  OCREF_CLR输入触发源选择。
3758:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Level: 
3759:Library/src/lcm32f06x_tim.c ****   *         EN: Effective level selection of TIM1  OCREF_CLR input trigger source.
3760:Library/src/lcm32f06x_tim.c ****   *         CN: TIM1  OCREF_CLR输入触发源的有效电平选择。
3761:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
3762:Library/src/lcm32f06x_tim.c ****   *         EN: New status of  OCREF_CLR input trigger source.
3763:Library/src/lcm32f06x_tim.c ****   *         CN: OCREF_CLR输入触发源新状态。
3764:Library/src/lcm32f06x_tim.c ****   * @retval None
3765:Library/src/lcm32f06x_tim.c ****   */
3766:Library/src/lcm32f06x_tim.c **** void TIM1_OCREF_CLR_SourceCfg(uint32_t TIM_OCREF_CLR_Source, uint32_t TIM_Level, FunctionalState Ne
3767:Library/src/lcm32f06x_tim.c **** {
 7898              		.loc 1 3767 1 is_stmt 1 view -0
 7899              		.cfi_startproc
 7900              		@ args = 0, pretend = 0, frame = 0
 7901              		@ frame_needed = 0, uses_anonymous_args = 0
 7902              		@ link register save eliminated.
3768:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM1_OCREF_CLR_Source(TIM_OCREF_CLR_Source));
 7903              		.loc 1 3768 3 view .LVU2382
3769:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM_InputLevel(TIM_Level));
 7904              		.loc 1 3769 3 view .LVU2383
3770:Library/src/lcm32f06x_tim.c ****   
3771:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 7905              		.loc 1 3771 3 view .LVU2384
 7906              		.loc 1 3771 6 is_stmt 0 view .LVU2385
 7907 0000 002A     		cmp	r2, #0
 7908 0002 1DD0     		beq	.L285
3772:Library/src/lcm32f06x_tim.c ****   {
3773:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 7909              		.loc 1 3773 5 is_stmt 1 view .LVU2386
 7910              	.LBB632:
 7911              	.LBI632:
 258:Core/cmsis_gcc.h **** {
 7912              		.loc 2 258 27 view .LVU2387
 7913              	.LBB633:
 260:Core/cmsis_gcc.h **** }
 7914              		.loc 2 260 3 view .LVU2388
 7915              		.syntax divided
 7916              	@ 260 "Core/cmsis_gcc.h" 1
 7917 0004 BFF36F8F 		isb 0xF
 7918              	@ 0 "" 2
 7919              		.thumb
 7920              		.syntax unified
 7921              	.LBE633:
 7922              	.LBE632:
 7923              		.loc 1 3773 5 discriminator 1 view .LVU2389
 7924              	.LBB634:
 7925              	.LBI634:
1204:Core/cmsis_gcc.h **** {
 7926              		.loc 2 1204 31 view .LVU2390
 7927              	.LBB635:
1206:Core/cmsis_gcc.h **** 
 7928              		.loc 2 1206 3 view .LVU2391
1208:Core/cmsis_gcc.h ****   return(result);
ARM GAS  /tmp/ccWBHqpW.s 			page 252


 7929              		.loc 2 1208 3 view .LVU2392
 7930              		.syntax divided
 7931              	@ 1208 "Core/cmsis_gcc.h" 1
 7932 0008 EFF31083 		MRS r3, primask
 7933              	@ 0 "" 2
 7934              	.LVL605:
 7935              		.loc 2 1209 3 view .LVU2393
 7936              		.loc 2 1209 3 is_stmt 0 view .LVU2394
 7937              		.thumb
 7938              		.syntax unified
 7939              	.LBE635:
 7940              	.LBE634:
 7941              		.loc 1 3773 5 is_stmt 1 discriminator 2 view .LVU2395
 7942              	.LBB636:
 7943              	.LBI636:
 960:Core/cmsis_gcc.h **** {
 7944              		.loc 2 960 27 view .LVU2396
 7945              	.LBB637:
 962:Core/cmsis_gcc.h **** }
 7946              		.loc 2 962 3 view .LVU2397
 7947              		.syntax divided
 7948              	@ 962 "Core/cmsis_gcc.h" 1
 7949 000c 72B6     		cpsid i
 7950              	@ 0 "" 2
 7951              		.thumb
 7952              		.syntax unified
 7953              	.LBE637:
 7954              	.LBE636:
 7955              		.loc 1 3773 5 discriminator 3 view .LVU2398
 7956 000e 1C4B     		ldr	r3, .L290
 7957 0010 1C4A     		ldr	r2, .L290+4
 7958              	.LVL606:
 7959              		.loc 1 3773 5 is_stmt 0 discriminator 3 view .LVU2399
 7960 0012 1A60     		str	r2, [r3]
 7961              		.loc 1 3773 21 is_stmt 1 discriminator 3 view .LVU2400
3774:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 |= TIM_OCREF_CLR_Source; // TIM1 OCREF_CLR 输入触发源
 7962              		.loc 1 3774 5 view .LVU2401
 7963              		.loc 1 3774 12 is_stmt 0 view .LVU2402
 7964 0014 1C4A     		ldr	r2, .L290+8
 7965 0016 136B     		ldr	r3, [r2, #48]
 7966              		.loc 1 3774 23 view .LVU2403
 7967 0018 0343     		orrs	r3, r0
 7968 001a 1363     		str	r3, [r2, #48]
3775:Library/src/lcm32f06x_tim.c ****     __dekey();
 7969              		.loc 1 3775 5 is_stmt 1 view .LVU2404
 7970              	.LBB638:
 7971              	.LBI638:
 949:Core/cmsis_gcc.h **** {
 7972              		.loc 2 949 27 view .LVU2405
 7973              	.LBB639:
 951:Core/cmsis_gcc.h **** }
 7974              		.loc 2 951 3 view .LVU2406
 7975              		.syntax divided
 7976              	@ 951 "Core/cmsis_gcc.h" 1
 7977 001c 62B6     		cpsie i
 7978              	@ 0 "" 2
 7979              		.thumb
ARM GAS  /tmp/ccWBHqpW.s 			page 253


 7980              		.syntax unified
 7981              	.LBE639:
 7982              	.LBE638:
 7983              		.loc 1 3775 14 discriminator 1 view .LVU2407
3776:Library/src/lcm32f06x_tim.c ****   }
3777:Library/src/lcm32f06x_tim.c ****   else
3778:Library/src/lcm32f06x_tim.c ****   {
3779:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
3780:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
3781:Library/src/lcm32f06x_tim.c ****     __dekey();
 7984              		.loc 1 3781 14 view .LVU2408
3782:Library/src/lcm32f06x_tim.c ****   }
3783:Library/src/lcm32f06x_tim.c **** 
3784:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM1 OCREF_CLR 触发源有效电平为高
 7985              		.loc 1 3784 3 view .LVU2409
 7986              		.loc 1 3784 6 is_stmt 0 view .LVU2410
 7987 001e 0029     		cmp	r1, #0
 7988 0020 1DD1     		bne	.L287
 7989              	.L289:
3785:Library/src/lcm32f06x_tim.c ****   {
3786:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 7990              		.loc 1 3786 5 is_stmt 1 view .LVU2411
 7991              	.LBB640:
 7992              	.LBI640:
 258:Core/cmsis_gcc.h **** {
 7993              		.loc 2 258 27 view .LVU2412
 7994              	.LBB641:
 260:Core/cmsis_gcc.h **** }
 7995              		.loc 2 260 3 view .LVU2413
 7996              		.syntax divided
 7997              	@ 260 "Core/cmsis_gcc.h" 1
 7998 0022 BFF36F8F 		isb 0xF
 7999              	@ 0 "" 2
 8000              		.thumb
 8001              		.syntax unified
 8002              	.LBE641:
 8003              	.LBE640:
 8004              		.loc 1 3786 5 discriminator 1 view .LVU2414
 8005              	.LBB642:
 8006              	.LBI642:
1204:Core/cmsis_gcc.h **** {
 8007              		.loc 2 1204 31 view .LVU2415
 8008              	.LBB643:
1206:Core/cmsis_gcc.h **** 
 8009              		.loc 2 1206 3 view .LVU2416
1208:Core/cmsis_gcc.h ****   return(result);
 8010              		.loc 2 1208 3 view .LVU2417
 8011              		.syntax divided
 8012              	@ 1208 "Core/cmsis_gcc.h" 1
 8013 0026 EFF31083 		MRS r3, primask
 8014              	@ 0 "" 2
 8015              	.LVL607:
 8016              		.loc 2 1209 3 view .LVU2418
 8017              		.loc 2 1209 3 is_stmt 0 view .LVU2419
 8018              		.thumb
 8019              		.syntax unified
 8020              	.LBE643:
ARM GAS  /tmp/ccWBHqpW.s 			page 254


 8021              	.LBE642:
 8022              		.loc 1 3786 5 is_stmt 1 discriminator 2 view .LVU2420
 8023              	.LBB644:
 8024              	.LBI644:
 960:Core/cmsis_gcc.h **** {
 8025              		.loc 2 960 27 view .LVU2421
 8026              	.LBB645:
 962:Core/cmsis_gcc.h **** }
 8027              		.loc 2 962 3 view .LVU2422
 8028              		.syntax divided
 8029              	@ 962 "Core/cmsis_gcc.h" 1
 8030 002a 72B6     		cpsid i
 8031              	@ 0 "" 2
 8032              		.thumb
 8033              		.syntax unified
 8034              	.LBE645:
 8035              	.LBE644:
 8036              		.loc 1 3786 5 discriminator 3 view .LVU2423
 8037 002c 144B     		ldr	r3, .L290
 8038 002e 154A     		ldr	r2, .L290+4
3787:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~(TIM_OCREF_CLR_Source >> 24));
 8039              		.loc 1 3787 50 is_stmt 0 view .LVU2424
 8040 0030 000E     		lsrs	r0, r0, #24
 8041              	.LVL608:
3786:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~(TIM_OCREF_CLR_Source >> 24));
 8042              		.loc 1 3786 5 discriminator 3 view .LVU2425
 8043 0032 1A60     		str	r2, [r3]
3786:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~(TIM_OCREF_CLR_Source >> 24));
 8044              		.loc 1 3786 21 is_stmt 1 discriminator 3 view .LVU2426
 8045              		.loc 1 3787 5 view .LVU2427
 8046              		.loc 1 3787 12 is_stmt 0 view .LVU2428
 8047 0034 144A     		ldr	r2, .L290+8
 8048 0036 136B     		ldr	r3, [r2, #48]
 8049              		.loc 1 3787 23 view .LVU2429
 8050 0038 8343     		bics	r3, r0
 8051 003a 1363     		str	r3, [r2, #48]
3788:Library/src/lcm32f06x_tim.c ****     __dekey();
 8052              		.loc 1 3788 5 is_stmt 1 view .LVU2430
 8053              	.LBB646:
 8054              	.LBI646:
 949:Core/cmsis_gcc.h **** {
 8055              		.loc 2 949 27 view .LVU2431
 8056              	.LBB647:
 951:Core/cmsis_gcc.h **** }
 8057              		.loc 2 951 3 view .LVU2432
 8058              		.syntax divided
 8059              	@ 951 "Core/cmsis_gcc.h" 1
 8060 003c 62B6     		cpsie i
 8061              	@ 0 "" 2
 8062              		.thumb
 8063              		.syntax unified
 8064              	.LBE647:
 8065              	.LBE646:
 8066              		.loc 1 3788 14 discriminator 1 view .LVU2433
 8067              	.L284:
3789:Library/src/lcm32f06x_tim.c ****   }
3790:Library/src/lcm32f06x_tim.c ****   else if (TIM_Level == TIM_InputLevel_Low)  // TIM1 OCREF_CLR 触发源有效电平为低
ARM GAS  /tmp/ccWBHqpW.s 			page 255


3791:Library/src/lcm32f06x_tim.c ****   {
3792:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
3793:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 |= (TIM_OCREF_CLR_Source >> 24);
3794:Library/src/lcm32f06x_tim.c ****     __dekey();
3795:Library/src/lcm32f06x_tim.c ****   }
3796:Library/src/lcm32f06x_tim.c **** }
 8068              		.loc 1 3796 1 is_stmt 0 view .LVU2434
 8069              		@ sp needed
 8070 003e 7047     		bx	lr
 8071              	.LVL609:
 8072              	.L285:
3779:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 8073              		.loc 1 3779 5 is_stmt 1 view .LVU2435
 8074              	.LBB648:
 8075              	.LBI648:
 258:Core/cmsis_gcc.h **** {
 8076              		.loc 2 258 27 view .LVU2436
 8077              	.LBB649:
 260:Core/cmsis_gcc.h **** }
 8078              		.loc 2 260 3 view .LVU2437
 8079              		.syntax divided
 8080              	@ 260 "Core/cmsis_gcc.h" 1
 8081 0040 BFF36F8F 		isb 0xF
 8082              	@ 0 "" 2
 8083              		.thumb
 8084              		.syntax unified
 8085              	.LBE649:
 8086              	.LBE648:
3779:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 8087              		.loc 1 3779 5 discriminator 1 view .LVU2438
 8088              	.LBB650:
 8089              	.LBI650:
1204:Core/cmsis_gcc.h **** {
 8090              		.loc 2 1204 31 view .LVU2439
 8091              	.LBB651:
1206:Core/cmsis_gcc.h **** 
 8092              		.loc 2 1206 3 view .LVU2440
1208:Core/cmsis_gcc.h ****   return(result);
 8093              		.loc 2 1208 3 view .LVU2441
 8094              		.syntax divided
 8095              	@ 1208 "Core/cmsis_gcc.h" 1
 8096 0044 EFF31083 		MRS r3, primask
 8097              	@ 0 "" 2
 8098              	.LVL610:
 8099              		.loc 2 1209 3 view .LVU2442
 8100              		.loc 2 1209 3 is_stmt 0 view .LVU2443
 8101              		.thumb
 8102              		.syntax unified
 8103              	.LBE651:
 8104              	.LBE650:
3779:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 8105              		.loc 1 3779 5 is_stmt 1 discriminator 2 view .LVU2444
 8106              	.LBB652:
 8107              	.LBI652:
 960:Core/cmsis_gcc.h **** {
 8108              		.loc 2 960 27 view .LVU2445
 8109              	.LBB653:
ARM GAS  /tmp/ccWBHqpW.s 			page 256


 962:Core/cmsis_gcc.h **** }
 8110              		.loc 2 962 3 view .LVU2446
 8111              		.syntax divided
 8112              	@ 962 "Core/cmsis_gcc.h" 1
 8113 0048 72B6     		cpsid i
 8114              	@ 0 "" 2
 8115              		.thumb
 8116              		.syntax unified
 8117              	.LBE653:
 8118              	.LBE652:
3779:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 8119              		.loc 1 3779 5 discriminator 3 view .LVU2447
 8120 004a 0D4B     		ldr	r3, .L290
 8121 004c 0D4A     		ldr	r2, .L290+4
 8122              	.LVL611:
3779:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 8123              		.loc 1 3779 5 is_stmt 0 discriminator 3 view .LVU2448
 8124 004e 1A60     		str	r2, [r3]
3779:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 8125              		.loc 1 3779 21 is_stmt 1 discriminator 3 view .LVU2449
3780:Library/src/lcm32f06x_tim.c ****     __dekey();
 8126              		.loc 1 3780 5 view .LVU2450
3780:Library/src/lcm32f06x_tim.c ****     __dekey();
 8127              		.loc 1 3780 12 is_stmt 0 view .LVU2451
 8128 0050 0D4A     		ldr	r2, .L290+8
 8129 0052 136B     		ldr	r3, [r2, #48]
3780:Library/src/lcm32f06x_tim.c ****     __dekey();
 8130              		.loc 1 3780 23 view .LVU2452
 8131 0054 8343     		bics	r3, r0
 8132 0056 1363     		str	r3, [r2, #48]
3781:Library/src/lcm32f06x_tim.c ****   }
 8133              		.loc 1 3781 5 is_stmt 1 view .LVU2453
 8134              	.LBB654:
 8135              	.LBI654:
 949:Core/cmsis_gcc.h **** {
 8136              		.loc 2 949 27 view .LVU2454
 8137              	.LBB655:
 951:Core/cmsis_gcc.h **** }
 8138              		.loc 2 951 3 view .LVU2455
 8139              		.syntax divided
 8140              	@ 951 "Core/cmsis_gcc.h" 1
 8141 0058 62B6     		cpsie i
 8142              	@ 0 "" 2
 8143              		.thumb
 8144              		.syntax unified
 8145              	.LBE655:
 8146              	.LBE654:
3781:Library/src/lcm32f06x_tim.c ****   }
 8147              		.loc 1 3781 14 view .LVU2456
3784:Library/src/lcm32f06x_tim.c ****   {
 8148              		.loc 1 3784 3 view .LVU2457
3784:Library/src/lcm32f06x_tim.c ****   {
 8149              		.loc 1 3784 6 is_stmt 0 view .LVU2458
 8150 005a 0029     		cmp	r1, #0
 8151 005c E1D0     		beq	.L289
 8152              	.L287:
3790:Library/src/lcm32f06x_tim.c ****   {
ARM GAS  /tmp/ccWBHqpW.s 			page 257


 8153              		.loc 1 3790 8 is_stmt 1 view .LVU2459
3790:Library/src/lcm32f06x_tim.c ****   {
 8154              		.loc 1 3790 11 is_stmt 0 view .LVU2460
 8155 005e 0129     		cmp	r1, #1
 8156 0060 EDD1     		bne	.L284
3792:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 |= (TIM_OCREF_CLR_Source >> 24);
 8157              		.loc 1 3792 5 is_stmt 1 view .LVU2461
 8158              	.LBB656:
 8159              	.LBI656:
 258:Core/cmsis_gcc.h **** {
 8160              		.loc 2 258 27 view .LVU2462
 8161              	.LBB657:
 260:Core/cmsis_gcc.h **** }
 8162              		.loc 2 260 3 view .LVU2463
 8163              		.syntax divided
 8164              	@ 260 "Core/cmsis_gcc.h" 1
 8165 0062 BFF36F8F 		isb 0xF
 8166              	@ 0 "" 2
 8167              		.thumb
 8168              		.syntax unified
 8169              	.LBE657:
 8170              	.LBE656:
3792:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 |= (TIM_OCREF_CLR_Source >> 24);
 8171              		.loc 1 3792 5 discriminator 1 view .LVU2464
 8172              	.LBB658:
 8173              	.LBI658:
1204:Core/cmsis_gcc.h **** {
 8174              		.loc 2 1204 31 view .LVU2465
 8175              	.LBB659:
1206:Core/cmsis_gcc.h **** 
 8176              		.loc 2 1206 3 view .LVU2466
1208:Core/cmsis_gcc.h ****   return(result);
 8177              		.loc 2 1208 3 view .LVU2467
 8178              		.syntax divided
 8179              	@ 1208 "Core/cmsis_gcc.h" 1
 8180 0066 EFF31083 		MRS r3, primask
 8181              	@ 0 "" 2
 8182              	.LVL612:
 8183              		.loc 2 1209 3 view .LVU2468
 8184              		.loc 2 1209 3 is_stmt 0 view .LVU2469
 8185              		.thumb
 8186              		.syntax unified
 8187              	.LBE659:
 8188              	.LBE658:
3792:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 |= (TIM_OCREF_CLR_Source >> 24);
 8189              		.loc 1 3792 5 is_stmt 1 discriminator 2 view .LVU2470
 8190              	.LBB660:
 8191              	.LBI660:
 960:Core/cmsis_gcc.h **** {
 8192              		.loc 2 960 27 view .LVU2471
 8193              	.LBB661:
 962:Core/cmsis_gcc.h **** }
 8194              		.loc 2 962 3 view .LVU2472
 8195              		.syntax divided
 8196              	@ 962 "Core/cmsis_gcc.h" 1
 8197 006a 72B6     		cpsid i
 8198              	@ 0 "" 2
ARM GAS  /tmp/ccWBHqpW.s 			page 258


 8199              		.thumb
 8200              		.syntax unified
 8201              	.LBE661:
 8202              	.LBE660:
3792:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 |= (TIM_OCREF_CLR_Source >> 24);
 8203              		.loc 1 3792 5 discriminator 3 view .LVU2473
 8204 006c 044B     		ldr	r3, .L290
 8205 006e 054A     		ldr	r2, .L290+4
3793:Library/src/lcm32f06x_tim.c ****     __dekey();
 8206              		.loc 1 3793 48 is_stmt 0 view .LVU2474
 8207 0070 000E     		lsrs	r0, r0, #24
 8208              	.LVL613:
3792:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 |= (TIM_OCREF_CLR_Source >> 24);
 8209              		.loc 1 3792 5 discriminator 3 view .LVU2475
 8210 0072 1A60     		str	r2, [r3]
3792:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG4 |= (TIM_OCREF_CLR_Source >> 24);
 8211              		.loc 1 3792 21 is_stmt 1 discriminator 3 view .LVU2476
3793:Library/src/lcm32f06x_tim.c ****     __dekey();
 8212              		.loc 1 3793 5 view .LVU2477
3793:Library/src/lcm32f06x_tim.c ****     __dekey();
 8213              		.loc 1 3793 12 is_stmt 0 view .LVU2478
 8214 0074 044B     		ldr	r3, .L290+8
 8215 0076 1A6B     		ldr	r2, [r3, #48]
3793:Library/src/lcm32f06x_tim.c ****     __dekey();
 8216              		.loc 1 3793 23 view .LVU2479
 8217 0078 1043     		orrs	r0, r2
 8218 007a 1863     		str	r0, [r3, #48]
3794:Library/src/lcm32f06x_tim.c ****   }
 8219              		.loc 1 3794 5 is_stmt 1 view .LVU2480
 8220              	.LBB662:
 8221              	.LBI662:
 949:Core/cmsis_gcc.h **** {
 8222              		.loc 2 949 27 view .LVU2481
 8223              	.LBB663:
 951:Core/cmsis_gcc.h **** }
 8224              		.loc 2 951 3 view .LVU2482
 8225              		.syntax divided
 8226              	@ 951 "Core/cmsis_gcc.h" 1
 8227 007c 62B6     		cpsie i
 8228              	@ 0 "" 2
 8229              		.thumb
 8230              		.syntax unified
 8231              	.LBE663:
 8232              	.LBE662:
3794:Library/src/lcm32f06x_tim.c ****   }
 8233              		.loc 1 3794 14 view .LVU2483
 8234              		.loc 1 3796 1 is_stmt 0 view .LVU2484
 8235 007e DEE7     		b	.L284
 8236              	.L291:
 8237              		.align	2
 8238              	.L290:
 8239 0080 7C700048 		.word	1207988348
 8240 0084 9A65FA05 		.word	100296090
 8241 0088 00700048 		.word	1207988224
 8242              		.cfi_endproc
 8243              	.LFE162:
 8245              		.section	.text.TIM17_BreakSourceCfg,"ax",%progbits
ARM GAS  /tmp/ccWBHqpW.s 			page 259


 8246              		.align	1
 8247              		.p2align 2,,3
 8248              		.global	TIM17_BreakSourceCfg
 8249              		.syntax unified
 8250              		.code	16
 8251              		.thumb_func
 8253              	TIM17_BreakSourceCfg:
 8254              	.LVL614:
 8255              	.LFB163:
3797:Library/src/lcm32f06x_tim.c **** 
3798:Library/src/lcm32f06x_tim.c **** /**
3799:Library/src/lcm32f06x_tim.c ****   * @name   TIM17_BreakSourceCfg
3800:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM17 brake trigger input source configuration.
3801:Library/src/lcm32f06x_tim.c ****   *         CN: TIM17 刹车触发输入源配置。
3802:Library/src/lcm32f06x_tim.c ****   * @param  TIM_BreakSource: 
3803:Library/src/lcm32f06x_tim.c ****   *         EN: Brake input trigger source selection.
3804:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源选择。
3805:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Level: 
3806:Library/src/lcm32f06x_tim.c ****   *         EN: Effective level selection of TIM17 brake input trigger source.
3807:Library/src/lcm32f06x_tim.c ****   *         CN: TIM17 刹车输入触发源的有效电平选择。
3808:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
3809:Library/src/lcm32f06x_tim.c ****   *         EN: New status of brake input trigger source.
3810:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源新状态。
3811:Library/src/lcm32f06x_tim.c ****   * @retval None
3812:Library/src/lcm32f06x_tim.c ****   */
3813:Library/src/lcm32f06x_tim.c **** void TIM17_BreakSourceCfg(uint32_t TIM_BreakSource, uint32_t TIM_Level, FunctionalState NewState)
3814:Library/src/lcm32f06x_tim.c **** {
 8256              		.loc 1 3814 1 is_stmt 1 view -0
 8257              		.cfi_startproc
 8258              		@ args = 0, pretend = 0, frame = 0
 8259              		@ frame_needed = 0, uses_anonymous_args = 0
 8260              		@ link register save eliminated.
3815:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM17_BreakSource(TIM_BreakSource));
 8261              		.loc 1 3815 3 view .LVU2486
3816:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM_InputLevel(TIM_Level));
 8262              		.loc 1 3816 3 view .LVU2487
3817:Library/src/lcm32f06x_tim.c **** 
3818:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 8263              		.loc 1 3818 3 view .LVU2488
 8264              		.loc 1 3818 6 is_stmt 0 view .LVU2489
 8265 0000 002A     		cmp	r2, #0
 8266 0002 1DD0     		beq	.L293
3819:Library/src/lcm32f06x_tim.c ****   {
3820:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 8267              		.loc 1 3820 5 is_stmt 1 view .LVU2490
 8268              	.LBB664:
 8269              	.LBI664:
 258:Core/cmsis_gcc.h **** {
 8270              		.loc 2 258 27 view .LVU2491
 8271              	.LBB665:
 260:Core/cmsis_gcc.h **** }
 8272              		.loc 2 260 3 view .LVU2492
 8273              		.syntax divided
 8274              	@ 260 "Core/cmsis_gcc.h" 1
 8275 0004 BFF36F8F 		isb 0xF
 8276              	@ 0 "" 2
 8277              		.thumb
ARM GAS  /tmp/ccWBHqpW.s 			page 260


 8278              		.syntax unified
 8279              	.LBE665:
 8280              	.LBE664:
 8281              		.loc 1 3820 5 discriminator 1 view .LVU2493
 8282              	.LBB666:
 8283              	.LBI666:
1204:Core/cmsis_gcc.h **** {
 8284              		.loc 2 1204 31 view .LVU2494
 8285              	.LBB667:
1206:Core/cmsis_gcc.h **** 
 8286              		.loc 2 1206 3 view .LVU2495
1208:Core/cmsis_gcc.h ****   return(result);
 8287              		.loc 2 1208 3 view .LVU2496
 8288              		.syntax divided
 8289              	@ 1208 "Core/cmsis_gcc.h" 1
 8290 0008 EFF31083 		MRS r3, primask
 8291              	@ 0 "" 2
 8292              	.LVL615:
 8293              		.loc 2 1209 3 view .LVU2497
 8294              		.loc 2 1209 3 is_stmt 0 view .LVU2498
 8295              		.thumb
 8296              		.syntax unified
 8297              	.LBE667:
 8298              	.LBE666:
 8299              		.loc 1 3820 5 is_stmt 1 discriminator 2 view .LVU2499
 8300              	.LBB668:
 8301              	.LBI668:
 960:Core/cmsis_gcc.h **** {
 8302              		.loc 2 960 27 view .LVU2500
 8303              	.LBB669:
 962:Core/cmsis_gcc.h **** }
 8304              		.loc 2 962 3 view .LVU2501
 8305              		.syntax divided
 8306              	@ 962 "Core/cmsis_gcc.h" 1
 8307 000c 72B6     		cpsid i
 8308              	@ 0 "" 2
 8309              		.thumb
 8310              		.syntax unified
 8311              	.LBE669:
 8312              	.LBE668:
 8313              		.loc 1 3820 5 discriminator 3 view .LVU2502
 8314 000e 1C4B     		ldr	r3, .L298
 8315 0010 1C4A     		ldr	r2, .L298+4
 8316              	.LVL616:
 8317              		.loc 1 3820 5 is_stmt 0 discriminator 3 view .LVU2503
 8318 0012 1A60     		str	r2, [r3]
 8319              		.loc 1 3820 21 is_stmt 1 discriminator 3 view .LVU2504
3821:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 |= TIM_BreakSource; // TIM17 break 输入触发源
 8320              		.loc 1 3821 5 view .LVU2505
 8321              		.loc 1 3821 12 is_stmt 0 view .LVU2506
 8322 0014 1C4A     		ldr	r2, .L298+8
 8323 0016 536B     		ldr	r3, [r2, #52]
 8324              		.loc 1 3821 23 view .LVU2507
 8325 0018 0343     		orrs	r3, r0
 8326 001a 5363     		str	r3, [r2, #52]
3822:Library/src/lcm32f06x_tim.c ****     __dekey();
 8327              		.loc 1 3822 5 is_stmt 1 view .LVU2508
ARM GAS  /tmp/ccWBHqpW.s 			page 261


 8328              	.LBB670:
 8329              	.LBI670:
 949:Core/cmsis_gcc.h **** {
 8330              		.loc 2 949 27 view .LVU2509
 8331              	.LBB671:
 951:Core/cmsis_gcc.h **** }
 8332              		.loc 2 951 3 view .LVU2510
 8333              		.syntax divided
 8334              	@ 951 "Core/cmsis_gcc.h" 1
 8335 001c 62B6     		cpsie i
 8336              	@ 0 "" 2
 8337              		.thumb
 8338              		.syntax unified
 8339              	.LBE671:
 8340              	.LBE670:
 8341              		.loc 1 3822 14 discriminator 1 view .LVU2511
3823:Library/src/lcm32f06x_tim.c ****   }
3824:Library/src/lcm32f06x_tim.c ****   else
3825:Library/src/lcm32f06x_tim.c ****   {
3826:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
3827:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 &= (~TIM_BreakSource); // TIM17 break 输入触发源
3828:Library/src/lcm32f06x_tim.c ****     __dekey();
 8342              		.loc 1 3828 14 view .LVU2512
3829:Library/src/lcm32f06x_tim.c ****   }
3830:Library/src/lcm32f06x_tim.c **** 
3831:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM17 break 触发源有效电平为高
 8343              		.loc 1 3831 3 view .LVU2513
 8344              		.loc 1 3831 6 is_stmt 0 view .LVU2514
 8345 001e 0029     		cmp	r1, #0
 8346 0020 1DD1     		bne	.L295
 8347              	.L297:
3832:Library/src/lcm32f06x_tim.c ****   {
3833:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 8348              		.loc 1 3833 5 is_stmt 1 view .LVU2515
 8349              	.LBB672:
 8350              	.LBI672:
 258:Core/cmsis_gcc.h **** {
 8351              		.loc 2 258 27 view .LVU2516
 8352              	.LBB673:
 260:Core/cmsis_gcc.h **** }
 8353              		.loc 2 260 3 view .LVU2517
 8354              		.syntax divided
 8355              	@ 260 "Core/cmsis_gcc.h" 1
 8356 0022 BFF36F8F 		isb 0xF
 8357              	@ 0 "" 2
 8358              		.thumb
 8359              		.syntax unified
 8360              	.LBE673:
 8361              	.LBE672:
 8362              		.loc 1 3833 5 discriminator 1 view .LVU2518
 8363              	.LBB674:
 8364              	.LBI674:
1204:Core/cmsis_gcc.h **** {
 8365              		.loc 2 1204 31 view .LVU2519
 8366              	.LBB675:
1206:Core/cmsis_gcc.h **** 
 8367              		.loc 2 1206 3 view .LVU2520
ARM GAS  /tmp/ccWBHqpW.s 			page 262


1208:Core/cmsis_gcc.h ****   return(result);
 8368              		.loc 2 1208 3 view .LVU2521
 8369              		.syntax divided
 8370              	@ 1208 "Core/cmsis_gcc.h" 1
 8371 0026 EFF31083 		MRS r3, primask
 8372              	@ 0 "" 2
 8373              	.LVL617:
 8374              		.loc 2 1209 3 view .LVU2522
 8375              		.loc 2 1209 3 is_stmt 0 view .LVU2523
 8376              		.thumb
 8377              		.syntax unified
 8378              	.LBE675:
 8379              	.LBE674:
 8380              		.loc 1 3833 5 is_stmt 1 discriminator 2 view .LVU2524
 8381              	.LBB676:
 8382              	.LBI676:
 960:Core/cmsis_gcc.h **** {
 8383              		.loc 2 960 27 view .LVU2525
 8384              	.LBB677:
 962:Core/cmsis_gcc.h **** }
 8385              		.loc 2 962 3 view .LVU2526
 8386              		.syntax divided
 8387              	@ 962 "Core/cmsis_gcc.h" 1
 8388 002a 72B6     		cpsid i
 8389              	@ 0 "" 2
 8390              		.thumb
 8391              		.syntax unified
 8392              	.LBE677:
 8393              	.LBE676:
 8394              		.loc 1 3833 5 discriminator 3 view .LVU2527
 8395 002c 144B     		ldr	r3, .L298
 8396 002e 154A     		ldr	r2, .L298+4
3834:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 &= (~(TIM_BreakSource >> 8));
 8397              		.loc 1 3834 45 is_stmt 0 view .LVU2528
 8398 0030 000A     		lsrs	r0, r0, #8
 8399              	.LVL618:
3833:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 &= (~(TIM_BreakSource >> 8));
 8400              		.loc 1 3833 5 discriminator 3 view .LVU2529
 8401 0032 1A60     		str	r2, [r3]
3833:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 &= (~(TIM_BreakSource >> 8));
 8402              		.loc 1 3833 21 is_stmt 1 discriminator 3 view .LVU2530
 8403              		.loc 1 3834 5 view .LVU2531
 8404              		.loc 1 3834 12 is_stmt 0 view .LVU2532
 8405 0034 144A     		ldr	r2, .L298+8
 8406 0036 536B     		ldr	r3, [r2, #52]
 8407              		.loc 1 3834 23 view .LVU2533
 8408 0038 8343     		bics	r3, r0
 8409 003a 5363     		str	r3, [r2, #52]
3835:Library/src/lcm32f06x_tim.c ****     __dekey();
 8410              		.loc 1 3835 5 is_stmt 1 view .LVU2534
 8411              	.LBB678:
 8412              	.LBI678:
 949:Core/cmsis_gcc.h **** {
 8413              		.loc 2 949 27 view .LVU2535
 8414              	.LBB679:
 951:Core/cmsis_gcc.h **** }
 8415              		.loc 2 951 3 view .LVU2536
ARM GAS  /tmp/ccWBHqpW.s 			page 263


 8416              		.syntax divided
 8417              	@ 951 "Core/cmsis_gcc.h" 1
 8418 003c 62B6     		cpsie i
 8419              	@ 0 "" 2
 8420              		.thumb
 8421              		.syntax unified
 8422              	.LBE679:
 8423              	.LBE678:
 8424              		.loc 1 3835 14 discriminator 1 view .LVU2537
 8425              	.L292:
3836:Library/src/lcm32f06x_tim.c ****   }
3837:Library/src/lcm32f06x_tim.c ****   else if (TIM_Level == TIM_InputLevel_Low)  // TIM17 break 触发源有效电平为低
3838:Library/src/lcm32f06x_tim.c ****   {
3839:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
3840:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 |= (TIM_BreakSource >> 8);
3841:Library/src/lcm32f06x_tim.c ****     __dekey();
3842:Library/src/lcm32f06x_tim.c ****   }
3843:Library/src/lcm32f06x_tim.c **** }
 8426              		.loc 1 3843 1 is_stmt 0 view .LVU2538
 8427              		@ sp needed
 8428 003e 7047     		bx	lr
 8429              	.LVL619:
 8430              	.L293:
3826:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 &= (~TIM_BreakSource); // TIM17 break 输入触发源
 8431              		.loc 1 3826 5 is_stmt 1 view .LVU2539
 8432              	.LBB680:
 8433              	.LBI680:
 258:Core/cmsis_gcc.h **** {
 8434              		.loc 2 258 27 view .LVU2540
 8435              	.LBB681:
 260:Core/cmsis_gcc.h **** }
 8436              		.loc 2 260 3 view .LVU2541
 8437              		.syntax divided
 8438              	@ 260 "Core/cmsis_gcc.h" 1
 8439 0040 BFF36F8F 		isb 0xF
 8440              	@ 0 "" 2
 8441              		.thumb
 8442              		.syntax unified
 8443              	.LBE681:
 8444              	.LBE680:
3826:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 &= (~TIM_BreakSource); // TIM17 break 输入触发源
 8445              		.loc 1 3826 5 discriminator 1 view .LVU2542
 8446              	.LBB682:
 8447              	.LBI682:
1204:Core/cmsis_gcc.h **** {
 8448              		.loc 2 1204 31 view .LVU2543
 8449              	.LBB683:
1206:Core/cmsis_gcc.h **** 
 8450              		.loc 2 1206 3 view .LVU2544
1208:Core/cmsis_gcc.h ****   return(result);
 8451              		.loc 2 1208 3 view .LVU2545
 8452              		.syntax divided
 8453              	@ 1208 "Core/cmsis_gcc.h" 1
 8454 0044 EFF31083 		MRS r3, primask
 8455              	@ 0 "" 2
 8456              	.LVL620:
 8457              		.loc 2 1209 3 view .LVU2546
ARM GAS  /tmp/ccWBHqpW.s 			page 264


 8458              		.loc 2 1209 3 is_stmt 0 view .LVU2547
 8459              		.thumb
 8460              		.syntax unified
 8461              	.LBE683:
 8462              	.LBE682:
3826:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 &= (~TIM_BreakSource); // TIM17 break 输入触发源
 8463              		.loc 1 3826 5 is_stmt 1 discriminator 2 view .LVU2548
 8464              	.LBB684:
 8465              	.LBI684:
 960:Core/cmsis_gcc.h **** {
 8466              		.loc 2 960 27 view .LVU2549
 8467              	.LBB685:
 962:Core/cmsis_gcc.h **** }
 8468              		.loc 2 962 3 view .LVU2550
 8469              		.syntax divided
 8470              	@ 962 "Core/cmsis_gcc.h" 1
 8471 0048 72B6     		cpsid i
 8472              	@ 0 "" 2
 8473              		.thumb
 8474              		.syntax unified
 8475              	.LBE685:
 8476              	.LBE684:
3826:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 &= (~TIM_BreakSource); // TIM17 break 输入触发源
 8477              		.loc 1 3826 5 discriminator 3 view .LVU2551
 8478 004a 0D4B     		ldr	r3, .L298
 8479 004c 0D4A     		ldr	r2, .L298+4
 8480              	.LVL621:
3826:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 &= (~TIM_BreakSource); // TIM17 break 输入触发源
 8481              		.loc 1 3826 5 is_stmt 0 discriminator 3 view .LVU2552
 8482 004e 1A60     		str	r2, [r3]
3826:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 &= (~TIM_BreakSource); // TIM17 break 输入触发源
 8483              		.loc 1 3826 21 is_stmt 1 discriminator 3 view .LVU2553
3827:Library/src/lcm32f06x_tim.c ****     __dekey();
 8484              		.loc 1 3827 5 view .LVU2554
3827:Library/src/lcm32f06x_tim.c ****     __dekey();
 8485              		.loc 1 3827 12 is_stmt 0 view .LVU2555
 8486 0050 0D4A     		ldr	r2, .L298+8
 8487 0052 536B     		ldr	r3, [r2, #52]
3827:Library/src/lcm32f06x_tim.c ****     __dekey();
 8488              		.loc 1 3827 23 view .LVU2556
 8489 0054 8343     		bics	r3, r0
 8490 0056 5363     		str	r3, [r2, #52]
3828:Library/src/lcm32f06x_tim.c ****   }
 8491              		.loc 1 3828 5 is_stmt 1 view .LVU2557
 8492              	.LBB686:
 8493              	.LBI686:
 949:Core/cmsis_gcc.h **** {
 8494              		.loc 2 949 27 view .LVU2558
 8495              	.LBB687:
 951:Core/cmsis_gcc.h **** }
 8496              		.loc 2 951 3 view .LVU2559
 8497              		.syntax divided
 8498              	@ 951 "Core/cmsis_gcc.h" 1
 8499 0058 62B6     		cpsie i
 8500              	@ 0 "" 2
 8501              		.thumb
 8502              		.syntax unified
ARM GAS  /tmp/ccWBHqpW.s 			page 265


 8503              	.LBE687:
 8504              	.LBE686:
3828:Library/src/lcm32f06x_tim.c ****   }
 8505              		.loc 1 3828 14 view .LVU2560
3831:Library/src/lcm32f06x_tim.c ****   {
 8506              		.loc 1 3831 3 view .LVU2561
3831:Library/src/lcm32f06x_tim.c ****   {
 8507              		.loc 1 3831 6 is_stmt 0 view .LVU2562
 8508 005a 0029     		cmp	r1, #0
 8509 005c E1D0     		beq	.L297
 8510              	.L295:
3837:Library/src/lcm32f06x_tim.c ****   {
 8511              		.loc 1 3837 8 is_stmt 1 view .LVU2563
3837:Library/src/lcm32f06x_tim.c ****   {
 8512              		.loc 1 3837 11 is_stmt 0 view .LVU2564
 8513 005e 0129     		cmp	r1, #1
 8514 0060 EDD1     		bne	.L292
3839:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 |= (TIM_BreakSource >> 8);
 8515              		.loc 1 3839 5 is_stmt 1 view .LVU2565
 8516              	.LBB688:
 8517              	.LBI688:
 258:Core/cmsis_gcc.h **** {
 8518              		.loc 2 258 27 view .LVU2566
 8519              	.LBB689:
 260:Core/cmsis_gcc.h **** }
 8520              		.loc 2 260 3 view .LVU2567
 8521              		.syntax divided
 8522              	@ 260 "Core/cmsis_gcc.h" 1
 8523 0062 BFF36F8F 		isb 0xF
 8524              	@ 0 "" 2
 8525              		.thumb
 8526              		.syntax unified
 8527              	.LBE689:
 8528              	.LBE688:
3839:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 |= (TIM_BreakSource >> 8);
 8529              		.loc 1 3839 5 discriminator 1 view .LVU2568
 8530              	.LBB690:
 8531              	.LBI690:
1204:Core/cmsis_gcc.h **** {
 8532              		.loc 2 1204 31 view .LVU2569
 8533              	.LBB691:
1206:Core/cmsis_gcc.h **** 
 8534              		.loc 2 1206 3 view .LVU2570
1208:Core/cmsis_gcc.h ****   return(result);
 8535              		.loc 2 1208 3 view .LVU2571
 8536              		.syntax divided
 8537              	@ 1208 "Core/cmsis_gcc.h" 1
 8538 0066 EFF31083 		MRS r3, primask
 8539              	@ 0 "" 2
 8540              	.LVL622:
 8541              		.loc 2 1209 3 view .LVU2572
 8542              		.loc 2 1209 3 is_stmt 0 view .LVU2573
 8543              		.thumb
 8544              		.syntax unified
 8545              	.LBE691:
 8546              	.LBE690:
3839:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 |= (TIM_BreakSource >> 8);
ARM GAS  /tmp/ccWBHqpW.s 			page 266


 8547              		.loc 1 3839 5 is_stmt 1 discriminator 2 view .LVU2574
 8548              	.LBB692:
 8549              	.LBI692:
 960:Core/cmsis_gcc.h **** {
 8550              		.loc 2 960 27 view .LVU2575
 8551              	.LBB693:
 962:Core/cmsis_gcc.h **** }
 8552              		.loc 2 962 3 view .LVU2576
 8553              		.syntax divided
 8554              	@ 962 "Core/cmsis_gcc.h" 1
 8555 006a 72B6     		cpsid i
 8556              	@ 0 "" 2
 8557              		.thumb
 8558              		.syntax unified
 8559              	.LBE693:
 8560              	.LBE692:
3839:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 |= (TIM_BreakSource >> 8);
 8561              		.loc 1 3839 5 discriminator 3 view .LVU2577
 8562 006c 044B     		ldr	r3, .L298
 8563 006e 054A     		ldr	r2, .L298+4
3840:Library/src/lcm32f06x_tim.c ****     __dekey();
 8564              		.loc 1 3840 43 is_stmt 0 view .LVU2578
 8565 0070 000A     		lsrs	r0, r0, #8
 8566              	.LVL623:
3839:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 |= (TIM_BreakSource >> 8);
 8567              		.loc 1 3839 5 discriminator 3 view .LVU2579
 8568 0072 1A60     		str	r2, [r3]
3839:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG5 |= (TIM_BreakSource >> 8);
 8569              		.loc 1 3839 21 is_stmt 1 discriminator 3 view .LVU2580
3840:Library/src/lcm32f06x_tim.c ****     __dekey();
 8570              		.loc 1 3840 5 view .LVU2581
3840:Library/src/lcm32f06x_tim.c ****     __dekey();
 8571              		.loc 1 3840 12 is_stmt 0 view .LVU2582
 8572 0074 044B     		ldr	r3, .L298+8
 8573 0076 5A6B     		ldr	r2, [r3, #52]
3840:Library/src/lcm32f06x_tim.c ****     __dekey();
 8574              		.loc 1 3840 23 view .LVU2583
 8575 0078 1043     		orrs	r0, r2
 8576 007a 5863     		str	r0, [r3, #52]
3841:Library/src/lcm32f06x_tim.c ****   }
 8577              		.loc 1 3841 5 is_stmt 1 view .LVU2584
 8578              	.LBB694:
 8579              	.LBI694:
 949:Core/cmsis_gcc.h **** {
 8580              		.loc 2 949 27 view .LVU2585
 8581              	.LBB695:
 951:Core/cmsis_gcc.h **** }
 8582              		.loc 2 951 3 view .LVU2586
 8583              		.syntax divided
 8584              	@ 951 "Core/cmsis_gcc.h" 1
 8585 007c 62B6     		cpsie i
 8586              	@ 0 "" 2
 8587              		.thumb
 8588              		.syntax unified
 8589              	.LBE695:
 8590              	.LBE694:
3841:Library/src/lcm32f06x_tim.c ****   }
ARM GAS  /tmp/ccWBHqpW.s 			page 267


 8591              		.loc 1 3841 14 view .LVU2587
 8592              		.loc 1 3843 1 is_stmt 0 view .LVU2588
 8593 007e DEE7     		b	.L292
 8594              	.L299:
 8595              		.align	2
 8596              	.L298:
 8597 0080 7C700048 		.word	1207988348
 8598 0084 9A65FA05 		.word	100296090
 8599 0088 00700048 		.word	1207988224
 8600              		.cfi_endproc
 8601              	.LFE163:
 8603              		.section	.text.TIM15_BreakSourceCfg,"ax",%progbits
 8604              		.align	1
 8605              		.p2align 2,,3
 8606              		.global	TIM15_BreakSourceCfg
 8607              		.syntax unified
 8608              		.code	16
 8609              		.thumb_func
 8611              	TIM15_BreakSourceCfg:
 8612              	.LVL624:
 8613              	.LFB164:
3844:Library/src/lcm32f06x_tim.c **** 
3845:Library/src/lcm32f06x_tim.c **** /**
3846:Library/src/lcm32f06x_tim.c ****   * @name   TIM15_BreakSourceCfg
3847:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM15 brake trigger input source configuration.
3848:Library/src/lcm32f06x_tim.c ****   *         CN: TIM15 刹车触发输入源配置。
3849:Library/src/lcm32f06x_tim.c ****   * @param  TIM_BreakSource: 
3850:Library/src/lcm32f06x_tim.c ****   *         EN: Brake input trigger source selection.
3851:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源选择。
3852:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Level: 
3853:Library/src/lcm32f06x_tim.c ****   *         EN: Effective level selection of TIM15 brake input trigger source.
3854:Library/src/lcm32f06x_tim.c ****   *         CN: TIM15 刹车输入触发源的有效电平选择。
3855:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
3856:Library/src/lcm32f06x_tim.c ****   *         EN: New status of brake input trigger source.
3857:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源新状态。
3858:Library/src/lcm32f06x_tim.c ****   * @retval None
3859:Library/src/lcm32f06x_tim.c ****   */
3860:Library/src/lcm32f06x_tim.c **** void TIM15_BreakSourceCfg(uint32_t TIM_BreakSource, uint32_t TIM_Level, FunctionalState NewState)
3861:Library/src/lcm32f06x_tim.c **** {
 8614              		.loc 1 3861 1 is_stmt 1 view -0
 8615              		.cfi_startproc
 8616              		@ args = 0, pretend = 0, frame = 0
 8617              		@ frame_needed = 0, uses_anonymous_args = 0
 8618              		@ link register save eliminated.
3862:Library/src/lcm32f06x_tim.c ****   uint32_t temprg;
 8619              		.loc 1 3862 3 view .LVU2590
3863:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM15_BreakSource(TIM_BreakSource));
 8620              		.loc 1 3863 3 view .LVU2591
3864:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM_InputLevel(TIM_Level));
 8621              		.loc 1 3864 3 view .LVU2592
3865:Library/src/lcm32f06x_tim.c **** 
3866:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 8622              		.loc 1 3866 3 view .LVU2593
 8623              		.loc 1 3866 6 is_stmt 0 view .LVU2594
 8624 0000 002A     		cmp	r2, #0
 8625 0002 22D0     		beq	.L301
3867:Library/src/lcm32f06x_tim.c ****   {
ARM GAS  /tmp/ccWBHqpW.s 			page 268


3868:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 8626              		.loc 1 3868 5 is_stmt 1 view .LVU2595
 8627              	.LBB696:
 8628              	.LBI696:
 258:Core/cmsis_gcc.h **** {
 8629              		.loc 2 258 27 view .LVU2596
 8630              	.LBB697:
 260:Core/cmsis_gcc.h **** }
 8631              		.loc 2 260 3 view .LVU2597
 8632              		.syntax divided
 8633              	@ 260 "Core/cmsis_gcc.h" 1
 8634 0004 BFF36F8F 		isb 0xF
 8635              	@ 0 "" 2
 8636              		.thumb
 8637              		.syntax unified
 8638              	.LBE697:
 8639              	.LBE696:
 8640              		.loc 1 3868 5 discriminator 1 view .LVU2598
 8641              	.LBB698:
 8642              	.LBI698:
1204:Core/cmsis_gcc.h **** {
 8643              		.loc 2 1204 31 view .LVU2599
 8644              	.LBB699:
1206:Core/cmsis_gcc.h **** 
 8645              		.loc 2 1206 3 view .LVU2600
1208:Core/cmsis_gcc.h ****   return(result);
 8646              		.loc 2 1208 3 view .LVU2601
 8647              		.syntax divided
 8648              	@ 1208 "Core/cmsis_gcc.h" 1
 8649 0008 EFF31083 		MRS r3, primask
 8650              	@ 0 "" 2
 8651              	.LVL625:
 8652              		.loc 2 1209 3 view .LVU2602
 8653              		.loc 2 1209 3 is_stmt 0 view .LVU2603
 8654              		.thumb
 8655              		.syntax unified
 8656              	.LBE699:
 8657              	.LBE698:
 8658              		.loc 1 3868 5 is_stmt 1 discriminator 2 view .LVU2604
 8659              	.LBB700:
 8660              	.LBI700:
 960:Core/cmsis_gcc.h **** {
 8661              		.loc 2 960 27 view .LVU2605
 8662              	.LBB701:
 962:Core/cmsis_gcc.h **** }
 8663              		.loc 2 962 3 view .LVU2606
 8664              		.syntax divided
 8665              	@ 962 "Core/cmsis_gcc.h" 1
 8666 000c 72B6     		cpsid i
 8667              	@ 0 "" 2
 8668              		.thumb
 8669              		.syntax unified
 8670              	.LBE701:
 8671              	.LBE700:
 8672              		.loc 1 3868 5 discriminator 3 view .LVU2607
 8673 000e 334B     		ldr	r3, .L314
 8674 0010 334A     		ldr	r2, .L314+4
ARM GAS  /tmp/ccWBHqpW.s 			page 269


 8675              	.LVL626:
 8676              		.loc 1 3868 5 is_stmt 0 discriminator 3 view .LVU2608
 8677 0012 1A60     		str	r2, [r3]
 8678              		.loc 1 3868 21 is_stmt 1 discriminator 3 view .LVU2609
3869:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG6 |= TIM_BreakSource; // TIM15 break/break2 输入触发源
 8679              		.loc 1 3869 5 view .LVU2610
 8680              		.loc 1 3869 12 is_stmt 0 view .LVU2611
 8681 0014 334A     		ldr	r2, .L314+8
 8682 0016 936B     		ldr	r3, [r2, #56]
 8683              		.loc 1 3869 23 view .LVU2612
 8684 0018 0343     		orrs	r3, r0
 8685 001a 9363     		str	r3, [r2, #56]
3870:Library/src/lcm32f06x_tim.c ****     __dekey();
 8686              		.loc 1 3870 5 is_stmt 1 view .LVU2613
 8687              	.LBB702:
 8688              	.LBI702:
 949:Core/cmsis_gcc.h **** {
 8689              		.loc 2 949 27 view .LVU2614
 8690              	.LBB703:
 951:Core/cmsis_gcc.h **** }
 8691              		.loc 2 951 3 view .LVU2615
 8692              		.syntax divided
 8693              	@ 951 "Core/cmsis_gcc.h" 1
 8694 001c 62B6     		cpsie i
 8695              	@ 0 "" 2
 8696              		.thumb
 8697              		.syntax unified
 8698              	.LBE703:
 8699              	.LBE702:
 8700              		.loc 1 3870 14 discriminator 1 view .LVU2616
3871:Library/src/lcm32f06x_tim.c ****   }
3872:Library/src/lcm32f06x_tim.c ****   else
3873:Library/src/lcm32f06x_tim.c ****   {
3874:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
3875:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG6 &= (~TIM_BreakSource); // TIM15 break/break2 输入触发源
3876:Library/src/lcm32f06x_tim.c ****     __dekey();
 8701              		.loc 1 3876 14 view .LVU2617
3877:Library/src/lcm32f06x_tim.c ****   }
3878:Library/src/lcm32f06x_tim.c ****   
3879:Library/src/lcm32f06x_tim.c ****   temprg = SYSCTRL->EDU_CFG6;
 8702              		.loc 1 3879 3 view .LVU2618
 8703              		.loc 1 3879 10 is_stmt 0 view .LVU2619
 8704 001e 314B     		ldr	r3, .L314+8
 8705 0020 9A6B     		ldr	r2, [r3, #56]
 8706              	.LVL627:
3880:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM15 break 触发源有效电平为高
 8707              		.loc 1 3880 3 is_stmt 1 view .LVU2620
 8708              		.loc 1 3880 6 is_stmt 0 view .LVU2621
 8709 0022 0029     		cmp	r1, #0
 8710 0024 22D1     		bne	.L303
 8711              	.L313:
3881:Library/src/lcm32f06x_tim.c ****   {
3882:Library/src/lcm32f06x_tim.c ****     if (temprg & 0x00007F00)
 8712              		.loc 1 3882 5 is_stmt 1 view .LVU2622
 8713              		.loc 1 3882 16 is_stmt 0 view .LVU2623
 8714 0026 FE21     		movs	r1, #254
 8715              	.LVL628:
ARM GAS  /tmp/ccWBHqpW.s 			page 270


 8716              		.loc 1 3882 16 view .LVU2624
 8717 0028 C901     		lsls	r1, r1, #7
 8718              		.loc 1 3882 8 view .LVU2625
 8719 002a 0A42     		tst	r2, r1
 8720 002c 32D0     		beq	.L304
3883:Library/src/lcm32f06x_tim.c ****     {
3884:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
 8721              		.loc 1 3884 7 is_stmt 1 view .LVU2626
 8722              	.LBB704:
 8723              	.LBI704:
 258:Core/cmsis_gcc.h **** {
 8724              		.loc 2 258 27 view .LVU2627
 8725              	.LBB705:
 260:Core/cmsis_gcc.h **** }
 8726              		.loc 2 260 3 view .LVU2628
 8727              		.syntax divided
 8728              	@ 260 "Core/cmsis_gcc.h" 1
 8729 002e BFF36F8F 		isb 0xF
 8730              	@ 0 "" 2
 8731              		.thumb
 8732              		.syntax unified
 8733              	.LBE705:
 8734              	.LBE704:
 8735              		.loc 1 3884 7 discriminator 1 view .LVU2629
 8736              	.LBB706:
 8737              	.LBI706:
1204:Core/cmsis_gcc.h **** {
 8738              		.loc 2 1204 31 view .LVU2630
 8739              	.LBB707:
1206:Core/cmsis_gcc.h **** 
 8740              		.loc 2 1206 3 view .LVU2631
1208:Core/cmsis_gcc.h ****   return(result);
 8741              		.loc 2 1208 3 view .LVU2632
 8742              		.syntax divided
 8743              	@ 1208 "Core/cmsis_gcc.h" 1
 8744 0032 EFF31082 		MRS r2, primask
 8745              	@ 0 "" 2
 8746              	.LVL629:
 8747              		.loc 2 1209 3 view .LVU2633
 8748              		.loc 2 1209 3 is_stmt 0 view .LVU2634
 8749              		.thumb
 8750              		.syntax unified
 8751              	.LBE707:
 8752              	.LBE706:
 8753              		.loc 1 3884 7 is_stmt 1 discriminator 2 view .LVU2635
 8754              	.LBB708:
 8755              	.LBI708:
 960:Core/cmsis_gcc.h **** {
 8756              		.loc 2 960 27 view .LVU2636
 8757              	.LBB709:
 962:Core/cmsis_gcc.h **** }
 8758              		.loc 2 962 3 view .LVU2637
 8759              		.syntax divided
 8760              	@ 962 "Core/cmsis_gcc.h" 1
 8761 0036 72B6     		cpsid i
 8762              	@ 0 "" 2
 8763              		.thumb
ARM GAS  /tmp/ccWBHqpW.s 			page 271


 8764              		.syntax unified
 8765              	.LBE709:
 8766              	.LBE708:
 8767              		.loc 1 3884 7 discriminator 3 view .LVU2638
 8768 0038 284A     		ldr	r2, .L314
 8769 003a 2949     		ldr	r1, .L314+4
3885:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 &= (~(TIM_BreakSource >> 8));
 8770              		.loc 1 3885 47 is_stmt 0 view .LVU2639
 8771 003c 000A     		lsrs	r0, r0, #8
 8772              	.LVL630:
3884:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 &= (~(TIM_BreakSource >> 8));
 8773              		.loc 1 3884 7 discriminator 3 view .LVU2640
 8774 003e 1160     		str	r1, [r2]
3884:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 &= (~(TIM_BreakSource >> 8));
 8775              		.loc 1 3884 23 is_stmt 1 discriminator 3 view .LVU2641
 8776              		.loc 1 3885 7 view .LVU2642
 8777              		.loc 1 3885 14 is_stmt 0 view .LVU2643
 8778 0040 9A6B     		ldr	r2, [r3, #56]
 8779              		.loc 1 3885 25 view .LVU2644
 8780 0042 8243     		bics	r2, r0
 8781 0044 9A63     		str	r2, [r3, #56]
3886:Library/src/lcm32f06x_tim.c ****       __dekey();
 8782              		.loc 1 3886 7 is_stmt 1 view .LVU2645
 8783              	.LBB710:
 8784              	.LBI710:
 949:Core/cmsis_gcc.h **** {
 8785              		.loc 2 949 27 view .LVU2646
 8786              	.LBB711:
 951:Core/cmsis_gcc.h **** }
 8787              		.loc 2 951 3 view .LVU2647
 8788              		.syntax divided
 8789              	@ 951 "Core/cmsis_gcc.h" 1
 8790 0046 62B6     		cpsie i
 8791              	@ 0 "" 2
 8792              		.thumb
 8793              		.syntax unified
 8794              	.LBE711:
 8795              	.LBE710:
 8796              		.loc 1 3886 16 discriminator 1 view .LVU2648
 8797              	.LVL631:
 8798              	.L300:
3887:Library/src/lcm32f06x_tim.c ****     }
3888:Library/src/lcm32f06x_tim.c ****     else if (temprg & 0x003F0000)
3889:Library/src/lcm32f06x_tim.c ****     {
3890:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
3891:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 &= (~(TIM_BreakSource >> 16));
3892:Library/src/lcm32f06x_tim.c ****       __dekey();
3893:Library/src/lcm32f06x_tim.c ****     }
3894:Library/src/lcm32f06x_tim.c ****   }
3895:Library/src/lcm32f06x_tim.c ****   else if (TIM_Level == TIM_InputLevel_Low)  // TIM15 break 触发源有效电平为低
3896:Library/src/lcm32f06x_tim.c ****   {
3897:Library/src/lcm32f06x_tim.c ****     if (temprg & 0x00007F00)
3898:Library/src/lcm32f06x_tim.c ****     {
3899:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
3900:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 8);
3901:Library/src/lcm32f06x_tim.c ****       __dekey();
3902:Library/src/lcm32f06x_tim.c ****     }
ARM GAS  /tmp/ccWBHqpW.s 			page 272


3903:Library/src/lcm32f06x_tim.c ****     else if (temprg & 0x003F0000)
3904:Library/src/lcm32f06x_tim.c ****     {
3905:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
3906:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 16);
3907:Library/src/lcm32f06x_tim.c ****       __dekey();
3908:Library/src/lcm32f06x_tim.c ****     }
3909:Library/src/lcm32f06x_tim.c ****   }
3910:Library/src/lcm32f06x_tim.c **** }
 8799              		.loc 1 3910 1 is_stmt 0 view .LVU2649
 8800              		@ sp needed
 8801 0048 7047     		bx	lr
 8802              	.LVL632:
 8803              	.L301:
3874:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG6 &= (~TIM_BreakSource); // TIM15 break/break2 输入触发源
 8804              		.loc 1 3874 5 is_stmt 1 view .LVU2650
 8805              	.LBB712:
 8806              	.LBI712:
 258:Core/cmsis_gcc.h **** {
 8807              		.loc 2 258 27 view .LVU2651
 8808              	.LBB713:
 260:Core/cmsis_gcc.h **** }
 8809              		.loc 2 260 3 view .LVU2652
 8810              		.syntax divided
 8811              	@ 260 "Core/cmsis_gcc.h" 1
 8812 004a BFF36F8F 		isb 0xF
 8813              	@ 0 "" 2
 8814              		.thumb
 8815              		.syntax unified
 8816              	.LBE713:
 8817              	.LBE712:
3874:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG6 &= (~TIM_BreakSource); // TIM15 break/break2 输入触发源
 8818              		.loc 1 3874 5 discriminator 1 view .LVU2653
 8819              	.LBB714:
 8820              	.LBI714:
1204:Core/cmsis_gcc.h **** {
 8821              		.loc 2 1204 31 view .LVU2654
 8822              	.LBB715:
1206:Core/cmsis_gcc.h **** 
 8823              		.loc 2 1206 3 view .LVU2655
1208:Core/cmsis_gcc.h ****   return(result);
 8824              		.loc 2 1208 3 view .LVU2656
 8825              		.syntax divided
 8826              	@ 1208 "Core/cmsis_gcc.h" 1
 8827 004e EFF31083 		MRS r3, primask
 8828              	@ 0 "" 2
 8829              	.LVL633:
 8830              		.loc 2 1209 3 view .LVU2657
 8831              		.loc 2 1209 3 is_stmt 0 view .LVU2658
 8832              		.thumb
 8833              		.syntax unified
 8834              	.LBE715:
 8835              	.LBE714:
3874:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG6 &= (~TIM_BreakSource); // TIM15 break/break2 输入触发源
 8836              		.loc 1 3874 5 is_stmt 1 discriminator 2 view .LVU2659
 8837              	.LBB716:
 8838              	.LBI716:
 960:Core/cmsis_gcc.h **** {
ARM GAS  /tmp/ccWBHqpW.s 			page 273


 8839              		.loc 2 960 27 view .LVU2660
 8840              	.LBB717:
 962:Core/cmsis_gcc.h **** }
 8841              		.loc 2 962 3 view .LVU2661
 8842              		.syntax divided
 8843              	@ 962 "Core/cmsis_gcc.h" 1
 8844 0052 72B6     		cpsid i
 8845              	@ 0 "" 2
 8846              		.thumb
 8847              		.syntax unified
 8848              	.LBE717:
 8849              	.LBE716:
3874:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG6 &= (~TIM_BreakSource); // TIM15 break/break2 输入触发源
 8850              		.loc 1 3874 5 discriminator 3 view .LVU2662
 8851 0054 214B     		ldr	r3, .L314
 8852 0056 224A     		ldr	r2, .L314+4
 8853              	.LVL634:
3874:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG6 &= (~TIM_BreakSource); // TIM15 break/break2 输入触发源
 8854              		.loc 1 3874 5 is_stmt 0 discriminator 3 view .LVU2663
 8855 0058 1A60     		str	r2, [r3]
3874:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG6 &= (~TIM_BreakSource); // TIM15 break/break2 输入触发源
 8856              		.loc 1 3874 21 is_stmt 1 discriminator 3 view .LVU2664
3875:Library/src/lcm32f06x_tim.c ****     __dekey();
 8857              		.loc 1 3875 5 view .LVU2665
3875:Library/src/lcm32f06x_tim.c ****     __dekey();
 8858              		.loc 1 3875 12 is_stmt 0 view .LVU2666
 8859 005a 224A     		ldr	r2, .L314+8
 8860 005c 936B     		ldr	r3, [r2, #56]
3875:Library/src/lcm32f06x_tim.c ****     __dekey();
 8861              		.loc 1 3875 23 view .LVU2667
 8862 005e 8343     		bics	r3, r0
 8863 0060 9363     		str	r3, [r2, #56]
3876:Library/src/lcm32f06x_tim.c ****   }
 8864              		.loc 1 3876 5 is_stmt 1 view .LVU2668
 8865              	.LBB718:
 8866              	.LBI718:
 949:Core/cmsis_gcc.h **** {
 8867              		.loc 2 949 27 view .LVU2669
 8868              	.LBB719:
 951:Core/cmsis_gcc.h **** }
 8869              		.loc 2 951 3 view .LVU2670
 8870              		.syntax divided
 8871              	@ 951 "Core/cmsis_gcc.h" 1
 8872 0062 62B6     		cpsie i
 8873              	@ 0 "" 2
 8874              		.thumb
 8875              		.syntax unified
 8876              	.LBE719:
 8877              	.LBE718:
3876:Library/src/lcm32f06x_tim.c ****   }
 8878              		.loc 1 3876 14 view .LVU2671
3879:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM15 break 触发源有效电平为高
 8879              		.loc 1 3879 3 view .LVU2672
3879:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM15 break 触发源有效电平为高
 8880              		.loc 1 3879 10 is_stmt 0 view .LVU2673
 8881 0064 1F4B     		ldr	r3, .L314+8
 8882 0066 9A6B     		ldr	r2, [r3, #56]
ARM GAS  /tmp/ccWBHqpW.s 			page 274


 8883              	.LVL635:
3880:Library/src/lcm32f06x_tim.c ****   {
 8884              		.loc 1 3880 3 is_stmt 1 view .LVU2674
3880:Library/src/lcm32f06x_tim.c ****   {
 8885              		.loc 1 3880 6 is_stmt 0 view .LVU2675
 8886 0068 0029     		cmp	r1, #0
 8887 006a DCD0     		beq	.L313
 8888              	.L303:
3895:Library/src/lcm32f06x_tim.c ****   {
 8889              		.loc 1 3895 8 is_stmt 1 view .LVU2676
3895:Library/src/lcm32f06x_tim.c ****   {
 8890              		.loc 1 3895 11 is_stmt 0 view .LVU2677
 8891 006c 0129     		cmp	r1, #1
 8892 006e EBD1     		bne	.L300
3897:Library/src/lcm32f06x_tim.c ****     {
 8893              		.loc 1 3897 5 is_stmt 1 view .LVU2678
3897:Library/src/lcm32f06x_tim.c ****     {
 8894              		.loc 1 3897 16 is_stmt 0 view .LVU2679
 8895 0070 FE21     		movs	r1, #254
 8896              	.LVL636:
3897:Library/src/lcm32f06x_tim.c ****     {
 8897              		.loc 1 3897 16 view .LVU2680
 8898 0072 C901     		lsls	r1, r1, #7
3897:Library/src/lcm32f06x_tim.c ****     {
 8899              		.loc 1 3897 8 view .LVU2681
 8900 0074 0A42     		tst	r2, r1
 8901 0076 1FD0     		beq	.L306
3899:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 8);
 8902              		.loc 1 3899 7 is_stmt 1 view .LVU2682
 8903              	.LBB720:
 8904              	.LBI720:
 258:Core/cmsis_gcc.h **** {
 8905              		.loc 2 258 27 view .LVU2683
 8906              	.LBB721:
 260:Core/cmsis_gcc.h **** }
 8907              		.loc 2 260 3 view .LVU2684
 8908              		.syntax divided
 8909              	@ 260 "Core/cmsis_gcc.h" 1
 8910 0078 BFF36F8F 		isb 0xF
 8911              	@ 0 "" 2
 8912              		.thumb
 8913              		.syntax unified
 8914              	.LBE721:
 8915              	.LBE720:
3899:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 8);
 8916              		.loc 1 3899 7 discriminator 1 view .LVU2685
 8917              	.LBB722:
 8918              	.LBI722:
1204:Core/cmsis_gcc.h **** {
 8919              		.loc 2 1204 31 view .LVU2686
 8920              	.LBB723:
1206:Core/cmsis_gcc.h **** 
 8921              		.loc 2 1206 3 view .LVU2687
1208:Core/cmsis_gcc.h ****   return(result);
 8922              		.loc 2 1208 3 view .LVU2688
 8923              		.syntax divided
 8924              	@ 1208 "Core/cmsis_gcc.h" 1
ARM GAS  /tmp/ccWBHqpW.s 			page 275


 8925 007c EFF31082 		MRS r2, primask
 8926              	@ 0 "" 2
 8927              	.LVL637:
 8928              		.loc 2 1209 3 view .LVU2689
 8929              		.loc 2 1209 3 is_stmt 0 view .LVU2690
 8930              		.thumb
 8931              		.syntax unified
 8932              	.LBE723:
 8933              	.LBE722:
3899:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 8);
 8934              		.loc 1 3899 7 is_stmt 1 discriminator 2 view .LVU2691
 8935              	.LBB724:
 8936              	.LBI724:
 960:Core/cmsis_gcc.h **** {
 8937              		.loc 2 960 27 view .LVU2692
 8938              	.LBB725:
 962:Core/cmsis_gcc.h **** }
 8939              		.loc 2 962 3 view .LVU2693
 8940              		.syntax divided
 8941              	@ 962 "Core/cmsis_gcc.h" 1
 8942 0080 72B6     		cpsid i
 8943              	@ 0 "" 2
 8944              		.thumb
 8945              		.syntax unified
 8946              	.LBE725:
 8947              	.LBE724:
3899:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 8);
 8948              		.loc 1 3899 7 discriminator 3 view .LVU2694
 8949 0082 164A     		ldr	r2, .L314
 8950 0084 1649     		ldr	r1, .L314+4
3900:Library/src/lcm32f06x_tim.c ****       __dekey();
 8951              		.loc 1 3900 45 is_stmt 0 view .LVU2695
 8952 0086 000A     		lsrs	r0, r0, #8
 8953              	.LVL638:
3899:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 8);
 8954              		.loc 1 3899 7 discriminator 3 view .LVU2696
 8955 0088 1160     		str	r1, [r2]
3899:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 8);
 8956              		.loc 1 3899 23 is_stmt 1 discriminator 3 view .LVU2697
3900:Library/src/lcm32f06x_tim.c ****       __dekey();
 8957              		.loc 1 3900 7 view .LVU2698
3900:Library/src/lcm32f06x_tim.c ****       __dekey();
 8958              		.loc 1 3900 14 is_stmt 0 view .LVU2699
 8959 008a 9A6B     		ldr	r2, [r3, #56]
3900:Library/src/lcm32f06x_tim.c ****       __dekey();
 8960              		.loc 1 3900 25 view .LVU2700
 8961 008c 1043     		orrs	r0, r2
 8962 008e 9863     		str	r0, [r3, #56]
3901:Library/src/lcm32f06x_tim.c ****     }
 8963              		.loc 1 3901 7 is_stmt 1 view .LVU2701
 8964              	.LBB726:
 8965              	.LBI726:
 949:Core/cmsis_gcc.h **** {
 8966              		.loc 2 949 27 view .LVU2702
 8967              	.LBB727:
 951:Core/cmsis_gcc.h **** }
 8968              		.loc 2 951 3 view .LVU2703
ARM GAS  /tmp/ccWBHqpW.s 			page 276


 8969              		.syntax divided
 8970              	@ 951 "Core/cmsis_gcc.h" 1
 8971 0090 62B6     		cpsie i
 8972              	@ 0 "" 2
 8973              		.thumb
 8974              		.syntax unified
 8975              	.LBE727:
 8976              	.LBE726:
3901:Library/src/lcm32f06x_tim.c ****     }
 8977              		.loc 1 3901 16 discriminator 1 view .LVU2704
 8978              	.LBB729:
 8979              	.LBB728:
 952:Core/cmsis_gcc.h **** 
 8980              		.loc 2 952 1 is_stmt 0 view .LVU2705
 8981 0092 D9E7     		b	.L300
 8982              	.LVL639:
 8983              	.L304:
 952:Core/cmsis_gcc.h **** 
 8984              		.loc 2 952 1 view .LVU2706
 8985              	.LBE728:
 8986              	.LBE729:
3888:Library/src/lcm32f06x_tim.c ****     {
 8987              		.loc 1 3888 10 is_stmt 1 view .LVU2707
3888:Library/src/lcm32f06x_tim.c ****     {
 8988              		.loc 1 3888 21 is_stmt 0 view .LVU2708
 8989 0094 FC21     		movs	r1, #252
 8990 0096 8903     		lsls	r1, r1, #14
3888:Library/src/lcm32f06x_tim.c ****     {
 8991              		.loc 1 3888 13 view .LVU2709
 8992 0098 0A42     		tst	r2, r1
 8993 009a D5D0     		beq	.L300
3890:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 &= (~(TIM_BreakSource >> 16));
 8994              		.loc 1 3890 7 is_stmt 1 view .LVU2710
 8995              	.LBB730:
 8996              	.LBI730:
 258:Core/cmsis_gcc.h **** {
 8997              		.loc 2 258 27 view .LVU2711
 8998              	.LBB731:
 260:Core/cmsis_gcc.h **** }
 8999              		.loc 2 260 3 view .LVU2712
 9000              		.syntax divided
 9001              	@ 260 "Core/cmsis_gcc.h" 1
 9002 009c BFF36F8F 		isb 0xF
 9003              	@ 0 "" 2
 9004              		.thumb
 9005              		.syntax unified
 9006              	.LBE731:
 9007              	.LBE730:
3890:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 &= (~(TIM_BreakSource >> 16));
 9008              		.loc 1 3890 7 discriminator 1 view .LVU2713
 9009              	.LBB732:
 9010              	.LBI732:
1204:Core/cmsis_gcc.h **** {
 9011              		.loc 2 1204 31 view .LVU2714
 9012              	.LBB733:
1206:Core/cmsis_gcc.h **** 
 9013              		.loc 2 1206 3 view .LVU2715
ARM GAS  /tmp/ccWBHqpW.s 			page 277


1208:Core/cmsis_gcc.h ****   return(result);
 9014              		.loc 2 1208 3 view .LVU2716
 9015              		.syntax divided
 9016              	@ 1208 "Core/cmsis_gcc.h" 1
 9017 00a0 EFF31082 		MRS r2, primask
 9018              	@ 0 "" 2
 9019              	.LVL640:
 9020              		.loc 2 1209 3 view .LVU2717
 9021              		.loc 2 1209 3 is_stmt 0 view .LVU2718
 9022              		.thumb
 9023              		.syntax unified
 9024              	.LBE733:
 9025              	.LBE732:
3890:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 &= (~(TIM_BreakSource >> 16));
 9026              		.loc 1 3890 7 is_stmt 1 discriminator 2 view .LVU2719
 9027              	.LBB734:
 9028              	.LBI734:
 960:Core/cmsis_gcc.h **** {
 9029              		.loc 2 960 27 view .LVU2720
 9030              	.LBB735:
 962:Core/cmsis_gcc.h **** }
 9031              		.loc 2 962 3 view .LVU2721
 9032              		.syntax divided
 9033              	@ 962 "Core/cmsis_gcc.h" 1
 9034 00a4 72B6     		cpsid i
 9035              	@ 0 "" 2
 9036              		.thumb
 9037              		.syntax unified
 9038              	.LBE735:
 9039              	.LBE734:
3890:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 &= (~(TIM_BreakSource >> 16));
 9040              		.loc 1 3890 7 discriminator 3 view .LVU2722
 9041 00a6 0D4A     		ldr	r2, .L314
 9042 00a8 0D49     		ldr	r1, .L314+4
3891:Library/src/lcm32f06x_tim.c ****       __dekey();
 9043              		.loc 1 3891 47 is_stmt 0 view .LVU2723
 9044 00aa 000C     		lsrs	r0, r0, #16
 9045              	.LVL641:
3890:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 &= (~(TIM_BreakSource >> 16));
 9046              		.loc 1 3890 7 discriminator 3 view .LVU2724
 9047 00ac 1160     		str	r1, [r2]
3890:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 &= (~(TIM_BreakSource >> 16));
 9048              		.loc 1 3890 23 is_stmt 1 discriminator 3 view .LVU2725
3891:Library/src/lcm32f06x_tim.c ****       __dekey();
 9049              		.loc 1 3891 7 view .LVU2726
3891:Library/src/lcm32f06x_tim.c ****       __dekey();
 9050              		.loc 1 3891 14 is_stmt 0 view .LVU2727
 9051 00ae 9A6B     		ldr	r2, [r3, #56]
3891:Library/src/lcm32f06x_tim.c ****       __dekey();
 9052              		.loc 1 3891 25 view .LVU2728
 9053 00b0 8243     		bics	r2, r0
 9054 00b2 9A63     		str	r2, [r3, #56]
3892:Library/src/lcm32f06x_tim.c ****     }
 9055              		.loc 1 3892 7 is_stmt 1 view .LVU2729
 9056              	.LBB736:
 9057              	.LBI736:
 949:Core/cmsis_gcc.h **** {
ARM GAS  /tmp/ccWBHqpW.s 			page 278


 9058              		.loc 2 949 27 view .LVU2730
 9059              	.LBB737:
 951:Core/cmsis_gcc.h **** }
 9060              		.loc 2 951 3 view .LVU2731
 9061              		.syntax divided
 9062              	@ 951 "Core/cmsis_gcc.h" 1
 9063 00b4 62B6     		cpsie i
 9064              	@ 0 "" 2
 952:Core/cmsis_gcc.h **** 
 9065              		.loc 2 952 1 is_stmt 0 view .LVU2732
 9066              		.thumb
 9067              		.syntax unified
 9068 00b6 C7E7     		b	.L300
 9069              	.LVL642:
 9070              	.L306:
 952:Core/cmsis_gcc.h **** 
 9071              		.loc 2 952 1 view .LVU2733
 9072              	.LBE737:
 9073              	.LBE736:
3903:Library/src/lcm32f06x_tim.c ****     {
 9074              		.loc 1 3903 10 is_stmt 1 view .LVU2734
3903:Library/src/lcm32f06x_tim.c ****     {
 9075              		.loc 1 3903 21 is_stmt 0 view .LVU2735
 9076 00b8 FC21     		movs	r1, #252
 9077 00ba 8903     		lsls	r1, r1, #14
3903:Library/src/lcm32f06x_tim.c ****     {
 9078              		.loc 1 3903 13 view .LVU2736
 9079 00bc 0A42     		tst	r2, r1
 9080 00be C3D0     		beq	.L300
3905:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 16);
 9081              		.loc 1 3905 7 is_stmt 1 view .LVU2737
 9082              	.LBB738:
 9083              	.LBI738:
 258:Core/cmsis_gcc.h **** {
 9084              		.loc 2 258 27 view .LVU2738
 9085              	.LBB739:
 260:Core/cmsis_gcc.h **** }
 9086              		.loc 2 260 3 view .LVU2739
 9087              		.syntax divided
 9088              	@ 260 "Core/cmsis_gcc.h" 1
 9089 00c0 BFF36F8F 		isb 0xF
 9090              	@ 0 "" 2
 9091              		.thumb
 9092              		.syntax unified
 9093              	.LBE739:
 9094              	.LBE738:
3905:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 16);
 9095              		.loc 1 3905 7 discriminator 1 view .LVU2740
 9096              	.LBB740:
 9097              	.LBI740:
1204:Core/cmsis_gcc.h **** {
 9098              		.loc 2 1204 31 view .LVU2741
 9099              	.LBB741:
1206:Core/cmsis_gcc.h **** 
 9100              		.loc 2 1206 3 view .LVU2742
1208:Core/cmsis_gcc.h ****   return(result);
 9101              		.loc 2 1208 3 view .LVU2743
ARM GAS  /tmp/ccWBHqpW.s 			page 279


 9102              		.syntax divided
 9103              	@ 1208 "Core/cmsis_gcc.h" 1
 9104 00c4 EFF31082 		MRS r2, primask
 9105              	@ 0 "" 2
 9106              	.LVL643:
 9107              		.loc 2 1209 3 view .LVU2744
 9108              		.loc 2 1209 3 is_stmt 0 view .LVU2745
 9109              		.thumb
 9110              		.syntax unified
 9111              	.LBE741:
 9112              	.LBE740:
3905:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 16);
 9113              		.loc 1 3905 7 is_stmt 1 discriminator 2 view .LVU2746
 9114              	.LBB742:
 9115              	.LBI742:
 960:Core/cmsis_gcc.h **** {
 9116              		.loc 2 960 27 view .LVU2747
 9117              	.LBB743:
 962:Core/cmsis_gcc.h **** }
 9118              		.loc 2 962 3 view .LVU2748
 9119              		.syntax divided
 9120              	@ 962 "Core/cmsis_gcc.h" 1
 9121 00c8 72B6     		cpsid i
 9122              	@ 0 "" 2
 9123              		.thumb
 9124              		.syntax unified
 9125              	.LBE743:
 9126              	.LBE742:
3905:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 16);
 9127              		.loc 1 3905 7 discriminator 3 view .LVU2749
 9128 00ca 044A     		ldr	r2, .L314
 9129 00cc 0449     		ldr	r1, .L314+4
3906:Library/src/lcm32f06x_tim.c ****       __dekey();
 9130              		.loc 1 3906 45 is_stmt 0 view .LVU2750
 9131 00ce 000C     		lsrs	r0, r0, #16
 9132              	.LVL644:
3905:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 16);
 9133              		.loc 1 3905 7 discriminator 3 view .LVU2751
 9134 00d0 1160     		str	r1, [r2]
3905:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG6 |= (TIM_BreakSource >> 16);
 9135              		.loc 1 3905 23 is_stmt 1 discriminator 3 view .LVU2752
3906:Library/src/lcm32f06x_tim.c ****       __dekey();
 9136              		.loc 1 3906 7 view .LVU2753
3906:Library/src/lcm32f06x_tim.c ****       __dekey();
 9137              		.loc 1 3906 14 is_stmt 0 view .LVU2754
 9138 00d2 9A6B     		ldr	r2, [r3, #56]
3906:Library/src/lcm32f06x_tim.c ****       __dekey();
 9139              		.loc 1 3906 25 view .LVU2755
 9140 00d4 1043     		orrs	r0, r2
 9141 00d6 9863     		str	r0, [r3, #56]
3907:Library/src/lcm32f06x_tim.c ****     }
 9142              		.loc 1 3907 7 is_stmt 1 view .LVU2756
 9143              	.LBB744:
 9144              	.LBI744:
 949:Core/cmsis_gcc.h **** {
 9145              		.loc 2 949 27 view .LVU2757
 9146              	.LBB745:
ARM GAS  /tmp/ccWBHqpW.s 			page 280


 951:Core/cmsis_gcc.h **** }
 9147              		.loc 2 951 3 view .LVU2758
 9148              		.syntax divided
 9149              	@ 951 "Core/cmsis_gcc.h" 1
 9150 00d8 62B6     		cpsie i
 9151              	@ 0 "" 2
 9152              		.thumb
 9153              		.syntax unified
 9154              	.LBE745:
 9155              	.LBE744:
3907:Library/src/lcm32f06x_tim.c ****     }
 9156              		.loc 1 3907 16 view .LVU2759
 9157              		.loc 1 3910 1 is_stmt 0 view .LVU2760
 9158 00da B5E7     		b	.L300
 9159              	.L315:
 9160              		.align	2
 9161              	.L314:
 9162 00dc 7C700048 		.word	1207988348
 9163 00e0 9A65FA05 		.word	100296090
 9164 00e4 00700048 		.word	1207988224
 9165              		.cfi_endproc
 9166              	.LFE164:
 9168              		.section	.text.TIM16_BreakSourceCfg,"ax",%progbits
 9169              		.align	1
 9170              		.p2align 2,,3
 9171              		.global	TIM16_BreakSourceCfg
 9172              		.syntax unified
 9173              		.code	16
 9174              		.thumb_func
 9176              	TIM16_BreakSourceCfg:
 9177              	.LVL645:
 9178              	.LFB165:
3911:Library/src/lcm32f06x_tim.c **** 
3912:Library/src/lcm32f06x_tim.c **** /**
3913:Library/src/lcm32f06x_tim.c ****   * @name   TIM16_BreakSourceCfg
3914:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM16 brake trigger input source configuration.
3915:Library/src/lcm32f06x_tim.c ****   *         CN: TIM16 刹车触发输入源配置。
3916:Library/src/lcm32f06x_tim.c ****   * @param  TIM_BreakSource: 
3917:Library/src/lcm32f06x_tim.c ****   *         EN: Brake input trigger source selection.
3918:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源选择。
3919:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Level: 
3920:Library/src/lcm32f06x_tim.c ****   *         EN: Effective level selection of TIM15 brake input trigger source.
3921:Library/src/lcm32f06x_tim.c ****   *         CN: TIM16 刹车输入触发源的有效电平选择。
3922:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
3923:Library/src/lcm32f06x_tim.c ****   *         EN: New status of brake input trigger source.
3924:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源新状态。
3925:Library/src/lcm32f06x_tim.c ****   * @retval None
3926:Library/src/lcm32f06x_tim.c ****   */
3927:Library/src/lcm32f06x_tim.c **** void TIM16_BreakSourceCfg(uint32_t TIM_BreakSource, uint32_t TIM_Level, FunctionalState NewState)
3928:Library/src/lcm32f06x_tim.c **** {
 9179              		.loc 1 3928 1 is_stmt 1 view -0
 9180              		.cfi_startproc
 9181              		@ args = 0, pretend = 0, frame = 0
 9182              		@ frame_needed = 0, uses_anonymous_args = 0
 9183              		@ link register save eliminated.
3929:Library/src/lcm32f06x_tim.c ****   uint32_t temprg;
 9184              		.loc 1 3929 3 view .LVU2762
ARM GAS  /tmp/ccWBHqpW.s 			page 281


3930:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM16_BreakSource(TIM_BreakSource));
 9185              		.loc 1 3930 3 view .LVU2763
3931:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM_InputLevel(TIM_Level));
 9186              		.loc 1 3931 3 view .LVU2764
3932:Library/src/lcm32f06x_tim.c **** 
3933:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 9187              		.loc 1 3933 3 view .LVU2765
 9188              		.loc 1 3933 6 is_stmt 0 view .LVU2766
 9189 0000 002A     		cmp	r2, #0
 9190 0002 22D0     		beq	.L317
3934:Library/src/lcm32f06x_tim.c ****   {
3935:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 9191              		.loc 1 3935 5 is_stmt 1 view .LVU2767
 9192              	.LBB746:
 9193              	.LBI746:
 258:Core/cmsis_gcc.h **** {
 9194              		.loc 2 258 27 view .LVU2768
 9195              	.LBB747:
 260:Core/cmsis_gcc.h **** }
 9196              		.loc 2 260 3 view .LVU2769
 9197              		.syntax divided
 9198              	@ 260 "Core/cmsis_gcc.h" 1
 9199 0004 BFF36F8F 		isb 0xF
 9200              	@ 0 "" 2
 9201              		.thumb
 9202              		.syntax unified
 9203              	.LBE747:
 9204              	.LBE746:
 9205              		.loc 1 3935 5 discriminator 1 view .LVU2770
 9206              	.LBB748:
 9207              	.LBI748:
1204:Core/cmsis_gcc.h **** {
 9208              		.loc 2 1204 31 view .LVU2771
 9209              	.LBB749:
1206:Core/cmsis_gcc.h **** 
 9210              		.loc 2 1206 3 view .LVU2772
1208:Core/cmsis_gcc.h ****   return(result);
 9211              		.loc 2 1208 3 view .LVU2773
 9212              		.syntax divided
 9213              	@ 1208 "Core/cmsis_gcc.h" 1
 9214 0008 EFF31083 		MRS r3, primask
 9215              	@ 0 "" 2
 9216              	.LVL646:
 9217              		.loc 2 1209 3 view .LVU2774
 9218              		.loc 2 1209 3 is_stmt 0 view .LVU2775
 9219              		.thumb
 9220              		.syntax unified
 9221              	.LBE749:
 9222              	.LBE748:
 9223              		.loc 1 3935 5 is_stmt 1 discriminator 2 view .LVU2776
 9224              	.LBB750:
 9225              	.LBI750:
 960:Core/cmsis_gcc.h **** {
 9226              		.loc 2 960 27 view .LVU2777
 9227              	.LBB751:
 962:Core/cmsis_gcc.h **** }
 9228              		.loc 2 962 3 view .LVU2778
ARM GAS  /tmp/ccWBHqpW.s 			page 282


 9229              		.syntax divided
 9230              	@ 962 "Core/cmsis_gcc.h" 1
 9231 000c 72B6     		cpsid i
 9232              	@ 0 "" 2
 9233              		.thumb
 9234              		.syntax unified
 9235              	.LBE751:
 9236              	.LBE750:
 9237              		.loc 1 3935 5 discriminator 3 view .LVU2779
 9238 000e 334B     		ldr	r3, .L330
 9239 0010 334A     		ldr	r2, .L330+4
 9240              	.LVL647:
 9241              		.loc 1 3935 5 is_stmt 0 discriminator 3 view .LVU2780
 9242 0012 1A60     		str	r2, [r3]
 9243              		.loc 1 3935 21 is_stmt 1 discriminator 3 view .LVU2781
3936:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG7 |= TIM_BreakSource; // TIM16 break/break2 输入触发源
 9244              		.loc 1 3936 5 view .LVU2782
 9245              		.loc 1 3936 12 is_stmt 0 view .LVU2783
 9246 0014 334A     		ldr	r2, .L330+8
 9247 0016 D36B     		ldr	r3, [r2, #60]
 9248              		.loc 1 3936 23 view .LVU2784
 9249 0018 0343     		orrs	r3, r0
 9250 001a D363     		str	r3, [r2, #60]
3937:Library/src/lcm32f06x_tim.c ****     __dekey();
 9251              		.loc 1 3937 5 is_stmt 1 view .LVU2785
 9252              	.LBB752:
 9253              	.LBI752:
 949:Core/cmsis_gcc.h **** {
 9254              		.loc 2 949 27 view .LVU2786
 9255              	.LBB753:
 951:Core/cmsis_gcc.h **** }
 9256              		.loc 2 951 3 view .LVU2787
 9257              		.syntax divided
 9258              	@ 951 "Core/cmsis_gcc.h" 1
 9259 001c 62B6     		cpsie i
 9260              	@ 0 "" 2
 9261              		.thumb
 9262              		.syntax unified
 9263              	.LBE753:
 9264              	.LBE752:
 9265              		.loc 1 3937 14 discriminator 1 view .LVU2788
3938:Library/src/lcm32f06x_tim.c ****   }
3939:Library/src/lcm32f06x_tim.c ****   else
3940:Library/src/lcm32f06x_tim.c ****   {
3941:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
3942:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~TIM_BreakSource); // TIM16 break/break2 输入触发源
3943:Library/src/lcm32f06x_tim.c ****       __dekey();
 9266              		.loc 1 3943 16 view .LVU2789
3944:Library/src/lcm32f06x_tim.c ****   }
3945:Library/src/lcm32f06x_tim.c **** 
3946:Library/src/lcm32f06x_tim.c ****   temprg = SYSCTRL->EDU_CFG7;
 9267              		.loc 1 3946 3 view .LVU2790
 9268              		.loc 1 3946 10 is_stmt 0 view .LVU2791
 9269 001e 314B     		ldr	r3, .L330+8
 9270 0020 DA6B     		ldr	r2, [r3, #60]
 9271              	.LVL648:
3947:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM16 break 触发源有效电平为高
ARM GAS  /tmp/ccWBHqpW.s 			page 283


 9272              		.loc 1 3947 3 is_stmt 1 view .LVU2792
 9273              		.loc 1 3947 6 is_stmt 0 view .LVU2793
 9274 0022 0029     		cmp	r1, #0
 9275 0024 22D1     		bne	.L319
 9276              	.L329:
3948:Library/src/lcm32f06x_tim.c ****   {
3949:Library/src/lcm32f06x_tim.c ****     if (temprg & 0x00007F00)
 9277              		.loc 1 3949 5 is_stmt 1 view .LVU2794
 9278              		.loc 1 3949 16 is_stmt 0 view .LVU2795
 9279 0026 FE21     		movs	r1, #254
 9280              	.LVL649:
 9281              		.loc 1 3949 16 view .LVU2796
 9282 0028 C901     		lsls	r1, r1, #7
 9283              		.loc 1 3949 8 view .LVU2797
 9284 002a 0A42     		tst	r2, r1
 9285 002c 32D0     		beq	.L320
3950:Library/src/lcm32f06x_tim.c ****     {
3951:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
 9286              		.loc 1 3951 7 is_stmt 1 view .LVU2798
 9287              	.LBB754:
 9288              	.LBI754:
 258:Core/cmsis_gcc.h **** {
 9289              		.loc 2 258 27 view .LVU2799
 9290              	.LBB755:
 260:Core/cmsis_gcc.h **** }
 9291              		.loc 2 260 3 view .LVU2800
 9292              		.syntax divided
 9293              	@ 260 "Core/cmsis_gcc.h" 1
 9294 002e BFF36F8F 		isb 0xF
 9295              	@ 0 "" 2
 9296              		.thumb
 9297              		.syntax unified
 9298              	.LBE755:
 9299              	.LBE754:
 9300              		.loc 1 3951 7 discriminator 1 view .LVU2801
 9301              	.LBB756:
 9302              	.LBI756:
1204:Core/cmsis_gcc.h **** {
 9303              		.loc 2 1204 31 view .LVU2802
 9304              	.LBB757:
1206:Core/cmsis_gcc.h **** 
 9305              		.loc 2 1206 3 view .LVU2803
1208:Core/cmsis_gcc.h ****   return(result);
 9306              		.loc 2 1208 3 view .LVU2804
 9307              		.syntax divided
 9308              	@ 1208 "Core/cmsis_gcc.h" 1
 9309 0032 EFF31082 		MRS r2, primask
 9310              	@ 0 "" 2
 9311              	.LVL650:
 9312              		.loc 2 1209 3 view .LVU2805
 9313              		.loc 2 1209 3 is_stmt 0 view .LVU2806
 9314              		.thumb
 9315              		.syntax unified
 9316              	.LBE757:
 9317              	.LBE756:
 9318              		.loc 1 3951 7 is_stmt 1 discriminator 2 view .LVU2807
 9319              	.LBB758:
ARM GAS  /tmp/ccWBHqpW.s 			page 284


 9320              	.LBI758:
 960:Core/cmsis_gcc.h **** {
 9321              		.loc 2 960 27 view .LVU2808
 9322              	.LBB759:
 962:Core/cmsis_gcc.h **** }
 9323              		.loc 2 962 3 view .LVU2809
 9324              		.syntax divided
 9325              	@ 962 "Core/cmsis_gcc.h" 1
 9326 0036 72B6     		cpsid i
 9327              	@ 0 "" 2
 9328              		.thumb
 9329              		.syntax unified
 9330              	.LBE759:
 9331              	.LBE758:
 9332              		.loc 1 3951 7 discriminator 3 view .LVU2810
 9333 0038 284A     		ldr	r2, .L330
 9334 003a 2949     		ldr	r1, .L330+4
3952:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~(TIM_BreakSource >> 8));
 9335              		.loc 1 3952 47 is_stmt 0 view .LVU2811
 9336 003c 000A     		lsrs	r0, r0, #8
 9337              	.LVL651:
3951:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~(TIM_BreakSource >> 8));
 9338              		.loc 1 3951 7 discriminator 3 view .LVU2812
 9339 003e 1160     		str	r1, [r2]
3951:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~(TIM_BreakSource >> 8));
 9340              		.loc 1 3951 23 is_stmt 1 discriminator 3 view .LVU2813
 9341              		.loc 1 3952 7 view .LVU2814
 9342              		.loc 1 3952 14 is_stmt 0 view .LVU2815
 9343 0040 DA6B     		ldr	r2, [r3, #60]
 9344              		.loc 1 3952 25 view .LVU2816
 9345 0042 8243     		bics	r2, r0
 9346 0044 DA63     		str	r2, [r3, #60]
3953:Library/src/lcm32f06x_tim.c ****       __dekey();
 9347              		.loc 1 3953 7 is_stmt 1 view .LVU2817
 9348              	.LBB760:
 9349              	.LBI760:
 949:Core/cmsis_gcc.h **** {
 9350              		.loc 2 949 27 view .LVU2818
 9351              	.LBB761:
 951:Core/cmsis_gcc.h **** }
 9352              		.loc 2 951 3 view .LVU2819
 9353              		.syntax divided
 9354              	@ 951 "Core/cmsis_gcc.h" 1
 9355 0046 62B6     		cpsie i
 9356              	@ 0 "" 2
 9357              		.thumb
 9358              		.syntax unified
 9359              	.LBE761:
 9360              	.LBE760:
 9361              		.loc 1 3953 16 discriminator 1 view .LVU2820
 9362              	.LVL652:
 9363              	.L316:
3954:Library/src/lcm32f06x_tim.c ****     }
3955:Library/src/lcm32f06x_tim.c ****     else if (temprg & 0x003F0000)
3956:Library/src/lcm32f06x_tim.c ****     {
3957:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
3958:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~(TIM_BreakSource >> 16));
ARM GAS  /tmp/ccWBHqpW.s 			page 285


3959:Library/src/lcm32f06x_tim.c ****       __dekey();
3960:Library/src/lcm32f06x_tim.c ****     }
3961:Library/src/lcm32f06x_tim.c ****   }
3962:Library/src/lcm32f06x_tim.c ****   else if (TIM_Level == TIM_InputLevel_Low)  // TIM16 break 触发源有效电平为低
3963:Library/src/lcm32f06x_tim.c ****   {
3964:Library/src/lcm32f06x_tim.c ****     if (temprg & 0x00007F00)
3965:Library/src/lcm32f06x_tim.c ****     {
3966:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
3967:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 8);
3968:Library/src/lcm32f06x_tim.c ****       __dekey();
3969:Library/src/lcm32f06x_tim.c ****     }
3970:Library/src/lcm32f06x_tim.c ****     else if (temprg & 0x003F0000)
3971:Library/src/lcm32f06x_tim.c ****     {
3972:Library/src/lcm32f06x_tim.c ****       sysctrl_access();
3973:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 16);
3974:Library/src/lcm32f06x_tim.c ****       __dekey();
3975:Library/src/lcm32f06x_tim.c ****     }
3976:Library/src/lcm32f06x_tim.c ****   }
3977:Library/src/lcm32f06x_tim.c **** }
 9364              		.loc 1 3977 1 is_stmt 0 view .LVU2821
 9365              		@ sp needed
 9366 0048 7047     		bx	lr
 9367              	.LVL653:
 9368              	.L317:
3941:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~TIM_BreakSource); // TIM16 break/break2 输入触发源
 9369              		.loc 1 3941 7 is_stmt 1 view .LVU2822
 9370              	.LBB762:
 9371              	.LBI762:
 258:Core/cmsis_gcc.h **** {
 9372              		.loc 2 258 27 view .LVU2823
 9373              	.LBB763:
 260:Core/cmsis_gcc.h **** }
 9374              		.loc 2 260 3 view .LVU2824
 9375              		.syntax divided
 9376              	@ 260 "Core/cmsis_gcc.h" 1
 9377 004a BFF36F8F 		isb 0xF
 9378              	@ 0 "" 2
 9379              		.thumb
 9380              		.syntax unified
 9381              	.LBE763:
 9382              	.LBE762:
3941:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~TIM_BreakSource); // TIM16 break/break2 输入触发源
 9383              		.loc 1 3941 7 discriminator 1 view .LVU2825
 9384              	.LBB764:
 9385              	.LBI764:
1204:Core/cmsis_gcc.h **** {
 9386              		.loc 2 1204 31 view .LVU2826
 9387              	.LBB765:
1206:Core/cmsis_gcc.h **** 
 9388              		.loc 2 1206 3 view .LVU2827
1208:Core/cmsis_gcc.h ****   return(result);
 9389              		.loc 2 1208 3 view .LVU2828
 9390              		.syntax divided
 9391              	@ 1208 "Core/cmsis_gcc.h" 1
 9392 004e EFF31083 		MRS r3, primask
 9393              	@ 0 "" 2
 9394              	.LVL654:
ARM GAS  /tmp/ccWBHqpW.s 			page 286


 9395              		.loc 2 1209 3 view .LVU2829
 9396              		.loc 2 1209 3 is_stmt 0 view .LVU2830
 9397              		.thumb
 9398              		.syntax unified
 9399              	.LBE765:
 9400              	.LBE764:
3941:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~TIM_BreakSource); // TIM16 break/break2 输入触发源
 9401              		.loc 1 3941 7 is_stmt 1 discriminator 2 view .LVU2831
 9402              	.LBB766:
 9403              	.LBI766:
 960:Core/cmsis_gcc.h **** {
 9404              		.loc 2 960 27 view .LVU2832
 9405              	.LBB767:
 962:Core/cmsis_gcc.h **** }
 9406              		.loc 2 962 3 view .LVU2833
 9407              		.syntax divided
 9408              	@ 962 "Core/cmsis_gcc.h" 1
 9409 0052 72B6     		cpsid i
 9410              	@ 0 "" 2
 9411              		.thumb
 9412              		.syntax unified
 9413              	.LBE767:
 9414              	.LBE766:
3941:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~TIM_BreakSource); // TIM16 break/break2 输入触发源
 9415              		.loc 1 3941 7 discriminator 3 view .LVU2834
 9416 0054 214B     		ldr	r3, .L330
 9417 0056 224A     		ldr	r2, .L330+4
 9418              	.LVL655:
3941:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~TIM_BreakSource); // TIM16 break/break2 输入触发源
 9419              		.loc 1 3941 7 is_stmt 0 discriminator 3 view .LVU2835
 9420 0058 1A60     		str	r2, [r3]
3941:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~TIM_BreakSource); // TIM16 break/break2 输入触发源
 9421              		.loc 1 3941 23 is_stmt 1 discriminator 3 view .LVU2836
3942:Library/src/lcm32f06x_tim.c ****       __dekey();
 9422              		.loc 1 3942 7 view .LVU2837
3942:Library/src/lcm32f06x_tim.c ****       __dekey();
 9423              		.loc 1 3942 14 is_stmt 0 view .LVU2838
 9424 005a 224A     		ldr	r2, .L330+8
 9425 005c D36B     		ldr	r3, [r2, #60]
3942:Library/src/lcm32f06x_tim.c ****       __dekey();
 9426              		.loc 1 3942 25 view .LVU2839
 9427 005e 8343     		bics	r3, r0
 9428 0060 D363     		str	r3, [r2, #60]
3943:Library/src/lcm32f06x_tim.c ****   }
 9429              		.loc 1 3943 7 is_stmt 1 view .LVU2840
 9430              	.LBB768:
 9431              	.LBI768:
 949:Core/cmsis_gcc.h **** {
 9432              		.loc 2 949 27 view .LVU2841
 9433              	.LBB769:
 951:Core/cmsis_gcc.h **** }
 9434              		.loc 2 951 3 view .LVU2842
 9435              		.syntax divided
 9436              	@ 951 "Core/cmsis_gcc.h" 1
 9437 0062 62B6     		cpsie i
 9438              	@ 0 "" 2
 9439              		.thumb
ARM GAS  /tmp/ccWBHqpW.s 			page 287


 9440              		.syntax unified
 9441              	.LBE769:
 9442              	.LBE768:
3943:Library/src/lcm32f06x_tim.c ****   }
 9443              		.loc 1 3943 16 view .LVU2843
3946:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM16 break 触发源有效电平为高
 9444              		.loc 1 3946 3 view .LVU2844
3946:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM16 break 触发源有效电平为高
 9445              		.loc 1 3946 10 is_stmt 0 view .LVU2845
 9446 0064 1F4B     		ldr	r3, .L330+8
 9447 0066 DA6B     		ldr	r2, [r3, #60]
 9448              	.LVL656:
3947:Library/src/lcm32f06x_tim.c ****   {
 9449              		.loc 1 3947 3 is_stmt 1 view .LVU2846
3947:Library/src/lcm32f06x_tim.c ****   {
 9450              		.loc 1 3947 6 is_stmt 0 view .LVU2847
 9451 0068 0029     		cmp	r1, #0
 9452 006a DCD0     		beq	.L329
 9453              	.L319:
3962:Library/src/lcm32f06x_tim.c ****   {
 9454              		.loc 1 3962 8 is_stmt 1 view .LVU2848
3962:Library/src/lcm32f06x_tim.c ****   {
 9455              		.loc 1 3962 11 is_stmt 0 view .LVU2849
 9456 006c 0129     		cmp	r1, #1
 9457 006e EBD1     		bne	.L316
3964:Library/src/lcm32f06x_tim.c ****     {
 9458              		.loc 1 3964 5 is_stmt 1 view .LVU2850
3964:Library/src/lcm32f06x_tim.c ****     {
 9459              		.loc 1 3964 16 is_stmt 0 view .LVU2851
 9460 0070 FE21     		movs	r1, #254
 9461              	.LVL657:
3964:Library/src/lcm32f06x_tim.c ****     {
 9462              		.loc 1 3964 16 view .LVU2852
 9463 0072 C901     		lsls	r1, r1, #7
3964:Library/src/lcm32f06x_tim.c ****     {
 9464              		.loc 1 3964 8 view .LVU2853
 9465 0074 0A42     		tst	r2, r1
 9466 0076 1FD0     		beq	.L322
3966:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 8);
 9467              		.loc 1 3966 7 is_stmt 1 view .LVU2854
 9468              	.LBB770:
 9469              	.LBI770:
 258:Core/cmsis_gcc.h **** {
 9470              		.loc 2 258 27 view .LVU2855
 9471              	.LBB771:
 260:Core/cmsis_gcc.h **** }
 9472              		.loc 2 260 3 view .LVU2856
 9473              		.syntax divided
 9474              	@ 260 "Core/cmsis_gcc.h" 1
 9475 0078 BFF36F8F 		isb 0xF
 9476              	@ 0 "" 2
 9477              		.thumb
 9478              		.syntax unified
 9479              	.LBE771:
 9480              	.LBE770:
3966:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 8);
 9481              		.loc 1 3966 7 discriminator 1 view .LVU2857
ARM GAS  /tmp/ccWBHqpW.s 			page 288


 9482              	.LBB772:
 9483              	.LBI772:
1204:Core/cmsis_gcc.h **** {
 9484              		.loc 2 1204 31 view .LVU2858
 9485              	.LBB773:
1206:Core/cmsis_gcc.h **** 
 9486              		.loc 2 1206 3 view .LVU2859
1208:Core/cmsis_gcc.h ****   return(result);
 9487              		.loc 2 1208 3 view .LVU2860
 9488              		.syntax divided
 9489              	@ 1208 "Core/cmsis_gcc.h" 1
 9490 007c EFF31082 		MRS r2, primask
 9491              	@ 0 "" 2
 9492              	.LVL658:
 9493              		.loc 2 1209 3 view .LVU2861
 9494              		.loc 2 1209 3 is_stmt 0 view .LVU2862
 9495              		.thumb
 9496              		.syntax unified
 9497              	.LBE773:
 9498              	.LBE772:
3966:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 8);
 9499              		.loc 1 3966 7 is_stmt 1 discriminator 2 view .LVU2863
 9500              	.LBB774:
 9501              	.LBI774:
 960:Core/cmsis_gcc.h **** {
 9502              		.loc 2 960 27 view .LVU2864
 9503              	.LBB775:
 962:Core/cmsis_gcc.h **** }
 9504              		.loc 2 962 3 view .LVU2865
 9505              		.syntax divided
 9506              	@ 962 "Core/cmsis_gcc.h" 1
 9507 0080 72B6     		cpsid i
 9508              	@ 0 "" 2
 9509              		.thumb
 9510              		.syntax unified
 9511              	.LBE775:
 9512              	.LBE774:
3966:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 8);
 9513              		.loc 1 3966 7 discriminator 3 view .LVU2866
 9514 0082 164A     		ldr	r2, .L330
 9515 0084 1649     		ldr	r1, .L330+4
3967:Library/src/lcm32f06x_tim.c ****       __dekey();
 9516              		.loc 1 3967 45 is_stmt 0 view .LVU2867
 9517 0086 000A     		lsrs	r0, r0, #8
 9518              	.LVL659:
3966:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 8);
 9519              		.loc 1 3966 7 discriminator 3 view .LVU2868
 9520 0088 1160     		str	r1, [r2]
3966:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 8);
 9521              		.loc 1 3966 23 is_stmt 1 discriminator 3 view .LVU2869
3967:Library/src/lcm32f06x_tim.c ****       __dekey();
 9522              		.loc 1 3967 7 view .LVU2870
3967:Library/src/lcm32f06x_tim.c ****       __dekey();
 9523              		.loc 1 3967 14 is_stmt 0 view .LVU2871
 9524 008a DA6B     		ldr	r2, [r3, #60]
3967:Library/src/lcm32f06x_tim.c ****       __dekey();
 9525              		.loc 1 3967 25 view .LVU2872
ARM GAS  /tmp/ccWBHqpW.s 			page 289


 9526 008c 1043     		orrs	r0, r2
 9527 008e D863     		str	r0, [r3, #60]
3968:Library/src/lcm32f06x_tim.c ****     }
 9528              		.loc 1 3968 7 is_stmt 1 view .LVU2873
 9529              	.LBB776:
 9530              	.LBI776:
 949:Core/cmsis_gcc.h **** {
 9531              		.loc 2 949 27 view .LVU2874
 9532              	.LBB777:
 951:Core/cmsis_gcc.h **** }
 9533              		.loc 2 951 3 view .LVU2875
 9534              		.syntax divided
 9535              	@ 951 "Core/cmsis_gcc.h" 1
 9536 0090 62B6     		cpsie i
 9537              	@ 0 "" 2
 9538              		.thumb
 9539              		.syntax unified
 9540              	.LBE777:
 9541              	.LBE776:
3968:Library/src/lcm32f06x_tim.c ****     }
 9542              		.loc 1 3968 16 discriminator 1 view .LVU2876
 9543              	.LBB779:
 9544              	.LBB778:
 952:Core/cmsis_gcc.h **** 
 9545              		.loc 2 952 1 is_stmt 0 view .LVU2877
 9546 0092 D9E7     		b	.L316
 9547              	.LVL660:
 9548              	.L320:
 952:Core/cmsis_gcc.h **** 
 9549              		.loc 2 952 1 view .LVU2878
 9550              	.LBE778:
 9551              	.LBE779:
3955:Library/src/lcm32f06x_tim.c ****     {
 9552              		.loc 1 3955 10 is_stmt 1 view .LVU2879
3955:Library/src/lcm32f06x_tim.c ****     {
 9553              		.loc 1 3955 21 is_stmt 0 view .LVU2880
 9554 0094 FC21     		movs	r1, #252
 9555 0096 8903     		lsls	r1, r1, #14
3955:Library/src/lcm32f06x_tim.c ****     {
 9556              		.loc 1 3955 13 view .LVU2881
 9557 0098 0A42     		tst	r2, r1
 9558 009a D5D0     		beq	.L316
3957:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~(TIM_BreakSource >> 16));
 9559              		.loc 1 3957 7 is_stmt 1 view .LVU2882
 9560              	.LBB780:
 9561              	.LBI780:
 258:Core/cmsis_gcc.h **** {
 9562              		.loc 2 258 27 view .LVU2883
 9563              	.LBB781:
 260:Core/cmsis_gcc.h **** }
 9564              		.loc 2 260 3 view .LVU2884
 9565              		.syntax divided
 9566              	@ 260 "Core/cmsis_gcc.h" 1
 9567 009c BFF36F8F 		isb 0xF
 9568              	@ 0 "" 2
 9569              		.thumb
 9570              		.syntax unified
ARM GAS  /tmp/ccWBHqpW.s 			page 290


 9571              	.LBE781:
 9572              	.LBE780:
3957:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~(TIM_BreakSource >> 16));
 9573              		.loc 1 3957 7 discriminator 1 view .LVU2885
 9574              	.LBB782:
 9575              	.LBI782:
1204:Core/cmsis_gcc.h **** {
 9576              		.loc 2 1204 31 view .LVU2886
 9577              	.LBB783:
1206:Core/cmsis_gcc.h **** 
 9578              		.loc 2 1206 3 view .LVU2887
1208:Core/cmsis_gcc.h ****   return(result);
 9579              		.loc 2 1208 3 view .LVU2888
 9580              		.syntax divided
 9581              	@ 1208 "Core/cmsis_gcc.h" 1
 9582 00a0 EFF31082 		MRS r2, primask
 9583              	@ 0 "" 2
 9584              	.LVL661:
 9585              		.loc 2 1209 3 view .LVU2889
 9586              		.loc 2 1209 3 is_stmt 0 view .LVU2890
 9587              		.thumb
 9588              		.syntax unified
 9589              	.LBE783:
 9590              	.LBE782:
3957:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~(TIM_BreakSource >> 16));
 9591              		.loc 1 3957 7 is_stmt 1 discriminator 2 view .LVU2891
 9592              	.LBB784:
 9593              	.LBI784:
 960:Core/cmsis_gcc.h **** {
 9594              		.loc 2 960 27 view .LVU2892
 9595              	.LBB785:
 962:Core/cmsis_gcc.h **** }
 9596              		.loc 2 962 3 view .LVU2893
 9597              		.syntax divided
 9598              	@ 962 "Core/cmsis_gcc.h" 1
 9599 00a4 72B6     		cpsid i
 9600              	@ 0 "" 2
 9601              		.thumb
 9602              		.syntax unified
 9603              	.LBE785:
 9604              	.LBE784:
3957:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~(TIM_BreakSource >> 16));
 9605              		.loc 1 3957 7 discriminator 3 view .LVU2894
 9606 00a6 0D4A     		ldr	r2, .L330
 9607 00a8 0D49     		ldr	r1, .L330+4
3958:Library/src/lcm32f06x_tim.c ****       __dekey();
 9608              		.loc 1 3958 47 is_stmt 0 view .LVU2895
 9609 00aa 000C     		lsrs	r0, r0, #16
 9610              	.LVL662:
3957:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~(TIM_BreakSource >> 16));
 9611              		.loc 1 3957 7 discriminator 3 view .LVU2896
 9612 00ac 1160     		str	r1, [r2]
3957:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 &= (~(TIM_BreakSource >> 16));
 9613              		.loc 1 3957 23 is_stmt 1 discriminator 3 view .LVU2897
3958:Library/src/lcm32f06x_tim.c ****       __dekey();
 9614              		.loc 1 3958 7 view .LVU2898
3958:Library/src/lcm32f06x_tim.c ****       __dekey();
ARM GAS  /tmp/ccWBHqpW.s 			page 291


 9615              		.loc 1 3958 14 is_stmt 0 view .LVU2899
 9616 00ae DA6B     		ldr	r2, [r3, #60]
3958:Library/src/lcm32f06x_tim.c ****       __dekey();
 9617              		.loc 1 3958 25 view .LVU2900
 9618 00b0 8243     		bics	r2, r0
 9619 00b2 DA63     		str	r2, [r3, #60]
3959:Library/src/lcm32f06x_tim.c ****     }
 9620              		.loc 1 3959 7 is_stmt 1 view .LVU2901
 9621              	.LBB786:
 9622              	.LBI786:
 949:Core/cmsis_gcc.h **** {
 9623              		.loc 2 949 27 view .LVU2902
 9624              	.LBB787:
 951:Core/cmsis_gcc.h **** }
 9625              		.loc 2 951 3 view .LVU2903
 9626              		.syntax divided
 9627              	@ 951 "Core/cmsis_gcc.h" 1
 9628 00b4 62B6     		cpsie i
 9629              	@ 0 "" 2
 952:Core/cmsis_gcc.h **** 
 9630              		.loc 2 952 1 is_stmt 0 view .LVU2904
 9631              		.thumb
 9632              		.syntax unified
 9633 00b6 C7E7     		b	.L316
 9634              	.LVL663:
 9635              	.L322:
 952:Core/cmsis_gcc.h **** 
 9636              		.loc 2 952 1 view .LVU2905
 9637              	.LBE787:
 9638              	.LBE786:
3970:Library/src/lcm32f06x_tim.c ****     {
 9639              		.loc 1 3970 10 is_stmt 1 view .LVU2906
3970:Library/src/lcm32f06x_tim.c ****     {
 9640              		.loc 1 3970 21 is_stmt 0 view .LVU2907
 9641 00b8 FC21     		movs	r1, #252
 9642 00ba 8903     		lsls	r1, r1, #14
3970:Library/src/lcm32f06x_tim.c ****     {
 9643              		.loc 1 3970 13 view .LVU2908
 9644 00bc 0A42     		tst	r2, r1
 9645 00be C3D0     		beq	.L316
3972:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 16);
 9646              		.loc 1 3972 7 is_stmt 1 view .LVU2909
 9647              	.LBB788:
 9648              	.LBI788:
 258:Core/cmsis_gcc.h **** {
 9649              		.loc 2 258 27 view .LVU2910
 9650              	.LBB789:
 260:Core/cmsis_gcc.h **** }
 9651              		.loc 2 260 3 view .LVU2911
 9652              		.syntax divided
 9653              	@ 260 "Core/cmsis_gcc.h" 1
 9654 00c0 BFF36F8F 		isb 0xF
 9655              	@ 0 "" 2
 9656              		.thumb
 9657              		.syntax unified
 9658              	.LBE789:
 9659              	.LBE788:
ARM GAS  /tmp/ccWBHqpW.s 			page 292


3972:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 16);
 9660              		.loc 1 3972 7 discriminator 1 view .LVU2912
 9661              	.LBB790:
 9662              	.LBI790:
1204:Core/cmsis_gcc.h **** {
 9663              		.loc 2 1204 31 view .LVU2913
 9664              	.LBB791:
1206:Core/cmsis_gcc.h **** 
 9665              		.loc 2 1206 3 view .LVU2914
1208:Core/cmsis_gcc.h ****   return(result);
 9666              		.loc 2 1208 3 view .LVU2915
 9667              		.syntax divided
 9668              	@ 1208 "Core/cmsis_gcc.h" 1
 9669 00c4 EFF31082 		MRS r2, primask
 9670              	@ 0 "" 2
 9671              	.LVL664:
 9672              		.loc 2 1209 3 view .LVU2916
 9673              		.loc 2 1209 3 is_stmt 0 view .LVU2917
 9674              		.thumb
 9675              		.syntax unified
 9676              	.LBE791:
 9677              	.LBE790:
3972:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 16);
 9678              		.loc 1 3972 7 is_stmt 1 discriminator 2 view .LVU2918
 9679              	.LBB792:
 9680              	.LBI792:
 960:Core/cmsis_gcc.h **** {
 9681              		.loc 2 960 27 view .LVU2919
 9682              	.LBB793:
 962:Core/cmsis_gcc.h **** }
 9683              		.loc 2 962 3 view .LVU2920
 9684              		.syntax divided
 9685              	@ 962 "Core/cmsis_gcc.h" 1
 9686 00c8 72B6     		cpsid i
 9687              	@ 0 "" 2
 9688              		.thumb
 9689              		.syntax unified
 9690              	.LBE793:
 9691              	.LBE792:
3972:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 16);
 9692              		.loc 1 3972 7 discriminator 3 view .LVU2921
 9693 00ca 044A     		ldr	r2, .L330
 9694 00cc 0449     		ldr	r1, .L330+4
3973:Library/src/lcm32f06x_tim.c ****       __dekey();
 9695              		.loc 1 3973 45 is_stmt 0 view .LVU2922
 9696 00ce 000C     		lsrs	r0, r0, #16
 9697              	.LVL665:
3972:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 16);
 9698              		.loc 1 3972 7 discriminator 3 view .LVU2923
 9699 00d0 1160     		str	r1, [r2]
3972:Library/src/lcm32f06x_tim.c ****       SYSCTRL->EDU_CFG7 |= (TIM_BreakSource >> 16);
 9700              		.loc 1 3972 23 is_stmt 1 discriminator 3 view .LVU2924
3973:Library/src/lcm32f06x_tim.c ****       __dekey();
 9701              		.loc 1 3973 7 view .LVU2925
3973:Library/src/lcm32f06x_tim.c ****       __dekey();
 9702              		.loc 1 3973 14 is_stmt 0 view .LVU2926
 9703 00d2 DA6B     		ldr	r2, [r3, #60]
ARM GAS  /tmp/ccWBHqpW.s 			page 293


3973:Library/src/lcm32f06x_tim.c ****       __dekey();
 9704              		.loc 1 3973 25 view .LVU2927
 9705 00d4 1043     		orrs	r0, r2
 9706 00d6 D863     		str	r0, [r3, #60]
3974:Library/src/lcm32f06x_tim.c ****     }
 9707              		.loc 1 3974 7 is_stmt 1 view .LVU2928
 9708              	.LBB794:
 9709              	.LBI794:
 949:Core/cmsis_gcc.h **** {
 9710              		.loc 2 949 27 view .LVU2929
 9711              	.LBB795:
 951:Core/cmsis_gcc.h **** }
 9712              		.loc 2 951 3 view .LVU2930
 9713              		.syntax divided
 9714              	@ 951 "Core/cmsis_gcc.h" 1
 9715 00d8 62B6     		cpsie i
 9716              	@ 0 "" 2
 9717              		.thumb
 9718              		.syntax unified
 9719              	.LBE795:
 9720              	.LBE794:
3974:Library/src/lcm32f06x_tim.c ****     }
 9721              		.loc 1 3974 16 view .LVU2931
 9722              		.loc 1 3977 1 is_stmt 0 view .LVU2932
 9723 00da B5E7     		b	.L316
 9724              	.L331:
 9725              		.align	2
 9726              	.L330:
 9727 00dc 7C700048 		.word	1207988348
 9728 00e0 9A65FA05 		.word	100296090
 9729 00e4 00700048 		.word	1207988224
 9730              		.cfi_endproc
 9731              	.LFE165:
 9733              		.section	.text.TIM2_BreakSourceCfg,"ax",%progbits
 9734              		.align	1
 9735              		.p2align 2,,3
 9736              		.global	TIM2_BreakSourceCfg
 9737              		.syntax unified
 9738              		.code	16
 9739              		.thumb_func
 9741              	TIM2_BreakSourceCfg:
 9742              	.LVL666:
 9743              	.LFB166:
3978:Library/src/lcm32f06x_tim.c **** 
3979:Library/src/lcm32f06x_tim.c **** 
3980:Library/src/lcm32f06x_tim.c **** /**
3981:Library/src/lcm32f06x_tim.c ****   * @name   TIM2_BreakSourceCfg
3982:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM2 brake trigger input source configuration.
3983:Library/src/lcm32f06x_tim.c ****   *         CN: TIM2 刹车触发输入源配置。
3984:Library/src/lcm32f06x_tim.c ****   * @param  TIM_BreakSource: 
3985:Library/src/lcm32f06x_tim.c ****   *         EN: Brake input trigger source selection.
3986:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源选择。
3987:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Level: 
3988:Library/src/lcm32f06x_tim.c ****   *         EN: Effective level selection of TIM1 brake input trigger source.
3989:Library/src/lcm32f06x_tim.c ****   *         CN: TIM2 刹车输入触发源的有效电平选择。
3990:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
3991:Library/src/lcm32f06x_tim.c ****   *         EN: New status of brake input trigger source.
ARM GAS  /tmp/ccWBHqpW.s 			page 294


3992:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源新状态。
3993:Library/src/lcm32f06x_tim.c ****   * @retval None
3994:Library/src/lcm32f06x_tim.c ****   */
3995:Library/src/lcm32f06x_tim.c **** void TIM2_BreakSourceCfg(uint32_t TIM_BreakSource, uint32_t TIM_Level, FunctionalState NewState)
3996:Library/src/lcm32f06x_tim.c **** {
 9744              		.loc 1 3996 1 is_stmt 1 view -0
 9745              		.cfi_startproc
 9746              		@ args = 0, pretend = 0, frame = 0
 9747              		@ frame_needed = 0, uses_anonymous_args = 0
 9748              		@ link register save eliminated.
3997:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM2_BreakSource(TIM_BreakSource));
 9749              		.loc 1 3997 3 view .LVU2934
3998:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM_InputLevel(TIM_Level));
 9750              		.loc 1 3998 3 view .LVU2935
3999:Library/src/lcm32f06x_tim.c **** 
4000:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 9751              		.loc 1 4000 3 view .LVU2936
 9752              		.loc 1 4000 6 is_stmt 0 view .LVU2937
 9753 0000 002A     		cmp	r2, #0
 9754 0002 1DD0     		beq	.L333
4001:Library/src/lcm32f06x_tim.c ****   {
4002:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 9755              		.loc 1 4002 5 is_stmt 1 view .LVU2938
 9756              	.LBB796:
 9757              	.LBI796:
 258:Core/cmsis_gcc.h **** {
 9758              		.loc 2 258 27 view .LVU2939
 9759              	.LBB797:
 260:Core/cmsis_gcc.h **** }
 9760              		.loc 2 260 3 view .LVU2940
 9761              		.syntax divided
 9762              	@ 260 "Core/cmsis_gcc.h" 1
 9763 0004 BFF36F8F 		isb 0xF
 9764              	@ 0 "" 2
 9765              		.thumb
 9766              		.syntax unified
 9767              	.LBE797:
 9768              	.LBE796:
 9769              		.loc 1 4002 5 discriminator 1 view .LVU2941
 9770              	.LBB798:
 9771              	.LBI798:
1204:Core/cmsis_gcc.h **** {
 9772              		.loc 2 1204 31 view .LVU2942
 9773              	.LBB799:
1206:Core/cmsis_gcc.h **** 
 9774              		.loc 2 1206 3 view .LVU2943
1208:Core/cmsis_gcc.h ****   return(result);
 9775              		.loc 2 1208 3 view .LVU2944
 9776              		.syntax divided
 9777              	@ 1208 "Core/cmsis_gcc.h" 1
 9778 0008 EFF31083 		MRS r3, primask
 9779              	@ 0 "" 2
 9780              	.LVL667:
 9781              		.loc 2 1209 3 view .LVU2945
 9782              		.loc 2 1209 3 is_stmt 0 view .LVU2946
 9783              		.thumb
 9784              		.syntax unified
ARM GAS  /tmp/ccWBHqpW.s 			page 295


 9785              	.LBE799:
 9786              	.LBE798:
 9787              		.loc 1 4002 5 is_stmt 1 discriminator 2 view .LVU2947
 9788              	.LBB800:
 9789              	.LBI800:
 960:Core/cmsis_gcc.h **** {
 9790              		.loc 2 960 27 view .LVU2948
 9791              	.LBB801:
 962:Core/cmsis_gcc.h **** }
 9792              		.loc 2 962 3 view .LVU2949
 9793              		.syntax divided
 9794              	@ 962 "Core/cmsis_gcc.h" 1
 9795 000c 72B6     		cpsid i
 9796              	@ 0 "" 2
 9797              		.thumb
 9798              		.syntax unified
 9799              	.LBE801:
 9800              	.LBE800:
 9801              		.loc 1 4002 5 discriminator 3 view .LVU2950
 9802 000e 1C4B     		ldr	r3, .L338
 9803 0010 1C4A     		ldr	r2, .L338+4
 9804              	.LVL668:
 9805              		.loc 1 4002 5 is_stmt 0 discriminator 3 view .LVU2951
 9806 0012 1A60     		str	r2, [r3]
 9807              		.loc 1 4002 21 is_stmt 1 discriminator 3 view .LVU2952
4003:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= TIM_BreakSource; // TIM2 break 输入触发源
 9808              		.loc 1 4003 5 view .LVU2953
 9809              		.loc 1 4003 12 is_stmt 0 view .LVU2954
 9810 0014 1C4A     		ldr	r2, .L338+8
 9811 0016 536C     		ldr	r3, [r2, #68]
 9812              		.loc 1 4003 23 view .LVU2955
 9813 0018 0343     		orrs	r3, r0
 9814 001a 5364     		str	r3, [r2, #68]
4004:Library/src/lcm32f06x_tim.c ****     __dekey();
 9815              		.loc 1 4004 5 is_stmt 1 view .LVU2956
 9816              	.LBB802:
 9817              	.LBI802:
 949:Core/cmsis_gcc.h **** {
 9818              		.loc 2 949 27 view .LVU2957
 9819              	.LBB803:
 951:Core/cmsis_gcc.h **** }
 9820              		.loc 2 951 3 view .LVU2958
 9821              		.syntax divided
 9822              	@ 951 "Core/cmsis_gcc.h" 1
 9823 001c 62B6     		cpsie i
 9824              	@ 0 "" 2
 9825              		.thumb
 9826              		.syntax unified
 9827              	.LBE803:
 9828              	.LBE802:
 9829              		.loc 1 4004 14 discriminator 1 view .LVU2959
4005:Library/src/lcm32f06x_tim.c ****   }
4006:Library/src/lcm32f06x_tim.c ****   else
4007:Library/src/lcm32f06x_tim.c ****   {
4008:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
4009:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_BreakSource); // TIM2 break 输入触发源
4010:Library/src/lcm32f06x_tim.c ****     __dekey();
ARM GAS  /tmp/ccWBHqpW.s 			page 296


 9830              		.loc 1 4010 14 view .LVU2960
4011:Library/src/lcm32f06x_tim.c ****   }
4012:Library/src/lcm32f06x_tim.c **** 
4013:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM2 break 触发源有效电平为高
 9831              		.loc 1 4013 3 view .LVU2961
 9832              		.loc 1 4013 6 is_stmt 0 view .LVU2962
 9833 001e 0029     		cmp	r1, #0
 9834 0020 1DD1     		bne	.L335
 9835              	.L337:
4014:Library/src/lcm32f06x_tim.c ****   {
4015:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 9836              		.loc 1 4015 5 is_stmt 1 view .LVU2963
 9837              	.LBB804:
 9838              	.LBI804:
 258:Core/cmsis_gcc.h **** {
 9839              		.loc 2 258 27 view .LVU2964
 9840              	.LBB805:
 260:Core/cmsis_gcc.h **** }
 9841              		.loc 2 260 3 view .LVU2965
 9842              		.syntax divided
 9843              	@ 260 "Core/cmsis_gcc.h" 1
 9844 0022 BFF36F8F 		isb 0xF
 9845              	@ 0 "" 2
 9846              		.thumb
 9847              		.syntax unified
 9848              	.LBE805:
 9849              	.LBE804:
 9850              		.loc 1 4015 5 discriminator 1 view .LVU2966
 9851              	.LBB806:
 9852              	.LBI806:
1204:Core/cmsis_gcc.h **** {
 9853              		.loc 2 1204 31 view .LVU2967
 9854              	.LBB807:
1206:Core/cmsis_gcc.h **** 
 9855              		.loc 2 1206 3 view .LVU2968
1208:Core/cmsis_gcc.h ****   return(result);
 9856              		.loc 2 1208 3 view .LVU2969
 9857              		.syntax divided
 9858              	@ 1208 "Core/cmsis_gcc.h" 1
 9859 0026 EFF31083 		MRS r3, primask
 9860              	@ 0 "" 2
 9861              	.LVL669:
 9862              		.loc 2 1209 3 view .LVU2970
 9863              		.loc 2 1209 3 is_stmt 0 view .LVU2971
 9864              		.thumb
 9865              		.syntax unified
 9866              	.LBE807:
 9867              	.LBE806:
 9868              		.loc 1 4015 5 is_stmt 1 discriminator 2 view .LVU2972
 9869              	.LBB808:
 9870              	.LBI808:
 960:Core/cmsis_gcc.h **** {
 9871              		.loc 2 960 27 view .LVU2973
 9872              	.LBB809:
 962:Core/cmsis_gcc.h **** }
 9873              		.loc 2 962 3 view .LVU2974
 9874              		.syntax divided
ARM GAS  /tmp/ccWBHqpW.s 			page 297


 9875              	@ 962 "Core/cmsis_gcc.h" 1
 9876 002a 72B6     		cpsid i
 9877              	@ 0 "" 2
 9878              		.thumb
 9879              		.syntax unified
 9880              	.LBE809:
 9881              	.LBE808:
 9882              		.loc 1 4015 5 discriminator 3 view .LVU2975
 9883 002c 144B     		ldr	r3, .L338
 9884 002e 154A     		ldr	r2, .L338+4
4016:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~(TIM_BreakSource >> 8));
 9885              		.loc 1 4016 45 is_stmt 0 view .LVU2976
 9886 0030 000A     		lsrs	r0, r0, #8
 9887              	.LVL670:
4015:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~(TIM_BreakSource >> 8));
 9888              		.loc 1 4015 5 discriminator 3 view .LVU2977
 9889 0032 1A60     		str	r2, [r3]
4015:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~(TIM_BreakSource >> 8));
 9890              		.loc 1 4015 21 is_stmt 1 discriminator 3 view .LVU2978
 9891              		.loc 1 4016 5 view .LVU2979
 9892              		.loc 1 4016 12 is_stmt 0 view .LVU2980
 9893 0034 144A     		ldr	r2, .L338+8
 9894 0036 536C     		ldr	r3, [r2, #68]
 9895              		.loc 1 4016 23 view .LVU2981
 9896 0038 8343     		bics	r3, r0
 9897 003a 5364     		str	r3, [r2, #68]
4017:Library/src/lcm32f06x_tim.c ****     __dekey();
 9898              		.loc 1 4017 5 is_stmt 1 view .LVU2982
 9899              	.LBB810:
 9900              	.LBI810:
 949:Core/cmsis_gcc.h **** {
 9901              		.loc 2 949 27 view .LVU2983
 9902              	.LBB811:
 951:Core/cmsis_gcc.h **** }
 9903              		.loc 2 951 3 view .LVU2984
 9904              		.syntax divided
 9905              	@ 951 "Core/cmsis_gcc.h" 1
 9906 003c 62B6     		cpsie i
 9907              	@ 0 "" 2
 9908              		.thumb
 9909              		.syntax unified
 9910              	.LBE811:
 9911              	.LBE810:
 9912              		.loc 1 4017 14 discriminator 1 view .LVU2985
 9913              	.L332:
4018:Library/src/lcm32f06x_tim.c ****   }
4019:Library/src/lcm32f06x_tim.c ****   else if (TIM_Level == TIM_InputLevel_Low)  // TIM2 break 触发源有效电平为低
4020:Library/src/lcm32f06x_tim.c ****   {
4021:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
4022:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_BreakSource >> 8);
4023:Library/src/lcm32f06x_tim.c ****     __dekey();
4024:Library/src/lcm32f06x_tim.c ****   }
4025:Library/src/lcm32f06x_tim.c **** }
 9914              		.loc 1 4025 1 is_stmt 0 view .LVU2986
 9915              		@ sp needed
 9916 003e 7047     		bx	lr
 9917              	.LVL671:
ARM GAS  /tmp/ccWBHqpW.s 			page 298


 9918              	.L333:
4008:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_BreakSource); // TIM2 break 输入触发源
 9919              		.loc 1 4008 5 is_stmt 1 view .LVU2987
 9920              	.LBB812:
 9921              	.LBI812:
 258:Core/cmsis_gcc.h **** {
 9922              		.loc 2 258 27 view .LVU2988
 9923              	.LBB813:
 260:Core/cmsis_gcc.h **** }
 9924              		.loc 2 260 3 view .LVU2989
 9925              		.syntax divided
 9926              	@ 260 "Core/cmsis_gcc.h" 1
 9927 0040 BFF36F8F 		isb 0xF
 9928              	@ 0 "" 2
 9929              		.thumb
 9930              		.syntax unified
 9931              	.LBE813:
 9932              	.LBE812:
4008:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_BreakSource); // TIM2 break 输入触发源
 9933              		.loc 1 4008 5 discriminator 1 view .LVU2990
 9934              	.LBB814:
 9935              	.LBI814:
1204:Core/cmsis_gcc.h **** {
 9936              		.loc 2 1204 31 view .LVU2991
 9937              	.LBB815:
1206:Core/cmsis_gcc.h **** 
 9938              		.loc 2 1206 3 view .LVU2992
1208:Core/cmsis_gcc.h ****   return(result);
 9939              		.loc 2 1208 3 view .LVU2993
 9940              		.syntax divided
 9941              	@ 1208 "Core/cmsis_gcc.h" 1
 9942 0044 EFF31083 		MRS r3, primask
 9943              	@ 0 "" 2
 9944              	.LVL672:
 9945              		.loc 2 1209 3 view .LVU2994
 9946              		.loc 2 1209 3 is_stmt 0 view .LVU2995
 9947              		.thumb
 9948              		.syntax unified
 9949              	.LBE815:
 9950              	.LBE814:
4008:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_BreakSource); // TIM2 break 输入触发源
 9951              		.loc 1 4008 5 is_stmt 1 discriminator 2 view .LVU2996
 9952              	.LBB816:
 9953              	.LBI816:
 960:Core/cmsis_gcc.h **** {
 9954              		.loc 2 960 27 view .LVU2997
 9955              	.LBB817:
 962:Core/cmsis_gcc.h **** }
 9956              		.loc 2 962 3 view .LVU2998
 9957              		.syntax divided
 9958              	@ 962 "Core/cmsis_gcc.h" 1
 9959 0048 72B6     		cpsid i
 9960              	@ 0 "" 2
 9961              		.thumb
 9962              		.syntax unified
 9963              	.LBE817:
 9964              	.LBE816:
ARM GAS  /tmp/ccWBHqpW.s 			page 299


4008:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_BreakSource); // TIM2 break 输入触发源
 9965              		.loc 1 4008 5 discriminator 3 view .LVU2999
 9966 004a 0D4B     		ldr	r3, .L338
 9967 004c 0D4A     		ldr	r2, .L338+4
 9968              	.LVL673:
4008:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_BreakSource); // TIM2 break 输入触发源
 9969              		.loc 1 4008 5 is_stmt 0 discriminator 3 view .LVU3000
 9970 004e 1A60     		str	r2, [r3]
4008:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_BreakSource); // TIM2 break 输入触发源
 9971              		.loc 1 4008 21 is_stmt 1 discriminator 3 view .LVU3001
4009:Library/src/lcm32f06x_tim.c ****     __dekey();
 9972              		.loc 1 4009 5 view .LVU3002
4009:Library/src/lcm32f06x_tim.c ****     __dekey();
 9973              		.loc 1 4009 12 is_stmt 0 view .LVU3003
 9974 0050 0D4A     		ldr	r2, .L338+8
 9975 0052 536C     		ldr	r3, [r2, #68]
4009:Library/src/lcm32f06x_tim.c ****     __dekey();
 9976              		.loc 1 4009 23 view .LVU3004
 9977 0054 8343     		bics	r3, r0
 9978 0056 5364     		str	r3, [r2, #68]
4010:Library/src/lcm32f06x_tim.c ****   }
 9979              		.loc 1 4010 5 is_stmt 1 view .LVU3005
 9980              	.LBB818:
 9981              	.LBI818:
 949:Core/cmsis_gcc.h **** {
 9982              		.loc 2 949 27 view .LVU3006
 9983              	.LBB819:
 951:Core/cmsis_gcc.h **** }
 9984              		.loc 2 951 3 view .LVU3007
 9985              		.syntax divided
 9986              	@ 951 "Core/cmsis_gcc.h" 1
 9987 0058 62B6     		cpsie i
 9988              	@ 0 "" 2
 9989              		.thumb
 9990              		.syntax unified
 9991              	.LBE819:
 9992              	.LBE818:
4010:Library/src/lcm32f06x_tim.c ****   }
 9993              		.loc 1 4010 14 view .LVU3008
4013:Library/src/lcm32f06x_tim.c ****   {
 9994              		.loc 1 4013 3 view .LVU3009
4013:Library/src/lcm32f06x_tim.c ****   {
 9995              		.loc 1 4013 6 is_stmt 0 view .LVU3010
 9996 005a 0029     		cmp	r1, #0
 9997 005c E1D0     		beq	.L337
 9998              	.L335:
4019:Library/src/lcm32f06x_tim.c ****   {
 9999              		.loc 1 4019 8 is_stmt 1 view .LVU3011
4019:Library/src/lcm32f06x_tim.c ****   {
 10000              		.loc 1 4019 11 is_stmt 0 view .LVU3012
 10001 005e 0129     		cmp	r1, #1
 10002 0060 EDD1     		bne	.L332
4021:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_BreakSource >> 8);
 10003              		.loc 1 4021 5 is_stmt 1 view .LVU3013
 10004              	.LBB820:
 10005              	.LBI820:
 258:Core/cmsis_gcc.h **** {
ARM GAS  /tmp/ccWBHqpW.s 			page 300


 10006              		.loc 2 258 27 view .LVU3014
 10007              	.LBB821:
 260:Core/cmsis_gcc.h **** }
 10008              		.loc 2 260 3 view .LVU3015
 10009              		.syntax divided
 10010              	@ 260 "Core/cmsis_gcc.h" 1
 10011 0062 BFF36F8F 		isb 0xF
 10012              	@ 0 "" 2
 10013              		.thumb
 10014              		.syntax unified
 10015              	.LBE821:
 10016              	.LBE820:
4021:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_BreakSource >> 8);
 10017              		.loc 1 4021 5 discriminator 1 view .LVU3016
 10018              	.LBB822:
 10019              	.LBI822:
1204:Core/cmsis_gcc.h **** {
 10020              		.loc 2 1204 31 view .LVU3017
 10021              	.LBB823:
1206:Core/cmsis_gcc.h **** 
 10022              		.loc 2 1206 3 view .LVU3018
1208:Core/cmsis_gcc.h ****   return(result);
 10023              		.loc 2 1208 3 view .LVU3019
 10024              		.syntax divided
 10025              	@ 1208 "Core/cmsis_gcc.h" 1
 10026 0066 EFF31083 		MRS r3, primask
 10027              	@ 0 "" 2
 10028              	.LVL674:
 10029              		.loc 2 1209 3 view .LVU3020
 10030              		.loc 2 1209 3 is_stmt 0 view .LVU3021
 10031              		.thumb
 10032              		.syntax unified
 10033              	.LBE823:
 10034              	.LBE822:
4021:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_BreakSource >> 8);
 10035              		.loc 1 4021 5 is_stmt 1 discriminator 2 view .LVU3022
 10036              	.LBB824:
 10037              	.LBI824:
 960:Core/cmsis_gcc.h **** {
 10038              		.loc 2 960 27 view .LVU3023
 10039              	.LBB825:
 962:Core/cmsis_gcc.h **** }
 10040              		.loc 2 962 3 view .LVU3024
 10041              		.syntax divided
 10042              	@ 962 "Core/cmsis_gcc.h" 1
 10043 006a 72B6     		cpsid i
 10044              	@ 0 "" 2
 10045              		.thumb
 10046              		.syntax unified
 10047              	.LBE825:
 10048              	.LBE824:
4021:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_BreakSource >> 8);
 10049              		.loc 1 4021 5 discriminator 3 view .LVU3025
 10050 006c 044B     		ldr	r3, .L338
 10051 006e 054A     		ldr	r2, .L338+4
4022:Library/src/lcm32f06x_tim.c ****     __dekey();
 10052              		.loc 1 4022 43 is_stmt 0 view .LVU3026
ARM GAS  /tmp/ccWBHqpW.s 			page 301


 10053 0070 000A     		lsrs	r0, r0, #8
 10054              	.LVL675:
4021:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_BreakSource >> 8);
 10055              		.loc 1 4021 5 discriminator 3 view .LVU3027
 10056 0072 1A60     		str	r2, [r3]
4021:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_BreakSource >> 8);
 10057              		.loc 1 4021 21 is_stmt 1 discriminator 3 view .LVU3028
4022:Library/src/lcm32f06x_tim.c ****     __dekey();
 10058              		.loc 1 4022 5 view .LVU3029
4022:Library/src/lcm32f06x_tim.c ****     __dekey();
 10059              		.loc 1 4022 12 is_stmt 0 view .LVU3030
 10060 0074 044B     		ldr	r3, .L338+8
 10061 0076 5A6C     		ldr	r2, [r3, #68]
4022:Library/src/lcm32f06x_tim.c ****     __dekey();
 10062              		.loc 1 4022 23 view .LVU3031
 10063 0078 1043     		orrs	r0, r2
 10064 007a 5864     		str	r0, [r3, #68]
4023:Library/src/lcm32f06x_tim.c ****   }
 10065              		.loc 1 4023 5 is_stmt 1 view .LVU3032
 10066              	.LBB826:
 10067              	.LBI826:
 949:Core/cmsis_gcc.h **** {
 10068              		.loc 2 949 27 view .LVU3033
 10069              	.LBB827:
 951:Core/cmsis_gcc.h **** }
 10070              		.loc 2 951 3 view .LVU3034
 10071              		.syntax divided
 10072              	@ 951 "Core/cmsis_gcc.h" 1
 10073 007c 62B6     		cpsie i
 10074              	@ 0 "" 2
 10075              		.thumb
 10076              		.syntax unified
 10077              	.LBE827:
 10078              	.LBE826:
4023:Library/src/lcm32f06x_tim.c ****   }
 10079              		.loc 1 4023 14 view .LVU3035
 10080              		.loc 1 4025 1 is_stmt 0 view .LVU3036
 10081 007e DEE7     		b	.L332
 10082              	.L339:
 10083              		.align	2
 10084              	.L338:
 10085 0080 7C700048 		.word	1207988348
 10086 0084 9A65FA05 		.word	100296090
 10087 0088 00700048 		.word	1207988224
 10088              		.cfi_endproc
 10089              	.LFE166:
 10091              		.section	.text.TIM2_OCREF_CLR_SourceCfg,"ax",%progbits
 10092              		.align	1
 10093              		.p2align 2,,3
 10094              		.global	TIM2_OCREF_CLR_SourceCfg
 10095              		.syntax unified
 10096              		.code	16
 10097              		.thumb_func
 10099              	TIM2_OCREF_CLR_SourceCfg:
 10100              	.LVL676:
 10101              	.LFB167:
4026:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 302


4027:Library/src/lcm32f06x_tim.c **** /**
4028:Library/src/lcm32f06x_tim.c ****   * @name   TIM2_OCREF_CLR_SourceCfg
4029:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM2 OCREF_CLR trigger input source configuration.
4030:Library/src/lcm32f06x_tim.c ****   *         CN: TIM2 OCREF_CLR触发输入源配置。
4031:Library/src/lcm32f06x_tim.c ****   * @param  TIM_BreakSource: 
4032:Library/src/lcm32f06x_tim.c ****   *         EN: OCREF_CLR input trigger source selection.
4033:Library/src/lcm32f06x_tim.c ****   *         CN: OCREF_CLR输入触发源选择。
4034:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Level: 
4035:Library/src/lcm32f06x_tim.c ****   *         EN: Effective level selection of TIM2 OCREF_CLR input trigger source.
4036:Library/src/lcm32f06x_tim.c ****   *         CN: TIM2 OCREF_CLR输入触发源的有效电平选择。
4037:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4038:Library/src/lcm32f06x_tim.c ****   *         EN: New status of  OCREF_CLR input trigger source.
4039:Library/src/lcm32f06x_tim.c ****   *         CN: 刹车输入触发源新状态。
4040:Library/src/lcm32f06x_tim.c ****   * @retval None
4041:Library/src/lcm32f06x_tim.c ****   */
4042:Library/src/lcm32f06x_tim.c **** void TIM2_OCREF_CLR_SourceCfg(uint32_t TIM_OCREF_CLR_Source, uint32_t TIM_Level, FunctionalState Ne
4043:Library/src/lcm32f06x_tim.c **** {
 10102              		.loc 1 4043 1 is_stmt 1 view -0
 10103              		.cfi_startproc
 10104              		@ args = 0, pretend = 0, frame = 0
 10105              		@ frame_needed = 0, uses_anonymous_args = 0
 10106              		@ link register save eliminated.
4044:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM2_OCREF_CLR_Source(TIM_OCREF_CLR_Source));
 10107              		.loc 1 4044 3 view .LVU3038
4045:Library/src/lcm32f06x_tim.c ****   assert_param(IS_TIM_InputLevel(TIM_Level));
 10108              		.loc 1 4045 3 view .LVU3039
4046:Library/src/lcm32f06x_tim.c ****   
4047:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 10109              		.loc 1 4047 3 view .LVU3040
 10110              		.loc 1 4047 6 is_stmt 0 view .LVU3041
 10111 0000 002A     		cmp	r2, #0
 10112 0002 1DD0     		beq	.L341
4048:Library/src/lcm32f06x_tim.c ****   {
4049:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 10113              		.loc 1 4049 5 is_stmt 1 view .LVU3042
 10114              	.LBB828:
 10115              	.LBI828:
 258:Core/cmsis_gcc.h **** {
 10116              		.loc 2 258 27 view .LVU3043
 10117              	.LBB829:
 260:Core/cmsis_gcc.h **** }
 10118              		.loc 2 260 3 view .LVU3044
 10119              		.syntax divided
 10120              	@ 260 "Core/cmsis_gcc.h" 1
 10121 0004 BFF36F8F 		isb 0xF
 10122              	@ 0 "" 2
 10123              		.thumb
 10124              		.syntax unified
 10125              	.LBE829:
 10126              	.LBE828:
 10127              		.loc 1 4049 5 discriminator 1 view .LVU3045
 10128              	.LBB830:
 10129              	.LBI830:
1204:Core/cmsis_gcc.h **** {
 10130              		.loc 2 1204 31 view .LVU3046
 10131              	.LBB831:
1206:Core/cmsis_gcc.h **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 303


 10132              		.loc 2 1206 3 view .LVU3047
1208:Core/cmsis_gcc.h ****   return(result);
 10133              		.loc 2 1208 3 view .LVU3048
 10134              		.syntax divided
 10135              	@ 1208 "Core/cmsis_gcc.h" 1
 10136 0008 EFF31083 		MRS r3, primask
 10137              	@ 0 "" 2
 10138              	.LVL677:
 10139              		.loc 2 1209 3 view .LVU3049
 10140              		.loc 2 1209 3 is_stmt 0 view .LVU3050
 10141              		.thumb
 10142              		.syntax unified
 10143              	.LBE831:
 10144              	.LBE830:
 10145              		.loc 1 4049 5 is_stmt 1 discriminator 2 view .LVU3051
 10146              	.LBB832:
 10147              	.LBI832:
 960:Core/cmsis_gcc.h **** {
 10148              		.loc 2 960 27 view .LVU3052
 10149              	.LBB833:
 962:Core/cmsis_gcc.h **** }
 10150              		.loc 2 962 3 view .LVU3053
 10151              		.syntax divided
 10152              	@ 962 "Core/cmsis_gcc.h" 1
 10153 000c 72B6     		cpsid i
 10154              	@ 0 "" 2
 10155              		.thumb
 10156              		.syntax unified
 10157              	.LBE833:
 10158              	.LBE832:
 10159              		.loc 1 4049 5 discriminator 3 view .LVU3054
 10160 000e 1C4B     		ldr	r3, .L346
 10161 0010 1C4A     		ldr	r2, .L346+4
 10162              	.LVL678:
 10163              		.loc 1 4049 5 is_stmt 0 discriminator 3 view .LVU3055
 10164 0012 1A60     		str	r2, [r3]
 10165              		.loc 1 4049 21 is_stmt 1 discriminator 3 view .LVU3056
4050:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= TIM_OCREF_CLR_Source; // TIM2 OCREF_CLR 输入触发源
 10166              		.loc 1 4050 5 view .LVU3057
 10167              		.loc 1 4050 12 is_stmt 0 view .LVU3058
 10168 0014 1C4A     		ldr	r2, .L346+8
 10169 0016 536C     		ldr	r3, [r2, #68]
 10170              		.loc 1 4050 23 view .LVU3059
 10171 0018 0343     		orrs	r3, r0
 10172 001a 5364     		str	r3, [r2, #68]
4051:Library/src/lcm32f06x_tim.c ****     __dekey();
 10173              		.loc 1 4051 5 is_stmt 1 view .LVU3060
 10174              	.LBB834:
 10175              	.LBI834:
 949:Core/cmsis_gcc.h **** {
 10176              		.loc 2 949 27 view .LVU3061
 10177              	.LBB835:
 951:Core/cmsis_gcc.h **** }
 10178              		.loc 2 951 3 view .LVU3062
 10179              		.syntax divided
 10180              	@ 951 "Core/cmsis_gcc.h" 1
 10181 001c 62B6     		cpsie i
ARM GAS  /tmp/ccWBHqpW.s 			page 304


 10182              	@ 0 "" 2
 10183              		.thumb
 10184              		.syntax unified
 10185              	.LBE835:
 10186              	.LBE834:
 10187              		.loc 1 4051 14 discriminator 1 view .LVU3063
4052:Library/src/lcm32f06x_tim.c ****   }
4053:Library/src/lcm32f06x_tim.c ****   else
4054:Library/src/lcm32f06x_tim.c ****   {
4055:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
4056:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
4057:Library/src/lcm32f06x_tim.c ****     __dekey();
 10188              		.loc 1 4057 14 view .LVU3064
4058:Library/src/lcm32f06x_tim.c ****   }
4059:Library/src/lcm32f06x_tim.c **** 
4060:Library/src/lcm32f06x_tim.c ****   if (TIM_Level == TIM_InputLevel_High)       // TIM2 OCREF_CLR 触发源有效电平为高
 10189              		.loc 1 4060 3 view .LVU3065
 10190              		.loc 1 4060 6 is_stmt 0 view .LVU3066
 10191 001e 0029     		cmp	r1, #0
 10192 0020 1DD1     		bne	.L343
 10193              	.L345:
4061:Library/src/lcm32f06x_tim.c ****   {
4062:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
 10194              		.loc 1 4062 5 is_stmt 1 view .LVU3067
 10195              	.LBB836:
 10196              	.LBI836:
 258:Core/cmsis_gcc.h **** {
 10197              		.loc 2 258 27 view .LVU3068
 10198              	.LBB837:
 260:Core/cmsis_gcc.h **** }
 10199              		.loc 2 260 3 view .LVU3069
 10200              		.syntax divided
 10201              	@ 260 "Core/cmsis_gcc.h" 1
 10202 0022 BFF36F8F 		isb 0xF
 10203              	@ 0 "" 2
 10204              		.thumb
 10205              		.syntax unified
 10206              	.LBE837:
 10207              	.LBE836:
 10208              		.loc 1 4062 5 discriminator 1 view .LVU3070
 10209              	.LBB838:
 10210              	.LBI838:
1204:Core/cmsis_gcc.h **** {
 10211              		.loc 2 1204 31 view .LVU3071
 10212              	.LBB839:
1206:Core/cmsis_gcc.h **** 
 10213              		.loc 2 1206 3 view .LVU3072
1208:Core/cmsis_gcc.h ****   return(result);
 10214              		.loc 2 1208 3 view .LVU3073
 10215              		.syntax divided
 10216              	@ 1208 "Core/cmsis_gcc.h" 1
 10217 0026 EFF31083 		MRS r3, primask
 10218              	@ 0 "" 2
 10219              	.LVL679:
 10220              		.loc 2 1209 3 view .LVU3074
 10221              		.loc 2 1209 3 is_stmt 0 view .LVU3075
 10222              		.thumb
ARM GAS  /tmp/ccWBHqpW.s 			page 305


 10223              		.syntax unified
 10224              	.LBE839:
 10225              	.LBE838:
 10226              		.loc 1 4062 5 is_stmt 1 discriminator 2 view .LVU3076
 10227              	.LBB840:
 10228              	.LBI840:
 960:Core/cmsis_gcc.h **** {
 10229              		.loc 2 960 27 view .LVU3077
 10230              	.LBB841:
 962:Core/cmsis_gcc.h **** }
 10231              		.loc 2 962 3 view .LVU3078
 10232              		.syntax divided
 10233              	@ 962 "Core/cmsis_gcc.h" 1
 10234 002a 72B6     		cpsid i
 10235              	@ 0 "" 2
 10236              		.thumb
 10237              		.syntax unified
 10238              	.LBE841:
 10239              	.LBE840:
 10240              		.loc 1 4062 5 discriminator 3 view .LVU3079
 10241 002c 144B     		ldr	r3, .L346
 10242 002e 154A     		ldr	r2, .L346+4
4063:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~(TIM_OCREF_CLR_Source >> 24));
 10243              		.loc 1 4063 50 is_stmt 0 view .LVU3080
 10244 0030 000E     		lsrs	r0, r0, #24
 10245              	.LVL680:
4062:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~(TIM_OCREF_CLR_Source >> 24));
 10246              		.loc 1 4062 5 discriminator 3 view .LVU3081
 10247 0032 1A60     		str	r2, [r3]
4062:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~(TIM_OCREF_CLR_Source >> 24));
 10248              		.loc 1 4062 21 is_stmt 1 discriminator 3 view .LVU3082
 10249              		.loc 1 4063 5 view .LVU3083
 10250              		.loc 1 4063 12 is_stmt 0 view .LVU3084
 10251 0034 144A     		ldr	r2, .L346+8
 10252 0036 536C     		ldr	r3, [r2, #68]
 10253              		.loc 1 4063 23 view .LVU3085
 10254 0038 8343     		bics	r3, r0
 10255 003a 5364     		str	r3, [r2, #68]
4064:Library/src/lcm32f06x_tim.c ****     __dekey();
 10256              		.loc 1 4064 5 is_stmt 1 view .LVU3086
 10257              	.LBB842:
 10258              	.LBI842:
 949:Core/cmsis_gcc.h **** {
 10259              		.loc 2 949 27 view .LVU3087
 10260              	.LBB843:
 951:Core/cmsis_gcc.h **** }
 10261              		.loc 2 951 3 view .LVU3088
 10262              		.syntax divided
 10263              	@ 951 "Core/cmsis_gcc.h" 1
 10264 003c 62B6     		cpsie i
 10265              	@ 0 "" 2
 10266              		.thumb
 10267              		.syntax unified
 10268              	.LBE843:
 10269              	.LBE842:
 10270              		.loc 1 4064 14 discriminator 1 view .LVU3089
 10271              	.L340:
ARM GAS  /tmp/ccWBHqpW.s 			page 306


4065:Library/src/lcm32f06x_tim.c ****   }
4066:Library/src/lcm32f06x_tim.c ****   else if (TIM_Level == TIM_InputLevel_Low)  // TIM1 OCREF_CLR 触发源有效电平为低
4067:Library/src/lcm32f06x_tim.c ****   {
4068:Library/src/lcm32f06x_tim.c ****     sysctrl_access();
4069:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_OCREF_CLR_Source >> 24);
4070:Library/src/lcm32f06x_tim.c ****     __dekey();
4071:Library/src/lcm32f06x_tim.c ****   }
4072:Library/src/lcm32f06x_tim.c **** }
 10272              		.loc 1 4072 1 is_stmt 0 view .LVU3090
 10273              		@ sp needed
 10274 003e 7047     		bx	lr
 10275              	.LVL681:
 10276              	.L341:
4055:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 10277              		.loc 1 4055 5 is_stmt 1 view .LVU3091
 10278              	.LBB844:
 10279              	.LBI844:
 258:Core/cmsis_gcc.h **** {
 10280              		.loc 2 258 27 view .LVU3092
 10281              	.LBB845:
 260:Core/cmsis_gcc.h **** }
 10282              		.loc 2 260 3 view .LVU3093
 10283              		.syntax divided
 10284              	@ 260 "Core/cmsis_gcc.h" 1
 10285 0040 BFF36F8F 		isb 0xF
 10286              	@ 0 "" 2
 10287              		.thumb
 10288              		.syntax unified
 10289              	.LBE845:
 10290              	.LBE844:
4055:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 10291              		.loc 1 4055 5 discriminator 1 view .LVU3094
 10292              	.LBB846:
 10293              	.LBI846:
1204:Core/cmsis_gcc.h **** {
 10294              		.loc 2 1204 31 view .LVU3095
 10295              	.LBB847:
1206:Core/cmsis_gcc.h **** 
 10296              		.loc 2 1206 3 view .LVU3096
1208:Core/cmsis_gcc.h ****   return(result);
 10297              		.loc 2 1208 3 view .LVU3097
 10298              		.syntax divided
 10299              	@ 1208 "Core/cmsis_gcc.h" 1
 10300 0044 EFF31083 		MRS r3, primask
 10301              	@ 0 "" 2
 10302              	.LVL682:
 10303              		.loc 2 1209 3 view .LVU3098
 10304              		.loc 2 1209 3 is_stmt 0 view .LVU3099
 10305              		.thumb
 10306              		.syntax unified
 10307              	.LBE847:
 10308              	.LBE846:
4055:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 10309              		.loc 1 4055 5 is_stmt 1 discriminator 2 view .LVU3100
 10310              	.LBB848:
 10311              	.LBI848:
 960:Core/cmsis_gcc.h **** {
ARM GAS  /tmp/ccWBHqpW.s 			page 307


 10312              		.loc 2 960 27 view .LVU3101
 10313              	.LBB849:
 962:Core/cmsis_gcc.h **** }
 10314              		.loc 2 962 3 view .LVU3102
 10315              		.syntax divided
 10316              	@ 962 "Core/cmsis_gcc.h" 1
 10317 0048 72B6     		cpsid i
 10318              	@ 0 "" 2
 10319              		.thumb
 10320              		.syntax unified
 10321              	.LBE849:
 10322              	.LBE848:
4055:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 10323              		.loc 1 4055 5 discriminator 3 view .LVU3103
 10324 004a 0D4B     		ldr	r3, .L346
 10325 004c 0D4A     		ldr	r2, .L346+4
 10326              	.LVL683:
4055:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 10327              		.loc 1 4055 5 is_stmt 0 discriminator 3 view .LVU3104
 10328 004e 1A60     		str	r2, [r3]
4055:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 &= (~TIM_OCREF_CLR_Source); // TIM OCREF_CLR 输入触发源
 10329              		.loc 1 4055 21 is_stmt 1 discriminator 3 view .LVU3105
4056:Library/src/lcm32f06x_tim.c ****     __dekey();
 10330              		.loc 1 4056 5 view .LVU3106
4056:Library/src/lcm32f06x_tim.c ****     __dekey();
 10331              		.loc 1 4056 12 is_stmt 0 view .LVU3107
 10332 0050 0D4A     		ldr	r2, .L346+8
 10333 0052 536C     		ldr	r3, [r2, #68]
4056:Library/src/lcm32f06x_tim.c ****     __dekey();
 10334              		.loc 1 4056 23 view .LVU3108
 10335 0054 8343     		bics	r3, r0
 10336 0056 5364     		str	r3, [r2, #68]
4057:Library/src/lcm32f06x_tim.c ****   }
 10337              		.loc 1 4057 5 is_stmt 1 view .LVU3109
 10338              	.LBB850:
 10339              	.LBI850:
 949:Core/cmsis_gcc.h **** {
 10340              		.loc 2 949 27 view .LVU3110
 10341              	.LBB851:
 951:Core/cmsis_gcc.h **** }
 10342              		.loc 2 951 3 view .LVU3111
 10343              		.syntax divided
 10344              	@ 951 "Core/cmsis_gcc.h" 1
 10345 0058 62B6     		cpsie i
 10346              	@ 0 "" 2
 10347              		.thumb
 10348              		.syntax unified
 10349              	.LBE851:
 10350              	.LBE850:
4057:Library/src/lcm32f06x_tim.c ****   }
 10351              		.loc 1 4057 14 view .LVU3112
4060:Library/src/lcm32f06x_tim.c ****   {
 10352              		.loc 1 4060 3 view .LVU3113
4060:Library/src/lcm32f06x_tim.c ****   {
 10353              		.loc 1 4060 6 is_stmt 0 view .LVU3114
 10354 005a 0029     		cmp	r1, #0
 10355 005c E1D0     		beq	.L345
ARM GAS  /tmp/ccWBHqpW.s 			page 308


 10356              	.L343:
4066:Library/src/lcm32f06x_tim.c ****   {
 10357              		.loc 1 4066 8 is_stmt 1 view .LVU3115
4066:Library/src/lcm32f06x_tim.c ****   {
 10358              		.loc 1 4066 11 is_stmt 0 view .LVU3116
 10359 005e 0129     		cmp	r1, #1
 10360 0060 EDD1     		bne	.L340
4068:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_OCREF_CLR_Source >> 24);
 10361              		.loc 1 4068 5 is_stmt 1 view .LVU3117
 10362              	.LBB852:
 10363              	.LBI852:
 258:Core/cmsis_gcc.h **** {
 10364              		.loc 2 258 27 view .LVU3118
 10365              	.LBB853:
 260:Core/cmsis_gcc.h **** }
 10366              		.loc 2 260 3 view .LVU3119
 10367              		.syntax divided
 10368              	@ 260 "Core/cmsis_gcc.h" 1
 10369 0062 BFF36F8F 		isb 0xF
 10370              	@ 0 "" 2
 10371              		.thumb
 10372              		.syntax unified
 10373              	.LBE853:
 10374              	.LBE852:
4068:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_OCREF_CLR_Source >> 24);
 10375              		.loc 1 4068 5 discriminator 1 view .LVU3120
 10376              	.LBB854:
 10377              	.LBI854:
1204:Core/cmsis_gcc.h **** {
 10378              		.loc 2 1204 31 view .LVU3121
 10379              	.LBB855:
1206:Core/cmsis_gcc.h **** 
 10380              		.loc 2 1206 3 view .LVU3122
1208:Core/cmsis_gcc.h ****   return(result);
 10381              		.loc 2 1208 3 view .LVU3123
 10382              		.syntax divided
 10383              	@ 1208 "Core/cmsis_gcc.h" 1
 10384 0066 EFF31083 		MRS r3, primask
 10385              	@ 0 "" 2
 10386              	.LVL684:
 10387              		.loc 2 1209 3 view .LVU3124
 10388              		.loc 2 1209 3 is_stmt 0 view .LVU3125
 10389              		.thumb
 10390              		.syntax unified
 10391              	.LBE855:
 10392              	.LBE854:
4068:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_OCREF_CLR_Source >> 24);
 10393              		.loc 1 4068 5 is_stmt 1 discriminator 2 view .LVU3126
 10394              	.LBB856:
 10395              	.LBI856:
 960:Core/cmsis_gcc.h **** {
 10396              		.loc 2 960 27 view .LVU3127
 10397              	.LBB857:
 962:Core/cmsis_gcc.h **** }
 10398              		.loc 2 962 3 view .LVU3128
 10399              		.syntax divided
 10400              	@ 962 "Core/cmsis_gcc.h" 1
ARM GAS  /tmp/ccWBHqpW.s 			page 309


 10401 006a 72B6     		cpsid i
 10402              	@ 0 "" 2
 10403              		.thumb
 10404              		.syntax unified
 10405              	.LBE857:
 10406              	.LBE856:
4068:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_OCREF_CLR_Source >> 24);
 10407              		.loc 1 4068 5 discriminator 3 view .LVU3129
 10408 006c 044B     		ldr	r3, .L346
 10409 006e 054A     		ldr	r2, .L346+4
4069:Library/src/lcm32f06x_tim.c ****     __dekey();
 10410              		.loc 1 4069 48 is_stmt 0 view .LVU3130
 10411 0070 000E     		lsrs	r0, r0, #24
 10412              	.LVL685:
4068:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_OCREF_CLR_Source >> 24);
 10413              		.loc 1 4068 5 discriminator 3 view .LVU3131
 10414 0072 1A60     		str	r2, [r3]
4068:Library/src/lcm32f06x_tim.c ****     SYSCTRL->EDU_CFG9 |= (TIM_OCREF_CLR_Source >> 24);
 10415              		.loc 1 4068 21 is_stmt 1 discriminator 3 view .LVU3132
4069:Library/src/lcm32f06x_tim.c ****     __dekey();
 10416              		.loc 1 4069 5 view .LVU3133
4069:Library/src/lcm32f06x_tim.c ****     __dekey();
 10417              		.loc 1 4069 12 is_stmt 0 view .LVU3134
 10418 0074 044B     		ldr	r3, .L346+8
 10419 0076 5A6C     		ldr	r2, [r3, #68]
4069:Library/src/lcm32f06x_tim.c ****     __dekey();
 10420              		.loc 1 4069 23 view .LVU3135
 10421 0078 1043     		orrs	r0, r2
 10422 007a 5864     		str	r0, [r3, #68]
4070:Library/src/lcm32f06x_tim.c ****   }
 10423              		.loc 1 4070 5 is_stmt 1 view .LVU3136
 10424              	.LBB858:
 10425              	.LBI858:
 949:Core/cmsis_gcc.h **** {
 10426              		.loc 2 949 27 view .LVU3137
 10427              	.LBB859:
 951:Core/cmsis_gcc.h **** }
 10428              		.loc 2 951 3 view .LVU3138
 10429              		.syntax divided
 10430              	@ 951 "Core/cmsis_gcc.h" 1
 10431 007c 62B6     		cpsie i
 10432              	@ 0 "" 2
 10433              		.thumb
 10434              		.syntax unified
 10435              	.LBE859:
 10436              	.LBE858:
4070:Library/src/lcm32f06x_tim.c ****   }
 10437              		.loc 1 4070 14 view .LVU3139
 10438              		.loc 1 4072 1 is_stmt 0 view .LVU3140
 10439 007e DEE7     		b	.L340
 10440              	.L347:
 10441              		.align	2
 10442              	.L346:
 10443 0080 7C700048 		.word	1207988348
 10444 0084 9A65FA05 		.word	100296090
 10445 0088 00700048 		.word	1207988224
 10446              		.cfi_endproc
ARM GAS  /tmp/ccWBHqpW.s 			page 310


 10447              	.LFE167:
 10449              		.section	.text.TIM1_PWMxSel_Config,"ax",%progbits
 10450              		.align	1
 10451              		.p2align 2,,3
 10452              		.global	TIM1_PWMxSel_Config
 10453              		.syntax unified
 10454              		.code	16
 10455              		.thumb_func
 10457              	TIM1_PWMxSel_Config:
 10458              	.LVL686:
 10459              	.LFB168:
4073:Library/src/lcm32f06x_tim.c **** 
4074:Library/src/lcm32f06x_tim.c **** /**
4075:Library/src/lcm32f06x_tim.c ****   * @name   TIM1_PWMxSel_Config
4076:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM1 PWM x output mapping config.
4077:Library/src/lcm32f06x_tim.c ****   *         CN: TIM1 PWM x 输出映射配置。
4078:Library/src/lcm32f06x_tim.c ****   * @param  PWM_Num: 
4079:Library/src/lcm32f06x_tim.c ****   *         EN: Select PWM X.
4080:Library/src/lcm32f06x_tim.c ****   *         CN: 选择PWM X。
4081:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWM1
4082:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWM2
4083:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWM3
4084:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWM4
4085:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWM5
4086:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWM6
4087:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWM7
4088:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWM8
4089:Library/src/lcm32f06x_tim.c ****   * @param  OCx_Sel: 
4090:Library/src/lcm32f06x_tim.c ****   *         EN: Select OCx signal output from PWM port.
4091:Library/src/lcm32f06x_tim.c ****   *         CN: 选择PWM端口输出的OCx信号。
4092:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWMx_OC1
4093:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWMx_OC2
4094:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWMx_OC3
4095:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWMx_OC4
4096:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWMx_OC1N
4097:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWMx_OC2N
4098:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWMx_OC3N
4099:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_PWMx_OC4N
4100:Library/src/lcm32f06x_tim.c ****   * @retval None
4101:Library/src/lcm32f06x_tim.c ****   */
4102:Library/src/lcm32f06x_tim.c **** void TIM1_PWMxSel_Config (uint32_t PWM_Num, uint32_t OCx_Sel)
4103:Library/src/lcm32f06x_tim.c **** {
 10460              		.loc 1 4103 1 is_stmt 1 view -0
 10461              		.cfi_startproc
 10462              		@ args = 0, pretend = 0, frame = 0
 10463              		@ frame_needed = 0, uses_anonymous_args = 0
4104:Library/src/lcm32f06x_tim.c ****   TIM1->OMR &= ~(0xF << (PWM_Num * 4));
 10464              		.loc 1 4104 3 view .LVU3142
4103:Library/src/lcm32f06x_tim.c ****   TIM1->OMR &= ~(0xF << (PWM_Num * 4));
 10465              		.loc 1 4103 1 is_stmt 0 view .LVU3143
 10466 0000 30B5     		push	{r4, r5, lr}
 10467              	.LCFI23:
 10468              		.cfi_def_cfa_offset 12
 10469              		.cfi_offset 4, -12
 10470              		.cfi_offset 5, -8
 10471              		.cfi_offset 14, -4
 10472              		.loc 1 4104 22 view .LVU3144
ARM GAS  /tmp/ccWBHqpW.s 			page 311


 10473 0002 0F25     		movs	r5, #15
4105:Library/src/lcm32f06x_tim.c ****   TIM1->OMR |= OCx_Sel << (PWM_Num * 4);
4106:Library/src/lcm32f06x_tim.c **** }
 10474              		.loc 1 4106 1 view .LVU3145
 10475              		@ sp needed
4104:Library/src/lcm32f06x_tim.c ****   TIM1->OMR |= OCx_Sel << (PWM_Num * 4);
 10476              		.loc 1 4104 7 view .LVU3146
 10477 0004 9C23     		movs	r3, #156
4104:Library/src/lcm32f06x_tim.c ****   TIM1->OMR |= OCx_Sel << (PWM_Num * 4);
 10478              		.loc 1 4104 34 view .LVU3147
 10479 0006 8000     		lsls	r0, r0, #2
 10480              	.LVL687:
4104:Library/src/lcm32f06x_tim.c ****   TIM1->OMR |= OCx_Sel << (PWM_Num * 4);
 10481              		.loc 1 4104 22 view .LVU3148
 10482 0008 8540     		lsls	r5, r5, r0
4105:Library/src/lcm32f06x_tim.c ****   TIM1->OMR |= OCx_Sel << (PWM_Num * 4);
 10483              		.loc 1 4105 24 view .LVU3149
 10484 000a 8140     		lsls	r1, r1, r0
 10485              	.LVL688:
4104:Library/src/lcm32f06x_tim.c ****   TIM1->OMR |= OCx_Sel << (PWM_Num * 4);
 10486              		.loc 1 4104 7 view .LVU3150
 10487 000c 034A     		ldr	r2, .L349
 10488 000e D458     		ldr	r4, [r2, r3]
4104:Library/src/lcm32f06x_tim.c ****   TIM1->OMR |= OCx_Sel << (PWM_Num * 4);
 10489              		.loc 1 4104 13 view .LVU3151
 10490 0010 AC43     		bics	r4, r5
 10491 0012 D450     		str	r4, [r2, r3]
4105:Library/src/lcm32f06x_tim.c ****   TIM1->OMR |= OCx_Sel << (PWM_Num * 4);
 10492              		.loc 1 4105 3 is_stmt 1 view .LVU3152
4105:Library/src/lcm32f06x_tim.c ****   TIM1->OMR |= OCx_Sel << (PWM_Num * 4);
 10493              		.loc 1 4105 7 is_stmt 0 view .LVU3153
 10494 0014 D458     		ldr	r4, [r2, r3]
4105:Library/src/lcm32f06x_tim.c ****   TIM1->OMR |= OCx_Sel << (PWM_Num * 4);
 10495              		.loc 1 4105 13 view .LVU3154
 10496 0016 2143     		orrs	r1, r4
 10497 0018 D150     		str	r1, [r2, r3]
 10498              		.loc 1 4106 1 view .LVU3155
 10499 001a 30BD     		pop	{r4, r5, pc}
 10500              	.L350:
 10501              		.align	2
 10502              	.L349:
 10503 001c 00000140 		.word	1073807360
 10504              		.cfi_endproc
 10505              	.LFE168:
 10507              		.section	.text.TIM1_CompareOffsetMode,"ax",%progbits
 10508              		.align	1
 10509              		.p2align 2,,3
 10510              		.global	TIM1_CompareOffsetMode
 10511              		.syntax unified
 10512              		.code	16
 10513              		.thumb_func
 10515              	TIM1_CompareOffsetMode:
 10516              	.LVL689:
 10517              	.LFB169:
4107:Library/src/lcm32f06x_tim.c **** 
4108:Library/src/lcm32f06x_tim.c **** /**
4109:Library/src/lcm32f06x_tim.c ****   * @name   TIM1_CompareOffsetMode
ARM GAS  /tmp/ccWBHqpW.s 			page 312


4110:Library/src/lcm32f06x_tim.c ****   * @brief  EN: TIM1 Compare offset modes.
4111:Library/src/lcm32f06x_tim.c ****   *         CN: TIM1 比较偏移模式。
4112:Library/src/lcm32f06x_tim.c ****   * @param  TIM_Channel: 
4113:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the TIM Channel
4114:Library/src/lcm32f06x_tim.c ****   *         CN: 指定TIM通道
4115:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_1
4116:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_2
4117:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_3
4118:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_4
4119:Library/src/lcm32f06x_tim.c ****   *             @arg TIM_Channel_5
4120:Library/src/lcm32f06x_tim.c ****   * @param  OCx_Mode: 
4121:Library/src/lcm32f06x_tim.c ****   *         EN: Select OCx signal output from PWM port.
4122:Library/src/lcm32f06x_tim.c ****   *         CN: 选择通道X的偏移模式。
4123:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_OCx_Mode_UP_CCR1
4124:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_OCx_Mode_DOWN_CCR1
4125:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_OCx_Mode_UP_CCOR1
4126:Library/src/lcm32f06x_tim.c ****   *             @arg TIM1_OCx_Mode_DOWN_CCOR1
4127:Library/src/lcm32f06x_tim.c ****   * @retval None
4128:Library/src/lcm32f06x_tim.c ****   */
4129:Library/src/lcm32f06x_tim.c **** void TIM1_CompareOffsetMode (uint32_t TIM_Channel, uint32_t OCx_Mode)
4130:Library/src/lcm32f06x_tim.c **** {
 10518              		.loc 1 4130 1 is_stmt 1 view -0
 10519              		.cfi_startproc
 10520              		@ args = 0, pretend = 0, frame = 0
 10521              		@ frame_needed = 0, uses_anonymous_args = 0
4131:Library/src/lcm32f06x_tim.c ****   TIM1->OCR &= ~(0xF << TIM_Channel);
 10522              		.loc 1 4131 3 view .LVU3157
4130:Library/src/lcm32f06x_tim.c ****   TIM1->OCR &= ~(0xF << TIM_Channel);
 10523              		.loc 1 4130 1 is_stmt 0 view .LVU3158
 10524 0000 30B5     		push	{r4, r5, lr}
 10525              	.LCFI24:
 10526              		.cfi_def_cfa_offset 12
 10527              		.cfi_offset 4, -12
 10528              		.cfi_offset 5, -8
 10529              		.cfi_offset 14, -4
 10530              		.loc 1 4131 22 view .LVU3159
 10531 0002 0F25     		movs	r5, #15
4132:Library/src/lcm32f06x_tim.c ****   TIM1->OCR |= OCx_Mode << TIM_Channel;
4133:Library/src/lcm32f06x_tim.c **** }
 10532              		.loc 1 4133 1 view .LVU3160
 10533              		@ sp needed
4131:Library/src/lcm32f06x_tim.c ****   TIM1->OCR |= OCx_Mode << TIM_Channel;
 10534              		.loc 1 4131 7 view .LVU3161
 10535 0004 9823     		movs	r3, #152
4131:Library/src/lcm32f06x_tim.c ****   TIM1->OCR |= OCx_Mode << TIM_Channel;
 10536              		.loc 1 4131 22 view .LVU3162
 10537 0006 8540     		lsls	r5, r5, r0
4132:Library/src/lcm32f06x_tim.c ****   TIM1->OCR |= OCx_Mode << TIM_Channel;
 10538              		.loc 1 4132 25 view .LVU3163
 10539 0008 8140     		lsls	r1, r1, r0
 10540              	.LVL690:
4131:Library/src/lcm32f06x_tim.c ****   TIM1->OCR |= OCx_Mode << TIM_Channel;
 10541              		.loc 1 4131 7 view .LVU3164
 10542 000a 044A     		ldr	r2, .L352
 10543 000c D458     		ldr	r4, [r2, r3]
4131:Library/src/lcm32f06x_tim.c ****   TIM1->OCR |= OCx_Mode << TIM_Channel;
 10544              		.loc 1 4131 13 view .LVU3165
ARM GAS  /tmp/ccWBHqpW.s 			page 313


 10545 000e AC43     		bics	r4, r5
 10546 0010 D450     		str	r4, [r2, r3]
4132:Library/src/lcm32f06x_tim.c ****   TIM1->OCR |= OCx_Mode << TIM_Channel;
 10547              		.loc 1 4132 3 is_stmt 1 view .LVU3166
4132:Library/src/lcm32f06x_tim.c ****   TIM1->OCR |= OCx_Mode << TIM_Channel;
 10548              		.loc 1 4132 7 is_stmt 0 view .LVU3167
 10549 0012 D458     		ldr	r4, [r2, r3]
4132:Library/src/lcm32f06x_tim.c ****   TIM1->OCR |= OCx_Mode << TIM_Channel;
 10550              		.loc 1 4132 13 view .LVU3168
 10551 0014 2143     		orrs	r1, r4
 10552 0016 D150     		str	r1, [r2, r3]
 10553              		.loc 1 4133 1 view .LVU3169
 10554 0018 30BD     		pop	{r4, r5, pc}
 10555              	.L353:
 10556 001a C046     		.align	2
 10557              	.L352:
 10558 001c 00000140 		.word	1073807360
 10559              		.cfi_endproc
 10560              	.LFE169:
 10562              		.section	.text.TIM1_SetCompareOffset1,"ax",%progbits
 10563              		.align	1
 10564              		.p2align 2,,3
 10565              		.global	TIM1_SetCompareOffset1
 10566              		.syntax unified
 10567              		.code	16
 10568              		.thumb_func
 10570              	TIM1_SetCompareOffset1:
 10571              	.LVL691:
 10572              	.LFB170:
4134:Library/src/lcm32f06x_tim.c **** 
4135:Library/src/lcm32f06x_tim.c **** /**
4136:Library/src/lcm32f06x_tim.c ****   * @name   TIM1_SetCompareOffset1
4137:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIM1 Capture Compare Offset 1 Register value.
4138:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIM1 Capture Compare Offset 1寄存器值。
4139:Library/src/lcm32f06x_tim.c ****   * @param  CompareOffset: 
4140:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture Compare Offset 1 register new value.
4141:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Capture Compare Offset 1 寄存器的新值。
4142:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
4143:Library/src/lcm32f06x_tim.c ****   * @retval None
4144:Library/src/lcm32f06x_tim.c ****   */
4145:Library/src/lcm32f06x_tim.c **** void TIM1_SetCompareOffset1(uint32_t CompareOffset)
4146:Library/src/lcm32f06x_tim.c **** {
 10573              		.loc 1 4146 1 is_stmt 1 view -0
 10574              		.cfi_startproc
 10575              		@ args = 0, pretend = 0, frame = 0
 10576              		@ frame_needed = 0, uses_anonymous_args = 0
 10577              		@ link register save eliminated.
4147:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare Offset 1 Register value */
4148:Library/src/lcm32f06x_tim.c ****   TIM1->CCOR1 = CompareOffset;
 10578              		.loc 1 4148 3 view .LVU3171
 10579              		.loc 1 4148 15 is_stmt 0 view .LVU3172
 10580 0000 8023     		movs	r3, #128
4149:Library/src/lcm32f06x_tim.c **** }
 10581              		.loc 1 4149 1 view .LVU3173
 10582              		@ sp needed
4148:Library/src/lcm32f06x_tim.c **** }
 10583              		.loc 1 4148 15 view .LVU3174
ARM GAS  /tmp/ccWBHqpW.s 			page 314


 10584 0002 014A     		ldr	r2, .L355
 10585 0004 D050     		str	r0, [r2, r3]
 10586              		.loc 1 4149 1 view .LVU3175
 10587 0006 7047     		bx	lr
 10588              	.L356:
 10589              		.align	2
 10590              	.L355:
 10591 0008 00000140 		.word	1073807360
 10592              		.cfi_endproc
 10593              	.LFE170:
 10595              		.section	.text.TIM1_SetCompareOffset2,"ax",%progbits
 10596              		.align	1
 10597              		.p2align 2,,3
 10598              		.global	TIM1_SetCompareOffset2
 10599              		.syntax unified
 10600              		.code	16
 10601              		.thumb_func
 10603              	TIM1_SetCompareOffset2:
 10604              	.LVL692:
 10605              	.LFB171:
4150:Library/src/lcm32f06x_tim.c **** 
4151:Library/src/lcm32f06x_tim.c **** /**
4152:Library/src/lcm32f06x_tim.c ****   * @name   TIM1_SetCompareOffset2
4153:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIM1 Capture Compare Offset 2 Register value.
4154:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIM1 Capture Compare Offset 2 寄存器值。
4155:Library/src/lcm32f06x_tim.c ****   * @param  CompareOffset: 
4156:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture Compare Offset 2 register new value.
4157:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Capture Compare Offset 2 寄存器的新值。
4158:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
4159:Library/src/lcm32f06x_tim.c ****   * @retval None
4160:Library/src/lcm32f06x_tim.c ****   */
4161:Library/src/lcm32f06x_tim.c **** void TIM1_SetCompareOffset2(uint32_t CompareOffset)
4162:Library/src/lcm32f06x_tim.c **** {
 10606              		.loc 1 4162 1 is_stmt 1 view -0
 10607              		.cfi_startproc
 10608              		@ args = 0, pretend = 0, frame = 0
 10609              		@ frame_needed = 0, uses_anonymous_args = 0
 10610              		@ link register save eliminated.
4163:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare Offset 2 Register value */
4164:Library/src/lcm32f06x_tim.c ****   TIM1->CCOR2 = CompareOffset;
 10611              		.loc 1 4164 3 view .LVU3177
 10612              		.loc 1 4164 15 is_stmt 0 view .LVU3178
 10613 0000 8423     		movs	r3, #132
4165:Library/src/lcm32f06x_tim.c **** }
 10614              		.loc 1 4165 1 view .LVU3179
 10615              		@ sp needed
4164:Library/src/lcm32f06x_tim.c **** }
 10616              		.loc 1 4164 15 view .LVU3180
 10617 0002 014A     		ldr	r2, .L358
 10618 0004 D050     		str	r0, [r2, r3]
 10619              		.loc 1 4165 1 view .LVU3181
 10620 0006 7047     		bx	lr
 10621              	.L359:
 10622              		.align	2
 10623              	.L358:
 10624 0008 00000140 		.word	1073807360
 10625              		.cfi_endproc
ARM GAS  /tmp/ccWBHqpW.s 			page 315


 10626              	.LFE171:
 10628              		.section	.text.TIM1_SetCompareOffset3,"ax",%progbits
 10629              		.align	1
 10630              		.p2align 2,,3
 10631              		.global	TIM1_SetCompareOffset3
 10632              		.syntax unified
 10633              		.code	16
 10634              		.thumb_func
 10636              	TIM1_SetCompareOffset3:
 10637              	.LVL693:
 10638              	.LFB172:
4166:Library/src/lcm32f06x_tim.c **** 
4167:Library/src/lcm32f06x_tim.c **** /**
4168:Library/src/lcm32f06x_tim.c ****   * @name   TIM1_SetCompareOffset3
4169:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIM1 Capture Compare Offset 3 Register value.
4170:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIM1 Capture Compare Offset 3 寄存器值。
4171:Library/src/lcm32f06x_tim.c ****   * @param  CompareOffset: 
4172:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture Compare Offset 3 register new value.
4173:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Capture Compare Offset 3 寄存器的新值。
4174:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
4175:Library/src/lcm32f06x_tim.c ****   * @retval None
4176:Library/src/lcm32f06x_tim.c ****   */
4177:Library/src/lcm32f06x_tim.c **** void TIM1_SetCompareOffset3(uint32_t CompareOffset)
4178:Library/src/lcm32f06x_tim.c **** {
 10639              		.loc 1 4178 1 is_stmt 1 view -0
 10640              		.cfi_startproc
 10641              		@ args = 0, pretend = 0, frame = 0
 10642              		@ frame_needed = 0, uses_anonymous_args = 0
 10643              		@ link register save eliminated.
4179:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare Offset 3 Register value */
4180:Library/src/lcm32f06x_tim.c ****   TIM1->CCOR3 = CompareOffset;
 10644              		.loc 1 4180 3 view .LVU3183
 10645              		.loc 1 4180 15 is_stmt 0 view .LVU3184
 10646 0000 8823     		movs	r3, #136
4181:Library/src/lcm32f06x_tim.c **** }
 10647              		.loc 1 4181 1 view .LVU3185
 10648              		@ sp needed
4180:Library/src/lcm32f06x_tim.c **** }
 10649              		.loc 1 4180 15 view .LVU3186
 10650 0002 014A     		ldr	r2, .L361
 10651 0004 D050     		str	r0, [r2, r3]
 10652              		.loc 1 4181 1 view .LVU3187
 10653 0006 7047     		bx	lr
 10654              	.L362:
 10655              		.align	2
 10656              	.L361:
 10657 0008 00000140 		.word	1073807360
 10658              		.cfi_endproc
 10659              	.LFE172:
 10661              		.section	.text.TIM1_SetCompareOffset4,"ax",%progbits
 10662              		.align	1
 10663              		.p2align 2,,3
 10664              		.global	TIM1_SetCompareOffset4
 10665              		.syntax unified
 10666              		.code	16
 10667              		.thumb_func
 10669              	TIM1_SetCompareOffset4:
ARM GAS  /tmp/ccWBHqpW.s 			page 316


 10670              	.LVL694:
 10671              	.LFB173:
4182:Library/src/lcm32f06x_tim.c **** 
4183:Library/src/lcm32f06x_tim.c **** /**
4184:Library/src/lcm32f06x_tim.c ****   * @name   TIM1_SetCompareOffset4
4185:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIM1 Capture Compare Offset 4 Register value.
4186:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIM1 Capture Compare Offset 4 寄存器值。
4187:Library/src/lcm32f06x_tim.c ****   * @param  CompareOffset: 
4188:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture Compare Offset 4 register new value.
4189:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Capture Compare Offset 4 寄存器的新值。
4190:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
4191:Library/src/lcm32f06x_tim.c ****   * @retval None
4192:Library/src/lcm32f06x_tim.c ****   */
4193:Library/src/lcm32f06x_tim.c **** void TIM1_SetCompareOffset4(uint32_t CompareOffset)
4194:Library/src/lcm32f06x_tim.c **** {
 10672              		.loc 1 4194 1 is_stmt 1 view -0
 10673              		.cfi_startproc
 10674              		@ args = 0, pretend = 0, frame = 0
 10675              		@ frame_needed = 0, uses_anonymous_args = 0
 10676              		@ link register save eliminated.
4195:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare Offset 4 Register value */
4196:Library/src/lcm32f06x_tim.c ****   TIM1->CCOR4 = CompareOffset;
 10677              		.loc 1 4196 3 view .LVU3189
 10678              		.loc 1 4196 15 is_stmt 0 view .LVU3190
 10679 0000 8C23     		movs	r3, #140
4197:Library/src/lcm32f06x_tim.c **** }
 10680              		.loc 1 4197 1 view .LVU3191
 10681              		@ sp needed
4196:Library/src/lcm32f06x_tim.c **** }
 10682              		.loc 1 4196 15 view .LVU3192
 10683 0002 014A     		ldr	r2, .L364
 10684 0004 D050     		str	r0, [r2, r3]
 10685              		.loc 1 4197 1 view .LVU3193
 10686 0006 7047     		bx	lr
 10687              	.L365:
 10688              		.align	2
 10689              	.L364:
 10690 0008 00000140 		.word	1073807360
 10691              		.cfi_endproc
 10692              	.LFE173:
 10694              		.section	.text.TIM1_SetCompareOffset5,"ax",%progbits
 10695              		.align	1
 10696              		.p2align 2,,3
 10697              		.global	TIM1_SetCompareOffset5
 10698              		.syntax unified
 10699              		.code	16
 10700              		.thumb_func
 10702              	TIM1_SetCompareOffset5:
 10703              	.LVL695:
 10704              	.LFB174:
4198:Library/src/lcm32f06x_tim.c **** 
4199:Library/src/lcm32f06x_tim.c **** /**
4200:Library/src/lcm32f06x_tim.c ****   * @name   TIM1_SetCompareOffset5
4201:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIM1 Capture Compare Offset 5 Register value.
4202:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIM1 Capture Compare Offset 5 寄存器值。
4203:Library/src/lcm32f06x_tim.c ****   * @param  Compare1: 
4204:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture Compare Offset 5 register new value.
ARM GAS  /tmp/ccWBHqpW.s 			page 317


4205:Library/src/lcm32f06x_tim.c ****   *         CN: 指定Capture Compare Offset 5 寄存器的新值。
4206:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
4207:Library/src/lcm32f06x_tim.c ****   * @retval None
4208:Library/src/lcm32f06x_tim.c ****   */
4209:Library/src/lcm32f06x_tim.c **** void TIM1_SetCompareOffset5(uint32_t CompareOffset)
4210:Library/src/lcm32f06x_tim.c **** {
 10705              		.loc 1 4210 1 is_stmt 1 view -0
 10706              		.cfi_startproc
 10707              		@ args = 0, pretend = 0, frame = 0
 10708              		@ frame_needed = 0, uses_anonymous_args = 0
 10709              		@ link register save eliminated.
4211:Library/src/lcm32f06x_tim.c ****   /* Set the Capture Compare Offset 5 Register value */
4212:Library/src/lcm32f06x_tim.c ****   TIM1->CCOR5 = CompareOffset;
 10710              		.loc 1 4212 3 view .LVU3195
 10711              		.loc 1 4212 15 is_stmt 0 view .LVU3196
 10712 0000 9023     		movs	r3, #144
4213:Library/src/lcm32f06x_tim.c **** }
 10713              		.loc 1 4213 1 view .LVU3197
 10714              		@ sp needed
4212:Library/src/lcm32f06x_tim.c **** }
 10715              		.loc 1 4212 15 view .LVU3198
 10716 0002 014A     		ldr	r2, .L367
 10717 0004 D050     		str	r0, [r2, r3]
 10718              		.loc 1 4213 1 view .LVU3199
 10719 0006 7047     		bx	lr
 10720              	.L368:
 10721              		.align	2
 10722              	.L367:
 10723 0008 00000140 		.word	1073807360
 10724              		.cfi_endproc
 10725              	.LFE174:
 10727              		.section	.text.TIM_GetCaptureOffset1,"ax",%progbits
 10728              		.align	1
 10729              		.p2align 2,,3
 10730              		.global	TIM_GetCaptureOffset1
 10731              		.syntax unified
 10732              		.code	16
 10733              		.thumb_func
 10735              	TIM_GetCaptureOffset1:
 10736              	.LVL696:
 10737              	.LFB175:
4214:Library/src/lcm32f06x_tim.c **** 
4215:Library/src/lcm32f06x_tim.c **** /**
4216:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCaptureOffset1
4217:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Capture Offset Register 1 value.
4218:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx 比较偏移寄存器 1 的值。
4219:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4220:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4221:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4222:Library/src/lcm32f06x_tim.c ****   * @retval EN: Capture Compare Offset 1 Register value.
4223:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较偏移1寄存器值。
4224:Library/src/lcm32f06x_tim.c ****   */
4225:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCaptureOffset1(TIM_TypeDef *TIMx)
4226:Library/src/lcm32f06x_tim.c **** {
 10738              		.loc 1 4226 1 is_stmt 1 view -0
 10739              		.cfi_startproc
 10740              		@ args = 0, pretend = 0, frame = 0
ARM GAS  /tmp/ccWBHqpW.s 			page 318


 10741              		@ frame_needed = 0, uses_anonymous_args = 0
 10742              		@ link register save eliminated.
4227:Library/src/lcm32f06x_tim.c ****   return TIMx->CCOR1;
 10743              		.loc 1 4227 3 view .LVU3201
 10744              		.loc 1 4227 14 is_stmt 0 view .LVU3202
 10745 0000 8023     		movs	r3, #128
4228:Library/src/lcm32f06x_tim.c **** }
 10746              		.loc 1 4228 1 view .LVU3203
 10747              		@ sp needed
4227:Library/src/lcm32f06x_tim.c ****   return TIMx->CCOR1;
 10748              		.loc 1 4227 14 view .LVU3204
 10749 0002 C058     		ldr	r0, [r0, r3]
 10750              	.LVL697:
 10751              		.loc 1 4228 1 view .LVU3205
 10752 0004 7047     		bx	lr
 10753              		.cfi_endproc
 10754              	.LFE175:
 10756 0006 C046     		.section	.text.TIM_GetCaptureOffset2,"ax",%progbits
 10757              		.align	1
 10758              		.p2align 2,,3
 10759              		.global	TIM_GetCaptureOffset2
 10760              		.syntax unified
 10761              		.code	16
 10762              		.thumb_func
 10764              	TIM_GetCaptureOffset2:
 10765              	.LVL698:
 10766              	.LFB176:
4229:Library/src/lcm32f06x_tim.c **** 
4230:Library/src/lcm32f06x_tim.c **** /**
4231:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCaptureOffset2
4232:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Capture Offset Register 2 value.
4233:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx 比较偏移寄存器 2 的值。
4234:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4235:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4236:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4237:Library/src/lcm32f06x_tim.c ****   * @retval EN: Capture Compare Offset 2 Register value.
4238:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较偏移2寄存器值。
4239:Library/src/lcm32f06x_tim.c ****   */
4240:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCaptureOffset2(TIM_TypeDef *TIMx)
4241:Library/src/lcm32f06x_tim.c **** {
 10767              		.loc 1 4241 1 is_stmt 1 view -0
 10768              		.cfi_startproc
 10769              		@ args = 0, pretend = 0, frame = 0
 10770              		@ frame_needed = 0, uses_anonymous_args = 0
 10771              		@ link register save eliminated.
4242:Library/src/lcm32f06x_tim.c ****   return TIMx->CCOR2;
 10772              		.loc 1 4242 3 view .LVU3207
 10773              		.loc 1 4242 14 is_stmt 0 view .LVU3208
 10774 0000 8423     		movs	r3, #132
4243:Library/src/lcm32f06x_tim.c **** }
 10775              		.loc 1 4243 1 view .LVU3209
 10776              		@ sp needed
4242:Library/src/lcm32f06x_tim.c ****   return TIMx->CCOR2;
 10777              		.loc 1 4242 14 view .LVU3210
 10778 0002 C058     		ldr	r0, [r0, r3]
 10779              	.LVL699:
 10780              		.loc 1 4243 1 view .LVU3211
ARM GAS  /tmp/ccWBHqpW.s 			page 319


 10781 0004 7047     		bx	lr
 10782              		.cfi_endproc
 10783              	.LFE176:
 10785 0006 C046     		.section	.text.TIM_GetCaptureOffset3,"ax",%progbits
 10786              		.align	1
 10787              		.p2align 2,,3
 10788              		.global	TIM_GetCaptureOffset3
 10789              		.syntax unified
 10790              		.code	16
 10791              		.thumb_func
 10793              	TIM_GetCaptureOffset3:
 10794              	.LVL700:
 10795              	.LFB177:
4244:Library/src/lcm32f06x_tim.c **** 
4245:Library/src/lcm32f06x_tim.c **** /**
4246:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCaptureOffset3
4247:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Capture Offset Register 3 value.
4248:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx 比较偏移寄存器 3 的值。
4249:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4250:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4251:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4252:Library/src/lcm32f06x_tim.c ****   * @retval EN: Capture Compare Offset 3 Register value.
4253:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较偏移3寄存器值。
4254:Library/src/lcm32f06x_tim.c ****   */
4255:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCaptureOffset3(TIM_TypeDef *TIMx)
4256:Library/src/lcm32f06x_tim.c **** {
 10796              		.loc 1 4256 1 is_stmt 1 view -0
 10797              		.cfi_startproc
 10798              		@ args = 0, pretend = 0, frame = 0
 10799              		@ frame_needed = 0, uses_anonymous_args = 0
 10800              		@ link register save eliminated.
4257:Library/src/lcm32f06x_tim.c ****   return TIMx->CCOR3;
 10801              		.loc 1 4257 3 view .LVU3213
 10802              		.loc 1 4257 14 is_stmt 0 view .LVU3214
 10803 0000 8823     		movs	r3, #136
4258:Library/src/lcm32f06x_tim.c **** }
 10804              		.loc 1 4258 1 view .LVU3215
 10805              		@ sp needed
4257:Library/src/lcm32f06x_tim.c ****   return TIMx->CCOR3;
 10806              		.loc 1 4257 14 view .LVU3216
 10807 0002 C058     		ldr	r0, [r0, r3]
 10808              	.LVL701:
 10809              		.loc 1 4258 1 view .LVU3217
 10810 0004 7047     		bx	lr
 10811              		.cfi_endproc
 10812              	.LFE177:
 10814 0006 C046     		.section	.text.TIM_GetCaptureOffset4,"ax",%progbits
 10815              		.align	1
 10816              		.p2align 2,,3
 10817              		.global	TIM_GetCaptureOffset4
 10818              		.syntax unified
 10819              		.code	16
 10820              		.thumb_func
 10822              	TIM_GetCaptureOffset4:
 10823              	.LVL702:
 10824              	.LFB178:
4259:Library/src/lcm32f06x_tim.c **** 
ARM GAS  /tmp/ccWBHqpW.s 			page 320


4260:Library/src/lcm32f06x_tim.c **** /**
4261:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCaptureOffset4
4262:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Capture Offset Register 4 value.
4263:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx 比较偏移寄存器 4 的值。
4264:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4265:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4266:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4267:Library/src/lcm32f06x_tim.c ****   * @retval EN: Capture Compare Offset 4 Register value.
4268:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较偏移4寄存器值。
4269:Library/src/lcm32f06x_tim.c ****   */
4270:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCaptureOffset4(TIM_TypeDef *TIMx)
4271:Library/src/lcm32f06x_tim.c **** {
 10825              		.loc 1 4271 1 is_stmt 1 view -0
 10826              		.cfi_startproc
 10827              		@ args = 0, pretend = 0, frame = 0
 10828              		@ frame_needed = 0, uses_anonymous_args = 0
 10829              		@ link register save eliminated.
4272:Library/src/lcm32f06x_tim.c ****   return TIMx->CCOR4;
 10830              		.loc 1 4272 3 view .LVU3219
 10831              		.loc 1 4272 14 is_stmt 0 view .LVU3220
 10832 0000 8C23     		movs	r3, #140
4273:Library/src/lcm32f06x_tim.c **** }
 10833              		.loc 1 4273 1 view .LVU3221
 10834              		@ sp needed
4272:Library/src/lcm32f06x_tim.c ****   return TIMx->CCOR4;
 10835              		.loc 1 4272 14 view .LVU3222
 10836 0002 C058     		ldr	r0, [r0, r3]
 10837              	.LVL703:
 10838              		.loc 1 4273 1 view .LVU3223
 10839 0004 7047     		bx	lr
 10840              		.cfi_endproc
 10841              	.LFE178:
 10843 0006 C046     		.section	.text.TIM_GetCaptureOffset5,"ax",%progbits
 10844              		.align	1
 10845              		.p2align 2,,3
 10846              		.global	TIM_GetCaptureOffset5
 10847              		.syntax unified
 10848              		.code	16
 10849              		.thumb_func
 10851              	TIM_GetCaptureOffset5:
 10852              	.LVL704:
 10853              	.LFB179:
4274:Library/src/lcm32f06x_tim.c **** 
4275:Library/src/lcm32f06x_tim.c **** /**
4276:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCaptureOffset5
4277:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Capture Offset Register 5 value.
4278:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx 比较偏移寄存器 5 的值。
4279:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4280:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4281:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4282:Library/src/lcm32f06x_tim.c ****   * @retval EN: Capture Compare Offset 5 Register value.
4283:Library/src/lcm32f06x_tim.c ****   *         CN: 捕获比较偏移5寄存器值。
4284:Library/src/lcm32f06x_tim.c ****   */
4285:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCaptureOffset5(TIM_TypeDef *TIMx)
4286:Library/src/lcm32f06x_tim.c **** {
 10854              		.loc 1 4286 1 is_stmt 1 view -0
 10855              		.cfi_startproc
ARM GAS  /tmp/ccWBHqpW.s 			page 321


 10856              		@ args = 0, pretend = 0, frame = 0
 10857              		@ frame_needed = 0, uses_anonymous_args = 0
 10858              		@ link register save eliminated.
4287:Library/src/lcm32f06x_tim.c ****   return TIMx->CCOR5;
 10859              		.loc 1 4287 3 view .LVU3225
 10860              		.loc 1 4287 14 is_stmt 0 view .LVU3226
 10861 0000 9023     		movs	r3, #144
4288:Library/src/lcm32f06x_tim.c **** }
 10862              		.loc 1 4288 1 view .LVU3227
 10863              		@ sp needed
4287:Library/src/lcm32f06x_tim.c ****   return TIMx->CCOR5;
 10864              		.loc 1 4287 14 view .LVU3228
 10865 0002 C058     		ldr	r0, [r0, r3]
 10866              	.LVL705:
 10867              		.loc 1 4288 1 view .LVU3229
 10868 0004 7047     		bx	lr
 10869              		.cfi_endproc
 10870              	.LFE179:
 10872 0006 C046     		.section	.text.TIM_SetCompareTuning1,"ax",%progbits
 10873              		.align	1
 10874              		.p2align 2,,3
 10875              		.global	TIM_SetCompareTuning1
 10876              		.syntax unified
 10877              		.code	16
 10878              		.thumb_func
 10880              	TIM_SetCompareTuning1:
 10881              	.LVL706:
 10882              	.LFB180:
4289:Library/src/lcm32f06x_tim.c **** 
4290:Library/src/lcm32f06x_tim.c **** /**
4291:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCompare1
4292:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Capture tuning 1 Register value.
4293:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx 比较修调寄存器 1 值。
4294:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4295:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 15, 16 or 17 to select the TIM peripheral.
4296:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,15,16或17以选择TIM外围设备。
4297:Library/src/lcm32f06x_tim.c ****   * @param  Tuning: 
4298:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture tuning 1 register new value.
4299:Library/src/lcm32f06x_tim.c ****   *         CN: 指定比较修调寄存器1的新值。
4300:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
4301:Library/src/lcm32f06x_tim.c ****   * @retval None
4302:Library/src/lcm32f06x_tim.c ****   */
4303:Library/src/lcm32f06x_tim.c **** void TIM_SetCompareTuning1(TIM_TypeDef *TIMx, uint32_t Tuning)
4304:Library/src/lcm32f06x_tim.c **** {
 10883              		.loc 1 4304 1 is_stmt 1 view -0
 10884              		.cfi_startproc
 10885              		@ args = 0, pretend = 0, frame = 0
 10886              		@ frame_needed = 0, uses_anonymous_args = 0
 10887              		@ link register save eliminated.
4305:Library/src/lcm32f06x_tim.c ****   TIMx->CCTR1 = Tuning;
 10888              		.loc 1 4305 3 view .LVU3231
 10889              		.loc 1 4305 15 is_stmt 0 view .LVU3232
 10890 0000 4166     		str	r1, [r0, #100]
4306:Library/src/lcm32f06x_tim.c **** }
 10891              		.loc 1 4306 1 view .LVU3233
 10892              		@ sp needed
 10893 0002 7047     		bx	lr
ARM GAS  /tmp/ccWBHqpW.s 			page 322


 10894              		.cfi_endproc
 10895              	.LFE180:
 10897              		.section	.text.TIM_SetCompareTuning2,"ax",%progbits
 10898              		.align	1
 10899              		.p2align 2,,3
 10900              		.global	TIM_SetCompareTuning2
 10901              		.syntax unified
 10902              		.code	16
 10903              		.thumb_func
 10905              	TIM_SetCompareTuning2:
 10906              	.LVL707:
 10907              	.LFB181:
4307:Library/src/lcm32f06x_tim.c **** 
4308:Library/src/lcm32f06x_tim.c **** /**
4309:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCompareTuning2
4310:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Capture tuning 2 Register value.
4311:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx 比较修调寄存器 2 值。
4312:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4313:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 15, or 16 to select the TIM peripheral.
4314:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,15或16以选择TIM外围设备。
4315:Library/src/lcm32f06x_tim.c ****   * @param  Tuning: 
4316:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture tuning 2 register new value.
4317:Library/src/lcm32f06x_tim.c ****   *         CN: 指定比较修调寄存器2的新值。
4318:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
4319:Library/src/lcm32f06x_tim.c ****   * @retval None
4320:Library/src/lcm32f06x_tim.c ****   */
4321:Library/src/lcm32f06x_tim.c **** void TIM_SetCompareTuning2(TIM_TypeDef *TIMx, uint32_t Tuning)
4322:Library/src/lcm32f06x_tim.c **** {
 10908              		.loc 1 4322 1 is_stmt 1 view -0
 10909              		.cfi_startproc
 10910              		@ args = 0, pretend = 0, frame = 0
 10911              		@ frame_needed = 0, uses_anonymous_args = 0
 10912              		@ link register save eliminated.
4323:Library/src/lcm32f06x_tim.c ****   TIMx->CCTR2 = Tuning;
 10913              		.loc 1 4323 3 view .LVU3235
 10914              		.loc 1 4323 15 is_stmt 0 view .LVU3236
 10915 0000 8166     		str	r1, [r0, #104]
4324:Library/src/lcm32f06x_tim.c **** }
 10916              		.loc 1 4324 1 view .LVU3237
 10917              		@ sp needed
 10918 0002 7047     		bx	lr
 10919              		.cfi_endproc
 10920              	.LFE181:
 10922              		.section	.text.TIM_SetCompareTuning3,"ax",%progbits
 10923              		.align	1
 10924              		.p2align 2,,3
 10925              		.global	TIM_SetCompareTuning3
 10926              		.syntax unified
 10927              		.code	16
 10928              		.thumb_func
 10930              	TIM_SetCompareTuning3:
 10931              	.LVL708:
 10932              	.LFB182:
4325:Library/src/lcm32f06x_tim.c **** 
4326:Library/src/lcm32f06x_tim.c **** /**
4327:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCompareTuning3
4328:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Capture tuning 3 Register value.
ARM GAS  /tmp/ccWBHqpW.s 			page 323


4329:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx 比较修调寄存器 3 值。
4330:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4331:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4332:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4333:Library/src/lcm32f06x_tim.c ****   * @param  Tuning: 
4334:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture tuning 3 register new value.
4335:Library/src/lcm32f06x_tim.c ****   *         CN: 指定比较修调寄存器3的新值。
4336:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
4337:Library/src/lcm32f06x_tim.c ****   * @retval None
4338:Library/src/lcm32f06x_tim.c ****   */
4339:Library/src/lcm32f06x_tim.c **** void TIM_SetCompareTuning3(TIM_TypeDef *TIMx, uint32_t Tuning)
4340:Library/src/lcm32f06x_tim.c **** {
 10933              		.loc 1 4340 1 is_stmt 1 view -0
 10934              		.cfi_startproc
 10935              		@ args = 0, pretend = 0, frame = 0
 10936              		@ frame_needed = 0, uses_anonymous_args = 0
 10937              		@ link register save eliminated.
4341:Library/src/lcm32f06x_tim.c ****   TIMx->CCTR3 = Tuning;
 10938              		.loc 1 4341 3 view .LVU3239
 10939              		.loc 1 4341 15 is_stmt 0 view .LVU3240
 10940 0000 C166     		str	r1, [r0, #108]
4342:Library/src/lcm32f06x_tim.c **** }
 10941              		.loc 1 4342 1 view .LVU3241
 10942              		@ sp needed
 10943 0002 7047     		bx	lr
 10944              		.cfi_endproc
 10945              	.LFE182:
 10947              		.section	.text.TIM_SetCompareTuning4,"ax",%progbits
 10948              		.align	1
 10949              		.p2align 2,,3
 10950              		.global	TIM_SetCompareTuning4
 10951              		.syntax unified
 10952              		.code	16
 10953              		.thumb_func
 10955              	TIM_SetCompareTuning4:
 10956              	.LVL709:
 10957              	.LFB183:
4343:Library/src/lcm32f06x_tim.c **** 
4344:Library/src/lcm32f06x_tim.c **** /**
4345:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCompareTuning4
4346:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Capture tuning 4 Register value.
4347:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx 比较修调寄存器 4 值。
4348:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4349:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4350:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4351:Library/src/lcm32f06x_tim.c ****   * @param  Tuning: 
4352:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture tuning 4 register new value.
4353:Library/src/lcm32f06x_tim.c ****   *         CN: 指定比较修调寄存器4的新值。
4354:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
4355:Library/src/lcm32f06x_tim.c ****   * @retval None
4356:Library/src/lcm32f06x_tim.c ****   */
4357:Library/src/lcm32f06x_tim.c **** void TIM_SetCompareTuning4(TIM_TypeDef *TIMx, uint32_t Tuning)
4358:Library/src/lcm32f06x_tim.c **** {
 10958              		.loc 1 4358 1 is_stmt 1 view -0
 10959              		.cfi_startproc
 10960              		@ args = 0, pretend = 0, frame = 0
 10961              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  /tmp/ccWBHqpW.s 			page 324


 10962              		@ link register save eliminated.
4359:Library/src/lcm32f06x_tim.c ****   TIMx->CCTR4 = Tuning;
 10963              		.loc 1 4359 3 view .LVU3243
 10964              		.loc 1 4359 15 is_stmt 0 view .LVU3244
 10965 0000 0167     		str	r1, [r0, #112]
4360:Library/src/lcm32f06x_tim.c **** }
 10966              		.loc 1 4360 1 view .LVU3245
 10967              		@ sp needed
 10968 0002 7047     		bx	lr
 10969              		.cfi_endproc
 10970              	.LFE183:
 10972              		.section	.text.TIM_SetCompareTuning5,"ax",%progbits
 10973              		.align	1
 10974              		.p2align 2,,3
 10975              		.global	TIM_SetCompareTuning5
 10976              		.syntax unified
 10977              		.code	16
 10978              		.thumb_func
 10980              	TIM_SetCompareTuning5:
 10981              	.LVL710:
 10982              	.LFB184:
4361:Library/src/lcm32f06x_tim.c **** 
4362:Library/src/lcm32f06x_tim.c **** /**
4363:Library/src/lcm32f06x_tim.c ****   * @name   TIM_SetCompareTuning5
4364:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Sets the TIMx Capture tuning 5 Register value.
4365:Library/src/lcm32f06x_tim.c ****   *         CN: 设置TIMx 比较修调寄存器 5 值。
4366:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4367:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4368:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4369:Library/src/lcm32f06x_tim.c ****   * @param  Tuning: 
4370:Library/src/lcm32f06x_tim.c ****   *         EN: specifies the Capture tuning 5 register new value.
4371:Library/src/lcm32f06x_tim.c ****   *         CN: 指定比较修调寄存器5的新值。
4372:Library/src/lcm32f06x_tim.c ****   *         @range 0x0 - 0xFFFF
4373:Library/src/lcm32f06x_tim.c ****   * @retval None
4374:Library/src/lcm32f06x_tim.c ****   */
4375:Library/src/lcm32f06x_tim.c **** void TIM_SetCompareTuning5(TIM_TypeDef *TIMx, uint32_t Tuning)
4376:Library/src/lcm32f06x_tim.c **** {
 10983              		.loc 1 4376 1 is_stmt 1 view -0
 10984              		.cfi_startproc
 10985              		@ args = 0, pretend = 0, frame = 0
 10986              		@ frame_needed = 0, uses_anonymous_args = 0
 10987              		@ link register save eliminated.
4377:Library/src/lcm32f06x_tim.c ****   TIMx->CCTR5 = Tuning;
 10988              		.loc 1 4377 3 view .LVU3247
 10989              		.loc 1 4377 15 is_stmt 0 view .LVU3248
 10990 0000 4167     		str	r1, [r0, #116]
4378:Library/src/lcm32f06x_tim.c **** }
 10991              		.loc 1 4378 1 view .LVU3249
 10992              		@ sp needed
 10993 0002 7047     		bx	lr
 10994              		.cfi_endproc
 10995              	.LFE184:
 10997              		.section	.text.TIM_GetCompareTuning1,"ax",%progbits
 10998              		.align	1
 10999              		.p2align 2,,3
 11000              		.global	TIM_GetCompareTuning1
 11001              		.syntax unified
ARM GAS  /tmp/ccWBHqpW.s 			page 325


 11002              		.code	16
 11003              		.thumb_func
 11005              	TIM_GetCompareTuning1:
 11006              	.LVL711:
 11007              	.LFB185:
4379:Library/src/lcm32f06x_tim.c **** 
4380:Library/src/lcm32f06x_tim.c **** /**
4381:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCompareTuning1
4382:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Capture tuning Register 1 value.
4383:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx 比较修调寄存器 1 的值。
4384:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4385:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 15, 16 or 17 to select the TIM peripheral.
4386:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,15,16或17以选择TIM外围设备。
4387:Library/src/lcm32f06x_tim.c ****   * @retval EN: Compare tuning 1 Register value.
4388:Library/src/lcm32f06x_tim.c ****   *         CN: 比较修调1寄存器值。
4389:Library/src/lcm32f06x_tim.c ****   */
4390:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCompareTuning1(TIM_TypeDef *TIMx)
4391:Library/src/lcm32f06x_tim.c **** {
 11008              		.loc 1 4391 1 is_stmt 1 view -0
 11009              		.cfi_startproc
 11010              		@ args = 0, pretend = 0, frame = 0
 11011              		@ frame_needed = 0, uses_anonymous_args = 0
 11012              		@ link register save eliminated.
4392:Library/src/lcm32f06x_tim.c ****   return TIMx->CCTR1;
 11013              		.loc 1 4392 3 view .LVU3251
 11014              		.loc 1 4392 14 is_stmt 0 view .LVU3252
 11015 0000 406E     		ldr	r0, [r0, #100]
 11016              	.LVL712:
4393:Library/src/lcm32f06x_tim.c **** }
 11017              		.loc 1 4393 1 view .LVU3253
 11018              		@ sp needed
 11019 0002 7047     		bx	lr
 11020              		.cfi_endproc
 11021              	.LFE185:
 11023              		.section	.text.TIM_GetCompareTuning2,"ax",%progbits
 11024              		.align	1
 11025              		.p2align 2,,3
 11026              		.global	TIM_GetCompareTuning2
 11027              		.syntax unified
 11028              		.code	16
 11029              		.thumb_func
 11031              	TIM_GetCompareTuning2:
 11032              	.LVL713:
 11033              	.LFB186:
4394:Library/src/lcm32f06x_tim.c **** 
4395:Library/src/lcm32f06x_tim.c **** /**
4396:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCompareTuning2
4397:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Capture tuning Register 2 value.
4398:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx 比较修调寄存器 2 的值。
4399:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4400:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 15 or 16 to select the TIM peripheral.
4401:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,15或16以选择TIM外围设备。
4402:Library/src/lcm32f06x_tim.c ****   * @retval EN: Compare tuning 2 Register value.
4403:Library/src/lcm32f06x_tim.c ****   *         CN: 比较修调2寄存器值。
4404:Library/src/lcm32f06x_tim.c ****   */
4405:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCompareTuning2(TIM_TypeDef *TIMx)
4406:Library/src/lcm32f06x_tim.c **** {
ARM GAS  /tmp/ccWBHqpW.s 			page 326


 11034              		.loc 1 4406 1 is_stmt 1 view -0
 11035              		.cfi_startproc
 11036              		@ args = 0, pretend = 0, frame = 0
 11037              		@ frame_needed = 0, uses_anonymous_args = 0
 11038              		@ link register save eliminated.
4407:Library/src/lcm32f06x_tim.c ****   return TIMx->CCTR2;
 11039              		.loc 1 4407 3 view .LVU3255
 11040              		.loc 1 4407 14 is_stmt 0 view .LVU3256
 11041 0000 806E     		ldr	r0, [r0, #104]
 11042              	.LVL714:
4408:Library/src/lcm32f06x_tim.c **** }
 11043              		.loc 1 4408 1 view .LVU3257
 11044              		@ sp needed
 11045 0002 7047     		bx	lr
 11046              		.cfi_endproc
 11047              	.LFE186:
 11049              		.section	.text.TIM_GetCompareTuning3,"ax",%progbits
 11050              		.align	1
 11051              		.p2align 2,,3
 11052              		.global	TIM_GetCompareTuning3
 11053              		.syntax unified
 11054              		.code	16
 11055              		.thumb_func
 11057              	TIM_GetCompareTuning3:
 11058              	.LVL715:
 11059              	.LFB187:
4409:Library/src/lcm32f06x_tim.c **** 
4410:Library/src/lcm32f06x_tim.c **** /**
4411:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCompareTuning3
4412:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Capture tuning Register 3 value.
4413:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx 比较修调寄存器 3 的值。
4414:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4415:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4416:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4417:Library/src/lcm32f06x_tim.c ****   * @retval EN: Compare tuning 3 Register value.
4418:Library/src/lcm32f06x_tim.c ****   *         CN: 比较修调3寄存器值。
4419:Library/src/lcm32f06x_tim.c ****   */
4420:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCompareTuning3(TIM_TypeDef *TIMx)
4421:Library/src/lcm32f06x_tim.c **** {
 11060              		.loc 1 4421 1 is_stmt 1 view -0
 11061              		.cfi_startproc
 11062              		@ args = 0, pretend = 0, frame = 0
 11063              		@ frame_needed = 0, uses_anonymous_args = 0
 11064              		@ link register save eliminated.
4422:Library/src/lcm32f06x_tim.c ****   return TIMx->CCTR3;
 11065              		.loc 1 4422 3 view .LVU3259
 11066              		.loc 1 4422 14 is_stmt 0 view .LVU3260
 11067 0000 C06E     		ldr	r0, [r0, #108]
 11068              	.LVL716:
4423:Library/src/lcm32f06x_tim.c **** }
 11069              		.loc 1 4423 1 view .LVU3261
 11070              		@ sp needed
 11071 0002 7047     		bx	lr
 11072              		.cfi_endproc
 11073              	.LFE187:
 11075              		.section	.text.TIM_GetCompareTuning4,"ax",%progbits
 11076              		.align	1
ARM GAS  /tmp/ccWBHqpW.s 			page 327


 11077              		.p2align 2,,3
 11078              		.global	TIM_GetCompareTuning4
 11079              		.syntax unified
 11080              		.code	16
 11081              		.thumb_func
 11083              	TIM_GetCompareTuning4:
 11084              	.LVL717:
 11085              	.LFB188:
4424:Library/src/lcm32f06x_tim.c **** 
4425:Library/src/lcm32f06x_tim.c **** /**
4426:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCompareTuning4
4427:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Capture tuning Register 4 value.
4428:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx 比较修调寄存器 4 的值。
4429:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4430:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4431:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4432:Library/src/lcm32f06x_tim.c ****   * @retval EN: Compare tuning 4 Register value.
4433:Library/src/lcm32f06x_tim.c ****   *         CN: 比较修调4寄存器值。
4434:Library/src/lcm32f06x_tim.c ****   */
4435:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCompareTuning4(TIM_TypeDef *TIMx)
4436:Library/src/lcm32f06x_tim.c **** {
 11086              		.loc 1 4436 1 is_stmt 1 view -0
 11087              		.cfi_startproc
 11088              		@ args = 0, pretend = 0, frame = 0
 11089              		@ frame_needed = 0, uses_anonymous_args = 0
 11090              		@ link register save eliminated.
4437:Library/src/lcm32f06x_tim.c ****   return TIMx->CCTR4;
 11091              		.loc 1 4437 3 view .LVU3263
 11092              		.loc 1 4437 14 is_stmt 0 view .LVU3264
 11093 0000 006F     		ldr	r0, [r0, #112]
 11094              	.LVL718:
4438:Library/src/lcm32f06x_tim.c **** }
 11095              		.loc 1 4438 1 view .LVU3265
 11096              		@ sp needed
 11097 0002 7047     		bx	lr
 11098              		.cfi_endproc
 11099              	.LFE188:
 11101              		.section	.text.TIM_GetCompareTuning5,"ax",%progbits
 11102              		.align	1
 11103              		.p2align 2,,3
 11104              		.global	TIM_GetCompareTuning5
 11105              		.syntax unified
 11106              		.code	16
 11107              		.thumb_func
 11109              	TIM_GetCompareTuning5:
 11110              	.LVL719:
 11111              	.LFB189:
4439:Library/src/lcm32f06x_tim.c **** 
4440:Library/src/lcm32f06x_tim.c **** /**
4441:Library/src/lcm32f06x_tim.c ****   * @name   TIM_GetCompareTuning5
4442:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Gets the TIMx Capture tuning Register 5 value.
4443:Library/src/lcm32f06x_tim.c ****   *         CN: 获取TIMx 比较修调寄存器 5 的值。
4444:Library/src/lcm32f06x_tim.c ****   * @param  TIMx:
4445:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4446:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1以选择TIM外围设备。
4447:Library/src/lcm32f06x_tim.c ****   * @retval EN: Compare tuning 5 Register value.
4448:Library/src/lcm32f06x_tim.c ****   *         CN: 比较修调5寄存器值。
ARM GAS  /tmp/ccWBHqpW.s 			page 328


4449:Library/src/lcm32f06x_tim.c ****   */
4450:Library/src/lcm32f06x_tim.c **** uint32_t TIM_GetCompareTuning5(TIM_TypeDef *TIMx)
4451:Library/src/lcm32f06x_tim.c **** {
 11112              		.loc 1 4451 1 is_stmt 1 view -0
 11113              		.cfi_startproc
 11114              		@ args = 0, pretend = 0, frame = 0
 11115              		@ frame_needed = 0, uses_anonymous_args = 0
 11116              		@ link register save eliminated.
4452:Library/src/lcm32f06x_tim.c ****   return TIMx->CCTR5;
 11117              		.loc 1 4452 3 view .LVU3267
 11118              		.loc 1 4452 14 is_stmt 0 view .LVU3268
 11119 0000 406F     		ldr	r0, [r0, #116]
 11120              	.LVL720:
4453:Library/src/lcm32f06x_tim.c **** }
 11121              		.loc 1 4453 1 view .LVU3269
 11122              		@ sp needed
 11123 0002 7047     		bx	lr
 11124              		.cfi_endproc
 11125              	.LFE189:
 11127              		.section	.text.TIM_BreakTrigOci_Cmd,"ax",%progbits
 11128              		.align	1
 11129              		.p2align 2,,3
 11130              		.global	TIM_BreakTrigOci_Cmd
 11131              		.syntax unified
 11132              		.code	16
 11133              		.thumb_func
 11135              	TIM_BreakTrigOci_Cmd:
 11136              	.LVL721:
 11137              	.LFB190:
4454:Library/src/lcm32f06x_tim.c **** 
4455:Library/src/lcm32f06x_tim.c **** /**
4456:Library/src/lcm32f06x_tim.c ****   * @name   TIM_BreakTrigOci_Cmd
4457:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Configure TIMx_Trig_oci signal trigger source.
4458:Library/src/lcm32f06x_tim.c ****   *         CN: 配置TIMx_Trig_oci信号触发源。
4459:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4460:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
4461:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
4462:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4463:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx_Trig_oci signal trigger source.
4464:Library/src/lcm32f06x_tim.c ****   *         CN: 配置 TIMx_Trig_oci信号触发源的新状态
4465:Library/src/lcm32f06x_tim.c ****   * @retval None
4466:Library/src/lcm32f06x_tim.c ****   */
4467:Library/src/lcm32f06x_tim.c **** void TIM_BreakTrigOci_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4468:Library/src/lcm32f06x_tim.c **** {
 11138              		.loc 1 4468 1 is_stmt 1 view -0
 11139              		.cfi_startproc
 11140              		@ args = 0, pretend = 0, frame = 0
 11141              		@ frame_needed = 0, uses_anonymous_args = 0
 11142              		@ link register save eliminated.
4469:Library/src/lcm32f06x_tim.c ****   if (NewState != DISABLE)
 11143              		.loc 1 4469 3 view .LVU3271
 11144              		.loc 1 4469 6 is_stmt 0 view .LVU3272
 11145 0000 0029     		cmp	r1, #0
 11146 0002 05D0     		beq	.L385
4470:Library/src/lcm32f06x_tim.c ****   {
4471:Library/src/lcm32f06x_tim.c ****     TIMx->BDTR |= TIM_BDTR_BKTRIG_Msk;
 11147              		.loc 1 4471 5 is_stmt 1 view .LVU3273
ARM GAS  /tmp/ccWBHqpW.s 			page 329


 11148              		.loc 1 4471 16 is_stmt 0 view .LVU3274
 11149 0004 8023     		movs	r3, #128
 11150              		.loc 1 4471 9 view .LVU3275
 11151 0006 426C     		ldr	r2, [r0, #68]
 11152              		.loc 1 4471 16 view .LVU3276
 11153 0008 1B05     		lsls	r3, r3, #20
 11154 000a 1343     		orrs	r3, r2
 11155 000c 4364     		str	r3, [r0, #68]
 11156              	.L384:
4472:Library/src/lcm32f06x_tim.c ****   }
4473:Library/src/lcm32f06x_tim.c ****   else
4474:Library/src/lcm32f06x_tim.c ****   {
4475:Library/src/lcm32f06x_tim.c ****     TIMx->BDTR &= (uint32_t)(~((uint32_t)TIM_BDTR_BKTRIG_Msk));
4476:Library/src/lcm32f06x_tim.c ****   }
4477:Library/src/lcm32f06x_tim.c **** }
 11157              		.loc 1 4477 1 view .LVU3277
 11158              		@ sp needed
 11159 000e 7047     		bx	lr
 11160              	.L385:
4475:Library/src/lcm32f06x_tim.c ****   }
 11161              		.loc 1 4475 5 is_stmt 1 view .LVU3278
4475:Library/src/lcm32f06x_tim.c ****   }
 11162              		.loc 1 4475 9 is_stmt 0 view .LVU3279
 11163 0010 436C     		ldr	r3, [r0, #68]
4475:Library/src/lcm32f06x_tim.c ****   }
 11164              		.loc 1 4475 16 view .LVU3280
 11165 0012 024A     		ldr	r2, .L387
 11166 0014 1340     		ands	r3, r2
 11167 0016 4364     		str	r3, [r0, #68]
 11168              		.loc 1 4477 1 view .LVU3281
 11169 0018 F9E7     		b	.L384
 11170              	.L388:
 11171 001a C046     		.align	2
 11172              	.L387:
 11173 001c FFFFFFF7 		.word	-134217729
 11174              		.cfi_endproc
 11175              	.LFE190:
 11177              		.section	.text.TIM_OCTuning1_Cmd,"ax",%progbits
 11178              		.align	1
 11179              		.p2align 2,,3
 11180              		.global	TIM_OCTuning1_Cmd
 11181              		.syntax unified
 11182              		.code	16
 11183              		.thumb_func
 11185              	TIM_OCTuning1_Cmd:
 11186              	.LVL722:
 11187              	.LFB191:
4478:Library/src/lcm32f06x_tim.c **** 
4479:Library/src/lcm32f06x_tim.c **** /**
4480:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCTuning1_Cmd
4481:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Output comparison 1 Tuning enable.
4482:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较1修调使能。
4483:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4484:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
4485:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
4486:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4487:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Output comparison 1 Tuning.
ARM GAS  /tmp/ccWBHqpW.s 			page 330


4488:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 输出比较1修调使能的新状态
4489:Library/src/lcm32f06x_tim.c ****   * @retval None
4490:Library/src/lcm32f06x_tim.c ****   */
4491:Library/src/lcm32f06x_tim.c **** void TIM_OCTuning1_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4492:Library/src/lcm32f06x_tim.c **** {
 11188              		.loc 1 4492 1 is_stmt 1 view -0
 11189              		.cfi_startproc
 11190              		@ args = 0, pretend = 0, frame = 0
 11191              		@ frame_needed = 0, uses_anonymous_args = 0
 11192              		@ link register save eliminated.
4493:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11193              		.loc 1 4493 5 view .LVU3283
 11194              		.loc 1 4493 8 is_stmt 0 view .LVU3284
 11195 0000 0029     		cmp	r1, #0
 11196 0002 05D0     		beq	.L390
4494:Library/src/lcm32f06x_tim.c ****     {
4495:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR1 |= TIM_CCMR1_Output_OC1TE_Msk;
 11197              		.loc 1 4495 7 is_stmt 1 view .LVU3285
 11198              		.loc 1 4495 19 is_stmt 0 view .LVU3286
 11199 0004 8023     		movs	r3, #128
 11200              		.loc 1 4495 11 view .LVU3287
 11201 0006 8269     		ldr	r2, [r0, #24]
 11202              		.loc 1 4495 19 view .LVU3288
 11203 0008 1B04     		lsls	r3, r3, #16
 11204 000a 1343     		orrs	r3, r2
 11205 000c 8361     		str	r3, [r0, #24]
 11206              	.L389:
4496:Library/src/lcm32f06x_tim.c ****     }
4497:Library/src/lcm32f06x_tim.c ****     else
4498:Library/src/lcm32f06x_tim.c ****     {
4499:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR1 &= (uint32_t)(~((uint32_t)TIM_CCMR1_Output_OC1TE_Msk));
4500:Library/src/lcm32f06x_tim.c ****     }
4501:Library/src/lcm32f06x_tim.c **** }
 11207              		.loc 1 4501 1 view .LVU3289
 11208              		@ sp needed
 11209 000e 7047     		bx	lr
 11210              	.L390:
4499:Library/src/lcm32f06x_tim.c ****     }
 11211              		.loc 1 4499 7 is_stmt 1 view .LVU3290
4499:Library/src/lcm32f06x_tim.c ****     }
 11212              		.loc 1 4499 11 is_stmt 0 view .LVU3291
 11213 0010 8369     		ldr	r3, [r0, #24]
4499:Library/src/lcm32f06x_tim.c ****     }
 11214              		.loc 1 4499 19 view .LVU3292
 11215 0012 024A     		ldr	r2, .L392
 11216 0014 1340     		ands	r3, r2
 11217 0016 8361     		str	r3, [r0, #24]
 11218              		.loc 1 4501 1 view .LVU3293
 11219 0018 F9E7     		b	.L389
 11220              	.L393:
 11221 001a C046     		.align	2
 11222              	.L392:
 11223 001c FFFF7FFF 		.word	-8388609
 11224              		.cfi_endproc
 11225              	.LFE191:
 11227              		.section	.text.TIM_OCTuning2_Cmd,"ax",%progbits
 11228              		.align	1
ARM GAS  /tmp/ccWBHqpW.s 			page 331


 11229              		.p2align 2,,3
 11230              		.global	TIM_OCTuning2_Cmd
 11231              		.syntax unified
 11232              		.code	16
 11233              		.thumb_func
 11235              	TIM_OCTuning2_Cmd:
 11236              	.LVL723:
 11237              	.LFB192:
4502:Library/src/lcm32f06x_tim.c **** 
4503:Library/src/lcm32f06x_tim.c **** /**
4504:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCTuning2_Cmd
4505:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Output comparison 2 Tuning enable.
4506:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较2修调使能。
4507:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4508:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 to select the TIM peripheral.
4509:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16以选择TIM外围设备。
4510:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4511:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Output comparison 2 Tuning.
4512:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 输出比较2修调使能的新状态
4513:Library/src/lcm32f06x_tim.c ****   * @retval None
4514:Library/src/lcm32f06x_tim.c ****   */
4515:Library/src/lcm32f06x_tim.c **** void TIM_OCTuning2_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4516:Library/src/lcm32f06x_tim.c **** {
 11238              		.loc 1 4516 1 is_stmt 1 view -0
 11239              		.cfi_startproc
 11240              		@ args = 0, pretend = 0, frame = 0
 11241              		@ frame_needed = 0, uses_anonymous_args = 0
 11242              		@ link register save eliminated.
4517:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11243              		.loc 1 4517 5 view .LVU3295
 11244              		.loc 1 4517 8 is_stmt 0 view .LVU3296
 11245 0000 0029     		cmp	r1, #0
 11246 0002 05D0     		beq	.L395
4518:Library/src/lcm32f06x_tim.c ****     {
4519:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR1 |= TIM_CCMR1_Output_OC2TE_Msk;
 11247              		.loc 1 4519 7 is_stmt 1 view .LVU3297
 11248              		.loc 1 4519 19 is_stmt 0 view .LVU3298
 11249 0004 8023     		movs	r3, #128
 11250              		.loc 1 4519 11 view .LVU3299
 11251 0006 8269     		ldr	r2, [r0, #24]
 11252              		.loc 1 4519 19 view .LVU3300
 11253 0008 1B06     		lsls	r3, r3, #24
 11254 000a 1343     		orrs	r3, r2
 11255 000c 8361     		str	r3, [r0, #24]
 11256              	.L394:
4520:Library/src/lcm32f06x_tim.c ****     }
4521:Library/src/lcm32f06x_tim.c ****     else
4522:Library/src/lcm32f06x_tim.c ****     {
4523:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR1 &= (uint32_t)(~((uint32_t)TIM_CCMR1_Output_OC2TE_Msk));
4524:Library/src/lcm32f06x_tim.c ****     }
4525:Library/src/lcm32f06x_tim.c **** }
 11257              		.loc 1 4525 1 view .LVU3301
 11258              		@ sp needed
 11259 000e 7047     		bx	lr
 11260              	.L395:
4523:Library/src/lcm32f06x_tim.c ****     }
 11261              		.loc 1 4523 7 is_stmt 1 view .LVU3302
ARM GAS  /tmp/ccWBHqpW.s 			page 332


4523:Library/src/lcm32f06x_tim.c ****     }
 11262              		.loc 1 4523 11 is_stmt 0 view .LVU3303
 11263 0010 8369     		ldr	r3, [r0, #24]
4523:Library/src/lcm32f06x_tim.c ****     }
 11264              		.loc 1 4523 19 view .LVU3304
 11265 0012 5B00     		lsls	r3, r3, #1
 11266 0014 5B08     		lsrs	r3, r3, #1
 11267 0016 8361     		str	r3, [r0, #24]
 11268              		.loc 1 4525 1 view .LVU3305
 11269 0018 F9E7     		b	.L394
 11270              		.cfi_endproc
 11271              	.LFE192:
 11273 001a C046     		.section	.text.TIM_OCTuning3_Cmd,"ax",%progbits
 11274              		.align	1
 11275              		.p2align 2,,3
 11276              		.global	TIM_OCTuning3_Cmd
 11277              		.syntax unified
 11278              		.code	16
 11279              		.thumb_func
 11281              	TIM_OCTuning3_Cmd:
 11282              	.LVL724:
 11283              	.LFB193:
4526:Library/src/lcm32f06x_tim.c **** 
4527:Library/src/lcm32f06x_tim.c **** /**
4528:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCTuning3_Cmd
4529:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Output comparison 3 Tuning enable.
4530:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较3修调使能。
4531:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4532:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 to select the TIM peripheral.
4533:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2以选择TIM外围设备。
4534:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4535:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Output comparison 3 Tuning.
4536:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 输出比较3修调使能的新状态
4537:Library/src/lcm32f06x_tim.c ****   * @retval None
4538:Library/src/lcm32f06x_tim.c ****   */
4539:Library/src/lcm32f06x_tim.c **** void TIM_OCTuning3_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4540:Library/src/lcm32f06x_tim.c **** {
 11284              		.loc 1 4540 1 is_stmt 1 view -0
 11285              		.cfi_startproc
 11286              		@ args = 0, pretend = 0, frame = 0
 11287              		@ frame_needed = 0, uses_anonymous_args = 0
 11288              		@ link register save eliminated.
4541:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11289              		.loc 1 4541 5 view .LVU3307
 11290              		.loc 1 4541 8 is_stmt 0 view .LVU3308
 11291 0000 0029     		cmp	r1, #0
 11292 0002 05D0     		beq	.L398
4542:Library/src/lcm32f06x_tim.c ****     {
4543:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR2 |= TIM_CCMR2_Output_OC3TE_Msk;
 11293              		.loc 1 4543 7 is_stmt 1 view .LVU3309
 11294              		.loc 1 4543 19 is_stmt 0 view .LVU3310
 11295 0004 8023     		movs	r3, #128
 11296              		.loc 1 4543 11 view .LVU3311
 11297 0006 C269     		ldr	r2, [r0, #28]
 11298              		.loc 1 4543 19 view .LVU3312
 11299 0008 1B04     		lsls	r3, r3, #16
 11300 000a 1343     		orrs	r3, r2
ARM GAS  /tmp/ccWBHqpW.s 			page 333


 11301 000c C361     		str	r3, [r0, #28]
 11302              	.L397:
4544:Library/src/lcm32f06x_tim.c ****     }
4545:Library/src/lcm32f06x_tim.c ****     else
4546:Library/src/lcm32f06x_tim.c ****     {
4547:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR2 &= (uint32_t)(~((uint32_t)TIM_CCMR2_Output_OC3TE_Msk));
4548:Library/src/lcm32f06x_tim.c ****     }
4549:Library/src/lcm32f06x_tim.c **** }
 11303              		.loc 1 4549 1 view .LVU3313
 11304              		@ sp needed
 11305 000e 7047     		bx	lr
 11306              	.L398:
4547:Library/src/lcm32f06x_tim.c ****     }
 11307              		.loc 1 4547 7 is_stmt 1 view .LVU3314
4547:Library/src/lcm32f06x_tim.c ****     }
 11308              		.loc 1 4547 11 is_stmt 0 view .LVU3315
 11309 0010 C369     		ldr	r3, [r0, #28]
4547:Library/src/lcm32f06x_tim.c ****     }
 11310              		.loc 1 4547 19 view .LVU3316
 11311 0012 024A     		ldr	r2, .L400
 11312 0014 1340     		ands	r3, r2
 11313 0016 C361     		str	r3, [r0, #28]
 11314              		.loc 1 4549 1 view .LVU3317
 11315 0018 F9E7     		b	.L397
 11316              	.L401:
 11317 001a C046     		.align	2
 11318              	.L400:
 11319 001c FFFF7FFF 		.word	-8388609
 11320              		.cfi_endproc
 11321              	.LFE193:
 11323              		.section	.text.TIM_OCTuning4_Cmd,"ax",%progbits
 11324              		.align	1
 11325              		.p2align 2,,3
 11326              		.global	TIM_OCTuning4_Cmd
 11327              		.syntax unified
 11328              		.code	16
 11329              		.thumb_func
 11331              	TIM_OCTuning4_Cmd:
 11332              	.LVL725:
 11333              	.LFB194:
4550:Library/src/lcm32f06x_tim.c **** 
4551:Library/src/lcm32f06x_tim.c **** /**
4552:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCTuning4_Cmd
4553:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Output comparison 4 Tuning enable.
4554:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较4修调使能。
4555:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4556:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 to select the TIM peripheral.
4557:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2 以选择TIM外围设备。
4558:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4559:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Output comparison 4 Tuning.
4560:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 输出比较4修调使能的新状态
4561:Library/src/lcm32f06x_tim.c ****   * @retval None
4562:Library/src/lcm32f06x_tim.c ****   */
4563:Library/src/lcm32f06x_tim.c **** void TIM_OCTuning4_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4564:Library/src/lcm32f06x_tim.c **** {
 11334              		.loc 1 4564 1 is_stmt 1 view -0
 11335              		.cfi_startproc
ARM GAS  /tmp/ccWBHqpW.s 			page 334


 11336              		@ args = 0, pretend = 0, frame = 0
 11337              		@ frame_needed = 0, uses_anonymous_args = 0
 11338              		@ link register save eliminated.
4565:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11339              		.loc 1 4565 5 view .LVU3319
 11340              		.loc 1 4565 8 is_stmt 0 view .LVU3320
 11341 0000 0029     		cmp	r1, #0
 11342 0002 05D0     		beq	.L403
4566:Library/src/lcm32f06x_tim.c ****     {
4567:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR2 |= TIM_CCMR2_Output_OC4TE_Msk;
 11343              		.loc 1 4567 7 is_stmt 1 view .LVU3321
 11344              		.loc 1 4567 19 is_stmt 0 view .LVU3322
 11345 0004 8023     		movs	r3, #128
 11346              		.loc 1 4567 11 view .LVU3323
 11347 0006 C269     		ldr	r2, [r0, #28]
 11348              		.loc 1 4567 19 view .LVU3324
 11349 0008 1B06     		lsls	r3, r3, #24
 11350 000a 1343     		orrs	r3, r2
 11351 000c C361     		str	r3, [r0, #28]
 11352              	.L402:
4568:Library/src/lcm32f06x_tim.c ****     }
4569:Library/src/lcm32f06x_tim.c ****     else
4570:Library/src/lcm32f06x_tim.c ****     {
4571:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR2 &= (uint32_t)(~((uint32_t)TIM_CCMR2_Output_OC4TE_Msk));
4572:Library/src/lcm32f06x_tim.c ****     }
4573:Library/src/lcm32f06x_tim.c **** }
 11353              		.loc 1 4573 1 view .LVU3325
 11354              		@ sp needed
 11355 000e 7047     		bx	lr
 11356              	.L403:
4571:Library/src/lcm32f06x_tim.c ****     }
 11357              		.loc 1 4571 7 is_stmt 1 view .LVU3326
4571:Library/src/lcm32f06x_tim.c ****     }
 11358              		.loc 1 4571 11 is_stmt 0 view .LVU3327
 11359 0010 C369     		ldr	r3, [r0, #28]
4571:Library/src/lcm32f06x_tim.c ****     }
 11360              		.loc 1 4571 19 view .LVU3328
 11361 0012 5B00     		lsls	r3, r3, #1
 11362 0014 5B08     		lsrs	r3, r3, #1
 11363 0016 C361     		str	r3, [r0, #28]
 11364              		.loc 1 4573 1 view .LVU3329
 11365 0018 F9E7     		b	.L402
 11366              		.cfi_endproc
 11367              	.LFE194:
 11369 001a C046     		.section	.text.TIM_OCTuning5_Cmd,"ax",%progbits
 11370              		.align	1
 11371              		.p2align 2,,3
 11372              		.global	TIM_OCTuning5_Cmd
 11373              		.syntax unified
 11374              		.code	16
 11375              		.thumb_func
 11377              	TIM_OCTuning5_Cmd:
 11378              	.LVL726:
 11379              	.LFB195:
4574:Library/src/lcm32f06x_tim.c **** 
4575:Library/src/lcm32f06x_tim.c **** /**
4576:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCTuning5_Cmd
ARM GAS  /tmp/ccWBHqpW.s 			page 335


4577:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Output comparison 5 Tuning enable.
4578:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较5修调使能。
4579:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4580:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4581:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1 以选择TIM外围设备。
4582:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4583:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Output comparison 5 Tuning.
4584:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 输出比较5修调使能的新状态
4585:Library/src/lcm32f06x_tim.c ****   * @retval None
4586:Library/src/lcm32f06x_tim.c ****   */
4587:Library/src/lcm32f06x_tim.c **** void TIM_OCTuning5_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4588:Library/src/lcm32f06x_tim.c **** {
 11380              		.loc 1 4588 1 is_stmt 1 view -0
 11381              		.cfi_startproc
 11382              		@ args = 0, pretend = 0, frame = 0
 11383              		@ frame_needed = 0, uses_anonymous_args = 0
 11384              		@ link register save eliminated.
4589:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11385              		.loc 1 4589 5 view .LVU3331
 11386              		.loc 1 4589 8 is_stmt 0 view .LVU3332
 11387 0000 0029     		cmp	r1, #0
 11388 0002 05D0     		beq	.L406
4590:Library/src/lcm32f06x_tim.c ****     {
4591:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR3 |= TIM_CCMR3_Output_OC5TE_Msk;
 11389              		.loc 1 4591 7 is_stmt 1 view .LVU3333
 11390              		.loc 1 4591 19 is_stmt 0 view .LVU3334
 11391 0004 8023     		movs	r3, #128
 11392              		.loc 1 4591 11 view .LVU3335
 11393 0006 426D     		ldr	r2, [r0, #84]
 11394              		.loc 1 4591 19 view .LVU3336
 11395 0008 1B04     		lsls	r3, r3, #16
 11396 000a 1343     		orrs	r3, r2
 11397 000c 4365     		str	r3, [r0, #84]
 11398              	.L405:
4592:Library/src/lcm32f06x_tim.c ****     }
4593:Library/src/lcm32f06x_tim.c ****     else
4594:Library/src/lcm32f06x_tim.c ****     {
4595:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR3 &= (uint32_t)(~((uint32_t)TIM_CCMR3_Output_OC5TE_Msk));
4596:Library/src/lcm32f06x_tim.c ****     }
4597:Library/src/lcm32f06x_tim.c **** }
 11399              		.loc 1 4597 1 view .LVU3337
 11400              		@ sp needed
 11401 000e 7047     		bx	lr
 11402              	.L406:
4595:Library/src/lcm32f06x_tim.c ****     }
 11403              		.loc 1 4595 7 is_stmt 1 view .LVU3338
4595:Library/src/lcm32f06x_tim.c ****     }
 11404              		.loc 1 4595 11 is_stmt 0 view .LVU3339
 11405 0010 436D     		ldr	r3, [r0, #84]
4595:Library/src/lcm32f06x_tim.c ****     }
 11406              		.loc 1 4595 19 view .LVU3340
 11407 0012 024A     		ldr	r2, .L408
 11408 0014 1340     		ands	r3, r2
 11409 0016 4365     		str	r3, [r0, #84]
 11410              		.loc 1 4597 1 view .LVU3341
 11411 0018 F9E7     		b	.L405
 11412              	.L409:
ARM GAS  /tmp/ccWBHqpW.s 			page 336


 11413 001a C046     		.align	2
 11414              	.L408:
 11415 001c FFFF7FFF 		.word	-8388609
 11416              		.cfi_endproc
 11417              	.LFE195:
 11419              		.section	.text.TIM_OCTuning1Update_Cmd,"ax",%progbits
 11420              		.align	1
 11421              		.p2align 2,,3
 11422              		.global	TIM_OCTuning1Update_Cmd
 11423              		.syntax unified
 11424              		.code	16
 11425              		.thumb_func
 11427              	TIM_OCTuning1Update_Cmd:
 11428              	.LVL727:
 11429              	.LFB196:
4598:Library/src/lcm32f06x_tim.c **** 
4599:Library/src/lcm32f06x_tim.c **** /**
4600:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCTuning1Update_Cmd
4601:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Output comparison 1 Tuning Updata enable.
4602:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较1修调更新使能。
4603:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4604:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 or 17 to select the TIM peripheral.
4605:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16或17以选择TIM外围设备。
4606:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4607:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Output comparison 1 Tuning Updata enable.
4608:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 输出比较1修调更新使能的新状态
4609:Library/src/lcm32f06x_tim.c ****   * @retval None
4610:Library/src/lcm32f06x_tim.c ****   */
4611:Library/src/lcm32f06x_tim.c **** void TIM_OCTuning1Update_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4612:Library/src/lcm32f06x_tim.c **** {
 11430              		.loc 1 4612 1 is_stmt 1 view -0
 11431              		.cfi_startproc
 11432              		@ args = 0, pretend = 0, frame = 0
 11433              		@ frame_needed = 0, uses_anonymous_args = 0
 11434              		@ link register save eliminated.
4613:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11435              		.loc 1 4613 5 view .LVU3343
 11436              		.loc 1 4613 8 is_stmt 0 view .LVU3344
 11437 0000 0029     		cmp	r1, #0
 11438 0002 05D0     		beq	.L411
4614:Library/src/lcm32f06x_tim.c ****     {
4615:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR1 |= TIM_CCMR1_Output_OC1TUE_Msk;
 11439              		.loc 1 4615 7 is_stmt 1 view .LVU3345
 11440              		.loc 1 4615 19 is_stmt 0 view .LVU3346
 11441 0004 8023     		movs	r3, #128
 11442              		.loc 1 4615 11 view .LVU3347
 11443 0006 8269     		ldr	r2, [r0, #24]
 11444              		.loc 1 4615 19 view .LVU3348
 11445 0008 DB03     		lsls	r3, r3, #15
 11446 000a 1343     		orrs	r3, r2
 11447 000c 8361     		str	r3, [r0, #24]
 11448              	.L410:
4616:Library/src/lcm32f06x_tim.c ****     }
4617:Library/src/lcm32f06x_tim.c ****     else
4618:Library/src/lcm32f06x_tim.c ****     {
4619:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR1 &= (uint32_t)(~((uint32_t)TIM_CCMR1_Output_OC1TUE_Msk));
4620:Library/src/lcm32f06x_tim.c ****     }
ARM GAS  /tmp/ccWBHqpW.s 			page 337


4621:Library/src/lcm32f06x_tim.c **** }
 11449              		.loc 1 4621 1 view .LVU3349
 11450              		@ sp needed
 11451 000e 7047     		bx	lr
 11452              	.L411:
4619:Library/src/lcm32f06x_tim.c ****     }
 11453              		.loc 1 4619 7 is_stmt 1 view .LVU3350
4619:Library/src/lcm32f06x_tim.c ****     }
 11454              		.loc 1 4619 11 is_stmt 0 view .LVU3351
 11455 0010 8369     		ldr	r3, [r0, #24]
4619:Library/src/lcm32f06x_tim.c ****     }
 11456              		.loc 1 4619 19 view .LVU3352
 11457 0012 024A     		ldr	r2, .L413
 11458 0014 1340     		ands	r3, r2
 11459 0016 8361     		str	r3, [r0, #24]
 11460              		.loc 1 4621 1 view .LVU3353
 11461 0018 F9E7     		b	.L410
 11462              	.L414:
 11463 001a C046     		.align	2
 11464              	.L413:
 11465 001c FFFFBFFF 		.word	-4194305
 11466              		.cfi_endproc
 11467              	.LFE196:
 11469              		.section	.text.TIM_OCTuning2Update_Cmd,"ax",%progbits
 11470              		.align	1
 11471              		.p2align 2,,3
 11472              		.global	TIM_OCTuning2Update_Cmd
 11473              		.syntax unified
 11474              		.code	16
 11475              		.thumb_func
 11477              	TIM_OCTuning2Update_Cmd:
 11478              	.LVL728:
 11479              	.LFB197:
4622:Library/src/lcm32f06x_tim.c **** 
4623:Library/src/lcm32f06x_tim.c **** /**
4624:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCTuning2Update_Cmd
4625:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Output comparison 2 Tuning Updata enable.
4626:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较2修调更新使能。
4627:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4628:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2, 15, 16 to select the TIM peripheral.
4629:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2,15,16以选择TIM外围设备。
4630:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4631:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Output comparison 2 Tuning Updata enable.
4632:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 输出比较2修调更新使能的新状态
4633:Library/src/lcm32f06x_tim.c ****   * @retval None
4634:Library/src/lcm32f06x_tim.c ****   */
4635:Library/src/lcm32f06x_tim.c **** void TIM_OCTuning2Update_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4636:Library/src/lcm32f06x_tim.c **** {
 11480              		.loc 1 4636 1 is_stmt 1 view -0
 11481              		.cfi_startproc
 11482              		@ args = 0, pretend = 0, frame = 0
 11483              		@ frame_needed = 0, uses_anonymous_args = 0
 11484              		@ link register save eliminated.
4637:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11485              		.loc 1 4637 5 view .LVU3355
 11486              		.loc 1 4637 8 is_stmt 0 view .LVU3356
 11487 0000 0029     		cmp	r1, #0
ARM GAS  /tmp/ccWBHqpW.s 			page 338


 11488 0002 05D0     		beq	.L416
4638:Library/src/lcm32f06x_tim.c ****     {
4639:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR1 |= TIM_CCMR1_Output_OC2TUE_Msk;
 11489              		.loc 1 4639 7 is_stmt 1 view .LVU3357
 11490              		.loc 1 4639 19 is_stmt 0 view .LVU3358
 11491 0004 8023     		movs	r3, #128
 11492              		.loc 1 4639 11 view .LVU3359
 11493 0006 8269     		ldr	r2, [r0, #24]
 11494              		.loc 1 4639 19 view .LVU3360
 11495 0008 DB05     		lsls	r3, r3, #23
 11496 000a 1343     		orrs	r3, r2
 11497 000c 8361     		str	r3, [r0, #24]
 11498              	.L415:
4640:Library/src/lcm32f06x_tim.c ****     }
4641:Library/src/lcm32f06x_tim.c ****     else
4642:Library/src/lcm32f06x_tim.c ****     {
4643:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR1 &= (uint32_t)(~((uint32_t)TIM_CCMR1_Output_OC2TUE_Msk));
4644:Library/src/lcm32f06x_tim.c ****     }
4645:Library/src/lcm32f06x_tim.c **** }
 11499              		.loc 1 4645 1 view .LVU3361
 11500              		@ sp needed
 11501 000e 7047     		bx	lr
 11502              	.L416:
4643:Library/src/lcm32f06x_tim.c ****     }
 11503              		.loc 1 4643 7 is_stmt 1 view .LVU3362
4643:Library/src/lcm32f06x_tim.c ****     }
 11504              		.loc 1 4643 11 is_stmt 0 view .LVU3363
 11505 0010 8369     		ldr	r3, [r0, #24]
4643:Library/src/lcm32f06x_tim.c ****     }
 11506              		.loc 1 4643 19 view .LVU3364
 11507 0012 024A     		ldr	r2, .L418
 11508 0014 1340     		ands	r3, r2
 11509 0016 8361     		str	r3, [r0, #24]
 11510              		.loc 1 4645 1 view .LVU3365
 11511 0018 F9E7     		b	.L415
 11512              	.L419:
 11513 001a C046     		.align	2
 11514              	.L418:
 11515 001c FFFFFFBF 		.word	-1073741825
 11516              		.cfi_endproc
 11517              	.LFE197:
 11519              		.section	.text.TIM_OCTuning3Update_Cmd,"ax",%progbits
 11520              		.align	1
 11521              		.p2align 2,,3
 11522              		.global	TIM_OCTuning3Update_Cmd
 11523              		.syntax unified
 11524              		.code	16
 11525              		.thumb_func
 11527              	TIM_OCTuning3Update_Cmd:
 11528              	.LVL729:
 11529              	.LFB198:
4646:Library/src/lcm32f06x_tim.c **** 
4647:Library/src/lcm32f06x_tim.c **** /**
4648:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCTuning3Update_Cmd
4649:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Output comparison 3 Tuning Updata enable.
4650:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较3修调更新使能。
4651:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
ARM GAS  /tmp/ccWBHqpW.s 			page 339


4652:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 to select the TIM peripheral.
4653:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2 以选择TIM外围设备。
4654:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4655:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Output comparison 3 Tuning Updata enable.
4656:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 输出比较3修调更新使能的新状态
4657:Library/src/lcm32f06x_tim.c ****   * @retval None
4658:Library/src/lcm32f06x_tim.c ****   */
4659:Library/src/lcm32f06x_tim.c **** void TIM_OCTuning3Update_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4660:Library/src/lcm32f06x_tim.c **** {
 11530              		.loc 1 4660 1 is_stmt 1 view -0
 11531              		.cfi_startproc
 11532              		@ args = 0, pretend = 0, frame = 0
 11533              		@ frame_needed = 0, uses_anonymous_args = 0
 11534              		@ link register save eliminated.
4661:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11535              		.loc 1 4661 5 view .LVU3367
 11536              		.loc 1 4661 8 is_stmt 0 view .LVU3368
 11537 0000 0029     		cmp	r1, #0
 11538 0002 05D0     		beq	.L421
4662:Library/src/lcm32f06x_tim.c ****     {
4663:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR2 |= TIM_CCMR2_Output_OC3TUE_Msk;
 11539              		.loc 1 4663 7 is_stmt 1 view .LVU3369
 11540              		.loc 1 4663 19 is_stmt 0 view .LVU3370
 11541 0004 8023     		movs	r3, #128
 11542              		.loc 1 4663 11 view .LVU3371
 11543 0006 C269     		ldr	r2, [r0, #28]
 11544              		.loc 1 4663 19 view .LVU3372
 11545 0008 DB03     		lsls	r3, r3, #15
 11546 000a 1343     		orrs	r3, r2
 11547 000c C361     		str	r3, [r0, #28]
 11548              	.L420:
4664:Library/src/lcm32f06x_tim.c ****     }
4665:Library/src/lcm32f06x_tim.c ****     else
4666:Library/src/lcm32f06x_tim.c ****     {
4667:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR2 &= (uint32_t)(~((uint32_t)TIM_CCMR2_Output_OC3TUE_Msk));
4668:Library/src/lcm32f06x_tim.c ****     }
4669:Library/src/lcm32f06x_tim.c **** }
 11549              		.loc 1 4669 1 view .LVU3373
 11550              		@ sp needed
 11551 000e 7047     		bx	lr
 11552              	.L421:
4667:Library/src/lcm32f06x_tim.c ****     }
 11553              		.loc 1 4667 7 is_stmt 1 view .LVU3374
4667:Library/src/lcm32f06x_tim.c ****     }
 11554              		.loc 1 4667 11 is_stmt 0 view .LVU3375
 11555 0010 C369     		ldr	r3, [r0, #28]
4667:Library/src/lcm32f06x_tim.c ****     }
 11556              		.loc 1 4667 19 view .LVU3376
 11557 0012 024A     		ldr	r2, .L423
 11558 0014 1340     		ands	r3, r2
 11559 0016 C361     		str	r3, [r0, #28]
 11560              		.loc 1 4669 1 view .LVU3377
 11561 0018 F9E7     		b	.L420
 11562              	.L424:
 11563 001a C046     		.align	2
 11564              	.L423:
 11565 001c FFFFBFFF 		.word	-4194305
ARM GAS  /tmp/ccWBHqpW.s 			page 340


 11566              		.cfi_endproc
 11567              	.LFE198:
 11569              		.section	.text.TIM_OCTuning4Update_Cmd,"ax",%progbits
 11570              		.align	1
 11571              		.p2align 2,,3
 11572              		.global	TIM_OCTuning4Update_Cmd
 11573              		.syntax unified
 11574              		.code	16
 11575              		.thumb_func
 11577              	TIM_OCTuning4Update_Cmd:
 11578              	.LVL730:
 11579              	.LFB199:
4670:Library/src/lcm32f06x_tim.c **** 
4671:Library/src/lcm32f06x_tim.c **** /**
4672:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCTuning4Update_Cmd
4673:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Output comparison 4 Tuning Updata enable.
4674:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较4修调更新使能。
4675:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4676:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 2 to select the TIM peripheral.
4677:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,2 以选择TIM外围设备。
4678:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4679:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Output comparison 4 Tuning Updata enable.
4680:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 输出比较4修调更新使能的新状态
4681:Library/src/lcm32f06x_tim.c ****   * @retval None
4682:Library/src/lcm32f06x_tim.c ****   */
4683:Library/src/lcm32f06x_tim.c **** void TIM_OCTuning4Update_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4684:Library/src/lcm32f06x_tim.c **** {
 11580              		.loc 1 4684 1 is_stmt 1 view -0
 11581              		.cfi_startproc
 11582              		@ args = 0, pretend = 0, frame = 0
 11583              		@ frame_needed = 0, uses_anonymous_args = 0
 11584              		@ link register save eliminated.
4685:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11585              		.loc 1 4685 5 view .LVU3379
 11586              		.loc 1 4685 8 is_stmt 0 view .LVU3380
 11587 0000 0029     		cmp	r1, #0
 11588 0002 05D0     		beq	.L426
4686:Library/src/lcm32f06x_tim.c ****     {
4687:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR2 |= TIM_CCMR2_Output_OC4TUE_Msk;
 11589              		.loc 1 4687 7 is_stmt 1 view .LVU3381
 11590              		.loc 1 4687 19 is_stmt 0 view .LVU3382
 11591 0004 8023     		movs	r3, #128
 11592              		.loc 1 4687 11 view .LVU3383
 11593 0006 C269     		ldr	r2, [r0, #28]
 11594              		.loc 1 4687 19 view .LVU3384
 11595 0008 DB05     		lsls	r3, r3, #23
 11596 000a 1343     		orrs	r3, r2
 11597 000c C361     		str	r3, [r0, #28]
 11598              	.L425:
4688:Library/src/lcm32f06x_tim.c ****     }
4689:Library/src/lcm32f06x_tim.c ****     else
4690:Library/src/lcm32f06x_tim.c ****     {
4691:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR2 &= (uint32_t)(~((uint32_t)TIM_CCMR2_Output_OC4TUE_Msk));
4692:Library/src/lcm32f06x_tim.c ****     }
4693:Library/src/lcm32f06x_tim.c **** }
 11599              		.loc 1 4693 1 view .LVU3385
 11600              		@ sp needed
ARM GAS  /tmp/ccWBHqpW.s 			page 341


 11601 000e 7047     		bx	lr
 11602              	.L426:
4691:Library/src/lcm32f06x_tim.c ****     }
 11603              		.loc 1 4691 7 is_stmt 1 view .LVU3386
4691:Library/src/lcm32f06x_tim.c ****     }
 11604              		.loc 1 4691 11 is_stmt 0 view .LVU3387
 11605 0010 C369     		ldr	r3, [r0, #28]
4691:Library/src/lcm32f06x_tim.c ****     }
 11606              		.loc 1 4691 19 view .LVU3388
 11607 0012 024A     		ldr	r2, .L428
 11608 0014 1340     		ands	r3, r2
 11609 0016 C361     		str	r3, [r0, #28]
 11610              		.loc 1 4693 1 view .LVU3389
 11611 0018 F9E7     		b	.L425
 11612              	.L429:
 11613 001a C046     		.align	2
 11614              	.L428:
 11615 001c FFFFFFBF 		.word	-1073741825
 11616              		.cfi_endproc
 11617              	.LFE199:
 11619              		.section	.text.TIM_OCTuning5Update_Cmd,"ax",%progbits
 11620              		.align	1
 11621              		.p2align 2,,3
 11622              		.global	TIM_OCTuning5Update_Cmd
 11623              		.syntax unified
 11624              		.code	16
 11625              		.thumb_func
 11627              	TIM_OCTuning5Update_Cmd:
 11628              	.LVL731:
 11629              	.LFB200:
4694:Library/src/lcm32f06x_tim.c **** 
4695:Library/src/lcm32f06x_tim.c **** /**
4696:Library/src/lcm32f06x_tim.c ****   * @name   TIM_OCTuning5Update_Cmd
4697:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Output comparison 5 Tuning Updata enable.
4698:Library/src/lcm32f06x_tim.c ****   *         CN: 输出比较5修调更新使能。
4699:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4700:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1 to select the TIM peripheral.
4701:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1 以选择TIM外围设备。
4702:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
4703:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Output comparison 5 Tuning Updata enable.
4704:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 输出比较5修调更新使能的新状态
4705:Library/src/lcm32f06x_tim.c ****   * @retval None
4706:Library/src/lcm32f06x_tim.c ****   */
4707:Library/src/lcm32f06x_tim.c **** void TIM_OCTuning5Update_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4708:Library/src/lcm32f06x_tim.c **** {
 11630              		.loc 1 4708 1 is_stmt 1 view -0
 11631              		.cfi_startproc
 11632              		@ args = 0, pretend = 0, frame = 0
 11633              		@ frame_needed = 0, uses_anonymous_args = 0
 11634              		@ link register save eliminated.
4709:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11635              		.loc 1 4709 5 view .LVU3391
 11636              		.loc 1 4709 8 is_stmt 0 view .LVU3392
 11637 0000 0029     		cmp	r1, #0
 11638 0002 05D0     		beq	.L431
4710:Library/src/lcm32f06x_tim.c ****     {
4711:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR3 |= TIM_CCMR3_Output_OC5TUE_Msk;
ARM GAS  /tmp/ccWBHqpW.s 			page 342


 11639              		.loc 1 4711 7 is_stmt 1 view .LVU3393
 11640              		.loc 1 4711 19 is_stmt 0 view .LVU3394
 11641 0004 8023     		movs	r3, #128
 11642              		.loc 1 4711 11 view .LVU3395
 11643 0006 426D     		ldr	r2, [r0, #84]
 11644              		.loc 1 4711 19 view .LVU3396
 11645 0008 DB03     		lsls	r3, r3, #15
 11646 000a 1343     		orrs	r3, r2
 11647 000c 4365     		str	r3, [r0, #84]
 11648              	.L430:
4712:Library/src/lcm32f06x_tim.c ****     }
4713:Library/src/lcm32f06x_tim.c ****     else
4714:Library/src/lcm32f06x_tim.c ****     {
4715:Library/src/lcm32f06x_tim.c ****       TIMx->CCMR3 &= (uint32_t)(~((uint32_t)TIM_CCMR3_Output_OC5TUE_Msk));
4716:Library/src/lcm32f06x_tim.c ****     }
4717:Library/src/lcm32f06x_tim.c **** }
 11649              		.loc 1 4717 1 view .LVU3397
 11650              		@ sp needed
 11651 000e 7047     		bx	lr
 11652              	.L431:
4715:Library/src/lcm32f06x_tim.c ****     }
 11653              		.loc 1 4715 7 is_stmt 1 view .LVU3398
4715:Library/src/lcm32f06x_tim.c ****     }
 11654              		.loc 1 4715 11 is_stmt 0 view .LVU3399
 11655 0010 436D     		ldr	r3, [r0, #84]
4715:Library/src/lcm32f06x_tim.c ****     }
 11656              		.loc 1 4715 19 view .LVU3400
 11657 0012 024A     		ldr	r2, .L433
 11658 0014 1340     		ands	r3, r2
 11659 0016 4365     		str	r3, [r0, #84]
 11660              		.loc 1 4717 1 view .LVU3401
 11661 0018 F9E7     		b	.L430
 11662              	.L434:
 11663 001a C046     		.align	2
 11664              	.L433:
 11665 001c FFFFBFFF 		.word	-4194305
 11666              		.cfi_endproc
 11667              	.LFE200:
 11669              		.section	.text.TIM_TrigDelayClear_Cmd,"ax",%progbits
 11670              		.align	1
 11671              		.p2align 2,,3
 11672              		.global	TIM_TrigDelayClear_Cmd
 11673              		.syntax unified
 11674              		.code	16
 11675              		.thumb_func
 11677              	TIM_TrigDelayClear_Cmd:
 11678              	.LVL732:
 11679              	.LFB201:
4718:Library/src/lcm32f06x_tim.c **** 
4719:Library/src/lcm32f06x_tim.c **** /**
4720:Library/src/lcm32f06x_tim.c ****   * @name   TIM_TrigDelayClear_Cmd
4721:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Clear OCiREF during trigger delay period.
4722:Library/src/lcm32f06x_tim.c ****   *         CN: 触发延迟期间清除 OCiREF。
4723:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4724:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 15, 16 or 17 to select the TIM peripheral.
4725:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,15,16或17以选择TIM外围设备。
4726:Library/src/lcm32f06x_tim.c ****   * @param  NewState: 
ARM GAS  /tmp/ccWBHqpW.s 			page 343


4727:Library/src/lcm32f06x_tim.c ****   *         EN: New state of the TIMx Clear OCiREF during trigger delay period.
4728:Library/src/lcm32f06x_tim.c ****   *         CN: TIMx 触发延迟期间清除 OCiREF的新状态
4729:Library/src/lcm32f06x_tim.c ****   * @retval None
4730:Library/src/lcm32f06x_tim.c ****   */
4731:Library/src/lcm32f06x_tim.c **** void TIM_TrigDelayClear_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
4732:Library/src/lcm32f06x_tim.c **** {
 11680              		.loc 1 4732 1 is_stmt 1 view -0
 11681              		.cfi_startproc
 11682              		@ args = 0, pretend = 0, frame = 0
 11683              		@ frame_needed = 0, uses_anonymous_args = 0
 11684              		@ link register save eliminated.
4733:Library/src/lcm32f06x_tim.c ****     if (NewState != DISABLE)
 11685              		.loc 1 4733 5 view .LVU3403
 11686              		.loc 1 4733 8 is_stmt 0 view .LVU3404
 11687 0000 0029     		cmp	r1, #0
 11688 0002 05D0     		beq	.L436
4734:Library/src/lcm32f06x_tim.c ****     {
4735:Library/src/lcm32f06x_tim.c ****       TIMx->DLAMT |= TIM_DLAMT_DLS_Msk;
 11689              		.loc 1 4735 7 is_stmt 1 view .LVU3405
 11690              		.loc 1 4735 19 is_stmt 0 view .LVU3406
 11691 0004 8023     		movs	r3, #128
 11692              		.loc 1 4735 11 view .LVU3407
 11693 0006 C26F     		ldr	r2, [r0, #124]
 11694              		.loc 1 4735 19 view .LVU3408
 11695 0008 9B02     		lsls	r3, r3, #10
 11696 000a 1343     		orrs	r3, r2
 11697 000c C367     		str	r3, [r0, #124]
 11698              	.L435:
4736:Library/src/lcm32f06x_tim.c ****     }
4737:Library/src/lcm32f06x_tim.c ****     else
4738:Library/src/lcm32f06x_tim.c ****     {
4739:Library/src/lcm32f06x_tim.c ****       TIMx->DLAMT &= (uint32_t)(~((uint32_t)TIM_DLAMT_DLS_Msk));
4740:Library/src/lcm32f06x_tim.c ****     }
4741:Library/src/lcm32f06x_tim.c **** }
 11699              		.loc 1 4741 1 view .LVU3409
 11700              		@ sp needed
 11701 000e 7047     		bx	lr
 11702              	.L436:
4739:Library/src/lcm32f06x_tim.c ****     }
 11703              		.loc 1 4739 7 is_stmt 1 view .LVU3410
4739:Library/src/lcm32f06x_tim.c ****     }
 11704              		.loc 1 4739 11 is_stmt 0 view .LVU3411
 11705 0010 C36F     		ldr	r3, [r0, #124]
4739:Library/src/lcm32f06x_tim.c ****     }
 11706              		.loc 1 4739 19 view .LVU3412
 11707 0012 024A     		ldr	r2, .L438
 11708 0014 1340     		ands	r3, r2
 11709 0016 C367     		str	r3, [r0, #124]
 11710              		.loc 1 4741 1 view .LVU3413
 11711 0018 F9E7     		b	.L435
 11712              	.L439:
 11713 001a C046     		.align	2
 11714              	.L438:
 11715 001c FFFFFDFF 		.word	-131073
 11716              		.cfi_endproc
 11717              	.LFE201:
 11719              		.section	.text.TIM_AntiMisoperateTrig_Config,"ax",%progbits
ARM GAS  /tmp/ccWBHqpW.s 			page 344


 11720              		.align	1
 11721              		.p2align 2,,3
 11722              		.global	TIM_AntiMisoperateTrig_Config
 11723              		.syntax unified
 11724              		.code	16
 11725              		.thumb_func
 11727              	TIM_AntiMisoperateTrig_Config:
 11728              	.LVL733:
 11729              	.LFB202:
4742:Library/src/lcm32f06x_tim.c **** 
4743:Library/src/lcm32f06x_tim.c **** /**
4744:Library/src/lcm32f06x_tim.c ****   * @name   TIM_AntiMisoperateTrig_Config
4745:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Anti misoperation trigger configuration.
4746:Library/src/lcm32f06x_tim.c ****   *         CN: 防误触发配置。
4747:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4748:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 15, 16 or 17 to select the TIM peripheral.
4749:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,15,16或17以选择TIM外围设备。
4750:Library/src/lcm32f06x_tim.c ****   * @param  AntiMisoperateStart: 
4751:Library/src/lcm32f06x_tim.c ****   *         EN: Start time of anti misoperation trigger window.
4752:Library/src/lcm32f06x_tim.c ****   *         CN: 防误触发窗口开始时间。
4753:Library/src/lcm32f06x_tim.c ****   *         @arg TIM_AntiMisoperateStart_Delay
4754:Library/src/lcm32f06x_tim.c ****   *         @arg TIM_AntiMisoperateStart_Immediate
4755:Library/src/lcm32f06x_tim.c ****   * @param  AntiMisoperateTime: 
4756:Library/src/lcm32f06x_tim.c ****   *         EN: Prevent false triggering window time.
4757:Library/src/lcm32f06x_tim.c ****   *         CN: 防误触发窗口时间。
4758:Library/src/lcm32f06x_tim.c ****   *         @range 0x00 - 0xFF
4759:Library/src/lcm32f06x_tim.c ****   * @retval None
4760:Library/src/lcm32f06x_tim.c ****   */
4761:Library/src/lcm32f06x_tim.c **** void TIM_AntiMisoperateTrig_Config(TIM_TypeDef *TIMx, uint32_t AntiMisoperateStart, uint8_t AntiMis
4762:Library/src/lcm32f06x_tim.c **** {
 11730              		.loc 1 4762 1 is_stmt 1 view -0
 11731              		.cfi_startproc
 11732              		@ args = 0, pretend = 0, frame = 0
 11733              		@ frame_needed = 0, uses_anonymous_args = 0
4763:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT &= (uint32_t) ~((uint32_t)TIM_DLAMT_AMTDL_Msk | TIM_DLAMT_ATMG_Msk);
 11734              		.loc 1 4763 3 view .LVU3415
4762:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT &= (uint32_t) ~((uint32_t)TIM_DLAMT_AMTDL_Msk | TIM_DLAMT_ATMG_Msk);
 11735              		.loc 1 4762 1 is_stmt 0 view .LVU3416
 11736 0000 10B5     		push	{r4, lr}
 11737              	.LCFI25:
 11738              		.cfi_def_cfa_offset 8
 11739              		.cfi_offset 4, -8
 11740              		.cfi_offset 14, -4
 11741              		.loc 1 4763 7 view .LVU3417
 11742 0002 C36F     		ldr	r3, [r0, #124]
 11743              		.loc 1 4763 15 view .LVU3418
 11744 0004 044C     		ldr	r4, .L441
4764:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT |= AntiMisoperateStart | (AntiMisoperateTime << TIM_DLAMT_ATMG_Pos);
 11745              		.loc 1 4764 60 view .LVU3419
 11746 0006 1202     		lsls	r2, r2, #8
 11747              	.LVL734:
4763:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT &= (uint32_t) ~((uint32_t)TIM_DLAMT_AMTDL_Msk | TIM_DLAMT_ATMG_Msk);
 11748              		.loc 1 4763 15 view .LVU3420
 11749 0008 2340     		ands	r3, r4
 11750 000a C367     		str	r3, [r0, #124]
 11751              		.loc 1 4764 3 is_stmt 1 view .LVU3421
 11752              		.loc 1 4764 7 is_stmt 0 view .LVU3422
ARM GAS  /tmp/ccWBHqpW.s 			page 345


 11753 000c C36F     		ldr	r3, [r0, #124]
4765:Library/src/lcm32f06x_tim.c **** }
 11754              		.loc 1 4765 1 view .LVU3423
 11755              		@ sp needed
4764:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT |= AntiMisoperateStart | (AntiMisoperateTime << TIM_DLAMT_ATMG_Pos);
 11756              		.loc 1 4764 15 view .LVU3424
 11757 000e 1A43     		orrs	r2, r3
 11758 0010 0A43     		orrs	r2, r1
 11759 0012 C267     		str	r2, [r0, #124]
 11760              		.loc 1 4765 1 view .LVU3425
 11761 0014 10BD     		pop	{r4, pc}
 11762              	.L442:
 11763 0016 C046     		.align	2
 11764              	.L441:
 11765 0018 FF00FEFF 		.word	-130817
 11766              		.cfi_endproc
 11767              	.LFE202:
 11769              		.section	.text.TIM_TrigDelay_Config,"ax",%progbits
 11770              		.align	1
 11771              		.p2align 2,,3
 11772              		.global	TIM_TrigDelay_Config
 11773              		.syntax unified
 11774              		.code	16
 11775              		.thumb_func
 11777              	TIM_TrigDelay_Config:
 11778              	.LVL735:
 11779              	.LFB203:
4766:Library/src/lcm32f06x_tim.c **** 
4767:Library/src/lcm32f06x_tim.c **** /**
4768:Library/src/lcm32f06x_tim.c ****   * @name   TIM_TrigDelay_Config
4769:Library/src/lcm32f06x_tim.c ****   * @brief  EN: Trigger delay window time setting.
4770:Library/src/lcm32f06x_tim.c ****   *         CN: 触发延迟窗口时间设置。
4771:Library/src/lcm32f06x_tim.c ****   * @param  TIMx: 
4772:Library/src/lcm32f06x_tim.c ****   *         EN: where x can be 1, 15, 16 or 17 to select the TIM peripheral.
4773:Library/src/lcm32f06x_tim.c ****   *         CN: 其中x可以是1,15,16或17以选择TIM外围设备。
4774:Library/src/lcm32f06x_tim.c ****   * @param  TrigDelayTime: 
4775:Library/src/lcm32f06x_tim.c ****   *         EN: Trigger delay window time.
4776:Library/src/lcm32f06x_tim.c ****   *         CN: 触发延迟窗口时间。
4777:Library/src/lcm32f06x_tim.c ****   *         @range 0x00 - 0xFF
4778:Library/src/lcm32f06x_tim.c ****   * @retval None
4779:Library/src/lcm32f06x_tim.c ****   */
4780:Library/src/lcm32f06x_tim.c **** void TIM_TrigDelay_Config(TIM_TypeDef *TIMx, uint8_t TrigDelayTime)
4781:Library/src/lcm32f06x_tim.c **** {
 11780              		.loc 1 4781 1 is_stmt 1 view -0
 11781              		.cfi_startproc
 11782              		@ args = 0, pretend = 0, frame = 0
 11783              		@ frame_needed = 0, uses_anonymous_args = 0
 11784              		@ link register save eliminated.
4782:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT &= (uint32_t) ~((uint32_t)TIM_DLAMT_DLG_Msk);
 11785              		.loc 1 4782 3 view .LVU3427
 11786              		.loc 1 4782 15 is_stmt 0 view .LVU3428
 11787 0000 FF22     		movs	r2, #255
4783:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT |= TrigDelayTime;
4784:Library/src/lcm32f06x_tim.c **** }
 11788              		.loc 1 4784 1 view .LVU3429
 11789              		@ sp needed
4782:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT &= (uint32_t) ~((uint32_t)TIM_DLAMT_DLG_Msk);
ARM GAS  /tmp/ccWBHqpW.s 			page 346


 11790              		.loc 1 4782 7 view .LVU3430
 11791 0002 C36F     		ldr	r3, [r0, #124]
4782:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT &= (uint32_t) ~((uint32_t)TIM_DLAMT_DLG_Msk);
 11792              		.loc 1 4782 15 view .LVU3431
 11793 0004 9343     		bics	r3, r2
 11794 0006 C367     		str	r3, [r0, #124]
4783:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT |= TrigDelayTime;
 11795              		.loc 1 4783 3 is_stmt 1 view .LVU3432
4783:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT |= TrigDelayTime;
 11796              		.loc 1 4783 7 is_stmt 0 view .LVU3433
 11797 0008 C36F     		ldr	r3, [r0, #124]
4783:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT |= TrigDelayTime;
 11798              		.loc 1 4783 15 view .LVU3434
 11799 000a 1943     		orrs	r1, r3
 11800              	.LVL736:
4783:Library/src/lcm32f06x_tim.c ****   TIMx->DLAMT |= TrigDelayTime;
 11801              		.loc 1 4783 15 view .LVU3435
 11802 000c C167     		str	r1, [r0, #124]
 11803              		.loc 1 4784 1 view .LVU3436
 11804 000e 7047     		bx	lr
 11805              		.cfi_endproc
 11806              	.LFE203:
 11808              		.text
 11809              	.Letext0:
 11810              		.file 3 "Library/inc/lcm32f06x.h"
 11811              		.file 4 "/home/ha/toolchain/arm-gnu-toolchain-14.3/arm-none-eabi/include/machine/_default_types.h"
 11812              		.file 5 "/home/ha/toolchain/arm-gnu-toolchain-14.3/arm-none-eabi/include/sys/_stdint.h"
 11813              		.file 6 "Library/inc/lcm32f06x_tim.h"
ARM GAS  /tmp/ccWBHqpW.s 			page 347


DEFINED SYMBOLS
                            *ABS*:00000000 lcm32f06x_tim.c
     /tmp/ccWBHqpW.s:17     .text.TIM_DTS_Cfg:00000000 $t
     /tmp/ccWBHqpW.s:24     .text.TIM_DTS_Cfg:00000000 TIM_DTS_Cfg
     /tmp/ccWBHqpW.s:49     .text.TIM_ETRE_Enable:00000000 $t
     /tmp/ccWBHqpW.s:56     .text.TIM_ETRE_Enable:00000000 TIM_ETRE_Enable
     /tmp/ccWBHqpW.s:81     .text.TIM_TI1E_Set:00000000 $t
     /tmp/ccWBHqpW.s:88     .text.TIM_TI1E_Set:00000000 TIM_TI1E_Set
     /tmp/ccWBHqpW.s:113    .text.TIM_TI2E_Set:00000000 $t
     /tmp/ccWBHqpW.s:120    .text.TIM_TI2E_Set:00000000 TIM_TI2E_Set
     /tmp/ccWBHqpW.s:145    .text.TIM_TI3E_Set:00000000 $t
     /tmp/ccWBHqpW.s:152    .text.TIM_TI3E_Set:00000000 TIM_TI3E_Set
     /tmp/ccWBHqpW.s:177    .text.TIM_TI4E_Set:00000000 $t
     /tmp/ccWBHqpW.s:184    .text.TIM_TI4E_Set:00000000 TIM_TI4E_Set
     /tmp/ccWBHqpW.s:209    .text.TIM_TimeBaseInit:00000000 $t
     /tmp/ccWBHqpW.s:216    .text.TIM_TimeBaseInit:00000000 TIM_TimeBaseInit
     /tmp/ccWBHqpW.s:448    .text.TIM_TimeBaseInit:00000090 $d
     /tmp/ccWBHqpW.s:457    .text.TIM_TimeBaseStructInit:00000000 $t
     /tmp/ccWBHqpW.s:464    .text.TIM_TimeBaseStructInit:00000000 TIM_TimeBaseStructInit
     /tmp/ccWBHqpW.s:499    .text.TIM_PrescalerConfig:00000000 $t
     /tmp/ccWBHqpW.s:506    .text.TIM_PrescalerConfig:00000000 TIM_PrescalerConfig
     /tmp/ccWBHqpW.s:528    .text.TIM_CounterModeConfig:00000000 $t
     /tmp/ccWBHqpW.s:535    .text.TIM_CounterModeConfig:00000000 TIM_CounterModeConfig
     /tmp/ccWBHqpW.s:569    .text.TIM_SetCounter:00000000 $t
     /tmp/ccWBHqpW.s:576    .text.TIM_SetCounter:00000000 TIM_SetCounter
     /tmp/ccWBHqpW.s:594    .text.TIM_SetAutoreload:00000000 $t
     /tmp/ccWBHqpW.s:601    .text.TIM_SetAutoreload:00000000 TIM_SetAutoreload
     /tmp/ccWBHqpW.s:619    .text.TIM_GetCounter:00000000 $t
     /tmp/ccWBHqpW.s:626    .text.TIM_GetCounter:00000000 TIM_GetCounter
     /tmp/ccWBHqpW.s:645    .text.TIM_GetPrescaler:00000000 $t
     /tmp/ccWBHqpW.s:652    .text.TIM_GetPrescaler:00000000 TIM_GetPrescaler
     /tmp/ccWBHqpW.s:671    .text.TIM_UpdateDisableConfig:00000000 $t
     /tmp/ccWBHqpW.s:678    .text.TIM_UpdateDisableConfig:00000000 TIM_UpdateDisableConfig
     /tmp/ccWBHqpW.s:713    .text.TIM_UpdateRequestConfig:00000000 $t
     /tmp/ccWBHqpW.s:720    .text.TIM_UpdateRequestConfig:00000000 TIM_UpdateRequestConfig
     /tmp/ccWBHqpW.s:768    .text.TIM_ARRPreloadConfig:00000000 $t
     /tmp/ccWBHqpW.s:775    .text.TIM_ARRPreloadConfig:00000000 TIM_ARRPreloadConfig
     /tmp/ccWBHqpW.s:810    .text.TIM_SelectOnePulseMode:00000000 $t
     /tmp/ccWBHqpW.s:817    .text.TIM_SelectOnePulseMode:00000000 TIM_SelectOnePulseMode
     /tmp/ccWBHqpW.s:847    .text.TIM_SetClockDivision:00000000 $t
     /tmp/ccWBHqpW.s:854    .text.TIM_SetClockDivision:00000000 TIM_SetClockDivision
     /tmp/ccWBHqpW.s:883    .text.TIM_SetClockDivision:00000010 $d
     /tmp/ccWBHqpW.s:888    .text.TIM_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:895    .text.TIM_Cmd:00000000 TIM_Cmd
     /tmp/ccWBHqpW.s:1066   .text.TIM_BDTRConfig:00000000 $t
     /tmp/ccWBHqpW.s:1073   .text.TIM_BDTRConfig:00000000 TIM_BDTRConfig
     /tmp/ccWBHqpW.s:1136   .text.TIM_BDTRStructInit:00000000 $t
     /tmp/ccWBHqpW.s:1143   .text.TIM_BDTRStructInit:00000000 TIM_BDTRStructInit
     /tmp/ccWBHqpW.s:1183   .text.TIM_CtrlPWMOutputs:00000000 $t
     /tmp/ccWBHqpW.s:1190   .text.TIM_CtrlPWMOutputs:00000000 TIM_CtrlPWMOutputs
     /tmp/ccWBHqpW.s:1228   .text.TIM_CtrlPWMOutputs:0000001c $d
     /tmp/ccWBHqpW.s:1233   .text.TIM_OC1Init:00000000 $t
     /tmp/ccWBHqpW.s:1240   .text.TIM_OC1Init:00000000 TIM_OC1Init
     /tmp/ccWBHqpW.s:1385   .text.TIM_OC1Init:00000068 $d
     /tmp/ccWBHqpW.s:1395   .text.TIM_OC2Init:00000000 $t
     /tmp/ccWBHqpW.s:1402   .text.TIM_OC2Init:00000000 TIM_OC2Init
     /tmp/ccWBHqpW.s:1552   .text.TIM_OC2Init:0000006c $d
ARM GAS  /tmp/ccWBHqpW.s 			page 348


     /tmp/ccWBHqpW.s:1561   .text.TIM_OC3Init:00000000 $t
     /tmp/ccWBHqpW.s:1568   .text.TIM_OC3Init:00000000 TIM_OC3Init
     /tmp/ccWBHqpW.s:1712   .text.TIM_OC3Init:00000064 $d
     /tmp/ccWBHqpW.s:1723   .text.TIM_OC4Init:00000000 $t
     /tmp/ccWBHqpW.s:1730   .text.TIM_OC4Init:00000000 TIM_OC4Init
     /tmp/ccWBHqpW.s:1882   .text.TIM_OC4Init:00000060 $d
     /tmp/ccWBHqpW.s:1892   .text.TIM_OC5Init:00000000 $t
     /tmp/ccWBHqpW.s:1899   .text.TIM_OC5Init:00000000 TIM_OC5Init
     /tmp/ccWBHqpW.s:2019   .text.TIM_OC5Init:00000050 $d
     /tmp/ccWBHqpW.s:2028   .text.TIM_OCStructInit:00000000 $t
     /tmp/ccWBHqpW.s:2035   .text.TIM_OCStructInit:00000000 TIM_OCStructInit
     /tmp/ccWBHqpW.s:2077   .text.TIM_SelectOCxM:00000000 $t
     /tmp/ccWBHqpW.s:2084   .text.TIM_SelectOCxM:00000000 TIM_SelectOCxM
     /tmp/ccWBHqpW.s:2185   .text.TIM_SelectOCxM:00000044 $d
     /tmp/ccWBHqpW.s:2190   .text.TIM_SetCompare1:00000000 $t
     /tmp/ccWBHqpW.s:2197   .text.TIM_SetCompare1:00000000 TIM_SetCompare1
     /tmp/ccWBHqpW.s:2215   .text.TIM_SetCompare2:00000000 $t
     /tmp/ccWBHqpW.s:2222   .text.TIM_SetCompare2:00000000 TIM_SetCompare2
     /tmp/ccWBHqpW.s:2240   .text.TIM_SetCompare3:00000000 $t
     /tmp/ccWBHqpW.s:2247   .text.TIM_SetCompare3:00000000 TIM_SetCompare3
     /tmp/ccWBHqpW.s:2265   .text.TIM_SetCompare4:00000000 $t
     /tmp/ccWBHqpW.s:2272   .text.TIM_SetCompare4:00000000 TIM_SetCompare4
     /tmp/ccWBHqpW.s:2290   .text.TIM_SetCompare5:00000000 $t
     /tmp/ccWBHqpW.s:2297   .text.TIM_SetCompare5:00000000 TIM_SetCompare5
     /tmp/ccWBHqpW.s:2315   .text.TIM_ForcedOC1Config:00000000 $t
     /tmp/ccWBHqpW.s:2322   .text.TIM_ForcedOC1Config:00000000 TIM_ForcedOC1Config
     /tmp/ccWBHqpW.s:2356   .text.TIM_ForcedOC2Config:00000000 $t
     /tmp/ccWBHqpW.s:2363   .text.TIM_ForcedOC2Config:00000000 TIM_ForcedOC2Config
     /tmp/ccWBHqpW.s:2398   .text.TIM_ForcedOC2Config:00000010 $d
     /tmp/ccWBHqpW.s:2403   .text.TIM_ForcedOC3Config:00000000 $t
     /tmp/ccWBHqpW.s:2410   .text.TIM_ForcedOC3Config:00000000 TIM_ForcedOC3Config
     /tmp/ccWBHqpW.s:2444   .text.TIM_ForcedOC4Config:00000000 $t
     /tmp/ccWBHqpW.s:2451   .text.TIM_ForcedOC4Config:00000000 TIM_ForcedOC4Config
     /tmp/ccWBHqpW.s:2486   .text.TIM_ForcedOC4Config:00000010 $d
     /tmp/ccWBHqpW.s:2491   .text.TIM_ForcedOC5Config:00000000 $t
     /tmp/ccWBHqpW.s:2498   .text.TIM_ForcedOC5Config:00000000 TIM_ForcedOC5Config
     /tmp/ccWBHqpW.s:2532   .text.TIM_CCPreloadControl:00000000 $t
     /tmp/ccWBHqpW.s:2539   .text.TIM_CCPreloadControl:00000000 TIM_CCPreloadControl
     /tmp/ccWBHqpW.s:2574   .text.TIM_OC1PreloadConfig:00000000 $t
     /tmp/ccWBHqpW.s:2581   .text.TIM_OC1PreloadConfig:00000000 TIM_OC1PreloadConfig
     /tmp/ccWBHqpW.s:2615   .text.TIM_OC2PreloadConfig:00000000 $t
     /tmp/ccWBHqpW.s:2622   .text.TIM_OC2PreloadConfig:00000000 TIM_OC2PreloadConfig
     /tmp/ccWBHqpW.s:2657   .text.TIM_OC2PreloadConfig:00000010 $d
     /tmp/ccWBHqpW.s:2662   .text.TIM_OC3PreloadConfig:00000000 $t
     /tmp/ccWBHqpW.s:2669   .text.TIM_OC3PreloadConfig:00000000 TIM_OC3PreloadConfig
     /tmp/ccWBHqpW.s:2703   .text.TIM_OC4PreloadConfig:00000000 $t
     /tmp/ccWBHqpW.s:2710   .text.TIM_OC4PreloadConfig:00000000 TIM_OC4PreloadConfig
     /tmp/ccWBHqpW.s:2745   .text.TIM_OC4PreloadConfig:00000010 $d
     /tmp/ccWBHqpW.s:2750   .text.TIM_OC5PreloadConfig:00000000 $t
     /tmp/ccWBHqpW.s:2757   .text.TIM_OC5PreloadConfig:00000000 TIM_OC5PreloadConfig
     /tmp/ccWBHqpW.s:2791   .text.TIM_OC1FastConfig:00000000 $t
     /tmp/ccWBHqpW.s:2798   .text.TIM_OC1FastConfig:00000000 TIM_OC1FastConfig
     /tmp/ccWBHqpW.s:2832   .text.TIM_OC2FastConfig:00000000 $t
     /tmp/ccWBHqpW.s:2839   .text.TIM_OC2FastConfig:00000000 TIM_OC2FastConfig
     /tmp/ccWBHqpW.s:2874   .text.TIM_OC2FastConfig:00000010 $d
     /tmp/ccWBHqpW.s:2879   .text.TIM_OC3FastConfig:00000000 $t
     /tmp/ccWBHqpW.s:2886   .text.TIM_OC3FastConfig:00000000 TIM_OC3FastConfig
ARM GAS  /tmp/ccWBHqpW.s 			page 349


     /tmp/ccWBHqpW.s:2920   .text.TIM_OC4FastConfig:00000000 $t
     /tmp/ccWBHqpW.s:2927   .text.TIM_OC4FastConfig:00000000 TIM_OC4FastConfig
     /tmp/ccWBHqpW.s:2962   .text.TIM_OC4FastConfig:00000010 $d
     /tmp/ccWBHqpW.s:2967   .text.TIM_OC5FastConfig:00000000 $t
     /tmp/ccWBHqpW.s:2974   .text.TIM_OC5FastConfig:00000000 TIM_OC5FastConfig
     /tmp/ccWBHqpW.s:3008   .text.TIM_ClearOC1Ref:00000000 $t
     /tmp/ccWBHqpW.s:3015   .text.TIM_ClearOC1Ref:00000000 TIM_ClearOC1Ref
     /tmp/ccWBHqpW.s:3049   .text.TIM_ClearOC2Ref:00000000 $t
     /tmp/ccWBHqpW.s:3056   .text.TIM_ClearOC2Ref:00000000 TIM_ClearOC2Ref
     /tmp/ccWBHqpW.s:3091   .text.TIM_ClearOC2Ref:00000010 $d
     /tmp/ccWBHqpW.s:3096   .text.TIM_ClearOC3Ref:00000000 $t
     /tmp/ccWBHqpW.s:3103   .text.TIM_ClearOC3Ref:00000000 TIM_ClearOC3Ref
     /tmp/ccWBHqpW.s:3137   .text.TIM_ClearOC4Ref:00000000 $t
     /tmp/ccWBHqpW.s:3144   .text.TIM_ClearOC4Ref:00000000 TIM_ClearOC4Ref
     /tmp/ccWBHqpW.s:3179   .text.TIM_ClearOC4Ref:00000010 $d
     /tmp/ccWBHqpW.s:3184   .text.TIM_ClearOC5Ref:00000000 $t
     /tmp/ccWBHqpW.s:3191   .text.TIM_ClearOC5Ref:00000000 TIM_ClearOC5Ref
     /tmp/ccWBHqpW.s:3225   .text.TIM_OC1PolarityConfig:00000000 $t
     /tmp/ccWBHqpW.s:3232   .text.TIM_OC1PolarityConfig:00000000 TIM_OC1PolarityConfig
     /tmp/ccWBHqpW.s:3266   .text.TIM_OC1NPolarityConfig:00000000 $t
     /tmp/ccWBHqpW.s:3273   .text.TIM_OC1NPolarityConfig:00000000 TIM_OC1NPolarityConfig
     /tmp/ccWBHqpW.s:3307   .text.TIM_OC2PolarityConfig:00000000 $t
     /tmp/ccWBHqpW.s:3314   .text.TIM_OC2PolarityConfig:00000000 TIM_OC2PolarityConfig
     /tmp/ccWBHqpW.s:3351   .text.TIM_OC2NPolarityConfig:00000000 $t
     /tmp/ccWBHqpW.s:3358   .text.TIM_OC2NPolarityConfig:00000000 TIM_OC2NPolarityConfig
     /tmp/ccWBHqpW.s:3395   .text.TIM_OC3PolarityConfig:00000000 $t
     /tmp/ccWBHqpW.s:3402   .text.TIM_OC3PolarityConfig:00000000 TIM_OC3PolarityConfig
     /tmp/ccWBHqpW.s:3437   .text.TIM_OC3PolarityConfig:00000010 $d
     /tmp/ccWBHqpW.s:3442   .text.TIM_OC3NPolarityConfig:00000000 $t
     /tmp/ccWBHqpW.s:3449   .text.TIM_OC3NPolarityConfig:00000000 TIM_OC3NPolarityConfig
     /tmp/ccWBHqpW.s:3484   .text.TIM_OC3NPolarityConfig:00000010 $d
     /tmp/ccWBHqpW.s:3489   .text.TIM_OC4PolarityConfig:00000000 $t
     /tmp/ccWBHqpW.s:3496   .text.TIM_OC4PolarityConfig:00000000 TIM_OC4PolarityConfig
     /tmp/ccWBHqpW.s:3531   .text.TIM_OC4PolarityConfig:00000010 $d
     /tmp/ccWBHqpW.s:3536   .text.TIM_OC4NPolarityConfig:00000000 $t
     /tmp/ccWBHqpW.s:3543   .text.TIM_OC4NPolarityConfig:00000000 TIM_OC4NPolarityConfig
     /tmp/ccWBHqpW.s:3578   .text.TIM_OC4NPolarityConfig:00000010 $d
     /tmp/ccWBHqpW.s:3583   .text.TIM_OC5PolarityConfig:00000000 $t
     /tmp/ccWBHqpW.s:3590   .text.TIM_OC5PolarityConfig:00000000 TIM_OC5PolarityConfig
     /tmp/ccWBHqpW.s:3625   .text.TIM_OC5PolarityConfig:00000010 $d
     /tmp/ccWBHqpW.s:3630   .text.TIM_OC5NPolarityConfig:00000000 $t
     /tmp/ccWBHqpW.s:3637   .text.TIM_OC5NPolarityConfig:00000000 TIM_OC5NPolarityConfig
     /tmp/ccWBHqpW.s:3672   .text.TIM_OC5NPolarityConfig:00000010 $d
     /tmp/ccWBHqpW.s:3677   .text.TIM_SelectOCREFClear:00000000 $t
     /tmp/ccWBHqpW.s:3684   .text.TIM_SelectOCREFClear:00000000 TIM_SelectOCREFClear
     /tmp/ccWBHqpW.s:3714   .text.TIM_CCxCmd:00000000 $t
     /tmp/ccWBHqpW.s:3721   .text.TIM_CCxCmd:00000000 TIM_CCxCmd
     /tmp/ccWBHqpW.s:3765   .text.TIM_CCxNCmd:00000000 $t
     /tmp/ccWBHqpW.s:3772   .text.TIM_CCxNCmd:00000000 TIM_CCxNCmd
     /tmp/ccWBHqpW.s:3816   .text.TIM_SelectCOM:00000000 $t
     /tmp/ccWBHqpW.s:3823   .text.TIM_SelectCOM:00000000 TIM_SelectCOM
     /tmp/ccWBHqpW.s:3858   .text.TIM_ICInit:00000000 $t
     /tmp/ccWBHqpW.s:3865   .text.TIM_ICInit:00000000 TIM_ICInit
     /tmp/ccWBHqpW.s:3895   .rodata.TIM_ICInit:00000000 $d
     /tmp/ccWBHqpW.s:4522   .text.TIM_ICInit:0000015c $d
     /tmp/ccWBHqpW.s:4537   .text.TIM_ICStructInit:00000000 $t
     /tmp/ccWBHqpW.s:4544   .text.TIM_ICStructInit:00000000 TIM_ICStructInit
ARM GAS  /tmp/ccWBHqpW.s 			page 350


     /tmp/ccWBHqpW.s:4579   .text.TIM_PWMIConfig:00000000 $t
     /tmp/ccWBHqpW.s:4586   .text.TIM_PWMIConfig:00000000 TIM_PWMIConfig
     /tmp/ccWBHqpW.s:5152   .text.TIM_PWMIConfig:00000148 $d
     /tmp/ccWBHqpW.s:5158   .text.TIM_GetCapture1:00000000 $t
     /tmp/ccWBHqpW.s:5165   .text.TIM_GetCapture1:00000000 TIM_GetCapture1
     /tmp/ccWBHqpW.s:5184   .text.TIM_GetCapture2:00000000 $t
     /tmp/ccWBHqpW.s:5191   .text.TIM_GetCapture2:00000000 TIM_GetCapture2
     /tmp/ccWBHqpW.s:5210   .text.TIM_GetCapture3:00000000 $t
     /tmp/ccWBHqpW.s:5217   .text.TIM_GetCapture3:00000000 TIM_GetCapture3
     /tmp/ccWBHqpW.s:5236   .text.TIM_GetCapture4:00000000 $t
     /tmp/ccWBHqpW.s:5243   .text.TIM_GetCapture4:00000000 TIM_GetCapture4
     /tmp/ccWBHqpW.s:5262   .text.TIM_GetCapture5:00000000 $t
     /tmp/ccWBHqpW.s:5269   .text.TIM_GetCapture5:00000000 TIM_GetCapture5
     /tmp/ccWBHqpW.s:5288   .text.TIM_SetIC1Prescaler:00000000 $t
     /tmp/ccWBHqpW.s:5295   .text.TIM_SetIC1Prescaler:00000000 TIM_SetIC1Prescaler
     /tmp/ccWBHqpW.s:5325   .text.TIM_SetIC2Prescaler:00000000 $t
     /tmp/ccWBHqpW.s:5332   .text.TIM_SetIC2Prescaler:00000000 TIM_SetIC2Prescaler
     /tmp/ccWBHqpW.s:5364   .text.TIM_SetIC2Prescaler:00000014 $d
     /tmp/ccWBHqpW.s:5369   .text.TIM_SetIC3Prescaler:00000000 $t
     /tmp/ccWBHqpW.s:5376   .text.TIM_SetIC3Prescaler:00000000 TIM_SetIC3Prescaler
     /tmp/ccWBHqpW.s:5406   .text.TIM_SetIC4Prescaler:00000000 $t
     /tmp/ccWBHqpW.s:5413   .text.TIM_SetIC4Prescaler:00000000 TIM_SetIC4Prescaler
     /tmp/ccWBHqpW.s:5445   .text.TIM_SetIC4Prescaler:00000014 $d
     /tmp/ccWBHqpW.s:5450   .text.TIM_SetIC5Prescaler:00000000 $t
     /tmp/ccWBHqpW.s:5457   .text.TIM_SetIC5Prescaler:00000000 TIM_SetIC5Prescaler
     /tmp/ccWBHqpW.s:5487   .text.TIM_ITConfig:00000000 $t
     /tmp/ccWBHqpW.s:5494   .text.TIM_ITConfig:00000000 TIM_ITConfig
     /tmp/ccWBHqpW.s:5527   .text.TIM_GenerateEvent:00000000 $t
     /tmp/ccWBHqpW.s:5534   .text.TIM_GenerateEvent:00000000 TIM_GenerateEvent
     /tmp/ccWBHqpW.s:5552   .text.TIM_GetFlagStatus:00000000 $t
     /tmp/ccWBHqpW.s:5559   .text.TIM_GetFlagStatus:00000000 TIM_GetFlagStatus
     /tmp/ccWBHqpW.s:5593   .text.TIM_ClearFlag:00000000 $t
     /tmp/ccWBHqpW.s:5600   .text.TIM_ClearFlag:00000000 TIM_ClearFlag
     /tmp/ccWBHqpW.s:5622   .text.TIM_GetITStatus:00000000 $t
     /tmp/ccWBHqpW.s:5629   .text.TIM_GetITStatus:00000000 TIM_GetITStatus
     /tmp/ccWBHqpW.s:5673   .text.TIM_ClearITPendingBit:00000000 $t
     /tmp/ccWBHqpW.s:5680   .text.TIM_ClearITPendingBit:00000000 TIM_ClearITPendingBit
     /tmp/ccWBHqpW.s:5702   .text.TIM_DMAConfig:00000000 $t
     /tmp/ccWBHqpW.s:5709   .text.TIM_DMAConfig:00000000 TIM_DMAConfig
     /tmp/ccWBHqpW.s:5730   .text.TIM_WriteDMAR:00000000 $t
     /tmp/ccWBHqpW.s:5737   .text.TIM_WriteDMAR:00000000 TIM_WriteDMAR
     /tmp/ccWBHqpW.s:5755   .text.TIM_ReadDMAR:00000000 $t
     /tmp/ccWBHqpW.s:5762   .text.TIM_ReadDMAR:00000000 TIM_ReadDMAR
     /tmp/ccWBHqpW.s:5781   .text.TIM_DMACmd:00000000 $t
     /tmp/ccWBHqpW.s:5788   .text.TIM_DMACmd:00000000 TIM_DMACmd
     /tmp/ccWBHqpW.s:5811   .text.TIM_SelectCCDMA:00000000 $t
     /tmp/ccWBHqpW.s:5818   .text.TIM_SelectCCDMA:00000000 TIM_SelectCCDMA
     /tmp/ccWBHqpW.s:5853   .text.TIM_InternalClockConfig:00000000 $t
     /tmp/ccWBHqpW.s:5860   .text.TIM_InternalClockConfig:00000000 TIM_InternalClockConfig
     /tmp/ccWBHqpW.s:5884   .text.TIM_ITRxExternalClockConfig:00000000 $t
     /tmp/ccWBHqpW.s:5891   .text.TIM_ITRxExternalClockConfig:00000000 TIM_ITRxExternalClockConfig
     /tmp/ccWBHqpW.s:5945   .text.TIM_TIxExternalClockConfig:00000000 $t
     /tmp/ccWBHqpW.s:5952   .text.TIM_TIxExternalClockConfig:00000000 TIM_TIxExternalClockConfig
     /tmp/ccWBHqpW.s:6152   .text.TIM_TIxExternalClockConfig:00000068 $d
     /tmp/ccWBHqpW.s:6159   .text.TIM_ETRClockMode1Config:00000000 $t
     /tmp/ccWBHqpW.s:6166   .text.TIM_ETRClockMode1Config:00000000 TIM_ETRClockMode1Config
     /tmp/ccWBHqpW.s:6243   .text.TIM_ETRClockMode1Config:0000001c $d
ARM GAS  /tmp/ccWBHqpW.s 			page 351


     /tmp/ccWBHqpW.s:6248   .text.TIM_ETRClockMode2Config:00000000 $t
     /tmp/ccWBHqpW.s:6255   .text.TIM_ETRClockMode2Config:00000000 TIM_ETRClockMode2Config
     /tmp/ccWBHqpW.s:6324   .text.TIM_ETRClockMode2Config:00000020 $d
     /tmp/ccWBHqpW.s:6329   .text.TIM_SelectInputTrigger:00000000 $t
     /tmp/ccWBHqpW.s:6336   .text.TIM_SelectInputTrigger:00000000 TIM_SelectInputTrigger
     /tmp/ccWBHqpW.s:6370   .text.TIM_SelectOutputTrigger:00000000 $t
     /tmp/ccWBHqpW.s:6377   .text.TIM_SelectOutputTrigger:00000000 TIM_SelectOutputTrigger
     /tmp/ccWBHqpW.s:6407   .text.TIM_SelectSlaveMode:00000000 $t
     /tmp/ccWBHqpW.s:6414   .text.TIM_SelectSlaveMode:00000000 TIM_SelectSlaveMode
     /tmp/ccWBHqpW.s:6444   .text.TIM_SelectMasterSlaveMode:00000000 $t
     /tmp/ccWBHqpW.s:6451   .text.TIM_SelectMasterSlaveMode:00000000 TIM_SelectMasterSlaveMode
     /tmp/ccWBHqpW.s:6471   .text.TIM_ETRConfig:00000000 $t
     /tmp/ccWBHqpW.s:6478   .text.TIM_ETRConfig:00000000 TIM_ETRConfig
     /tmp/ccWBHqpW.s:6524   .text.TIM_ETRConfig:00000014 $d
     /tmp/ccWBHqpW.s:6529   .text.TIM_EncoderInterfaceConfig:00000000 $t
     /tmp/ccWBHqpW.s:6536   .text.TIM_EncoderInterfaceConfig:00000000 TIM_EncoderInterfaceConfig
     /tmp/ccWBHqpW.s:6621   .text.TIM_EncoderInterfaceConfig:0000002c $d
     /tmp/ccWBHqpW.s:6626   .text.TIM_SelectHallSensor:00000000 $t
     /tmp/ccWBHqpW.s:6633   .text.TIM_SelectHallSensor:00000000 TIM_SelectHallSensor
     /tmp/ccWBHqpW.s:6668   .text.TIM1_IntputSourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:6675   .text.TIM1_IntputSourceCfg:00000000 TIM1_IntputSourceCfg
     /tmp/ccWBHqpW.s:6792   .text.TIM1_IntputSourceCfg:0000002c $d
     /tmp/ccWBHqpW.s:6799   .text.TIM2_IntputSourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:6806   .text.TIM2_IntputSourceCfg:00000000 TIM2_IntputSourceCfg
     /tmp/ccWBHqpW.s:6922   .text.TIM2_IntputSourceCfg:0000002c $d
     /tmp/ccWBHqpW.s:6929   .text.TIM15_IntputSourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:6936   .text.TIM15_IntputSourceCfg:00000000 TIM15_IntputSourceCfg
     /tmp/ccWBHqpW.s:7052   .text.TIM15_IntputSourceCfg:0000002c $d
     /tmp/ccWBHqpW.s:7059   .text.TIM16_IntputSourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:7066   .text.TIM16_IntputSourceCfg:00000000 TIM16_IntputSourceCfg
     /tmp/ccWBHqpW.s:7184   .text.TIM16_IntputSourceCfg:00000030 $d
     /tmp/ccWBHqpW.s:7191   .text.TIM17_IntputSourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:7198   .text.TIM17_IntputSourceCfg:00000000 TIM17_IntputSourceCfg
     /tmp/ccWBHqpW.s:7316   .text.TIM17_IntputSourceCfg:00000030 $d
     /tmp/ccWBHqpW.s:7323   .text.TIM1_BreakSourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:7330   .text.TIM1_BreakSourceCfg:00000000 TIM1_BreakSourceCfg
     /tmp/ccWBHqpW.s:7881   .text.TIM1_BreakSourceCfg:000000dc $d
     /tmp/ccWBHqpW.s:7888   .text.TIM1_OCREF_CLR_SourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:7895   .text.TIM1_OCREF_CLR_SourceCfg:00000000 TIM1_OCREF_CLR_SourceCfg
     /tmp/ccWBHqpW.s:8239   .text.TIM1_OCREF_CLR_SourceCfg:00000080 $d
     /tmp/ccWBHqpW.s:8246   .text.TIM17_BreakSourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:8253   .text.TIM17_BreakSourceCfg:00000000 TIM17_BreakSourceCfg
     /tmp/ccWBHqpW.s:8597   .text.TIM17_BreakSourceCfg:00000080 $d
     /tmp/ccWBHqpW.s:8604   .text.TIM15_BreakSourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:8611   .text.TIM15_BreakSourceCfg:00000000 TIM15_BreakSourceCfg
     /tmp/ccWBHqpW.s:9162   .text.TIM15_BreakSourceCfg:000000dc $d
     /tmp/ccWBHqpW.s:9169   .text.TIM16_BreakSourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:9176   .text.TIM16_BreakSourceCfg:00000000 TIM16_BreakSourceCfg
     /tmp/ccWBHqpW.s:9727   .text.TIM16_BreakSourceCfg:000000dc $d
     /tmp/ccWBHqpW.s:9734   .text.TIM2_BreakSourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:9741   .text.TIM2_BreakSourceCfg:00000000 TIM2_BreakSourceCfg
     /tmp/ccWBHqpW.s:10085  .text.TIM2_BreakSourceCfg:00000080 $d
     /tmp/ccWBHqpW.s:10092  .text.TIM2_OCREF_CLR_SourceCfg:00000000 $t
     /tmp/ccWBHqpW.s:10099  .text.TIM2_OCREF_CLR_SourceCfg:00000000 TIM2_OCREF_CLR_SourceCfg
     /tmp/ccWBHqpW.s:10443  .text.TIM2_OCREF_CLR_SourceCfg:00000080 $d
     /tmp/ccWBHqpW.s:10450  .text.TIM1_PWMxSel_Config:00000000 $t
     /tmp/ccWBHqpW.s:10457  .text.TIM1_PWMxSel_Config:00000000 TIM1_PWMxSel_Config
ARM GAS  /tmp/ccWBHqpW.s 			page 352


     /tmp/ccWBHqpW.s:10503  .text.TIM1_PWMxSel_Config:0000001c $d
     /tmp/ccWBHqpW.s:10508  .text.TIM1_CompareOffsetMode:00000000 $t
     /tmp/ccWBHqpW.s:10515  .text.TIM1_CompareOffsetMode:00000000 TIM1_CompareOffsetMode
     /tmp/ccWBHqpW.s:10558  .text.TIM1_CompareOffsetMode:0000001c $d
     /tmp/ccWBHqpW.s:10563  .text.TIM1_SetCompareOffset1:00000000 $t
     /tmp/ccWBHqpW.s:10570  .text.TIM1_SetCompareOffset1:00000000 TIM1_SetCompareOffset1
     /tmp/ccWBHqpW.s:10591  .text.TIM1_SetCompareOffset1:00000008 $d
     /tmp/ccWBHqpW.s:10596  .text.TIM1_SetCompareOffset2:00000000 $t
     /tmp/ccWBHqpW.s:10603  .text.TIM1_SetCompareOffset2:00000000 TIM1_SetCompareOffset2
     /tmp/ccWBHqpW.s:10624  .text.TIM1_SetCompareOffset2:00000008 $d
     /tmp/ccWBHqpW.s:10629  .text.TIM1_SetCompareOffset3:00000000 $t
     /tmp/ccWBHqpW.s:10636  .text.TIM1_SetCompareOffset3:00000000 TIM1_SetCompareOffset3
     /tmp/ccWBHqpW.s:10657  .text.TIM1_SetCompareOffset3:00000008 $d
     /tmp/ccWBHqpW.s:10662  .text.TIM1_SetCompareOffset4:00000000 $t
     /tmp/ccWBHqpW.s:10669  .text.TIM1_SetCompareOffset4:00000000 TIM1_SetCompareOffset4
     /tmp/ccWBHqpW.s:10690  .text.TIM1_SetCompareOffset4:00000008 $d
     /tmp/ccWBHqpW.s:10695  .text.TIM1_SetCompareOffset5:00000000 $t
     /tmp/ccWBHqpW.s:10702  .text.TIM1_SetCompareOffset5:00000000 TIM1_SetCompareOffset5
     /tmp/ccWBHqpW.s:10723  .text.TIM1_SetCompareOffset5:00000008 $d
     /tmp/ccWBHqpW.s:10728  .text.TIM_GetCaptureOffset1:00000000 $t
     /tmp/ccWBHqpW.s:10735  .text.TIM_GetCaptureOffset1:00000000 TIM_GetCaptureOffset1
     /tmp/ccWBHqpW.s:10757  .text.TIM_GetCaptureOffset2:00000000 $t
     /tmp/ccWBHqpW.s:10764  .text.TIM_GetCaptureOffset2:00000000 TIM_GetCaptureOffset2
     /tmp/ccWBHqpW.s:10786  .text.TIM_GetCaptureOffset3:00000000 $t
     /tmp/ccWBHqpW.s:10793  .text.TIM_GetCaptureOffset3:00000000 TIM_GetCaptureOffset3
     /tmp/ccWBHqpW.s:10815  .text.TIM_GetCaptureOffset4:00000000 $t
     /tmp/ccWBHqpW.s:10822  .text.TIM_GetCaptureOffset4:00000000 TIM_GetCaptureOffset4
     /tmp/ccWBHqpW.s:10844  .text.TIM_GetCaptureOffset5:00000000 $t
     /tmp/ccWBHqpW.s:10851  .text.TIM_GetCaptureOffset5:00000000 TIM_GetCaptureOffset5
     /tmp/ccWBHqpW.s:10873  .text.TIM_SetCompareTuning1:00000000 $t
     /tmp/ccWBHqpW.s:10880  .text.TIM_SetCompareTuning1:00000000 TIM_SetCompareTuning1
     /tmp/ccWBHqpW.s:10898  .text.TIM_SetCompareTuning2:00000000 $t
     /tmp/ccWBHqpW.s:10905  .text.TIM_SetCompareTuning2:00000000 TIM_SetCompareTuning2
     /tmp/ccWBHqpW.s:10923  .text.TIM_SetCompareTuning3:00000000 $t
     /tmp/ccWBHqpW.s:10930  .text.TIM_SetCompareTuning3:00000000 TIM_SetCompareTuning3
     /tmp/ccWBHqpW.s:10948  .text.TIM_SetCompareTuning4:00000000 $t
     /tmp/ccWBHqpW.s:10955  .text.TIM_SetCompareTuning4:00000000 TIM_SetCompareTuning4
     /tmp/ccWBHqpW.s:10973  .text.TIM_SetCompareTuning5:00000000 $t
     /tmp/ccWBHqpW.s:10980  .text.TIM_SetCompareTuning5:00000000 TIM_SetCompareTuning5
     /tmp/ccWBHqpW.s:10998  .text.TIM_GetCompareTuning1:00000000 $t
     /tmp/ccWBHqpW.s:11005  .text.TIM_GetCompareTuning1:00000000 TIM_GetCompareTuning1
     /tmp/ccWBHqpW.s:11024  .text.TIM_GetCompareTuning2:00000000 $t
     /tmp/ccWBHqpW.s:11031  .text.TIM_GetCompareTuning2:00000000 TIM_GetCompareTuning2
     /tmp/ccWBHqpW.s:11050  .text.TIM_GetCompareTuning3:00000000 $t
     /tmp/ccWBHqpW.s:11057  .text.TIM_GetCompareTuning3:00000000 TIM_GetCompareTuning3
     /tmp/ccWBHqpW.s:11076  .text.TIM_GetCompareTuning4:00000000 $t
     /tmp/ccWBHqpW.s:11083  .text.TIM_GetCompareTuning4:00000000 TIM_GetCompareTuning4
     /tmp/ccWBHqpW.s:11102  .text.TIM_GetCompareTuning5:00000000 $t
     /tmp/ccWBHqpW.s:11109  .text.TIM_GetCompareTuning5:00000000 TIM_GetCompareTuning5
     /tmp/ccWBHqpW.s:11128  .text.TIM_BreakTrigOci_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11135  .text.TIM_BreakTrigOci_Cmd:00000000 TIM_BreakTrigOci_Cmd
     /tmp/ccWBHqpW.s:11173  .text.TIM_BreakTrigOci_Cmd:0000001c $d
     /tmp/ccWBHqpW.s:11178  .text.TIM_OCTuning1_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11185  .text.TIM_OCTuning1_Cmd:00000000 TIM_OCTuning1_Cmd
     /tmp/ccWBHqpW.s:11223  .text.TIM_OCTuning1_Cmd:0000001c $d
     /tmp/ccWBHqpW.s:11228  .text.TIM_OCTuning2_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11235  .text.TIM_OCTuning2_Cmd:00000000 TIM_OCTuning2_Cmd
ARM GAS  /tmp/ccWBHqpW.s 			page 353


     /tmp/ccWBHqpW.s:11274  .text.TIM_OCTuning3_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11281  .text.TIM_OCTuning3_Cmd:00000000 TIM_OCTuning3_Cmd
     /tmp/ccWBHqpW.s:11319  .text.TIM_OCTuning3_Cmd:0000001c $d
     /tmp/ccWBHqpW.s:11324  .text.TIM_OCTuning4_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11331  .text.TIM_OCTuning4_Cmd:00000000 TIM_OCTuning4_Cmd
     /tmp/ccWBHqpW.s:11370  .text.TIM_OCTuning5_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11377  .text.TIM_OCTuning5_Cmd:00000000 TIM_OCTuning5_Cmd
     /tmp/ccWBHqpW.s:11415  .text.TIM_OCTuning5_Cmd:0000001c $d
     /tmp/ccWBHqpW.s:11420  .text.TIM_OCTuning1Update_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11427  .text.TIM_OCTuning1Update_Cmd:00000000 TIM_OCTuning1Update_Cmd
     /tmp/ccWBHqpW.s:11465  .text.TIM_OCTuning1Update_Cmd:0000001c $d
     /tmp/ccWBHqpW.s:11470  .text.TIM_OCTuning2Update_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11477  .text.TIM_OCTuning2Update_Cmd:00000000 TIM_OCTuning2Update_Cmd
     /tmp/ccWBHqpW.s:11515  .text.TIM_OCTuning2Update_Cmd:0000001c $d
     /tmp/ccWBHqpW.s:11520  .text.TIM_OCTuning3Update_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11527  .text.TIM_OCTuning3Update_Cmd:00000000 TIM_OCTuning3Update_Cmd
     /tmp/ccWBHqpW.s:11565  .text.TIM_OCTuning3Update_Cmd:0000001c $d
     /tmp/ccWBHqpW.s:11570  .text.TIM_OCTuning4Update_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11577  .text.TIM_OCTuning4Update_Cmd:00000000 TIM_OCTuning4Update_Cmd
     /tmp/ccWBHqpW.s:11615  .text.TIM_OCTuning4Update_Cmd:0000001c $d
     /tmp/ccWBHqpW.s:11620  .text.TIM_OCTuning5Update_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11627  .text.TIM_OCTuning5Update_Cmd:00000000 TIM_OCTuning5Update_Cmd
     /tmp/ccWBHqpW.s:11665  .text.TIM_OCTuning5Update_Cmd:0000001c $d
     /tmp/ccWBHqpW.s:11670  .text.TIM_TrigDelayClear_Cmd:00000000 $t
     /tmp/ccWBHqpW.s:11677  .text.TIM_TrigDelayClear_Cmd:00000000 TIM_TrigDelayClear_Cmd
     /tmp/ccWBHqpW.s:11715  .text.TIM_TrigDelayClear_Cmd:0000001c $d
     /tmp/ccWBHqpW.s:11720  .text.TIM_AntiMisoperateTrig_Config:00000000 $t
     /tmp/ccWBHqpW.s:11727  .text.TIM_AntiMisoperateTrig_Config:00000000 TIM_AntiMisoperateTrig_Config
     /tmp/ccWBHqpW.s:11765  .text.TIM_AntiMisoperateTrig_Config:00000018 $d
     /tmp/ccWBHqpW.s:11770  .text.TIM_TrigDelay_Config:00000000 $t
     /tmp/ccWBHqpW.s:11777  .text.TIM_TrigDelay_Config:00000000 TIM_TrigDelay_Config

NO UNDEFINED SYMBOLS
